Chip verification method and device based on test case

Abstract

The invention provides a chip verification method and device based on a test case. The method comprises the following steps: running a folder generation script based on a to-be-verified chip; based on the folder generation script and a test case keyword input condition, obtaining at least one target folder by utilizing a pre-constructed test case folder; wherein the test case folder comprises script files of a plurality of test cases, and the target folder is a function point test case folder related to a keyword of the test case or a default function point test case folder; and running a simulation command based on the target folder to obtain a test result. According to the method and the device, a plurality of function point test case folders related to the test can be generated once through the script, so that the folders correspond to the function point test cases one by one to run the simulation command, the creation process of the multi-test case simulation folder is simplified, the cost is low, and the simulation efficiency is conveniently improved.

Description

Technical Field

[0001] The present invention relates to the field of chip verification technology, and in particular to a chip verification method and device based on test cases. Background Art

[0002] Chip Verification Automation is a key step in the chip design and production process. It specifically involves the use of computer programs to replace manual testing and verification during the chip production process to ensure that the chip works according to established specifications and performance requirements. This technology can improve the reliability and quality of chips, reduce human errors and increase production capacity. The necessity of chip verification automation lies in: it can improve reliability. By automating the verification process, errors caused by human subjective judgment can be avoided, thereby improving product reliability. At the same time, it reduces costs. Automated verification can save manpower, time and resources and reduce production costs. At the same time, automated verification can also improve efficiency, shorten product time to market and reduce inventory backlogs.

[0003] With the increasing complexity of integrated circuit chip design, it is necessary to improve development efficiency. In order to avoid costly re-spins, developers need to verify as comprehensively as possible. However, due to cost and time-to-market pressures, developers cannot keep running verification and debugging cycles. The workload and difficulty of chip verification are constantly increasing as the design complexity increases.

[0004] During chip verification, developers need to write multiple verification cases by analyzing functional points, and implement system-level verification by simulating verification cases. When the verification cases are running, collect code coverage. After obtaining the coverage report, analyze the code that is not covered in the report. For the code that should be covered but is not covered, write targeted verification cases, and then rerun, collect, and analyze until the coverage meets the requirements.

[0005] In the prior art, the simulation of the verification process is usually performed by developers manually running a single command or repeatedly running the simulation command using a list of test cases. This method of testing is not only time-consuming and labor-intensive, but also not conducive to the management of test cases, and may cause omissions. If a large number of test cases need to be modified, it will be more troublesome to repeat the simulation test process.

[0006] In summary, existing chip verification methods have the problem of high time complexity. Summary of the invention

[0007] The present invention provides a chip verification method and device based on test cases, which are used to solve the defect of high time complexity in the prior art and realize chip verification with high efficiency and low cost.

[0008] The present invention provides a chip verification method based on a test case, comprising the following steps: Generate script based on the chip to be verified running folder; Based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; A simulation command is run based on the target folder to obtain a test result.

[0009] According to a chip verification method based on a test case provided by the present invention, when the test case keyword input situation is not obtained, based on the folder generation script and the test case keyword input situation, at least one target folder is obtained using a pre-built test case folder, specifically including: Extract the test cases in the test case folder based on the folder generation script to obtain a text file storing the function point names of the test cases; The template folder is copied based on the folder generation script; wherein the template folder includes an automatic compilation file and a default simulation command; The copied template folder and the default simulation command under the template folder are renamed in sequence based on the function point name stored in the text file to obtain a target folder.

[0010] According to a chip verification method based on a test case provided by the present invention, when the test case keyword input situation has been obtained, based on the folder generation script and the test case keyword input situation, at least one target folder is obtained using a pre-built test case folder, specifically including: Generating a script based on the folder searches under the test case folder according to the test case keyword; In the case that a folder with a name corresponding to the test case keyword exists under the test case folder, the folder with a name corresponding to the test case keyword is used as the target folder.

[0011] According to a chip verification method based on a test case provided by the present invention, a script is generated based on the folder, and a search is performed under the test case folder according to the test case keyword, and then the following is further included: When there is no folder with a name corresponding to the test case keyword under the test case folder, a folder corresponding to the test case keyword is generated and the name of the default simulation command in the folder is modified according to the test case keyword to obtain a target folder.

[0012] According to a test case-based chip verification method provided by the present invention, the target folder supports repeated execution of multiple simulation commands.

[0013] According to a chip verification method based on test cases provided by the present invention, the folder generation script is a test script based on a UVM framework.

[0014] The present invention also provides a chip verification device based on a test case, comprising the following modules: A start unit is used to generate a script based on the chip to be verified by running a folder; A folder unit, used to generate a script based on the folder and the input of a test case keyword, and obtain at least one target folder using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; The simulation unit is used to run the simulation command based on the target folder to obtain the test result.

[0015] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, a chip verification method based on a test case as described above is implemented.

[0016] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the test case-based chip verification methods described above.

[0017] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the chip verification method based on any of the test cases described above is implemented.

[0018] The chip verification method and device based on test cases provided by the present invention generate scripts by running a folder based on the chip to be verified; based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; and a simulation command is run based on the target folder to obtain a test result. The present invention can generate multiple function point test case folders related to the test at one time through a script, so that the folders correspond to the function point test cases one by one to run the simulation command, simplifying the creation process of multiple test case simulation folders, with low cost and easy to improve the efficiency of simulation, solving the problem of the existing chip verification simulation test that multiple folders need to be created for different test cases one by one, and effectively improving the simulation efficiency and the speed of coverage collection. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 This is one of the flow charts of the chip verification method based on the test case provided by the present invention.

[0021] Figure 2 This is the second flow chart of the chip verification method based on test cases provided by the present invention.

[0022] Figure 3 It is a schematic diagram of the test case folder structure of the test case-based chip verification method provided by the present invention.

[0023] Figure 4 This is the third flow chart of the chip verification method based on test cases provided by the present invention.

[0024] Figure 5 It is a schematic diagram of the structure of a chip verification device based on a test case provided by the present invention.

[0025] Figure 6 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Combine the following Figure 1-Figure 4 Describe the chip verification method based on test cases of the present invention, Figure 1 FIG. 1 is one of the flow charts of the chip verification method based on the test case provided by the present invention, such as Figure 1 As shown, the method includes step 110, step 120 and step 130.

[0028] Step 110: Generate a script based on the chip to be verified running folder.

[0029] It should be noted that the folder generation script is run based on the chip to be verified. It should be noted that the folder generation script referred to in the embodiment of the present invention includes the following functions: automatically generating a specified number of target folders, parsing test case function point keywords, selecting instructions corresponding to the test case file from the folder containing all test cases to replace the default simulation command in the generated simulation folder, and running the simulation command in the target folder corresponding to the function point.

[0030] Further, in some embodiments, the folder generation script is a test script based on the UVM framework. Specifically, the present invention is based on a verification platform development framework (UVM platform) based on SystemVerilog for testing and script use.

[0031] Step 120: Based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one.

[0032] In step 120, a target folder is generated based on the folder generation script. Specifically, this step can be divided into two cases according to the test case keyword input situation: the test case keyword input situation is not obtained and the test case keyword input situation is obtained.

[0033] Use the test case folder to generate the target folder according to different situations.

[0034] It needs to be explained that Figure 3 As shown, the test case folder is a pre-built script file including multiple function point test cases related to the verification of the chip to be verified. Each function point test case script file corresponds to a corresponding test case, and the test case can be modified directly in this folder. In some embodiments, the test case script file is a cshell script file, that is, its format is .csh file. That is to say, the existing test cases are named as .csh files according to the function points and integrated into the test case folder, such as Figure 3 As shown in the figure, point1-pointn refer to different function names, which are named xx.csh in actual use.

[0035] Furthermore, the target folder is a default function point test case folder related to the test case keyword or a default function point test case folder. Specifically, when the test case keyword input is not obtained, the target folder is a default function point test case folder generated using the test case folder, which contains an automatic compilation file and a corresponding function point simulation command. When the test case keyword input is obtained, the target folder is a function point test case folder related to the test case keyword.

[0036] Step 130: Run a simulation command based on the target folder to obtain a test result.

[0037] In step 130, the simulation command in the target folder obtained in step 120 is executed, and the test case in the corresponding function point test case folder is called to perform the running test to obtain the final test result.

[0038] When multiple target folders are generated, step 130 is performed on each target folder to obtain a final test result.

[0039] The chip verification method based on test cases provided by the present invention simplifies the creation process of multiple test case simulation folders and the manual operation of simulation commands, which is convenient for improving the efficiency of simulation, solves the problem that in the existing chip verification simulation test, a plurality of different folders need to be created for different test cases one by one for simulation testing, and improves the simulation efficiency and the speed of coverage collection. A more comprehensive and well-organized test can be performed in a shorter time. The reliability of verification is improved, and the error caused by human subjective judgment can be reduced through the automated verification process, thereby increasing the reliability of the product. The cost of chip development can be reduced, and manpower, time and resources can be saved through automated verification, thereby reducing production costs. At the same time, automated verification can also improve development efficiency and shorten the time of chip verification.

[0040] The following further describes step 120. In some embodiments, when the test case keyword input is not obtained, based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder, specifically including: Step 210: extracting the test cases in the test case folder based on the folder generation script, and obtaining a text file storing the function point names of the test cases; Step 220: Copying a template folder based on a folder generation script; wherein the template folder includes an automatic compilation file and a default simulation command; Step 230: Based on the function point name stored in the text file, the copied template folder and the default simulation command under the template folder are renamed in sequence to obtain a target folder.

[0041] Specifically, Figure 2 and Figure 4 As shown, if the test case keyword is not obtained or the test case keyword is not input, in this case, in step 210, the folder generation script will extract the name of the test case under the test case folder by default and generate a text file storing the name. The present invention does not limit the specific format of the text file, and it can be selected according to actual conditions.

[0042] It should be emphasized that the text file stores the names of the function points in the test case. That is, in the process of generating the text file, if a test case includes more than one function point, the names of the multiple function points included are stored in the text file. If a test case includes only one function point, the name of the function point is stored in the text file. The order of the function point names in the text file can be arranged according to the order of recognition, and the present invention does not limit this.

[0043] In a specific embodiment, the format of the text file is a .txt file.

[0044] Afterwards, in step 220, the template folder is copied based on the folder generation script. It should be noted that the template folder is a simulation folder with a default name, including an automatic compilation file (such as a makefile file) and a default simulation command, which is a simulation template folder with a default name provided to the script for copying and modifying. During the copying process, the number of template folders copied is preferably the same as the number of function point names in the text file.

[0045] In step 230, the name of the copied template folder and the name of the default simulation command in the directory of the template folder are renamed according to the text file based on the folder generation script. That is, the copied template folder is renamed in sequence according to the function point name stored in the text file, and the name of the default simulation command in the directory is also replaced with the corresponding function point name. The target folder obtained can also be called a function point simulation folder, which is generated after the script copies the template folder and modifies the default name. There are automatic compilation files and corresponding function point simulation commands in the directory, which are used to run the script file of the corresponding function point test case extracted by the script.

[0046] Then, step 130 can be executed, that is, the modified simulation command can be directly run in the folder. Figure 4 As shown, the embodiment of the present invention includes a folder generation script, a template (template folder), a test case folder, and a template folder copied from the script and renamed test_point1-test_pointn.

[0047] The present invention can automatically create simulation folders corresponding to use cases of different functional points through scripts, and can automatically modify default names and replace simulation commands.

[0048] In some embodiments, when the test case keyword input situation has been obtained, based on the folder generation script and the test case keyword input situation, obtaining at least one target folder using a pre-built test case folder specifically includes: Generating a script based on the folder searches under the test case folder according to the test case keyword; In the case that a folder with a name corresponding to the test case keyword exists under the test case folder, the folder with a name corresponding to the test case keyword is used as the target folder.

[0049] Specifically, if the test case keyword is obtained, the test case folder will be loaded by default, such as Figure 2 As shown, firstly search in the test directory whether there is a folder with a name corresponding to the test case keyword. If so, directly use the relevant folder as the target folder, and then execute step 130, that is, perform simulation in the corresponding folder.

[0050] Further, based on the above embodiment, when there is no folder with the name corresponding to the test case keyword under the test case folder, a folder corresponding to the test case keyword is generated and the name of the default simulation command in the folder is modified according to the test case keyword to obtain the target folder.

[0051] That is to say, in the process of searching whether there is a folder with a name corresponding to the test case keyword under the test directory, if no folder with a name corresponding to the test case keyword is found, a folder corresponding to the test case keyword is generated under the test case folder, and the default simulation command is modified according to the test case keyword to obtain the target folder.

[0052] More specifically, the process of generating a folder corresponding to the test case keyword under the test case folder and modifying the default simulation command according to the test case keyword is similar to step 220-step 230, and the present invention will not be repeated here.

[0053] In one embodiment, the test case keywords are first split into function points, and then the template folder is copied based on the folder generation script. In the copying process, the number of template folders copied is preferably the same as the number of function points split by the test case keywords.

[0054] Afterwards, the folder-generated script is used to rename the names of the copied template folders and the names of the default simulation commands in the template folder directory according to the function points split by the test case keywords. That is to say, the copied template folders are renamed in turn according to the function point names split by the test case keywords, and the names of the default simulation commands in the directory are also replaced with the corresponding function point names to obtain the target folder, which can also be called a function point simulation folder. There are automatic compilation files and corresponding function point simulation commands in the directory, which are used to run the script files of the corresponding function point test cases extracted by the script.

[0055] The present invention can generate a new simulation folder by inputting the name of the retest function point through a script and perform a use case retest without affecting the simulation results of other tests.

[0056] In summary, the present invention extracts simulation case files through scripts, copies template simulation folders that can be automatically compiled, and modifies the default name of the template simulation folder to the corresponding function point in the .csh file, so that the folder corresponds to the function point test case one by one to run the simulation command, and multiple folders and corresponding function point test case folders can be generated at one time. In this way, the creation process of multiple test case simulation folders is simplified, the cost is low, and it is easy to improve the efficiency of simulation, which solves the existing problem of creating multiple folders for different test cases one by one in chip verification simulation testing, effectively improving the simulation efficiency and the speed of coverage collection.

[0057] Based on the above embodiments, in some embodiments, the target folder supports repeated execution of multiple simulation commands.

[0058] It should be noted that the target folder is essentially a function point test case folder, that is, a simulation folder named after a certain function point generated by the script, and the simulation command can be repeatedly run in this folder.

[0059] The chip verification method based on test cases provided by the present invention generates a script by running a folder based on the chip to be verified; based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; and a simulation command is run based on the target folder to obtain a test result. The present invention can generate multiple function point test case folders related to the test at one time through a script, so that the folders correspond to the function point test cases one by one to run the simulation command, simplifying the creation process of multiple test case simulation folders, with low cost and easy to improve the efficiency of simulation, solving the problem of the existing chip verification simulation test that multiple folders need to be created for different test cases one by one, and effectively improving the simulation efficiency and the speed of coverage collection.

[0060] The chip verification device based on the test case provided by the present invention is described below. The chip verification device based on the test case described below and the chip verification method based on the test case described above can refer to each other. Figure 5 is a schematic diagram of the structure of a chip verification device based on a test case provided by the present invention, such as Figure 5 As shown, the device includes the following modules: A starting unit 510 is used to generate a script based on the chip to be verified running folder; A folder unit 520, configured to generate a script based on the folder and the input of a test case keyword, and obtain at least one target folder using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; The simulation unit 530 is used to run the simulation command based on the target folder to obtain the test result.

[0061] According to a chip verification device based on a test case provided by the present invention, when the test case keyword input situation is not obtained, based on the folder generation script and the test case keyword input situation, at least one target folder is obtained using a pre-built test case folder, specifically including: Extract the test cases in the test case folder based on the folder generation script to obtain a text file storing the function point names of the test cases; The template folder is copied based on the folder generation script; wherein the template folder includes an automatic compilation file and a default simulation command; The copied template folder and the default simulation command under the template folder are renamed in sequence based on the function point name stored in the text file to obtain a target folder.

[0062] According to a chip verification device based on a test case provided by the present invention, when the test case keyword input situation has been obtained, based on the folder generation script and the test case keyword input situation, at least one target folder is obtained using a pre-built test case folder, specifically including: Generating a script based on the folder searches under the test case folder according to the test case keyword; In the case that a folder with a name corresponding to the test case keyword exists under the test case folder, the folder with a name corresponding to the test case keyword is used as the target folder.

[0063] According to a chip verification device based on a test case provided by the present invention, a script is generated based on the folder to search under the test case folder according to the test case keyword, and then further includes: When there is no folder with a name corresponding to the test case keyword under the test case folder, a folder corresponding to the test case keyword is generated and the name of the default simulation command in the folder is modified according to the test case keyword to obtain a target folder.

[0064] According to a chip verification device based on a test case provided by the present invention, the target folder supports repeated execution of multiple simulation commands.

[0065] According to a chip verification device based on test cases provided by the present invention, the folder generation script is a test script based on the UVM framework.

[0066] The chip verification device based on test cases provided by the present invention generates a script by running a folder based on the chip to be verified; based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; and a simulation command is run based on the target folder to obtain a test result. The present invention can generate multiple function point test case folders related to the test at one time through a script, so that the folders correspond to the function point test cases one by one to run the simulation command, simplifying the creation process of multiple test case simulation folders, with low cost and easy to improve the efficiency of simulation, solving the problem of the existing chip verification simulation test that multiple folders need to be created for different test cases one by one, and effectively improving the simulation efficiency and the speed of coverage collection.

[0067] Figure 6 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 6 As shown, the electronic device may include: a processor 610, a communication interface 620, a memory 630 and a communication bus 640, wherein the processor 610, the communication interface 620 and the memory 630 complete mutual communication through the communication bus 640. The processor 610 may call the logic instructions in the memory 630 to execute a chip verification method based on a test case, the method comprising: running a folder to generate a script based on the chip to be verified; based on the folder generation script and the test case keyword input, obtaining at least one target folder using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default; running a simulation command based on the target folder to obtain a test result.

[0068] In addition, the logic instructions in the above-mentioned memory 630 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0069] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the chip verification method based on the test case provided by the above methods, and the method includes: generating a script based on a running folder of the chip to be verified; obtaining at least one target folder using a pre-built test case folder based on the folder generation script and the test case keyword input; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default; and running a simulation command based on the target folder to obtain a test result.

[0070] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the chip verification method based on the test case provided by the above-mentioned methods, the method comprising: generating a script based on a running folder of the chip to be verified; obtaining at least one target folder using a pre-built test case folder based on the folder generation script and the test case keyword input; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default; and running a simulation command based on the target folder to obtain a test result.

[0071] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0072] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0073] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip verification method based on test cases, characterized in that: include: Generate script based on the chip to be verified running folder; Based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; A simulation command is run based on the target folder to obtain a test result.

2. The chip verification method based on test cases according to claim 1, characterized in that: In the case where the test case keyword input is not obtained, based on the folder generation script and the test case keyword input, at least one target folder is obtained using a pre-built test case folder, specifically including: Extract the test cases in the test case folder based on the folder generation script to obtain a text file storing the function point names of the test cases; The template folder is copied based on the folder generation script; wherein the template folder includes an automatic compilation file and a default simulation command; The copied template folder and the default simulation command under the template folder are renamed in sequence based on the function point name stored in the text file to obtain a target folder.

3. The chip verification method based on test cases according to claim 1, characterized in that: In the case where the test case keyword input situation has been obtained, based on the folder generation script and the test case keyword input situation, at least one target folder is obtained using a pre-built test case folder, specifically including: Generating a script based on the folder searches under the test case folder according to the test case keyword; In the case that a folder with a name corresponding to the test case keyword exists under the test case folder, the folder with a name corresponding to the test case keyword is used as the target folder.

4. The chip verification method based on test cases according to claim 1, characterized in that: Based on the folder generation script, searching under the test case folder according to the test case keyword, further comprising: When there is no folder with a name corresponding to the test case keyword under the test case folder, a folder corresponding to the test case keyword is generated and the name of the default simulation command in the folder is modified according to the test case keyword to obtain a target folder.

5. The chip verification method based on test cases according to claim 1, characterized in that: The target folder supports repeated execution of multiple simulation commands.

6. The chip verification method based on test cases according to claim 1, characterized in that: The folder generation script is a test script based on the UVM framework.

7. A chip verification device based on a test case, characterized in that: include: A start unit is used to generate a script based on the chip to be verified and run the folder; A folder unit, used to generate a script based on the folder and the input of a test case keyword, and obtain at least one target folder using a pre-built test case folder; wherein the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default one; The simulation unit is used to run the simulation command based on the target folder to obtain the test result.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the chip verification method based on the test case as described in any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the chip verification method based on test cases as described in any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the chip verification method based on test cases as described in any one of claims 1 to 6 is implemented.

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