Low-power-consumption wireless communication circuit and method
By using NMOS and PMOS tubes in wireless communication devices to combine resistors and capacitors, the problem of high power consumption in the state of gate magnetics in the prior art is solved, and a longer battery standby time and lower battery life are achieved maintenance frequency.
Patent Information
- Application Number
- CN202411488266.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-24
- Publication Date
- 2025-01-10
AI Technical Summary
Existing wireless communication devices consume high power when judging the magnetic state of the gate, resulting in short battery life and need to replace the battery frequently.
A low-power wireless communication circuit is designed to achieve low-power detection through the cooperation of NMOS and PMOS tubes using resistors and capacitors. Only when the magnets are present or not exist, the system is powered by power. Cut off or power on to reduce power consumption.
It effectively reduces power consumption, extends battery standby time, reduces maintenance frequency, and achieves longer equipment service life.
Smart Images
Figure CN119298921A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of wireless communication technology, and in particular to a low-power wireless communication circuit and method. Background Art
[0002] Wireless transmission technology is widely used in life, such as door magnetic alarm, SOS button, flood alarm and other IOT scenarios. The demand for portable and arbitrarily placed products requires the use of batteries. Taking door magnetic induction as an example, the button battery powers the MCU into low power consumption. When the magnet moves, the reed switch (Hall device) produces a level change, thereby waking up the MCU to send a wireless transmission signal to notify the main device of an alarm.
[0003] In the prior art, the door sensor needs to report the open or closed state when it is opened or closed. Therefore, to determine the flip of the two states, the IO port of the microcontroller needs to be pulled up or down by the internal resistor. Taking the internal resistance of the microcontroller as 50KΩ, when the battery is powered for a long time at 3.0V, the conducted current reaches 60uA. Calculated with a 200mAh button battery, the standby time is only 138 days, and the user needs to perform regular maintenance and repairs on it; in view of this, we propose a low-power wireless communication circuit and method. Summary of the invention
[0004] The object of the present invention is to provide a low-power wireless communication circuit and method to solve the problems raised in the above background technology.
[0005] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a low-power wireless communication circuit, comprising a battery circuit, a switch circuit, and a single-chip computer circuit, wherein the battery circuit comprises a VBat3.0 terminal, the switch circuit comprises a resistor R2, the VBat3.0 terminal is electrically connected to one end of the resistor R2, the other end of the resistor R2 is connected to the G end of a PMOS tube Q1, the D end of the PMOS tube Q1 is electrically connected to one end of a resistor R3, the other end of the resistor R3 is electrically connected to the G end of an NMOS tube Q2, the S end of the NMOS tube Q2 is electrically connected to one end of the resistor R1, and the other end of the resistor R1 is electrically connected to the other end of the resistor R3; The single-chip microcomputer circuit includes a control chip U1, and the model of the control chip U1 is CF3310.
[0006] Optionally, the other end of the resistor R2 is electrically connected to one end of the resistor R4, the other end of the resistor R4 is electrically connected to end 1 of the reed switch, end 2 of the reed switch is grounded, and the resistor R4 is connected in parallel with the capacitor C4.
[0007] Optionally, the S terminal of the PMOS tube Q1 is electrically connected to the VCC_3310 terminal, the VCC_3310 terminal is electrically connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded.
[0008] Optionally, terminal 5 of the control chip U1 is connected to the VCC_3310 terminal, and terminal 5 of the control chip U1 is electrically connected to one end of capacitor C2 and capacitor C3 respectively, and the other ends of capacitor C2 and capacitor C3 are grounded respectively.
[0009] Optionally, terminal 1 and terminal 9 of the control chip U1 are grounded respectively.
[0010] The present invention also proposes a communication method of a low-power wireless communication circuit, the communication method comprising: S1, when the magnet is in place, NMOS tube Q2 is turned on, the control chip U1 detects that "Wake" is low level, sends an "off" wireless signal, the gate delay ends, PMOS tube Q1 is turned off, and the system power supply is cut off. At this time, the power consumption comes from resistor 2 + resistor 4, and the current is 3uA; S2, when the magnet is not there, the NMOS tube Q2 is turned off, the PMOS tube Q1 is turned on, and after the system is powered on, it detects that the "Wake" signal is high level, sends an "on" wireless signal, and then controls the chip U1 to enter the sleep state, and waits for the "Wake" signal to become low to wake up the system; S3, repeat the above process.
[0011] Optionally, the pull-up resistor R2 is used to turn on the NMOS tube Q2, and the resistance value is 1MΩ. The resistor R4 is used to divide the voltage to turn off the NMOS tube Q2, and the value is 1KΩ. Capacitor R4 is used to delay turning on NMOS tube Q2 for 60ms, which is enough time for the system to send an "off" signal and then power off.
[0012] Compared with the prior art, the present invention provides a low-power wireless communication circuit and method, which has the following beneficial effects: This low-power wireless communication circuit and method determines whether the Wake signal is high when the system power supply VCC_3310 is normal, and then sends a wireless signal "on". When the system power supply is turned off, it is determined that the Wake signal is low, and a wireless charging signal "off" is sent, and then the system is powered off. The reed switch cooperates with the NMOS+PMOS low-power detection circuit to achieve the purpose of reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a schematic diagram of the process of the present invention; Figure 2 It is a schematic diagram of the battery circuit and the switch circuit of the present invention; Figure 3This is a schematic diagram of the single chip microcomputer circuit of the present invention; Figure 4 This is a timing diagram of the present invention. DETAILED DESCRIPTION
[0014] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0015] like Figure 1-Figure 4 As shown, the present invention provides a technical solution: a low-power wireless communication circuit, comprising: a battery circuit, a switch circuit, and a single-chip circuit, the battery circuit comprising a VBat3.0 terminal, the switch circuit comprising a resistor R2, the VBat3.0 terminal being electrically connected to one end of the resistor R2, the other end of the resistor R2 being connected to the G terminal of a PMOS tube Q1, the D terminal of the PMOS tube Q1 being electrically connected to one end of a resistor R3, the other end of the resistor R3 being electrically connected to the G terminal of an NMOS tube Q2, the S terminal of the NMOS tube Q2 being electrically connected to one end of the resistor R1, and the other end of the resistor R1 being electrically connected to the other end of the resistor R3; The single-chip microcomputer circuit includes a control chip U1, and the model of the control chip U1 is CF3310.
[0016] The other end of the resistor R2 is electrically connected to one end of the resistor R4, the other end of the resistor R4 is electrically connected to one end of the reed switch, two ends of the reed switch are grounded, and the resistor R4 is connected in parallel with the capacitor C4.
[0017] The S terminal of the PMOS tube Q1 is electrically connected to the VCC_3310 terminal, the VCC_3310 terminal is electrically connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded.
[0018] The 5th terminal of the control chip U1 is connected to the VCC_3310 terminal, and the 5th terminal of the control chip U1 is electrically connected to one end of the capacitor C2 and the capacitor C3 respectively, and the other ends of the capacitor C2 and the capacitor C3 are grounded respectively.
[0019] Terminal 1 and terminal 9 of the control chip U1 are grounded respectively.
[0020] This embodiment also provides a communication method of a low-power wireless communication circuit, the communication method comprising: S1, when the magnet is in place, NMOS tube Q2 is turned on, the control chip U1 detects that "Wake" is low level, sends an "off" wireless signal, the gate delay ends, PMOS tube Q1 is turned off, and the system power supply is cut off. At this time, the power consumption comes from resistor 2 + resistor 4, and the current is 3uA; S2, when the magnet is not there, the NMOS tube Q2 is turned off, the PMOS tube Q1 is turned on, and after the system is powered on, it detects that the "Wake" signal is high level, sends an "on" wireless signal, and then controls the chip U1 to enter the sleep state, and waits for the "Wake" signal to become low to wake up the system; S3, repeat the above process.
[0021] The pull-up resistor R2 is used to turn on the NMOS tube Q2, and its resistance value is 1MΩ. The resistor R4 is used to divide the voltage to turn off the NMOS tube Q2, and its value is 1KΩ. The capacitor R4 is used to delay 60ms to turn on the NMOS tube Q2, which is enough for the system to send an "off" signal once and then power off.
[0022] like Figure 3 As shown, Figure 3 It is the peripheral circuit of the control chip U1, among which the "Wake" pin wakes up the system at a low level in the sleep state, and the power consumption is less than 0.3uA; like Figure 4 As shown, Figure 4 The timing diagram in Figure 2 The working sequence of each signal in the diagram is as follows: VBat3.0 is a button battery, which is always powered; VCC_3310 is the output of PMOS tube Q1, which is called system power supply and depends on whether the magnet is in place; The Wake signal reflects whether the magnet is in place; Date indicates sending a wireless signal.
[0023] As can be seen from the timing diagram, the left side is the working logic of the system power-on, and the right side is the working logic of the system power-off. When the system power supply VCC_3310 is normal, it determines whether the Wake signal is high, and then sends the wireless signal "on". When the system power supply is turned off, it determines that the Wake signal is pulled low, sends the wireless charging signal "off", and then the system is powered off, thereby achieving the purpose of reducing power consumption.
[0024] The above generally describes the present invention in detail, but it is obvious to a person skilled in the art that some modifications or improvements can be made to the present invention. Therefore, modifications or improvements that do not depart from the spirit of the present invention are within the scope of protection of the present invention.
Claims
1. A low-power wireless communication circuit, characterized in that: It includes a battery circuit, a switch circuit, and a single-chip computer circuit. The battery circuit includes a VBat3.0 terminal. The switch circuit includes a resistor R2. The VBat3.0 terminal is electrically connected to one end of the resistor R2. The other end of the resistor R2 is connected to the G end of the PMOS tube Q1. The D end of the PMOS tube Q1 is electrically connected to one end of the resistor R3. The other end of the resistor R3 is electrically connected to the G end of the NMOS tube Q2. The S end of the NMOS tube Q2 is electrically connected to one end of the resistor R1. The other end of the resistor R1 is electrically connected to the other end of the resistor R3. The single-chip microcomputer circuit includes a control chip U1, and the model of the control chip U1 is CF3310.
2. A low power wireless communication circuit according to claim 1, characterized in that: The other end of the resistor R2 is electrically connected to one end of the resistor R4, the other end of the resistor R4 is electrically connected to one end of the reed switch, two ends of the reed switch are grounded, and the resistor R4 is connected in parallel with the capacitor C4.
3. A low power wireless communication circuit according to claim 1, characterized in that: The S end of the PMOS tube Q1 is electrically connected to the VCC_3310 end, the VCC_3310 end is electrically connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded.
4. A low power consumption wireless communication circuit according to claim 3, characterized in that: The 5th terminal of the control chip U1 is connected to the VCC_3310 terminal, and the 5th terminal of the control chip U1 is electrically connected to one end of the capacitor C2 and the capacitor C3 respectively, and the other ends of the capacitor C2 and the capacitor C3 are grounded respectively.
5. The low-power wireless communication circuit according to claim 1, characterized in that: Terminals 1 and 9 of the control chip U1 are grounded respectively.
6. A communication method of the low-power wireless communication circuit according to any one of claims 1 to 5, characterized in that: The communication method comprises: S1, when the magnet is in place, NMOS tube Q2 is turned on, the control chip U1 detects that "Wake" is low level, sends an "off" wireless signal, the gate delay ends, PMOS tube Q1 is turned off, and the system power supply is cut off. At this time, the power consumption comes from resistor 2 + resistor 4, and the current is 3uA; S2, when the magnet is not there, the NMOS tube Q2 is turned off, the PMOS tube Q1 is turned on, and after the system is powered on, it detects that the "Wake" signal is high level, sends an "on" wireless signal, and then controls the chip U1 to enter the sleep state, and waits for the "Wake" signal to become low to wake up the system; S3, repeat the above process.
7. The communication method of a low-power wireless communication circuit according to claim 6, characterized in that: The pull-up resistor R2 is used to turn on the NMOS tube Q2, and its resistance is 1MΩ. The resistor R4 is used to divide the voltage to turn off the NMOS tube Q2, and its resistance is 1KΩ. Capacitor R4 is used to delay turning on NMOS tube Q2 for 60ms, which is enough time for the system to send an "off" signal and then power off.