HDMI (High Definition Multimedia Interface) retimer circuit applied to rail transit and implementation method

Abstract

The invention relates to an HDMI (High Definition Multimedia Interface) retimer circuit applied to rail transit and an implementation method, which solve the problems of attenuation, distortion and the like of long-distance transmission audio and video signals and improve the transmission stability and quality. The circuit is composed of a power management module, an HDMI input and output module, an HDMI retiming module, an MCU control module and an audio processing module. The power management module converts 5V voltage into 3.3 V voltage and 1.2 V voltage, and supplies power to each module; the retiming module uses an MS9331 chip to complete signal clock recovery, equalization, retiming and audio separation; the MCU control module adjusts the signal state through an I2C interface; and the audio module converts the I2S audio into an analog signal through a DAC and outputs the analog signal. The system is suitable for rail transit scenes, stable transmission of high-definition signals is achieved, double-screen different display and audio output are supported, and high expansibility is achieved.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital signal processing, and in particular relates to an HDMI retimer circuit applied to rail transportation and an implementation method thereof. Background Art

[0002] Rail transit equipment on specific lines will have the need for dual-screen display. Take the fixed station of rail transit station as an example. The need for dual-screen display is not only to display the picture on the display of the device, but also to support external screen display and voice function. Therefore, the fixed station of rail transit station needs to add HDMI peripheral interface. However, due to the structural design of different stations, the installation position of the fixed station of the station and the position of the external display are not together, and there is a certain distance between the two. In HDMI data transmission, as the length of PCB or cable increases, the signal quality will decrease significantly, resulting in problems such as picture jitter and loss. After the traditional HDMI line exceeds a certain length, the signal loss is serious, affecting the quality and stability of signal transmission. Summary of the invention

[0003] In order to solve the signal attenuation and distortion problems caused by long-distance transmission of HDMI signals in rail transit equipment, the present invention proposes an HDMI signal retiming and audio separator device, which is particularly suitable for dual-screen display application scenarios of fixed stations in stations. The device includes an HDMI signal input terminal, which performs clock recovery, equalization and retiming processing on the HDMI signal through a retiming module, and separates the audio signal at the same time, which is output to the S / PDIF and LINE OUT interfaces by the audio processing module. The control module is connected to the retiming module through an I2C interface to realize intelligent control signal processing and status monitoring, thereby effectively solving the signal attenuation problem in long-distance transmission, ensuring the realization of the dual-screen display function and enhancing the distance and stability of HDMI signal transmission.

[0004] To achieve the above object, the technical solution of the present invention is: an HDMI retimer circuit applied to rail transit, comprising: a power management module, an HDMI signal input and output module, an HDMI retiming processing module, an MCU control module and an audio processing module; The power management module includes a power input terminal, a DCDC power conversion circuit and an LDO power conversion circuit, which are used to convert the 5V power input received by the TYPE-C interface into 3.3V and 1.2V voltages through the DCDC power conversion circuit and the LDO power conversion circuit to power each module respectively. The 3.3V voltage output by the power management module is used to directly power the HDMI retiming processing module circuit, the working circuit of the MCU control module and the audio processing analog circuit, and the 1.2V is used to power some HDMI retiming processing digital circuits that require low-voltage power supply; The HDMI signal input and output module includes an HDMI signal input port CN1 and an HDMI signal output port CN2, which are respectively connected to the HDMI retiming processing module. The input port CN1 is used to transmit the input HDMI signal to the HDMI retiming processing module, and the HDMI signal after retiming processing is connected to the HDMI signal output module port CN2 through a signal output line; The HDMI retiming processing module includes a high-performance HDMI retimer chip of model MS9331, which can perform clock recovery, equalization and retiming processing on the received input HDMI signal to ensure signal quality, enhance the signal through the signal pre-emphasis function to ensure the stability of long-distance transmission, and separate the audio signal through the I2S interface or S / PDIF interface and transmit it to the audio processing module; The MCU control module includes an MCU chip U4 of model MS8005, which is connected and communicated with the HDMI retiming processing module through an I2C interface, and is used for overall control and management of the system. The MCU controls various functions of the HDMI retiming processing module, including signal retiming, clock recovery and audio separation, and adjusts the working state of each module. The control module is powered by a 3.3V voltage provided by the power management module to ensure the stable operation of the MCU, and adjusts the working state of the circuit through a control signal; The audio processing module includes a DAC audio processing chip U1, which is connected to the HDMI retiming processing module and is used to receive the I2S or S / PDIF audio signal separated by the HDMI retiming chip U6. The audio processing module converts the I2S digital audio signal into an analog audio signal through the DAC chip, and after filtering out high-frequency noise through a capacitor filtering network, outputs the analog audio signal to the LINE OUT interface. The S / PDIF signal directly outputs a digital audio signal through the corresponding interface for use by external audio devices.

[0005] The present invention is applied to the implementation method of the HDMI retimer circuit of rail transportation, comprising the following steps: A. Power management: Receive 5V power input through the TYPE-C interface, the DCDC converter in the power management module converts the 5V voltage into 1.2V power supply, and the LDO regulator converts the 5V voltage into 3.3V, which are respectively supplied to the HDMI retiming processing module, MCU control module and audio processing module to ensure stable power supply for each module; B. Signal reception and processing: The HDMI signal input module receives input signals through the HDMI input port (CN1), and the input signals are transmitted to the HDMI retiming processing module after AC coupling. In the HDMI retiming processing module, the HDMI retiming chip model MS9331 is used to perform clock recovery, equalization and retiming on the signal to improve the signal quality. C. Signal pre-emphasis: In the HDMI retiming processing module, signal pre-emphasis technology is used to enhance signal strength to ensure signal stability during long-distance transmission; D. Audio separation and output: In the HDMI retiming processing module, the audio signal is separated through the I2S or S / PDIF interface. The DAC chip in the audio processing module receives the separated I2S audio signal and converts it into an analog audio signal, which is then output through the LINE OUT interface after filtering. If it is an S / PDIF audio signal, it is directly output to the corresponding interface for use by digital audio devices. E. System control: The MCU control module is connected to the HDMI retiming processing module through the I2C interface to control and adjust the retiming, clock recovery and audio separation functions in real time, and monitor the HDMI signal transmission status; the control module receives the 3.3V power supply provided by the power management module to ensure its stable operation; F. Signal output: The re-timed HDMI signal is transmitted to the external display device through the output port (CN2) of the HDMI output module, realizing long-distance transmission of high-definition signals and dual-screen display functions.

[0006] The beneficial effects of the present invention are mainly reflected in the following aspects: First of all, the present invention effectively solves the problems of signal attenuation and distortion that are prone to occur during long-distance transmission of HDMI signals, significantly improves the stability and quality of signal transmission, extends the signal transmission distance, and can meet application scenarios such as rail transit that require high-definition and stable signals.

[0007] Secondly, the present invention integrates the audio and video separation function, can transmit video and audio signals at the same time, and provide users with multiple audio output interfaces to meet the needs of the device to output audio while displaying images. It is particularly suitable for dual-screen display and voice prompts in rail transit equipment.

[0008] Furthermore, the present invention simplifies the power management design so that the device can work stably under different power conditions, reduces the complexity of circuit design, and improves the operating efficiency and reliability of the device.

[0009] Finally, the present invention realizes the automatic management of HDMI signal processing and audio processing through the intelligent control module, so that the system has higher flexibility and scalability and can adapt to various application requirements. Therefore, the present invention greatly improves the performance and stability of the system and provides an efficient solution for high-definition signal transmission and display in the fields of rail transportation and so on. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a structural connection block diagram of the present invention; Figure 2 This is the circuit diagram of the TYPE-C power input port of the present invention; Figure 3 This is a DCDC power conversion circuit diagram of the present invention; Figure 4 This is the LDO power conversion circuit diagram of the present invention; Figure 5 This is the circuit diagram of the MCU control module of the present invention; Figure 6 This is a circuit diagram of the HDMI input module of the present invention; Figure 7 This is a circuit diagram of a retiming module of the present invention; Figure 8 This is a circuit diagram of an HDMI output module of the present invention; Fig. 9 This is a circuit diagram of the audio processing module of the present invention. DETAILED DESCRIPTION

[0011] like Figure 1 As shown, an HDMI retiming circuit applied to rail transit includes a power management module, an HDMI signal input and output module, an HDMI retiming processing module, an MCU control module and an audio processing module.

[0012] The power management module includes a power input terminal, a DCDC converter and an LDO regulator. It receives a 5V power input through a TYPE-C interface, and converts the 5V voltage into 3.3V and 1.2V voltages through the DCDC converter and the LDO regulator, which are used to power the HDMI retiming processing module, the MCU control module and the audio processing module respectively. The 3.3V voltage output by the LDO regulator of the power management module directly supplies power to the working circuits of the HDMI retiming processing module and the MCU control module as well as the audio processing analog circuit, while the 1.2V voltage is supplied to some HDMI retiming processing digital circuits that require low-voltage power supply.

[0013] The HDMI signal input module is connected to the HDMI retiming processing module. The input HDMI signal is transmitted to the HDMI retiming processing module through the input port (CN1). The input end of the HDMI retiming processing module is connected to the HDMI input signal pin through a capacitor to perform AC coupling of the signal to ensure the correct transmission of the signal. This module is also responsible for the preliminary separation of video data and audio signals and transmits them to the corresponding signal processing module.

[0014] The HDMI retiming processing module includes a high-performance HDMI retimer chip (Retimer) model MS9331 and an audio processing chip, which can perform clock recovery, equalization and retiming processing on the received input HDMI signal to ensure signal quality. The retiming HDMI signal is connected to the HDMI signal output module (CN2) through the signal output line, and the signal is enhanced through the signal pre-emphasis function to ensure the stability of long-distance transmission. At the same time, the module separates the audio signal through the I2S interface or S / PDIF interface and transmits it to the audio processing module.

[0015] The MCU control module communicates with the HDMI retiming processing module through the I2C interface and is responsible for the overall control and management of the system. The MCU controls the various functions of the HDMI retiming processing module, such as signal retiming, clock recovery and audio separation, and adjusts the working status of each module. The control module is powered by a 3.3V voltage from the power management module to ensure the stable operation of the MCU and adjust the working status of the circuit through control signals.

[0016] The audio processing module is connected to the HDMI retiming processing module to receive the separated I2S or S / PDIF audio signal. The audio processing module converts the I2S digital audio signal into an analog audio signal through the DAC chip, and outputs the analog audio signal to the LINE OUT interface after filtering out high-frequency noise through a capacitor filter network. The S / PDIF signal directly outputs a digital audio signal through the corresponding interface for use by external audio devices.

[0017] The HDMI signal output module is connected to the HDMI retiming processing module, and the retiming processed HDMI signal is output to the external display device through the module. The HDMI signal output module is responsible for transmitting the optimized high-definition video signal to the external display device to ensure high-quality output of the signal after long-distance transmission.

[0018] Furthermore, if Figure 2As shown, the specific circuit of the power management module is as follows: 5V power is input from the TYPE-C port, and the TYPE-C interface is used as the power input interface to ensure that the device obtains a stable 5V power supply from the outside; the EH, B12, and A12 pins of USB1 are grounded to GND to provide grounding for the circuit; one end of the capacitor C7 is connected to the A9 and B9 pins of USB1 and the positive electrode of the diode D1 respectively, and the other end of the capacitor C7 is grounded to GND for filtering to reduce power supply noise; the A5 pin of USB1 is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded to GND, which plays a current limiting role to avoid excessive current; the B5 pin of USB1 is connected to one end of the resistor R8, and the other end of the resistor R8 is grounded to GND, which also plays a current limiting and voltage stabilizing role; the cathode of the diode D1 is connected to one end of the capacitors C8, C9, and C10 respectively, and then connected to the power supply +5V, the diode D1 is used to prevent the current from flowing in the reverse direction, and the other end of the capacitors C8, C9, and C10 is connected to GND for filtering to ensure the stable output of the power supply.

[0019] like Figure 3 As shown, the DCDC power conversion circuit is designed based on the chip U3 of model LP3220, which is used to convert the 5V voltage input from the TYPE-C port into a 1.2V voltage. The specific circuit is: the 4th pin (VIN) of the chip U3 is connected to the +5V power supply as the input power supply of the chip, and is connected to one end of the capacitors C36, C37, and C38 respectively. The capacitors C36, C37, and C38 are used to filter the input power supply and reduce high-frequency noise, and the other end is grounded; the 1st pin (EN) of the chip U3 is connected to one end of the resistor R43 and the resistor R48 respectively. The resistor R43 is used for pull-up to ensure that the chip starts normally when powered on, and the resistor R48 is connected to the ground to stabilize the control signal; the 2nd pin of the chip U3 is grounded (GND) to provide a reference ground for the chip; the 3rd pin (LX) of the chip U3, that is The output end is connected to one end of the inductor L1, which is used to store energy and realize voltage conversion. The other end of L1 is connected to one end of the resistor R37 and one end of the capacitors C39, C40, and C41 as a 1.2V output end. The resistor R37 is used to limit the current to ensure current stability. The capacitors C39, C40, and C41 are used to filter the output voltage to ensure the stability of the 1.2V output voltage; the other end of the resistor R37 is connected to one end of the resistor R49 and pin 5 (FB / Vout feedback pin) of the chip U3. The resistor R49 is used to adjust the gain of the feedback loop to ensure the accuracy of the output voltage. The other end is grounded to ensure stable feedback. The other ends of the capacitors C39, C40, and C41 are grounded (GND) to ensure that the output 1.2V voltage is stable and used for input voltage filtering.

[0020] like Figure 4As shown, the LDO power conversion circuit is designed based on the chip U5 of model AMS1117, which is used to convert the 5V voltage input from the TYPE-C port into a 3.3V voltage. The specific circuit is: Pin 3 (VIN) of chip U5 is connected to the +5V power supply as the input power supply of the chip, and is connected to one end of capacitors C42 and C43 respectively. Capacitors C42 and C43 are used to filter the input voltage, eliminate high-frequency noise, and ensure voltage stability. The other end of the capacitor is grounded (GND); Pin 1 (GND) of chip U5 is grounded to provide a circuit reference ground; Pins 2 and 4 (VOUT) of chip U5, that is, the output end, are connected to one end of capacitors C44 and C45. Capacitors C44 and C45 are used to filter the 3.3V output voltage, reduce voltage fluctuations, and ensure the stability of the output voltage. The other end of the capacitor is grounded (GND) to ensure the stability and cleanliness of the 3.3V output.

[0021] like Figure 5As shown, the MCU control module is designed based on the MCU microcontroller chip U4 of model MS8005F. The specific circuit is as follows: Pin 1 (P2.5 / BEEP) of chip U4 is connected to one end of resistor R32. R32 is used for current limiting, but it is left empty here, and no buzzer or load is connected. It is reserved for the buzzer alarm function; Pin 2 (P2.6 / TX0) of chip U4 is connected to one end of resistor R33. R33 is also used for current limiting. This pin is used for the TX0 transmitting end of UART serial communication, but it is also left empty here; Pin 3 (P2.7 / RX0) of chip U4 is connected to one end of resistor R35. R35 is used for current limiting. RX0 is the receiving end of UART serial communication. But it is not used in this circuit; Pin 4 (NRST) of chip U4 is the reset pin, which is connected to one end of resistor R38 and capacitor C35 respectively. R38 is a pull-up resistor, and the other end is connected to the 3.3V power supply to ensure that it maintains a high level under normal circumstances. C35 is used for filtering to prevent noise from affecting the reset, and the other end is grounded (GND). When the pin is at a low level, the chip is reset; Pin 5 (P0.0 / XIN) is connected to one end of resistor R40, R40 is used for current limiting, and the other end is connected to resistors R44, R41, R39, capacitor C47, the positive pole of light-emitting diode LED1 and pin 9 (VDD) of chip U4, and then connected to the 3.3V power supply to provide stable power supply. ; The other end of capacitor C47 is grounded (GND) for power supply filtering, eliminating high-frequency noise, and ensuring stable power supply voltage; the cathode of light-emitting diode LED1 is connected to one end of resistor R52. Light-emitting diode LED1 is used to indicate the operating status of the system. Its on and off is controlled by pin 13 (P1.1 / PWM1 / AIN7). The other end of resistor R52 is connected to pin 13 (P1.1 / PWM1 / AIN7) of chip U4. R52 is a current limiting resistor to protect the LED; pin 6 (P0.1 / XOUT) of chip U4 is connected to the other end of R44. XIN and XOUT are external crystal oscillator pins used to provide system clock to ensure stable chip operating frequency; chip U4 Pin 7 (VSS) is grounded to provide a reference ground for the chip; Pin 8 (VPP) of chip U4 is connected to one end of capacitor C46, ​​which is used for decoupling and filtering, and the other end is grounded to ensure the stability of the programming voltage; Pin 10 (P0.3 / AIN1) is connected to one end of resistor R50, and the other end of resistor R50 is grounded. P0.3 is an analog input terminal for receiving external signals; Pin 11 (P0.4 / AIN2) of chip U4 is connected to network SDA, that is, Pin 17 SDA of HDMI retiming processing module chip U6. SDA is the serial data line of the I2C bus, which is used to communicate with MS9331. MCU controls the operation of the chip through I2C; Pin 12 (P1.0 / PWM0 / AIN6) is connected to the network SCL, that is, the 16th pin (SCL) of the HDMI retiming processing module chip U6. SCL is the I2C clock line. SCL and SDA work together to achieve synchronous data transmission. Through these two networks, the MCU can control various functions of the HDMI retiming chip MS9331; the 14th pin (P1.2 / PWM2 / AIN8) of the chip U4 is connected to the resistor R53 and then left empty. The 15th pin (P1.3 / AIN9) of the chip U4 is connected to the resistor R45 and then left empty. The 16th pin (P1. 4 / RX1 / VREF) is connected to R42 and then left empty. These pins are spare analog input or PWM output pins, reserved for extended functions or debugging; Pin 19 (P2.2) of chip U4 is connected to Pin 15 (RSTN) of MS9331 chip U6 in the HDMI retiming module for reset control. Through this pin, MCU can reset U6; Pin 20 (P2.2) of chip U4 is connected to Pin 46 (INT) of U6 for processing the interrupt signal of MS9331 chip and notifying MCU that there are events or data to be processed. Through this circuit design, MS8005F MCU communicates with MS9331 HDMI retiming chip through I2C bus and displays system operation status through LED. Reset control pin and interrupt signal also ensure stable control and status feedback of the system. .

[0022] like Figure 6 , Figure 7 , Figure 8As shown, the HDMI retiming processing module is designed based on the signal retiming chip U6 of model MS9331, and is respectively connected to the HDMI input module, HDMI signal output module and MCU control module. The specific circuit is: the HDMI input part is connected to the CN1 interface, and the HDMI signal is input through multiple pins. Pin 1 (TMDS Data 2+) and Pin 3 (TMDS Data 2-) of CN1 are connected to Pin 11 (HDMIRX2P) and Pin 10 (HDMIRX2N) of chip U6 respectively, for transmitting the differential signal of data channel 2; Pin 4 (TMDS Data 1+) and Pin 6 (TMDS Data 1-) of CN1 are connected to Pin 8 (HDMIRX1P) and Pin 7 (HDMIRX1N) of U6 respectively, for transmitting the differential signal of data channel 1, to ensure the complete signal transmission and anti-interference capability; Pin 7 (TMDS Data 0+) and Pin 9 (TMDS Data 0-) of CN1 are connected to Pin 5 (HDMIRX0P) and Pin 4 (HDMIRX0N) of U6 respectively, for transmitting data channel 0; Pin 10 (TMDS Clock+) and Pin 12 (TMDS Clock-) of CN1 are connected to Pin 2 (HDMIRXCP) and Pin 1 (HDMIRXCN) of U6 respectively, and this connection provides a synchronous clock signal to ensure the synchronization and data integrity of signal transmission.

[0023] The 13th pin of CN1 is connected to HDMIRXCEC for transmitting the consumer electronics control (CEC) signal; the 14th pin of CN1 (Reserved (NC) is connected to HDMIRXHEC as a reserved pin; the 15th pin of CN1 (SCL) is connected to the 22nd pin of U6 (HDMIRXSCL) and connected to one end of the resistor R17, and the other end of the resistor R17 is connected to one end of the capacitor C31 and the 18th pin of the chip CN1 (+5V Power), the positive electrode of diode D2, one end of resistor R22, one end of resistor R19, one end of resistor R23, one end of resistor R29 and HDIN5V are connected, and the other end of capacitor C31 is grounded (GND) for filtering to reduce power ripple and noise interference and ensure the stability of I2C signals. The negative electrode of diode D2 is connected to the +5V voltage power supply to provide overcurrent protection to prevent current backflow from damaging the circuit. The other end of resistor R22 is connected to one end of resistor R28 and HDMIRXDET respectively, and the other end of resistor R28 is grounded (GND) for hot plug detection. Pin 16 (SDA) of CN1 is connected to pin 21 (HDMIRXSDA) of chip U6 and connected to the other end of resistor R19 to provide I2C data communication to ensure the stability of data transmission between devices. Pin 2 (TMDS Data 2 Shield), pin 5 (TMDS Data 1 shield), pin 8 (TMDS Data 0 Shield), pin 11 (TMDS Clock Shield) and pin 17 (DDC / SEC) of interface CN1 The other end of resistor R23 is connected to one end of resistor R51 and the collector of transistor Q3, and the other end of resistor R51 is connected to one end of capacitor C34 and HDINHPD, and the other end of capacitor C34 is connected to ground (GND), providing filtering function to eliminate high-frequency interference and ensure the stability of HDMI hot plug signal. The emitter of transistor Q3 is grounded (GND) to control the flow of signal current. The base of Q3 is connected to the other end of resistor R29 and the collector of transistor Q4, and the emitter of Q4 is grounded to provide cascade amplification function to ensure signal driving capability. The base of Q4 is connected to one end of resistor R30, and the other end of resistor R30 is connected to pin 19 (HDMIRXHPD) of retimer chip U6 to provide hot plug detection function; pin 19 (Hot Plug Detect) of interface CN1 is connected to pin 23 (HDMITXHPD) of chip U6 to ensure timely feedback when signal connection changes.

[0024] The HDMI output part is connected to the CN2 interface. Similar to the input part, CN2's pin 1 (TMDS Data 2+) and pin 3 (TMDS Data 2-) are connected to pin 36 (HDMIRX2P) and pin 35 (HDMIRX2N) of chip U6 respectively, transmitting the output of data channel 2; CN2's pin 4 (TMDS Data 1+) and pin 6 (TMDS Data 1-) are connected to pin 33 (HDMIRX1P) and pin 32 (HDMIRX1N) of U6 respectively, transmitting the output signal of data channel 1; CN2's pin 7 (TMDS Data 0+) and pin 9 (TMDSData 0-) are connected to pin 31 (HDMIRX0P) and pin 30 (HDMIRX0N) of U6 respectively, transmitting the output signal of data channel 0; CN2's pin 10 (TMDS Clock+) and pin 12 (TMDS Clock-) are connected to pin 28 (HDMIRXCP) and pin 27 (HDMIRXCN) of U6 respectively, outputting the synchronous clock signal to ensure the synchronization and integrity of signal transmission. Pin 13 of CN2 is connected to HDMIRXCEC to transmit CEC signal; Pin 14 of CN2 (Reserved (NC) is connected to HDMIRXHEC; Pin 15 of CN2 (SCL) is connected to one end of resistor R18, the other end of resistor R18 is connected to pin 22 (HDMIRXSCL) of chip U6 and connected to one end of resistor R15 to ensure the stability of the clock signal of the I2C interface, the other end of resistor R15 is connected to +5V power supply to provide current limiting function to avoid excessive current damaging the circuit; Pin 16 of CN2 (SDA) is connected to one end of resistor R20, the other end of resistor R20 is connected to pin 21 (HDMIRXSDA) of chip U6 and connected to one end of resistor R16, the other end of resistor R16 is connected to +5V power supply to ensure the normal transmission and stability of I2C data. Pin 2 (TMDS Data 2 Shield), Pin 5 (TMDS Data 1 shield), Pin 8 (TMDS Data 0 Shield), Pin 11 (TMDS Clock Shield) and Pin 17 (DDC / SEC) of interface CN2 Ground) is grounded (GND) to provide shielding and anti-interference capabilities. Pin 19 (Hot Plug Detect) of interface CN2 is connected to pin 23 (HDMITXHPD) of chip U6 and connected to one end of resistor R21, and the other end of resistor R21 is grounded (GND) to ensure the detection of hot plug signal.

[0025] Pin 3 (AVDDR12) of the retimer chip U6 is connected to the +1.2V power supply and connected to one end of capacitor C21 to provide power decoupling. The other end of capacitor C21 is grounded (GND) to reduce power noise interference and ensure the stability of the analog power supply. Pin 6 (AVDDR33) of U6 is connected to the +3.3V power supply and connected to one end of capacitor C23. The other end of capacitor C23 is grounded (GND) to play a filtering role to improve the purity of the power supply. Pin 9 (AVDDR12) of U6 is connected to the +1.2V power supply and connected to one end of capacitor C24. The other end of capacitor C24 is grounded (GND) to ensure the stability of the low-voltage analog power supply. Pin 12 (DVDD33) of chip U6 is connected to the +3.3V power supply and connected to one end of capacitors C27, C28, and C29 respectively. The other ends of capacitors C27, C28, and C29 are grounded (GND) to decouple the digital power supply, reduce power noise, and ensure stable operation of the circuit. Pin 13 (VSS) of chip U6 is grounded (GND); pin 14 (DVDD12) of U6 is connected to a +1.2V power supply and is connected to one end of capacitors C32 and C33 respectively. The other ends of capacitors C32 and C33 are grounded (GND) to provide digital power decoupling filtering to ensure power supply stability.

[0026] Pin 15 (RSTN) of chip U6 is connected to one end of resistor R26, and the other end of resistor R26 is connected to a +3.3V power supply to provide a pull-up to ensure the stability of the reset pin; pin 16 (SLC) of chip U6 is connected to one end of resistor R25, and the other end of resistor R25 is connected to a +3.3V power supply to ensure the stability of the I2C clock signal line; pin 17 (SDA) of chip U6 is connected to one end of resistor R24, and the other end of resistor R24 ​​is connected to a +3.3V power supply to provide current limiting protection to ensure the safety of I2C data line transmission. Pin 25 (AVDDT33) of chip U6 is connected to a +3.3V power supply and is connected to one end of capacitors C26 and C30 respectively. The other ends of capacitors C26 and C30 are grounded (GND) for decoupling filtering to ensure the stability of the power supply voltage; pin 29 (AVDDT12) of chip U6 is connected to a +1.2V power supply and is connected to one end of capacitor C25. The other end of capacitor C25 is grounded (GND) to ensure the stability of the low-voltage power supply. Pin 34 (AVDDT12) of chip U6 is connected to a +1.2V power supply and to one end of capacitor C22, with the other end of capacitor C22 grounded (GND) to ensure the stability of the analog power supply; pin 42 (DVDD12) of chip U6 is connected to a +1.2V power supply and to one end of capacitor C19, with the other end of capacitor C19 grounded (GND) to provide digital power decoupling and reduce power supply noise; pin 44 (DVDD33) of chip U6 is connected to a +3.3V power supply and to one end of capacitor C18, with the other end of capacitor C18 grounded (GND) to ensure the stability of the power supply voltage.

[0027] Pin 45 (MCUSEL) of chip U6 is connected to one end of resistor R12, and the other end of resistor R12 is grounded (GND) for selecting MCU mode; pin 47 (REXT) of chip U6 is connected to one end of resistor R11, and the other end of resistor R11 is grounded (GND) for external resistor configuration to control the bias current of the internal current source and ensure the normal operation of the circuit; pin 48 (AVDDR33) of chip U6 is connected to a +3.3V power supply and to one end of capacitor C20, and the other end of capacitor C20 is grounded (GND) to provide analog power supply decoupling filtering and reduce noise.

[0028] Pin 37 (I2S_MCLK), pin 38 (I2S_SCLK), pin 39 (I2S_WS) and pin 40 (I2S_SD) of chip U6 are respectively connected to the audio output circuit to provide clock and audio data for the I2S audio interface to ensure stable output of the audio signal.

[0029] like Fig. 9As shown, the IIS audio circuit and the audio output part, the entire circuit transmits the digital audio signal to the DAC chip U1 through the I2S bus and finally outputs the analog audio signal to the audio jack. The input of the I2S signal, i.e., the 40th pin (I2S_SD), 38th pin (I2S_SCLK), 39th pin (I2S_SW), and 37th pin (I2S_MCLK) of the chip U6 are impedance matched through 100Ω resistors R2, R6, R5, and R9 respectively to ensure the integrity of the signal, and are connected to the 1st, 2nd, 3rd, and 4th pins of the chip U1. The 5th pin of the chip U1 is connected to one end of the filter capacitors C11 and C12 respectively, and the other ends of the capacitors C11 and C12 are grounded to reduce the noise interference of the input signal; the 6th pin (FILT+) of the chip U1 is grounded (GND) through the capacitor C13, the 7th pin (AOUTL) of the chip U1 is connected to one end of the capacitor C17, the other end of the capacitor C16 is connected to one end of the resistor R10, one end of the resistor R10 is connected to one end of the capacitors C17 and C5 respectively, the other end of the capacitor C17 is grounded (GND), and the other end of the capacitor C5 is grounded (GND). The ends are connected to one end of capacitor C14 and resistor R4 respectively, the other end of capacitor C14 is connected to no connection, and the other end of resistor R4 is connected to pin 4 of audio jack J1; pin 10 (AOUTR) of chip U1 is connected to one end of capacitor C2, the other end of capacitor C2 is connected to one end of resistor R1, one end of resistor R1 is connected to one end of capacitors C1 and C6 respectively, the other end of capacitor C1 is grounded (GND), the other end of capacitor C6 is connected to one end of capacitor C15 and resistor R3 respectively, the other end of capacitor C15 is connected to no connection, and the other end of resistor R3 is connected to pin 3 of audio jack J1; the analog audio signal output by chip U1 is output to the right channel and left channel through pin 10 (AOUTR) and pin 7 (AOUTL) respectively, after decoupling and filtering by capacitors C2 and C16, the output impedance is adjusted by resistors R1 and R10, and the signal is further filtered by capacitors C1 and C17 to reduce noise and high-frequency interference. Finally, the audio signal is connected to the audio jack J1 through capacitors C5 and C6, and the pin is matched and protected by resistors R3 and R4 to ensure the quality of audio output. C14 and C15 near the jack are not connected and are reserved for future expansion. Pin 8 (GND) of chip U1 is grounded, and pin 9 (VA) is connected to the +3.3V power supply and grounded (GND) through capacitors C3 and C4.

[0030] The working principle of the circuit of the present invention mainly involves retiming the HDMI signal and realizing the audio separation and output functions, which is suitable for the dual-screen display and audio output requirements in rail transit. The entire circuit is composed of multiple sub-modules, including a power management module, an HDMI retiming processing module, an audio processing module, a control module, and an input and output module. These modules cooperate with each other to ensure that the system can stably and efficiently transmit high-definition video signals and high-quality audio signals under long-distance transmission.

[0031] First, the power management module is responsible for providing a stable operating voltage for the entire circuit. This module includes a TYPE-C interface, a DCDC power conversion circuit, and an LDO power conversion circuit. The TYPE-C interface inputs 5V voltage through an external power supply, and passes through the converter chip U3 in the DCDC conversion circuit (such as Figure 3 As shown in the figure, the 5V voltage is stepped down to 1.2V, which is used to power the HDMI retiming processing module and some digital circuits. The LDO power conversion circuit stabilizes the 5V voltage to 3.3V through the regulator chip U5, which is supplied to the HDMI retiming processing module, MCU control module and audio processing module respectively, providing stable power for these module circuits and ensuring reliable operation of the circuits.

[0032] Next, the HDMI retiming processing module is the core part of the entire system, responsible for receiving, processing and resending HDMI signals. The HDMI signal enters the system through the HDMI input terminal (CN1), and the input signal is transmitted to the HDMI retiming processing module after AC coupling. After the signal enters the MS9331 chip, it is first processed by clock recovery, equalization and retiming. This module repairs the signal distortion caused by long-distance transmission through the clock recovery function, and improves the quality of signal transmission through retiming, ensuring that the signal still maintains high-definition quality after a long transmission distance. The HDMI retiming processing module also has a signal pre-emphasis function, which can enhance the signal strength and ensure the stability of the output signal. The retiming processed signal is output to the external display device through the HDMI output terminal (CN2), ensuring the long-distance transmission of high-definition signals. This part of the processing uses a signal coupling and filtering network composed of capacitors and resistors to ensure the accuracy of signal processing.

[0033] While processing the signal, the audio processing module receives the I2S audio signal separated from the MS9331, and receives the separated I2S audio signal through the DAC chip U1, converting the digital audio signal into an analog audio signal. The converted analog audio signal is filtered out through the RC filter network to remove high-frequency noise, ensuring the high fidelity of the audio output.

[0034] The audio signal is output to external audio devices through the LINE OUT interface, providing clear and stable audio output. In addition, the S / PDIF digital audio signal is also directly output through the S / PDIF interface, which is suitable for connecting digital audio devices.

[0035] The MCU control module is the command center of the entire system. It uses the MS8005 MCU to realize intelligent control of the HDMI retiming processing module and the audio processing module. The MCU communicates with the MS9331 chip through the I2C interface to monitor and adjust various parameters of HDMI signal processing in real time, including clock recovery, audio separation, signal output, etc. Through this control, the system can dynamically adapt to different signal transmission conditions to ensure the best signal transmission quality. In addition, the control module also manages the system's 3.3V power supply to ensure the stability and efficient operation of the circuit.

[0036] In summary, the circuit of the present invention realizes the efficient retiming processing and audio separation function of HDMI signals through the coordinated work of various modules. The power management module provides a stable operating voltage for the entire circuit, the HDMI retiming processing module is responsible for repairing and enhancing the input signal, the audio processing module ensures the clear output of the audio signal, and the control module realizes intelligent management and adjustment through the MCU. The interaction between the modules ensures the efficient and stable operation of the system in long-distance high-definition signal transmission applications such as rail transit, while meeting the high-quality requirements of video and audio output.

Claims

1. An HDMI retimer circuit for rail transit, characterized in that: It includes power management module, HDMI signal input and output module, HDMI retiming processing module, MCU control module and audio processing module; The power management module includes a power input terminal, a DCDC power conversion circuit and an LDO power conversion circuit, which are used to convert the 5V power input received by the TYPE-C interface into 3.3V and 1.2V voltages through the DCDC power conversion circuit and the LDO power conversion circuit to power each module respectively. The 3.3V voltage output by the power management module is used to directly power the HDMI retiming processing module circuit, the working circuit of the MCU control module and the audio processing analog circuit, and the 1.2V is used to power some HDMI retiming processing digital circuits that require low-voltage power supply; The HDMI signal input and output module includes an HDMI signal input port CN1 and an HDMI signal output port CN2, which are respectively connected to the HDMI retiming processing module. The input port CN1 is used to transmit the input HDMI signal to the HDMI retiming processing module, and the HDMI signal after retiming processing is connected to the HDMI signal output module port CN2 through a signal output line; The HDMI retiming processing module includes a high-performance HDMI retimer chip of model MS9331, which can perform clock recovery, equalization and retiming processing on the received input HDMI signal to ensure signal quality, enhance the signal through the signal pre-emphasis function to ensure the stability of long-distance transmission, and separate the audio signal through the I2S interface or S / PDIF interface and transmit it to the audio processing module; The MCU control module includes an MCU chip U4 of model MS8005, which is connected and communicated with the HDMI retiming processing module through an I2C interface, and is used for overall control and management of the system. The MCU controls various functions of the HDMI retiming processing module, including signal retiming, clock recovery and audio separation, and adjusts the working state of each module. The control module is powered by a 3.3V voltage provided by the power management module to ensure the stable operation of the MCU, and adjusts the working state of the circuit through a control signal; The audio processing module includes a DAC audio processing chip U1, which is connected to the HDMI retiming processing module and is used to receive the I2S or S / PDIF audio signal separated by the HDMI retiming chip U6. The audio processing module converts the I2S digital audio signal into an analog audio signal through the DAC chip, and after filtering out high-frequency noise through a capacitor filtering network, outputs the analog audio signal to the LINE OUT interface. The S / PDIF signal directly outputs a digital audio signal through the corresponding interface for use by external audio devices.

2. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The specific circuit of the power management module is as follows: 5V power is input from the TYPE-C port, and the 7th pin, B12th pin and A12th pin of USB1 are grounded to GND; one end of capacitor C7 is respectively connected to the A9th pin and B9th pin of USB1 and the positive electrode of diode D1, and the other end of C7 is grounded to GND; the A5th pin of USB1 is connected to one end of resistor R7, and the other end of resistor R7 is grounded to GND; the B5th pin of USB1 is connected to one end of resistor R8, and the other end of resistor R8 is grounded to GND; the cathode of diode D1 is respectively connected to one end of capacitors C8, C9 and C10 and then connected to the power supply +5V, and the other ends of capacitors C8, C9 and C10 are connected to GND.

3. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The DCDC power conversion circuit includes a chip U3 of model LP3220, which is used to convert the 5V voltage input from the TYPE-C port into a 1.2V voltage. The specific circuit is as follows: Pin 4 of the chip U3 is connected to a +5V power supply as the input power supply of the chip, and is respectively connected to one end of capacitors C36, C37, and C38, and the other ends of capacitors C36, C37, and C38 are grounded; Pin 1 of the chip U3 is respectively connected to one end of a resistor R43 and a resistor R48, the other end of the resistor R43 is connected to a +5V power supply, and the other end of the resistor R48 is grounded; Pin 2 of the chip U3 is grounded; Pin 3 of the chip U3, i.e., the output end is connected to one end of an inductor L1, and the other end of the inductor L1 is respectively connected to one end of a resistor R37 and one end of capacitors C39, C40, and C41 as a 1.2V output end, the other end of the resistor R37 is respectively connected to one end of a resistor R49 and pin 5 of the chip U3, for adjusting the feedback of the output voltage, and the other end of the resistor R49 is grounded. The other ends of the capacitors C39, C40, and C41 are grounded.

4. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The LDO power conversion circuit includes a chip U5 of model AMS1117, which is used to convert the 5V voltage input from the TYPE-C port into a 3.3V voltage. The specific circuit is as follows: Pin 3 of the chip U5 is connected to a +5V power supply as the input power supply of the chip, and is connected to one end of capacitors C42 and C43 respectively, and the other ends of the capacitors C42 and C43 are grounded for input voltage filtering; Pin 1 of chip U5 is grounded, and pins 2 and 4 of chip U5, i.e., the output end, are connected to one end of capacitors C44 and C45 as 3.3V output ends. The other ends of capacitors C44 and C45 are grounded to filter the output voltage and ensure the stability of the 3.3V output voltage.

5. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The MCU control module includes an MCU microcontroller chip U4 of model MS8005F, and the specific circuit is as follows: pin 1 of chip U4 is connected to one end of resistor R32, and the other end of resistor R32 is unconnected, pin 2 of chip U4 is connected to one end of resistor R33, and the other end of resistor R33 is unconnected, pin 3 of chip U4 is connected to one end of resistor R35, and the other end of resistor R35 is unconnected, pin 4 of chip U4 is respectively connected to one end of resistor R38 and capacitor C35, the other end of resistor R38 is connected to a 3.3V power supply, and the other end of capacitor C35 is grounded, pin 5 of chip U4 is connected to one end of resistor R40, and the other end of resistor R40 is respectively connected to resistors R44, R41, R39, capacitor C47, the positive electrode of light-emitting diode LED1 and pin 9 of chip U4, and then connected to a 3.3V power supply together; the other end of capacitor C47 is grounded, the cathode of light-emitting diode LED1 is connected to one end of resistor R52, and resistor R5 The other end of 2 is connected to the 13th pin of chip U4; the 6th pin of chip U4 is connected to the other end of R44, the 7th pin of chip U4 is grounded, the 8th pin of chip U4 is connected to one end of capacitor C46, ​​the other end of capacitor C46 is grounded, the 10th pin of chip U4 is connected to one end of resistor R50, the other end of R50 is grounded, the 11th pin of chip U4 is connected to the 17th pin SDA port of HDMI retiming processing module chip U6, the 12th pin of chip U4 is connected to the 16th pin SCL port of HDMI retiming processing module chip U6, the 14th pin of chip U4 is connected to resistor R53 and then connected in vain, the 15th pin of chip U4 is connected to resistor R45 and then connected in vain, the 16th pin of chip U4 is connected to resistor R42 and then connected in vain, the 19th pin of chip U4 is connected to the 15th pin RSTN port of MS9331 chip U6 in the HDMI retiming module, and the 20th pin of chip U4 is connected to the 46th pin INT port of MS9331 chip U6 in the HDMI retiming module.

6. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The HDMI retiming processing module includes a signal retiming chip U6 of model MS9331, which is respectively connected to an HDMI input module, an HDMI signal output module and an MCU control module. The specific circuit is as follows: the HDMI input part is connected to the CN1 interface, and the HDMI signal is input through multiple pins; pins 1 and 3 of CN1 are respectively connected to pins 11 and 10 of the chip U6, pins 4 and 6 of CN1 are respectively connected to pins 8 and 7 of U6, pins 7 and 9 of CN1 are respectively connected to pins 5 and 4 of U6, pins 10 and 12 of CN1 are respectively connected to pins 2 and 1 of U6, pin 13 of CN1 is connected to HDMIRXCEC, pin 14 of CN1 is connected to HDMIRXHEC, pin 15 of CN1 is connected to pin 22 of U6 and is connected to one end of a resistor R17, and the other end of the resistor R17 is respectively connected to one end of a capacitor C31, pin 18 of the chip CN1, the positive electrode of a diode D2, one end of a resistor R22, one end of a resistor R19, one end of a resistor R23, and a resistor One end of R29 is connected to HDIN5V, the other end of capacitor C31 is grounded, the cathode of diode D2 is connected to +5V voltage power supply, the other end of resistor R22 is connected to one end of resistor R28 and HDMIRXDET respectively, the other end of resistor R28 is grounded, pin 16 of CN1 is connected to pin 21 of chip U6 and the other end of resistor R19, pins 2, 5, 8, 11 and 17 of interface CN1 are grounded respectively; the other end of resistor R23 is connected to one end of resistor R51 respectively The collector of the transistor Q3 is connected, the other end of the resistor R51 is respectively connected to one end of the capacitor C34 and HDINHPD, the other end of the capacitor C34 is grounded, the emitter of the transistor Q3 is grounded, the base of Q3 is respectively connected to the other end of the resistor R29 and the collector of the transistor Q4, the emitter of Q4 is grounded, the base of Q4 is connected to one end of the resistor R30, and the other end of the resistor R30 is connected to the 19th pin of the retimer chip U6; the 19th pin of the interface CN1 is connected to the 23rd pin of the chip U6; The HDMI output part is connected to the CN2 interface. Pin 1 and pin 3 of CN2 are connected to pin 36 and pin 35 of chip U6 respectively. Pin 4 and pin 6 of CN2 are connected to pin 33 and pin 32 of U6 respectively. Pin 7 and pin 9 of CN2 are connected to pin 31 and pin 30 of U6 respectively. Pin 10 and pin 12 of CN2 are connected to pin 28 and pin 27 of U6 respectively. Pin 13 of CN2 is connected to HDMIRXCEC. Pin 14 of CN2 is connected to HDMIRXHEC. Pin 15 of CN2 is connected to one end of resistor R18. Resistor R18 The other end of CN2 is connected to the 22nd pin of chip U6 and connected to one end of resistor R15, the other end of resistor R15 is connected to +5V power supply, the 16th pin of CN2 is connected to one end of resistor R20, the other end of resistor R20 is connected to the 21st pin of chip U6 and connected to one end of resistor R16, the other end of resistor R16 is connected to +5V power supply, the 2nd, 5th, 8th, 11th and 17th pins of interface CN2 are grounded respectively; the 19th pin of interface CN2 is connected to the 23rd pin of chip U6 and connected to one end of resistor R21, the other end of resistor R21 is grounded; Pin 3 of the retimer chip U6 is connected to a +1.2V power supply and connected to one end of capacitor C21, the other end of capacitor C21 is grounded, pin 6 of U6 is connected to a +3.3V power supply and connected to one end of capacitor C23, the other end of capacitor C23 is grounded, pin 9 of U6 is connected to a +1.2V power supply and connected to one end of capacitor C24, the other end of capacitor C24 is grounded, pin 12 of chip U6 is connected to a +3.3V power supply and connected to one end of capacitors C27, C28, and C29, respectively, the other ends of capacitors C27, C28, and C29 are grounded. One end is grounded; Pin 13 of chip U6 is grounded, Pin 14 of U6 is connected to a +1.2V power supply, and is respectively connected to one end of capacitors C32 and C33, the other ends of capacitors C32 and C33 are grounded, Pin 15 of chip U6 is connected to one end of resistor R26, the other end of resistor R26 is connected to a +3.3V power supply, Pin 16 of chip U6 is connected to one end of resistor R25, the other end of resistor R25 is connected to a +3.3V power supply, Pin 17 of chip U6 is connected to one end of resistor R24, the other end of resistor R24 ​​is connected to a +3.3V power supply ; Pin 25 of chip U6 is connected to a +3.3V power supply, and is connected to one end of capacitors C26 and C30 respectively, and the other ends of capacitors C26 and C30 are grounded. Pin 29 of chip U6 is connected to a +1.2V power supply, and is connected to one end of capacitor C25, and the other end of capacitor C25 is grounded. Pin 34 of chip U6 is connected to a +1.2V power supply, and is connected to one end of capacitor C22, and the other end of capacitor C22 is grounded. Pin 42 of chip U6 is connected to a +1.2V power supply, and is connected to one end of capacitor C19, and the other end of capacitor C19 is grounded. Pin 44 of chip U6 is connected to a +3.3V power supply and to one end of capacitor C18, the other end of capacitor C18 is grounded, pin 45 of chip U6 is connected to one end of resistor RC12, the other end of resistor R12 is grounded, pin 47 of chip U6 is connected to one end of resistor RC11, the other end of resistor R11 is grounded, pin 48 of chip U6 is connected to a +3.3V power supply and to one end of capacitor C20, the other end of capacitor C20 is grounded, and pins 37, 38, 39 and 40 of chip U6 are respectively connected to the audio output circuit.

7. The HDMI retimer circuit for rail transit according to claim 1, characterized in that: The audio processing module transmits digital audio signals to the DAC chip U1 through the I2S bus and finally outputs analog audio signals to the audio jack. The specific circuit is as follows: Pins 40, 38, 39 and 37 of the HDMI retimer chip U6 are connected to Pins 1, 2, 3 and 4 of the chip U1 through resistors R2, R6, R5 and R9 respectively, Pin 5 of the chip U1 is connected to one end of the filter capacitors C11 and C12 respectively, the other ends of the capacitors C11 and C12 are grounded, Pin 6 of the chip U1 is grounded through capacitor C13, Pin 7 of the chip U1 is connected to one end of the capacitor C17, the other end of the capacitor C16 is connected to one end of the resistor R10, and one end of the resistor R10 is connected to one end of the capacitors C17 and C5 respectively. The other end of capacitor C17 is grounded, the other end of capacitor C5 is connected to one end of capacitor C14 and resistor R4 respectively, the other end of capacitor C14 is connected empty, and the other end of resistor R4 is connected to pin 4 of audio jack J1; pin 10 of chip U1 is connected to one end of capacitor C2, the other end of capacitor C2 is connected to one end of resistor R1, one end of resistor R1 is connected to one end of capacitors C1 and C6 respectively, the other end of capacitor C1 is grounded, the other end of capacitor C6 is connected to one end of capacitor C15 and resistor R3 respectively, the other end of capacitor C15 is connected empty, and the other end of resistor R3 is connected to pin 3 of audio jack J1; pin 8 of chip U1 is grounded, pin 9 is connected to +3.3V power supply and grounded through capacitors C3 and C4.

8. The method for implementing the HDMI retimer circuit for rail transit according to any one of claims 1 to 7, characterized in that: The following steps are involved: A. Power management: Receive 5V power input through the TYPE-C interface, the DCDC converter in the power management module converts the 5V voltage into 1.2V power supply, and the LDO regulator converts the 5V voltage into 3.3V, which are respectively supplied to the HDMI retiming processing module, MCU control module and audio processing module to ensure stable power supply for each module; B. Signal reception and processing: The HDMI signal input module receives input signals through the HDMI input port CN1N, and the input signals are transmitted to the HDMI retiming processing module after AC coupling. In the HDMI retiming processing module, the HDMI retiming chip model MS9331 is used to perform clock recovery, equalization and retiming on the signal to improve the signal quality. C. Signal pre-emphasis: In the HDMI retiming processing module, signal pre-emphasis technology is used to enhance signal strength to ensure signal stability during long-distance transmission; D. Audio separation and output: In the HDMI retiming processing module, the audio signal is separated through the I2S or S / PDIF interface. The DAC chip in the audio processing module receives the separated I2S audio signal and converts it into an analog audio signal, which is then output through the LINE OUT interface after filtering. If it is an S / PDIF audio signal, it is directly output to the corresponding interface for use by digital audio devices. E. System control: The MCU control module is connected to the HDMI retiming processing module through the I2C interface to control and adjust the retiming, clock recovery and audio separation functions in real time, and monitor the HDMI signal transmission status; the control module receives the 3.3V power supply provided by the power management module to ensure its stable operation; F. Signal output: The re-timed HDMI signal is transmitted to the external display device through the output port CN2 of the HDMI output module, realizing the long-distance transmission of high-definition signals and the dual-screen display function.

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