Image sensor and manufacturing method thereof

Abstract

The invention relates to an image sensor and a manufacturing method thereof, and the method comprises the steps: providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, forming a plurality of grooves at intervals in the epitaxial layer, and covering the side walls and bottoms of the grooves with first dielectric layers, the first dielectric layer extends to cover the epitaxial layer on the two sides of the groove; part of the first dielectric layer is removed to expose part of the epitaxial layer, and the exposed part of the epitaxial layer comprises the epitaxial layer between the adjacent grooves and at least part of side walls, away from one side of the semiconductor substrate, in the grooves; and forming a grid structure on the exposed part of the epitaxial layer. According to the image sensor, the problem of light crosstalk between pixels formed subsequently is reduced or avoided, meanwhile, the incident light path is shortened, light loss is reduced, and therefore the pixel signal-to-noise ratio of the image sensor is increased.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to an image sensor and a manufacturing method thereof. Background Art

[0002] Image sensors are devices that convert light signals into electrical signals and are widely used in the digital television and visual communication markets. Currently, the most widely used image sensor is the complementary metal oxide semiconductor (CMOS) image sensor. Pixel size reduction is an important theme in the development of CMOS image sensor (CIS) technology. Reducing the pixel size can reduce the manufacturing cost of the sensor, accommodate more pixels on the same target surface, and achieve higher resolution. Therefore, higher requirements are constantly being placed on the pixel size.

[0003] As the pixel size decreases, the microlens in the CMOS image sensor may have difficulty focusing the incident light onto the photosensitive element, resulting in optical crosstalk between pixels, which seriously affects the resolution and accuracy of the COMS image sensor. The back-side illumination (BSI) CMOS image sensor receives incident light from the back side of the semiconductor substrate, forms a metal grid structure on the back of the semiconductor substrate and fills it with a medium to isolate the pixels, which can reduce or even avoid the optical crosstalk problem between pixels. However, at this time, the optical path of the CMOS image sensor is longer, the light loss is greater, the light signal intensity decreases, and when the intensity of the noise signal remains unchanged, the signal-to-noise ratio (SNR, that is, the ratio of the light signal strength to the noise signal strength) decreases accordingly. Summary of the invention

[0004] Based on this, it is necessary to provide an image sensor and a manufacturing method thereof, which can reduce or avoid the problem of optical crosstalk between pixels while shortening the incident light path and reducing light loss to improve the pixel signal-to-noise ratio.

[0005] The present application provides a method for manufacturing an image sensor, comprising:

[0006] A semiconductor substrate is provided, wherein an epitaxial layer is formed on the semiconductor substrate, a plurality of mutually spaced grooves are formed in the epitaxial layer, the sidewalls and bottoms of the grooves are covered with a first dielectric layer, and the first dielectric layer extends to cover the epitaxial layer on both sides of the grooves;

[0007] Removing a portion of the first dielectric layer to expose a portion of the epitaxial layer, wherein the exposed portion of the epitaxial layer includes the epitaxial layer between adjacent grooves and at least a portion of the sidewall of the groove away from the semiconductor substrate;

[0008] A grid structure is formed on the exposed portion of the epitaxial layer.

[0009] In one embodiment, the step of forming a grid structure on the exposed portion of the epitaxial layer comprises:

[0010] forming a metal material layer on the exposed portion of the epitaxial layer and the first dielectric layer;

[0011] Performing an annealing process on the metal material layer to form a metal reaction layer at a contact portion between the metal material layer and the epitaxial layer;

[0012] The metal material layer is etched to expose the metal reaction layer and form the grid structure.

[0013] In one of the embodiments, the material of the epitaxial layer includes silicon material, the material of the metal material layer includes at least metal nickel or metal cobalt, and the material of the grid structure includes nickel silicide or cobalt silicide.

[0014] In one embodiment, the metal material layer is formed by a metal sputtering process or a chemical vapor deposition process.

[0015] In one embodiment, the step of removing part of the first dielectric layer comprises:

[0016] forming a patterned photoresist layer on the first dielectric layer, wherein the photoresist layer covers the bottom of the groove and a portion of the sidewall of the groove close to the semiconductor substrate;

[0017] Using a first etching process to remove a portion of the first dielectric layer that is not covered by the photoresist layer, so as to expose a portion of the epitaxial layer;

[0018] The photoresist layer is removed by a second etching process.

[0019] In one embodiment, after forming the grid structure on the exposed portion of the epitaxial layer, the method for manufacturing the image sensor further includes:

[0020] Filling the groove to form a second dielectric layer, wherein the second dielectric layer at least fills the groove and extends to cover the grid structure;

[0021] forming a filter layer on the second dielectric layer;

[0022] A lens layer is formed on the filter layer.

[0023] Correspondingly, the present application also provides an image sensor manufactured using the manufacturing method of the image sensor.

[0024] In one embodiment, the image sensor comprises:

[0025] Semiconductor substrate;

[0026] An epitaxial layer is located on the semiconductor substrate; a plurality of mutually spaced grooves are arranged in the epitaxial layer;

[0027] A first dielectric layer, located at the bottom of the groove;

[0028] The grid structure is located on the epitaxial layer between two adjacent grooves.

[0029] In one embodiment, the image sensor further comprises:

[0030] a second dielectric layer, filling the groove and covering the grid structure;

[0031] A filter layer; located on the second medium layer;

[0032] The lens layer is located on the filter layer.

[0033] In one of the embodiments, the material of the epitaxial layer includes silicon material, and the material of the grid structure includes nickel silicide or cobalt silicide.

[0034] The unexpected effect of the present application is: by forming an epitaxial layer with grooves on a semiconductor substrate and forming a grid structure on the epitaxial layer between adjacent grooves, so that pixels can be subsequently formed between the grid structures, the problem of optical crosstalk between pixels is reduced or even avoided, while shortening the incident light path of the pixel, reducing light loss, and helping to improve the pixel signal-to-noise ratio of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 The figure is a schematic structural diagram corresponding to the steps after the back side thinning process is completed in a manufacturing method of an image sensor in the related art.

[0037] Figure 2The figure is a structural schematic diagram corresponding to the step of forming a metal layer in a method for manufacturing an image sensor in the related art.

[0038] Figure 3 The figure is a structural schematic diagram corresponding to the step of forming a metal grid structure in a method for manufacturing an image sensor in the related art.

[0039] Figure 4 The figure is a structural schematic diagram corresponding to the step of forming a dielectric layer in a method for manufacturing an image sensor in the related art.

[0040] Figure 5 The figure is a structural schematic diagram corresponding to the step of forming a color filter in a method for manufacturing an image sensor in the related art.

[0041] Figure 6 The present invention is a flowchart of a method for manufacturing an image sensor according to an embodiment of the present invention.

[0042] Figure 7 This is a structural schematic diagram corresponding to the step of providing a semiconductor substrate in a method for manufacturing an image sensor provided in an embodiment of the present application.

[0043] Figure 8 The present invention is a schematic structural diagram corresponding to the step of forming a plurality of mutually spaced grooves in an epitaxial layer in a method for manufacturing an image sensor provided in an embodiment of the present application.

[0044] Fig. 9 This is a structural schematic diagram corresponding to the step of forming a first dielectric layer on an epitaxial layer in a method for manufacturing an image sensor provided in an embodiment of the present application.

[0045] Fig.10 This is a structural schematic diagram corresponding to the step of forming a patterned photoresist layer on a first dielectric layer in a method for manufacturing an image sensor provided in an embodiment of the present application.

[0046] Fig.11 This is a structural schematic diagram corresponding to the step of removing part of the first dielectric layer in the method for manufacturing an image sensor provided in one embodiment of the present application.

[0047] Fig.12 This is a structural schematic diagram corresponding to the step of forming a metal material layer on the exposed portion of the epitaxial layer and the first dielectric layer in the method for manufacturing an image sensor provided by an embodiment of the present application.

[0048] Fig.13 It is a structural schematic diagram corresponding to the step of forming a grid structure on the exposed portion of the epitaxial layer in the method for manufacturing an image sensor provided by an embodiment of the present application.

[0049] Fig.14The present invention is a structural schematic diagram corresponding to the step of filling the groove with a second dielectric layer in the method for manufacturing an image sensor provided in one embodiment of the present application.

[0050] Explanation of the reference numerals: 100-device wafer; 101-carrier wafer; 110-silicon epitaxial layer; 111-protective layer; 120-metal layer; 121-metal grid structure; 122-opening; 130-dielectric layer; 140-color filter; 200-semiconductor substrate; 201-substrate; 202-metal interconnection layer; 203-carrier wafer; 210-epitaxial layer; 211-groove; 220-first dielectric layer; 221-photoresist layer; 230-metal material layer; 231-grid structure; 240-second dielectric layer; 250-filter layer; 260-lens layer. DETAILED DESCRIPTION

[0051] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0053] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0054] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0055] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0056] Figures 1 to 5 FIG. 1 is a schematic diagram of the structure corresponding to some steps in a conventional method for manufacturing an image sensor. First, referring to FIG. Figure 1 , providing a device wafer 100, the front side of the device wafer 100 is bonded to a carrier wafer 101, and a silicon epitaxial layer 110 (Epitaxial, Epi) is formed on the back side of the device wafer 100. Optionally, after bonding the front side of the device wafer 100 to a carrier wafer 101 and before forming the silicon epitaxial layer 110 on the back side of the device wafer 100, it also includes: performing a back side thinning process on the device wafer 100 to thin the device wafer 100.

[0057] Next, see Figure 2 , a protective layer 111 and a metal layer 120 are sequentially formed on the silicon epitaxial layer 110. In one embodiment, the protective layer 111 is a silicon oxide layer, and the protective layer 111 is formed by a chemical vapor deposition process. Optionally, a metal sputtering process (Sputter) is used to form the metal layer 120. In one embodiment, the material of the metal layer 120 includes one of metal tungsten (W), metal cobalt (Co) or metal nickel (Ni).

[0058] Then, see Figure 3 , the metal layer 120 is patterned to form a metal grid structure 121 in the metal layer 120. Exemplarily, the process of forming the metal grid structure 121 includes: forming a patterned photoresist layer (not shown in the figure) on the metal layer 120; etching the metal layer 120 using the patterned photoresist layer as a mask to form a plurality of openings 122 that are spaced apart from each other and expose the protective layer 111, so that the metal layer 120 between adjacent openings 122 forms the metal grid structure 121; then, removing the patterned photoresist layer. It should be noted that during the formation of the metal grid structure 121, the protective layer 111 can protect the silicon epitaxial layer 110 from being damaged by etching.

[0059] See also Figure 4 , a dielectric layer 130 is formed on the metal layer 120, and the dielectric layer 130 fills the opening 122 and covers the metal grid structure 121. In one embodiment, the material of the dielectric layer 130 is the same as that of the protective layer 111, both of which are silicon oxide. In other embodiments of the present application, the materials of the dielectric layer 130 and the protective layer 111 may be different, and may also be made of other insulating materials.

[0060] See also Figure 5 , a color filter 140 is formed on the dielectric layer 130 . Optionally, the color filter 140 is formed directly above the metal grid structure 121 .

[0061] It should be noted that Figures 1 to 5 The manufacturing method of the image sensor can be used to manufacture a back-illuminated (BSI) CMOS image sensor. At this time, the image sensor receives incident light through the back side of the device wafer 100. By forming a metal grid structure 121 (Metal Grid) on the back side of the device wafer 100 and filling it with a medium to isolate the pixels, the optical crosstalk problem between pixels can be reduced or even avoided. However, at this time, the optical path of the image sensor is long, the light loss is large, and the signal-noise ratio (SNR) is low.

[0062] In view of this, the present application provides an image sensor and a method for manufacturing the same, which can reduce or avoid the problem of optical crosstalk between pixels while shortening the incident light path and reducing light loss to improve the pixel signal-to-noise ratio.

[0063] Figure 6 This is a flow chart of a method for manufacturing an image sensor provided by an embodiment of the present application. Figure 6 One embodiment of the present application provides a method for manufacturing an image sensor, which includes the following steps S01 to S03.

[0064] Step S01: providing a semiconductor substrate, on which an epitaxial layer is formed, in which a plurality of mutually spaced grooves are formed, and the sidewalls and bottoms of the grooves are covered with a first dielectric layer, and the first dielectric layer extends to cover the epitaxial layer on both sides of the grooves.

[0065] Step S02: removing a portion of the first dielectric layer to expose a portion of the epitaxial layer, wherein the exposed portion of the epitaxial layer includes the epitaxial layer between adjacent grooves and at least a portion of the sidewall of the groove away from the semiconductor substrate.

[0066] Step S03: forming a grid structure on the exposed portion of the epitaxial layer.

[0067] It can be seen that the manufacturing method of the image sensor described in the present application forms an epitaxial layer with grooves on a semiconductor substrate, and forms a grid structure on the epitaxial layer between adjacent grooves, so as to subsequently form pixels between the grid structures, thereby reducing or even avoiding the problem of optical crosstalk between pixels, and at the same time shortening the incident light path of the pixel, reducing light loss, and being beneficial to improving the pixel signal-to-noise ratio of the image sensor.

[0068] Figures 7 to 14 The schematic diagram of the structure corresponding to each step in the manufacturing method of the image sensor described in this application is shown below in combination with Figures 7 to 14 The method for manufacturing the image sensor described in the present application is described in detail.

[0069] First, see Figures 7 to 9 , performing step S01, providing a semiconductor substrate 200, on which an epitaxial layer 210 and a first dielectric layer 220 are formed. In one embodiment, the process of providing a semiconductor substrate 200 and forming the epitaxial layer 210 and the first dielectric layer 220 includes: referring to Figure 7 , providing a semiconductor substrate 200; forming an epitaxial layer 210 on the semiconductor substrate 200; then, referring to Figure 8 , a plurality of mutually spaced grooves 211 are formed in the epitaxial layer 210; then, referring to Fig. 9 , a first dielectric layer 220 is formed on the epitaxial layer 210 , and the first dielectric layer 220 covers the sidewall and the bottom of the groove 211 .

[0070] Continue reading Figure 7 In one embodiment, the process of providing a semiconductor substrate 200 includes: providing a substrate 201; forming a metal interconnection layer 202 on the front side of the substrate 201, and the semiconductor substrate 200 at least includes the substrate 201 and the metal interconnection layer 202; providing a carrier wafer 203; bonding the side of the semiconductor substrate 200 away from the substrate 201 to the carrier wafer 203; performing a back thinning process on the side of the semiconductor substrate 200 away from the carrier wafer 203 to thin the semiconductor substrate 200, so as to reduce the size of the image sensor. Among them, the epitaxial layer 210 is formed on the back side of the substrate 201. Optionally, the epitaxial layer 210 is a silicon epitaxial layer. It should be noted that in other embodiments of the present application, other semiconductor structures may be included between the substrate 201 and the carrier wafer 203, and the present application does not limit this.

[0071] See also Figure 8 In one embodiment, the process of forming a plurality of mutually spaced grooves 211 in the epitaxial layer 210 includes: forming a mask layer (not shown) on the epitaxial layer 210, etching a portion of the epitaxial layer 210 using the mask layer as a mask to form a plurality of mutually spaced grooves 211 in the epitaxial layer 210; and then removing the mask layer. Optionally, a wet etching process is used to remove the mask layer, and at the same time, impurities and byproducts generated during the etching process of the epitaxial layer 210 are removed.

[0072] See also Fig. 9 In one embodiment, the first dielectric layer 220 is formed by chemical vapor deposition. Optionally, the first dielectric layer 220 is a silicon oxide layer. In other embodiments of the present application, the first dielectric layer 220 may also be a silicon nitride layer, or a stacked structure composed of a silicon oxide layer and a silicon nitride layer. The first dielectric layer 220 may also be made of other insulating materials, which is not limited in the present application.

[0073] Next, see Fig.10 and Fig.11 , perform step S02 to remove part of the first dielectric layer 220 to expose part of the epitaxial layer 210 , wherein the exposed part of the epitaxial layer 210 includes the epitaxial layer 210 between adjacent grooves 211 and at least part of the sidewall of the groove 211 away from the semiconductor substrate 200 .

[0074] In one embodiment, the process of removing a portion of the first dielectric layer 220 includes: Fig.10 , forming a patterned photoresist layer 221 on the first dielectric layer 220, the photoresist layer 221 covers the bottom of the groove 211 and a portion of the sidewall of the groove 211 close to the substrate 201; then, referring to Fig.11 A first etching process is used to remove the portion of the first dielectric layer 220 not covered by the photoresist layer 221 to expose a portion of the epitaxial layer 210, and then a second etching process is used to remove the photoresist layer 221. Optionally, the first etching process is a wet etching process, and the second etching process is a wet cleaning process or a plasma cleaning process.

[0075] Next, see Fig.12 and Fig.13 , executing step S03 to form a grid structure 231 on the exposed portion of the epitaxial layer 210 .

[0076] In one embodiment, the process of forming the grid structure 231 includes: forming a metal material layer 230 on the exposed portion of the epitaxial layer 210 and the first dielectric layer 220; performing an annealing process on the metal material layer 230 to form a metal reaction layer at the contact portion between the metal material layer 230 and the epitaxial layer 210; etching the metal material layer 230 to remove the remaining metal material layer 230; wherein the metal reaction layer exposed after removing the metal material layer 230 is the grid structure 231.

[0077] In one embodiment, a metal sputtering process or a chemical vapor deposition process is used to form the metal material layer 230. Optionally, the material of the metal material layer 230 at least includes metal nickel (Ni) or metal cobalt (Co).

[0078] It should be noted that Fig.13The figure shows that the metal reaction layer (i.e., the grid structure 231) is completely formed on the side of the epitaxial layer 210 between adjacent grooves 211 away from the semiconductor substrate 200. In other embodiments of the present application, the metal reaction layer generated by the metal material layer 230 and the epitaxial layer 210 in the annealing process may only cover the surface of the side of the epitaxial layer 210 between adjacent grooves 211 away from the semiconductor substrate 200. It can also be understood that the morphology and thickness of the metal reaction layer (i.e., the grid structure 231) can be adjusted by adjusting the process parameters of the annealing process, the material and thickness of the metal material layer 230, the material of the epitaxial layer 210, and the morphology of the grooves 211, and the present application does not limit this.

[0079] In one embodiment, the material of the grid structure 231 includes nickel silicide (NiSi) or cobalt silicide (CoSi). It should be noted that the material of the grid structure 231 is determined by the material of the metal material layer 230 and the material of the epitaxial layer 210. For example, if the metal material layer 230 is a metal nickel layer and the epitaxial layer 210 is a silicon epitaxial layer, the grid structure 231 is a nickel silicide layer; if the metal material layer 230 is a metal cobalt layer and the epitaxial layer 210 is a silicon epitaxial layer, the grid structure 231 is a cobalt silicide layer. In other embodiments of the present application, the material of the grid structure 231 can also be adjusted to other materials with conductive properties, and the material selection of the epitaxial layer 210 and the metal material layer 230 can be adjusted according to actual process requirements. It is only necessary to ensure that the metal reaction layer generated by the reaction of the metal material layer 230 and the epitaxial layer 210 after the annealing process meets the process requirements. This application does not impose any restrictions on this.

[0080] See also Fig.14 In one embodiment, after forming the grid structure 231 on the exposed portion of the epitaxial layer 210, the method for manufacturing the image sensor further includes: filling the groove 211 with a second dielectric layer 240, the second dielectric layer 240 at least filling the groove 211 and extending to cover the grid structure 231; performing a planarization process on the second dielectric layer 240 to improve the surface planarity of the second dielectric layer 240; forming a filter layer 250 on the second dielectric layer 240; and forming a lens layer 260 on the filter layer 250. Optionally, the material of the first dielectric layer 220 is the same as the material of the second dielectric layer 240, and the material of the first dielectric layer 220 and the second dielectric layer 240 includes at least one of silicon oxide or silicon nitride.

[0081] The present application also provides an image sensor, which is manufactured using the above-mentioned method for manufacturing an image sensor. Fig.14In one embodiment, the image sensor includes a semiconductor substrate 200, an epitaxial layer 210 disposed on the semiconductor substrate 200, a first dielectric layer 220 disposed on the epitaxial layer 210, and a grid structure 231, wherein a plurality of mutually spaced grooves 211 are disposed in the epitaxial layer 210, the grid structure 231 covers the epitaxial layer 210 between adjacent grooves 211, and the first dielectric layer 220 is located at the bottom of the grooves 211. Optionally, the epitaxial layer 210 is a silicon epitaxial layer, the grid structure 231 is a nickel silicide layer or a cobalt silicide layer, and the first dielectric layer 220 is a silicon oxide layer.

[0082] In one embodiment, the image sensor further includes a second dielectric layer 240, and the second dielectric layer 240 fills the groove 211 and covers the grid structure 231, and a filter layer 250 and a lens layer 260 are sequentially arranged on the second dielectric layer 240 above the grid structure 231 from bottom to top to form a color filter of the image sensor.

[0083] contrast Figure 5 and Fig.14 It can be seen that in the existing manufacturing method of the image sensor, the metal grid structure 121 is formed on the protective layer 111, and the optical path of the image sensor is relatively long. In the image sensor and its manufacturing method provided by the present application, the grid structure 231 is formed on the epitaxial layer 210 between adjacent grooves 211, which reduces or even avoids the optical crosstalk problem between the pixels formed subsequently, shortens the incident optical path of the pixel, reduces light loss, and is beneficial to improving the pixel signal-to-noise ratio of the image sensor.

[0084] It can be seen that the unexpected effect of the present application is: by forming an epitaxial layer with grooves on a semiconductor substrate and forming a grid structure on the epitaxial layer between adjacent grooves, so as to subsequently form pixels between the grid structures, the problem of optical crosstalk between pixels is reduced or even avoided, and at the same time, the incident light path of the pixel is shortened, reducing light loss, which is beneficial to improving the pixel signal-to-noise ratio of the image sensor.

[0085] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0086] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0087] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the application. It should be noted that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for manufacturing an image sensor, characterized in that: include: A semiconductor substrate is provided, wherein an epitaxial layer is formed on the semiconductor substrate, a plurality of mutually spaced grooves are formed in the epitaxial layer, the sidewalls and bottoms of the grooves are covered with a first dielectric layer, and the first dielectric layer extends to cover the epitaxial layer on both sides of the grooves; Removing a portion of the first dielectric layer to expose a portion of the epitaxial layer, wherein the exposed portion of the epitaxial layer includes the epitaxial layer between adjacent grooves and at least a portion of the sidewall of the groove away from the semiconductor substrate; A grid structure is formed on the exposed portion of the epitaxial layer.

2. The method for manufacturing an image sensor according to claim 1, wherein: The step of forming a grid structure on the exposed portion of the epitaxial layer comprises: forming a metal material layer on the exposed portion of the epitaxial layer and the first dielectric layer; Performing an annealing process on the metal material layer to form a metal reaction layer at a contact portion between the metal material layer and the epitaxial layer; The metal material layer is etched to expose the metal reaction layer and form the grid structure.

3. The method for manufacturing an image sensor according to claim 2, wherein: The material of the epitaxial layer includes silicon material, the material of the metal material layer includes at least metal nickel or metal cobalt, and the material of the grid structure includes nickel silicide or cobalt silicide.

4. The method for manufacturing an image sensor according to claim 2, wherein: The metal material layer is formed by a metal sputtering process or a chemical vapor deposition process.

5. The method for manufacturing an image sensor according to claim 1, wherein: The step of removing part of the first dielectric layer comprises: forming a patterned photoresist layer on the first dielectric layer, wherein the photoresist layer covers the bottom of the groove and a portion of the sidewall of the groove close to the semiconductor substrate; Using a first etching process to remove a portion of the first dielectric layer that is not covered by the photoresist layer, so as to expose a portion of the epitaxial layer; The photoresist layer is removed by a second etching process.

6. The method for manufacturing an image sensor according to claim 1, wherein: After forming the grid structure on the exposed portion of the epitaxial layer, the method for manufacturing the image sensor further includes: Filling the groove to form a second dielectric layer, wherein the second dielectric layer at least fills the groove and extends to cover the grid structure; performing a planarization process on the second dielectric layer; forming a filter layer on the second dielectric layer; A lens layer is formed on the filter layer.

7. An image sensor, characterized in that: The image sensor is manufactured using the method for manufacturing the image sensor according to any one of claims 1 to 6.

8. The image sensor according to claim 7, characterized in that: include: Semiconductor substrate; An epitaxial layer, located on the semiconductor substrate; The epitaxial layer is provided with a plurality of grooves spaced apart from each other; A first dielectric layer, located at the bottom of the groove; The grid structure is located on the epitaxial layer between two adjacent grooves.

9. The image sensor according to claim 8, characterized in that: The image sensor further comprises: a second dielectric layer, filling the groove and covering the grid structure; A filter layer; located on the second medium layer; The lens layer is located on the filter layer.

10. The image sensor according to claim 8, characterized in that The material of the epitaxial layer includes silicon material, and the material of the grid structure includes nickel silicide or cobalt silicide.

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