Light emitting diode and preparation method thereof

Abstract

The invention discloses a light emitting diode and a preparation method thereof, and relates to the technical field of semiconductors. The light-emitting diode sequentially comprises a conductive substrate, an electrode metal layer, a bonding metal layer, a first electrode layer and an epitaxial laminated layer from bottom to top, wherein the epitaxial laminated layer sequentially comprises a second semiconductor layer, a light-emitting layer and a first semiconductor layer from bottom to top; the material of the electrode metal layer is the same as that of the first electrode layer. According to the invention, the number of times of chemical cleaning and evaporation during preparation of the light-emitting diode is reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a light emitting diode and a method for manufacturing the same. Background Art

[0002] Traditional light emitting diode (LED) chips are grown epitaxially on sapphire substrates and then obtained through micromachining technology. Sapphire substrates have the characteristics of good quality, low price, and good thermal stability. However, the shortcomings of sapphire limit the further improvement of LED performance, mainly in the following aspects: First, sapphire has poor electrical conductivity, so the traditional LED positive chip places the P and N electrodes on the same side. By etching part of the epitaxial to the N-type gallium nitride surface, on the one hand, a part of the light output area will be lost, and on the other hand, it will cause the current crowding effect, causing the PN junction temperature to rise, thereby causing the stability of the LED to decrease. Secondly, the poor thermal conductivity of sapphire will also cause the PN junction temperature of the LED to rise, which is more serious in high-power and large-area devices.

[0003] In view of the shortcomings of sapphire substrates, vertical structure LED chips use a bonding process to transfer the LED chip to a substrate with better thermal and electrical conductivity, and then peel off the sapphire substrate to obtain a vertical structure with electrodes distributed on the upper and lower surfaces. The vertical structure is conducive to current expansion, making the LED light more uniform and improving the carrier injection efficiency. Secondly, the vertical structure eliminates the space for making N electrodes on the surface, so its unit light-emitting area is larger than that of the upright structure, which improves the utilization rate of the epitaxy. Finally, the substrate with high thermal conductivity bonded on makes the device have good heat dissipation performance and improves the reliability of the device.

[0004] At present, vertical structure LED chips need to undergo multiple chemical cleaning and evaporation operations when transferring the substrate, which can easily lead to low production efficiency and waste of manpower and material resources, and increase production costs. Summary of the invention

[0005] In view of this, in order to solve the above technical problems, the present application provides a light emitting diode and a method for preparing the same.

[0006] In order to solve the above technical problems, one of the technical solutions adopted in the present application is to provide a light-emitting diode, which includes, from bottom to top, a conductive substrate, an electrode metal layer, a bonding metal layer, a first electrode layer and an epitaxial stack;

[0007] The epitaxial stack includes a second semiconductor layer, a light-emitting layer and a first semiconductor layer in order from bottom to top; the material of the electrode metal layer is the same as that of the first electrode layer.

[0008] In order to solve the above technical problems, another technical solution adopted by the present application is to provide a method for preparing a light emitting diode, the preparation method comprising:

[0009] Step S110: providing a light-emitting structure layer and a conductive substrate;

[0010] The light emitting structure layer includes a growth substrate and an epitaxial stack from bottom to top; the epitaxial stack includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer from bottom to top;

[0011] Step S120: placing the light emitting structure layer and the conductive substrate in the same chamber of the same set of evaporation equipment for evaporation, so as to form a first stacked layer on the conductive substrate and a second stacked layer on the second semiconductor layer;

[0012] The first stack includes an electrode metal layer and a first bonding layer in order from bottom to top; the second stack includes a first electrode layer and a second bonding layer in order from bottom to top; the material of the electrode metal layer is the same as that of the first electrode layer, and the material of the first bonding layer is the same as that of the second bonding layer;

[0013] Step S130: bonding the second bonding layer to the first bonding layer, so that the second bonding layer and the first bonding layer form a combined layer bonding metal layer;

[0014] Wherein, a side surface of the second bonding layer facing away from the growth substrate faces a side surface of the first bonding layer facing away from the conductive substrate;

[0015] Step S140: removing the growth substrate, and preparing a light emitting diode based on the remaining structure of the light emitting structure layer and the conductive substrate after removing the growth substrate.

[0016] Beneficial effect: Different from the prior art, in the present application, the light emitting structure layer and the conductive substrate are placed in the same chamber of the same set of evaporation equipment for evaporation to form a first stack on the conductive substrate and a second stack on the first insulating layer. In this way, chemical cleaning and the number of evaporation times can be reduced.

[0017] Reducing the number of chemical cleaning times includes a first aspect and a second aspect: the first aspect includes that chemical cleaning may not be performed between the evaporated electrode metal layer and the evaporated first bonding layer, and the second aspect includes that chemical cleaning may not be performed between the evaporated first electrode layer and the evaporated second bonding layer.

[0018] Reducing the number of evaporation times includes a first aspect and a second aspect: the first aspect includes evaporating the electrode metal layer and evaporating the first bonding layer in one evaporation; the second aspect includes evaporating the first electrode layer and evaporating the second bonding layer in one evaporation. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1is a schematic diagram of a conductive substrate provided in step S110 of the method for preparing a light emitting diode in Example 1 of the present application;

[0020] Figure 2 yes Figure 1 A schematic diagram of the region division of the region above the growth substrate in the structure shown;

[0021] Figure 3 It is a schematic diagram of a light-emitting structure layer provided in step S110 of the method for preparing a light-emitting diode in Example 1 of the present application;

[0022] Figure 4 yes Figure 3 A schematic diagram of the area division of the area above the conductive substrate in the structure shown;

[0023] Figure 5 is a schematic diagram of a structure formed on a conductive substrate when step S120 of the method for preparing a light emitting diode in Example 1 of the present application is completed;

[0024] Figure 6 is a schematic diagram of a structure formed on the light emitting structure layer when step S120 of the method for preparing a light emitting diode in Example 1 of the present application is completed;

[0025] Figure 7 is a schematic diagram of a structure formed when step S130 of the method for preparing a light emitting diode in Example 1 of the present application is completed;

[0026] Figure 8 yes Figure 7 A magnified schematic diagram of the middle region P;

[0027] Fig. 9 is a schematic diagram of a structure formed in step S141 of the method for preparing a light emitting diode in Example 4 of the present application;

[0028] Fig.10 is a schematic diagram of a structure formed in step S1421 of the method for preparing a light emitting diode in Example 5 of the present application;

[0029] Fig.11 is a schematic diagram of a structure formed in step S1422 of the method for preparing a light emitting diode in Example 5 of the present application;

[0030] Fig.12 is a schematic diagram of a structure formed in step S1423 of the method for preparing a light emitting diode in Example 5 of the present application;

[0031] Fig.13 is a schematic diagram of a light emitting diode formed after step S143 of the method for preparing a light emitting diode in Example 4 of the present application;

[0032] Fig.14 is a schematic diagram of a structure formed after step S144 of the method for preparing a light emitting diode in Example 4 of the present application;

[0033] Fig.15 is a schematic diagram of another light-emitting diode formed after step S145 of the method for preparing a light-emitting diode in Example 4 of the present application;

[0034] Fig.16 is a schematic diagram of a growth substrate provided in step S11 of the method for preparing a light emitting diode in Example 7 of the present application;

[0035] Fig.17 is a schematic diagram of a structure formed in step S12 of the method for preparing a light emitting diode in Example 7 of the present application;

[0036] Fig.18 is a schematic diagram of a structure formed in step S13 of the method for preparing a light emitting diode in Example 7 of the present application;

[0037] Fig.19 is a schematic diagram of a structure formed in step S14 of the method for preparing a light emitting diode in Example 7 of the present application;

[0038] Fig. 20 is a schematic diagram of a structure formed in step S15 of the method for preparing a light emitting diode in Example 7 of the present application;

[0039] Fig.21 is a schematic diagram of a structure formed in step S16 of the method for preparing a light emitting diode in Example 7 of the present application;

[0040] Fig. 22 is a schematic diagram of a structure formed in step S17 of the method for preparing a light emitting diode in Example 7 of the present application;

[0041] Fig.23 It is a schematic diagram of the light-emitting structure layer formed in step S18 of the method for preparing a light-emitting diode in Example 7 of the present application.

[0042] Description of reference numerals:

[0043] 10. light-emitting diode; 100. light-emitting structure layer; 200. conductive substrate; 110. growth substrate; 120. epitaxial stack; 121. first semiconductor layer; 122. light-emitting layer; 123. second semiconductor layer; 124. first contact hole; 130. first insulating layer; 140. current spreading layer; 150. second electrode; 160. ohmic contact layer; 170. second insulating layer; 171. first opening; 180. reflector layer; 191. roughening structure; 192. passivation protection layer; 193. back gold layer;

[0044] A, first region; B, second region; C, third region; D, fourth region; P, region P; d1, thickness of electrode metal layer; d2, thickness of first electrode layer; d3, thickness of bonding metal layer;

[0045] 300, first stack; 310, electrode metal layer; 320, first bonding layer; 400, second stack; 410, first electrode layer; 420, second bonding layer; 500, bonding metal layer; 610, first bonding metal layer; 620, reflective metal layer; 630, second bonding metal layer. DETAILED DESCRIPTION

[0046] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described implementation methods are only part of the implementation methods of the present application, rather than all the implementation methods. Based on the implementation methods in the present application, all other implementation methods obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0047] Example 1

[0048] The method for manufacturing the light emitting diode 10 of the present application includes steps S110 to S130.

[0049] Step S110: providing a light emitting structure layer 100 and a conductive substrate 200 .

[0050] like Figure 1 The conductive substrate 200 provided in step S110 is shown. Figure 3 FIG. 1 is a diagram showing the light emitting structure layer 100 provided in step S110. Figure 3 As shown, the light emitting structure layer 100 includes a growth substrate 110 and an epitaxial stack 120 in order from bottom to top. Figure 3 See also Figure 4 As shown, the growth substrate 110 includes a third region C and a fourth region D, the fourth region D is distributed around the third region C, and the epitaxial stack 120 is connected and distributed in the third region C and the fourth region D. The epitaxial stack 120 includes a first semiconductor layer 121, a light emitting layer 122, and a second semiconductor layer 123 from bottom to top.

[0051] Step S120 : placing the light emitting structure layer 100 and the conductive substrate 200 in the same chamber of the same set of evaporation equipment for evaporation to form a first stack 300 on the conductive substrate 200 and a second stack 400 on the first insulating layer 130 .

[0052] Among them, combined Figure 1 See also Figure 5As shown, the first stack 300 is formed on the conductive substrate 200, and the first stack 300 includes an electrode metal layer 310 and a first bonding layer 320 in order from bottom to top. Figure 3 See also Figure 6 As shown, the second stack 400 is formed on the second semiconductor layer 123, and the second stack 400 includes a first electrode layer 410 and a second bonding layer 420 from bottom to top. The material of the electrode metal layer 310 is the same as that of the first electrode layer 410, and the material of the first bonding layer 320 is the same as that of the second bonding layer 420.

[0053] Optionally, the light emitting structure layer 100 provided in step S110 includes a first insulating layer 130 , and the first insulating layer 130 is located on the second semiconductor layer 123 ; step S120 further includes steps S121 to S123 .

[0054] Step S121: providing an evaporation device, and placing the conductive substrate 200 and the light-emitting structure layer 100 together in the same chamber of the evaporation device.

[0055] Step S122 : controlling the evaporation equipment to evaporate the first material on the conductive substrate 200 and the first insulating layer 130 .

[0056] The first material is a material used to prepare the electrode metal layer 310 and the first electrode layer 410. Figure 1 See also Figure 5 As shown, the first material evaporated on the conductive substrate 200 forms an electrode metal layer 310, combined with Figure 3 See also Figure 6 As shown, the first material evaporated on the first insulating layer 130 forms the first electrode layer 410 .

[0057] Step S123 : controlling the evaporation equipment to evaporate the second material on the electrode metal layer 310 and the first electrode layer 410 .

[0058] The second material is a material used to prepare the first bonding layer 320 and the second bonding layer 420. Figure 1 See also Figure 5 As shown, the second material evaporated on the electrode metal layer 310 forms the first bonding layer 320, combined with Figure 3 See also Figure 6 As shown, the second material evaporated on the first electrode layer 410 forms the second bonding layer 420 .

[0059] Step S130 : bonding the second bonding layer 420 to the first bonding layer 320 , so that the second bonding layer 420 and the first bonding layer 320 are combined into a bonding metal layer 500 .

[0060] Combination Figure 5 and Figure 6, see Figure 7 As shown, after step S120, the conductive substrate 200 on which the electrode metal layer 310 and the first bonding layer 320 are sequentially evaporated and the light emitting structure layer 100 on which the first electrode layer 410 and the second bonding layer 420 are sequentially evaporated can be taken out from the evaporation device to perform step S130. In step S130, as Figure 7 As shown, a side of the second bonding layer 420 facing away from the growth substrate 110 faces a side of the first bonding layer 320 facing away from the conductive substrate 200 , and the second bonding layer 420 is bonded to the first bonding layer 320 to form a bonding metal layer 500 .

[0061] Among them, Figure 2 As shown, the conductive substrate 200 includes a first region A and a second region B, and the second region B is distributed around the first region A. Figure 2-Figure 4 , see Figure 7 As shown, after step S130, the structure in the third area C is located in the first area A, and the structure in the fourth area D is located in the second area B.

[0062] like Figure 7 As shown, it should be understood that after the first bonding layer 320 and the second bonding layer 420 are combined into the bonding metal layer 500, it is difficult to see the interface between the first bonding layer 320 and the second bonding layer 420 in the bonding metal layer 500, and the first bonding layer 320 and the second bonding layer 420 actually constitute a bonding metal layer 500 without obvious internal stratification.

[0063] Step S140 : removing the growth substrate 110 , and preparing the light emitting diode 10 based on the remaining structure of the light emitting structure layer 100 and the conductive substrate 200 after removing the growth substrate 110 .

[0064] Combination Figure 7 See also Fig. 9 As shown, Fig. 9 FIG. 1 is a schematic diagram of the structure remaining after the growth substrate 110 is removed. Fig. 9 See also Figure 10-13 As shown, the light emitting diode 10 is prepared based on the remaining structure of the light emitting structure layer 100 and the conductive substrate 200 after the growth substrate 110 is removed.

[0065] In the above manner, the light emitting structure layer 100 and the conductive substrate 200 are placed in the same chamber of the same set of evaporation equipment for evaporation, so as to form the first stack 300 on the conductive substrate 200 and the second stack 400 on the first insulating layer 130. In this way, chemical cleaning and the number of evaporation can be reduced.

[0066] Reducing the number of chemical cleaning times includes a first aspect and a second aspect: the first aspect includes that chemical cleaning may not be performed between the evaporated electrode metal layer 310 and the evaporated first bonding layer 320 , and the second aspect includes that chemical cleaning may not be performed between the evaporated first electrode layer 410 and the evaporated second bonding layer 420 .

[0067] Reducing the number of evaporation times includes a first aspect and a second aspect: the first aspect includes evaporating the electrode metal layer 310 and the first bonding layer 320 in one evaporation, and the second aspect includes evaporating the first electrode layer 410 and the second bonding layer 420 in one evaporation.

[0068] Example 2

[0069] Example 2 is further limited on the basis of Example 1, and the similarities between Example 2 and Example 1 are not repeated here. Compared with Example 1, Example 2 is further limited as follows.

[0070] Combination Figure 4 See also Figure 3 As shown, the epitaxial stack 120 of the light emitting structure layer 100 provided in step S110 is provided with a first contact hole 124, the first contact hole 124 is located in the third region C and the first contact hole 124 penetrates the second semiconductor layer 123 and the light emitting layer 122 and extends to the first semiconductor layer 121. Figure 3 As shown, the light emitting structure layer 100 provided in step S110 includes a first insulating layer 130, which is located between the first electrode layer 410 and the epitaxial stack 120. The first insulating layer 130 extends into the first contact hole 124 and covers the sidewall of the first contact hole 124.

[0071] Combination Figure 3 See also Figure 6 As shown, the first electrode layer 410 formed in step S120 covers the first insulating layer 130 and extends into the first contact hole 124 to be electrically connected to the first semiconductor layer 121; and Figure 1 and Figure 3 See also Figure 5 and Figure 6 As shown, the thickness d2 of the first electrode layer 410 formed in step S120 is the same as the thickness d1 of the electrode metal layer 310 formed in step S120 .

[0072] It should be understood that, precisely because the thickness d2 of the first electrode layer 410 is the same as the thickness d1 of the electrode metal layer 310, the first electrode layer 410 and the electrode metal layer 310 can be formed by evaporation in the same chamber of the same set of evaporation equipment. Therefore, the feature that the thickness d2 of the first electrode layer 410 is the same as the thickness d1 of the electrode metal layer 310 is specially provided for the purpose of enabling the first electrode layer 410 and the electrode metal layer 310 to be formed by evaporation in the same chamber of the same set of evaporation equipment.

[0073] Optionally, see Figure 5-Figure 7 As shown, the thickness d2 of the first electrode layer 410 and the thickness d1 of the electrode metal layer 310 can both be 100-500 nm. If the thickness d2 of the first electrode layer 410 is less than 100 nm, good conductivity and reflection effects cannot be achieved, and if the thickness d2 of the first electrode layer 410 is greater than 500 nm, the cost is high.

[0074] Optionally, see Figure 5-Figure 7 As shown, the thickness d3 of the bonding metal layer 500 is 1000-9000nm. If the thickness d3 of the bonding metal layer 500 is less than 1000nm, the conductive substrate 200 and the light emitting structure layer 100 cannot be stably bonded together. If the thickness d3 of the bonding metal layer 500 is greater than 9000nm, the cost is high.

[0075] Exemplarily, the thickness d2 of the first electrode layer 410 and the thickness d1 of the electrode metal layer 310 are both 100 nm, 300 nm or 500 nm, but not limited thereto. Exemplarily, the thickness d3 of the bonding metal layer 500 is 1000 nm, 6000 nm or 9000 nm, but not limited thereto.

[0076] Optionally, the reflectivity of the electrode metal layer 310 and the first electrode layer 410 is not less than 80%. In this way, the first electrode layer 410 and the electrode metal layer 310 can reflect the light emitted from the light emitting layer 122 toward the second semiconductor layer 123, so that part of the reflected light is re-emitted from the light emitting layer 122 toward the first semiconductor layer 121, thereby improving the front light extraction efficiency of the light emitting diode 10.

[0077] Example 3

[0078] Example 3 is further limited on the basis of Example 2. The similarities between Example 3 and Example 2 are not repeated here. Compared with Example 2, the further limitations of Example 3 are as follows.

[0079] Combination Figure 7 See also Figure 8The electrode metal layer 310 and the first electrode layer 410 both include multiple metal layers. Optionally, the multiple metal layers of both the electrode metal layer 310 and the first electrode layer 410 include a first bonding metal layer 610, a reflective metal layer 620 and a second bonding metal layer 630 in sequence along the direction toward the bonding metal layer 500.

[0080] In the above manner, the first bonding metal layer 610 of the electrode metal layer 310 can strengthen the bonding strength between the reflective metal layer 620 of the electrode metal layer 310 and other layers on the side where the first bonding metal layer 610 of the electrode metal layer 310 is located. And the second bonding metal layer 630 of the electrode metal layer 310 can strengthen the bonding strength between the reflective metal layer 620 of the electrode metal layer 310 and the bonding metal layer 500. And the first bonding metal layer 610 of the first electrode layer 410 can strengthen the bonding strength between the reflective metal layer 620 of the first electrode layer 410 and other layers on the side where the first bonding metal layer 610 of the first electrode layer 410 is located. And the second bonding metal layer 630 of the first electrode layer 410 can strengthen the bonding strength between the reflective metal layer 620 of the first electrode layer 410 and the bonding metal layer 500.

[0081] Optionally, combined Figure 7 See also Figure 8 As shown, the material and thickness of the first bonding metal layer 610 of the electrode metal layer 310 are the same as those of the first bonding metal layer 610 of the first electrode layer 410. The material and thickness of the reflective metal layer 620 of the electrode metal layer 310 are the same as those of the reflective metal layer 620 of the first electrode layer 410. The material and thickness of the second bonding metal layer 630 of the electrode metal layer 310 are the same as those of the second bonding metal layer 630 of the first electrode layer 410.

[0082] Combination Figure 7 See also Figure 8 As shown, optionally, the first bonding metal layer 610 includes a single film layer or multiple stacked film layers of Ti, TiW, Pt and Ni, but is not limited thereto. Optionally, the reflective metal layer 620 includes a single film layer or multiple stacked film layers of Al, Ag, Au and Mo, but is not limited thereto. Optionally, the second bonding metal layer 630 includes a single film layer or multiple stacked film layers of Ti, TiW, Pt and Ni, but is not limited thereto.

[0083] Optionally, the material of the first bonding layer 320 and the material of the second bonding layer 420 are both eutectic alloys. Optionally, the eutectic alloy may include one or more of AuSn, NiSn, CuSn and AuSi.

[0084] Example 4

[0085] Embodiment 4 is further limited on the basis of Embodiment 3, and the similarities between Embodiment 4 and Embodiment 3 are not repeated here. Embodiment 4 is further limited compared with Embodiment 3 as follows.

[0086] Combination Figure 4 See also Figure 3 As shown, in the light emitting structure layer 100 provided in step S110, the first insulating layer 130 is continuously distributed in the third region C and the fourth region D. And the epitaxial stack 120 is continuously distributed in the third region C and the fourth region D. Figure 4 See also Figure 3 As shown, the light emitting structure layer 100 provided in step S110 may further include a current spreading layer 140. The current spreading layer 140 is located between the second semiconductor layer 123 and the first insulating layer 130 and is continuously distributed in the third region C and the fourth region D. The current spreading layer 140 surrounds the first contact hole 124 and is distributed at the periphery of the first contact hole 124. The current spreading layer 140 is electrically connected to the second semiconductor layer 123.

[0087] Step S140 further includes steps S141 to S143.

[0088] Step S141 : removing the growth substrate 110 .

[0089] Fig. 9 FIG. 1 is a schematic diagram of the structure remaining after the growth substrate 110 is removed.

[0090] Step S142 : etching away the epitaxial stack 120 in the second region B to expose the current spreading layer 140 .

[0091] Specifically, combining 2 and Fig. 9 , see Fig.10 As shown, after etching away the epitaxial stack 120 in the second region B, the epitaxial stack 120 in the first region A is formed into a protruding light-emitting region pattern relative to the second region B. Fig. 9 See also Figure 10-12 As shown, Fig.12 In the structure shown, the current spreading layer 140 is partially exposed.

[0092] Step S143 : preparing a second electrode 150 in the second region B, wherein the second electrode 150 contacts and electrically connects the exposed current spreading layer 140 .

[0093] Combination Figure 2 and Fig.12 See also Fig.13 As shown, a second electrode 150 is prepared in the second region B, and the second electrode 150 is electrically connected to the exposed current spreading layer 140 .

[0094] Alternatively, if Fig.12As shown, the first semiconductor layer 121 can be an N-type doped semiconductor layer, including but not limited to N-type doped GaN, which can refer to the relevant records of the prior art and will not be described in detail here. The second semiconductor layer 123 can be a P-type doped semiconductor layer, including but not limited to P-type doped GaN, which can refer to the relevant records of the prior art and will not be described in detail here. Optionally, the first electrode layer 410 can be an N-electrode, and the second electrode 150 can be a P-electrode, but is not limited thereto.

[0095] Example 5

[0096] Example 5 is further limited on the basis of Example 4, and the similarities between Example 5 and Example 4 are not repeated here. Compared with Example 4, the further limitations of Example 5 are as follows.

[0097] like Figure 3 As shown, the light emitting structure layer 100 provided in step S110 may further include an ohmic contact layer 160 , a second insulating layer 170 and a reflector layer 180 .

[0098] Combination Figure 4 See also Figure 3 As shown, the ohmic contact layer 160 is located between the current spreading layer 140 and the second semiconductor layer 123, and the ohmic contact layer 160 is distributed in the third region C and electrically connected to the second semiconductor layer 123. Optionally, the ohmic contact layer 160 is distributed around the first contact hole 124 and around the periphery of the first contact hole 124. By way of example and not limitation, when looking down from the side of the ohmic contact layer 160 facing away from the second semiconductor layer 123 toward the light emitting structure layer 100, the ohmic contact layer 160 is distributed around the first contact hole 124, but is not limited thereto.

[0099] Combination Figure 4 See also Figure 3 As shown, the second insulating layer 170 is continuously distributed in the third region C and the fourth region D, and the second insulating layer 170 is located between the ohmic contact layer 160 and the current spreading layer 140 . The second insulating layer 170 is provided with a plurality of first openings 171 exposing the ohmic contact layer 160 .

[0100] Optionally, the second insulating layer 170 may be an insulating reflective layer. For example, but not limited to, the material of the second insulating layer 170 includes but is not limited to SiO 2 、Al 2 O 3 、SiN、TiO 2 and ZrO 2 One or more of

[0101] Combination Figure 4 See also Figure 3As shown, the reflector layer 180 is located between the current spreading layer 140 and the second insulating layer 170 , and the reflector layer 180 is distributed in the third region C and extends into the first opening 171 to be electrically connected to the ohmic contact layer 160 . The current spreading layer 140 is electrically connected to the reflector layer 180 .

[0102] Combination Figure 3 See also Fig.13 As shown, optionally, the reflector layer 180 forms an ODR reflective structure with the second insulating layer 170. The refractive index of the second insulating layer 170 is lower than that of the reflector layer 180, and the light is reflected at the interface between the second insulating layer 170 and the reflector layer 180, so that the front light extraction efficiency of the light emitting diode 10 can be increased.

[0103] By way of example but not limitation, when looking down from the side of the reflector layer 180 facing away from the ohmic contact layer 160 toward the light emitting structure layer 100 , the reflector layer 180 is distributed around the first contact hole 124 , but is not limited thereto.

[0104] Step S142 further includes steps S1421 to S1423.

[0105] Step S1421 : etching away the epitaxial stack 120 in the second region B to expose a portion of the second insulating layer 170 .

[0106] Combination Figure 2 and Fig. 9 , see Fig.10 As shown, after the epitaxial stack 120 in the second region B is etched away, a portion of the second insulating layer 170 is exposed.

[0107] Step S1422 : performing a roughening treatment on the surface of the epitaxial stack 120 in the first region A to form a roughened structure 191 .

[0108] Combination Figure 2 and Fig.10 , see Fig.11 As shown, the surface of the epitaxial stack 120 in the first region A is roughened to form a roughened structure 191 .

[0109] Step S1423 : etching a portion of the second insulating layer 170 in the second region B to expose a portion of the current spreading layer 140 .

[0110] Combination Figure 2 and Fig.11 , see Fig.12 As shown, after etching a portion of the second insulating layer 170 in the second region B, a portion of the current spreading layer 140 is exposed.

[0111] Example 6

[0112] Example 6 is further limited on the basis of Example 5, and the similarities between Example 6 and Example 5 are not repeated here. The further limitations of Example 6 compared with Example 5 are as follows.

[0113] After step S143, step S140 further includes steps S144 to S145.

[0114] Step S144 : forming a passivation protection layer 192 , the passivation protection layer 192 covers the roughening structure 191 in the first region A, the sidewall of the epitaxial stack 120 in the first region A and the second insulating layer 170 exposed in the second region B.

[0115] Combination Figure 2 and Fig.13 , see Fig.14 As shown, a passivation protection layer 192 is formed, and the passivation protection layer 192 covers the roughening structure 191 in the first region A, the sidewall of the epitaxial stack 120 in the first region A, and the second insulating layer 170 exposed in the second region B.

[0116] Step S145 : forming a back gold layer 193 , wherein the back gold layer 193 is disposed on a side of the conductive substrate 200 facing away from the epitaxial stack 120 .

[0117] Combination Fig.14 See also Fig.15 As shown, a back gold layer 193 is formed, and the back gold layer 193 is disposed on a side of the conductive substrate 200 facing away from the epitaxial stack 120 .

[0118] Example 7

[0119] Example 7 is further limited on the basis of Example 6. The similarities between Example 7 and Example 6 are not repeated here. The further limitations of Example 7 compared with Example 6 are as follows.

[0120] The step of providing the light emitting structure layer 100 includes step S11 to step S18.

[0121] Step S11 : providing a growth substrate 110 , wherein the growth substrate 110 includes a third region C and a fourth region D, wherein the fourth region D is distributed around the third region C.

[0122] As combined Figure 3 and Figure 4 See also Fig.16 As shown, the growth substrate 110 includes a third region C and a fourth region D, and the fourth region D is distributed around the third region C.

[0123] Step S12 : forming an epitaxial stack 120 on the growth substrate 110 , wherein the epitaxial stack 120 is continuously distributed in the third region C and the fourth region D, and the epitaxial stack 120 includes a first semiconductor layer 121 , a light emitting layer 122 , and a second semiconductor layer 123 from bottom to top.

[0124] Combination Figure 3 and Figure 4 , see Fig.16 and Fig.17 As shown, an epitaxial stack 120 is formed on the growth substrate 110 , the epitaxial stack 120 is continuously distributed in the third region C and the fourth region D, and the epitaxial stack 120 includes a first semiconductor layer 121 , a light emitting layer 122 , and a second semiconductor layer 123 from bottom to top.

[0125] Step S13 : providing a first contact hole 124 . The first contact hole 124 is located in the third region C, and the first contact hole 124 penetrates the second semiconductor layer 123 and the light emitting layer 122 and extends to the first semiconductor layer 121 .

[0126] Combination Figure 3 and Figure 4 See also Fig.17 and Fig.18 As shown, a first contact hole 124 is provided in the epitaxial stack 120 . The first contact hole 124 is located in the third region C, and the first contact hole 124 penetrates the second semiconductor layer 123 and the light emitting layer 122 and extends to the first semiconductor layer 121 .

[0127] Step S14 : preparing an ohmic contact layer 160 . The ohmic contact layer 160 is distributed in the third region C and covers the second semiconductor layer 123 . The ohmic contact layer 160 surrounds the first contact hole 124 and is distributed at the periphery of the first contact hole 124 .

[0128] Combination Figure 3 and Figure 4 See also Fig.18 and Fig.19 As shown, an ohmic contact layer 160 is prepared, the ohmic contact layer 160 is distributed in the third region C and covers the second semiconductor layer 123 , and the ohmic contact layer 160 surrounds the first contact hole 124 and is distributed at the periphery of the first contact hole 124 .

[0129] Step S15: Prepare a second insulating layer 170 , which is continuously distributed in the third region C and the fourth region D. The second insulating layer 170 covers the sidewalls of the first contact hole 124 , the ohmic contact layer 160 and the second semiconductor layer 123 . The second insulating layer 170 is provided with a plurality of first openings 171 exposing the ohmic contact layer 160 .

[0130] Combination Figure 3 and Figure 4 See also Fig.19 and Fig. 20 As shown, a second insulating layer 170 is prepared. The second insulating layer 170 is continuously distributed in the third region C and the fourth region D. The second insulating layer 170 covers the side walls of the first contact hole 124, the ohmic contact layer 160 and the second semiconductor layer 123. The second insulating layer 170 is provided with a plurality of first openings 171 exposing the ohmic contact layer 160.

[0131] Step S16 : preparing a reflector layer 180 . The reflector layer 180 is located on the second insulating layer 170 and distributed in the third region C. The reflector layer 180 extends into the first opening 171 to be electrically connected to the ohmic contact layer 160 .

[0132] Combination Figure 3 and Figure 4 See also Fig. 20 and Fig.21 As shown, the reflector layer 180 is located on the second insulating layer 170 and distributed in the third region C, and the reflector layer 180 extends into the first opening 171 to be electrically connected to the ohmic contact layer 160 .

[0133] Step S17 : preparing a current spreading layer 140 , wherein the current spreading layer 140 covers the reflector layer 180 and is continuously distributed in the third region C and the fourth region D, and the current spreading layer 140 is electrically connected to the reflector layer 180 .

[0134] Combination Figure 3 and Figure 4 See also Fig.21 and Fig. 22 As shown, the current spreading layer 140 covers the reflector layer 180 and is continuously distributed in the third region C and the fourth region D. The current spreading layer 140 is electrically connected to the reflector layer 180 .

[0135] Step S18: A first insulating layer 130 covering the current spreading layer 140 and the second insulating layer 170 is formed on the second insulating layer 170 , the first insulating layer 130 is continuously distributed in the third region C and the fourth region D, and the first insulating layer 130 extends into the first contact hole 124 and covers the sidewall of the first contact hole 124 .

[0136] Combination Figure 3 and Figure 4 See also Fig. 22 and Fig.23 As shown, the first insulating layer 130 covers the current spreading layer 140 and the second insulating layer 170 , and the first insulating layer 130 is continuously distributed in the third region C and the fourth region D, and the first insulating layer 130 extends into the first contact hole 124 and covers the sidewall of the first contact hole 124 .

[0137] Among them, Figure 3 and Figure 4As shown, in step S122 , when the first material is evaporated on the first insulating layer 130 , part of the first material is evaporated in the first contact hole 124 , so that the formed first electrode layer 410 extends into the first contact hole 124 and is electrically connected to the first semiconductor layer 121 .

[0138] Example 8

[0139] Embodiment 8 is an embodiment of the light emitting diode 10 of the present application, such as Fig.13 or Fig.15 As shown, the light emitting diode 10 of the present application includes a conductive substrate 200 , an electrode metal layer 310 , a bonding metal layer 500 , a first electrode layer 410 and an epitaxial stack 120 in order from bottom to top.

[0140] The epitaxial stack 120 includes, from bottom to top, a second semiconductor layer 123, a light-emitting layer 122, and a first semiconductor layer 121. The material of the electrode metal layer 310 is the same as that of the first electrode layer 410. The light-emitting diode 10 of the present application is prepared by the above-mentioned method for preparing the light-emitting diode 10, which will not be described in detail here.

[0141] The above are only implementation methods of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises, from bottom to top, a conductive substrate, an electrode metal layer, a bonding metal layer, a first electrode layer and an epitaxial stack; The epitaxial stack includes, from bottom to top, a second semiconductor layer, a light-emitting layer and a first semiconductor layer; the material of the electrode metal layer is the same as that of the first electrode layer.

2. The light emitting diode according to claim 1, characterized in that: The epitaxial stack is provided with a first contact hole, and the first contact hole penetrates the second semiconductor layer and the light emitting layer and extends to the first semiconductor layer; The light-emitting diode includes a first insulating layer, which is located between the first electrode layer and the epitaxial stack; the first insulating layer extends into the first contact hole and covers the side wall of the first contact hole, and the first electrode layer covers the first insulating layer and extends into the first contact hole to be electrically connected to the first semiconductor layer.

3. The light emitting diode according to claim 2, characterized in that: The thickness of the first electrode layer is the same as the thickness of the electrode metal layer.

4. The light emitting diode according to claim 2 or 3, characterized in that: The conductive substrate includes a first region and a second region, the second region is distributed around the first region, the first contact hole and the epitaxial stack are located in the first region, the first insulating layer is continuously distributed in the first region and the second region, and the light emitting diode includes: a current spreading layer, located between the second semiconductor layer and the first insulating layer and continuously distributed in the first region and the second region; and the current spreading layer is distributed around the first contact hole and at the periphery of the first contact hole; and the current spreading layer is electrically connected to the second semiconductor layer; and a second electrode, which is arranged in the second region and located on a side of the current spreading layer away from the conductive substrate, wherein the current spreading layer is electrically connected to the second electrode.

5. The light emitting diode according to claim 4, characterized in that: The light emitting diode comprises: an ohmic contact layer, located between the current spreading layer and the second semiconductor layer, the ohmic contact layer being distributed in the first region and electrically connected to the second semiconductor layer; a second insulating layer, wherein the second insulating layer is continuously distributed in the first region and the second region, and the second insulating layer is located between the ohmic contact layer and the current spreading layer; the second insulating layer covers the ohmic contact layer and is provided with a plurality of first openings exposing the ohmic contact layer; and a reflector layer located between the current spreading layer and the second insulating layer, wherein the reflector layer is distributed in the first region and extends into the first opening to be electrically connected to the ohmic contact layer; and the current spreading layer is electrically connected to the reflector layer.

6. The light emitting diode according to claim 1, characterized in that: The thickness of the first electrode layer and the thickness of the electrode metal layer are both 100-500 nm.

7. The light emitting diode according to claim 6, characterized in that: The thickness of the bonding metal layer is 1000-9000 nm.

8. The light emitting diode according to claim 1, characterized in that: The reflectivity of the electrode metal layer and the first electrode layer is not less than 80%.

9. The light emitting diode according to claim 1, characterized in that: The electrode metal layer and the first electrode layer both include multiple metal layers.

10. The light emitting diode according to claim 1, characterized in that: The electrode metal layer and the first electrode layer each include a first bonding metal layer, a reflective metal layer, and a second bonding metal layer in sequence along a direction toward the bonding metal layer; Among them, the material and thickness of the first bonding metal layer of the electrode metal layer are the same as the first bonding metal layer of the first electrode layer; the material and thickness of the reflective metal layer of the electrode metal layer are the same as the reflective metal layer of the first electrode layer; the material and thickness of the second bonding metal layer of the electrode metal layer are the same as the second bonding metal layer of the first electrode layer.

11. The light emitting diode according to claim 10, characterized in that: in, The first bonding metal layer includes a single film layer or multiple stacked film layers of Ti, TiW, Pt and Ni, the reflective metal layer includes a single film layer or multiple stacked film layers of Al, Cr, Ag, Au and Mo, and the second bonding metal layer includes a single film layer or multiple stacked film layers of Ti, TiW, Pt and Ni.

12. The light emitting diode according to claim 1, characterized in that: The material of the bonding metal layer is a eutectic alloy.

13. The light emitting diode according to claim 12, characterized in that: The eutectic alloy includes one or more of AuSn, NiSn, CuSn and AuSi.

14. The light emitting diode according to claim 1, characterized in that: The light emitting diode comprises a back gold layer, and the back gold layer is arranged on a side of the conductive substrate facing away from the epitaxial stack.

15. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: Step S110: providing a light-emitting structure layer and a conductive substrate; The light emitting structure layer includes a growth substrate and an epitaxial stack in order from bottom to top; the epitaxial stack includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from bottom to top; Step S120: placing the light emitting structure layer and the conductive substrate in the same chamber of the same set of evaporation equipment for evaporation, so as to form a first stacked layer on the conductive substrate and a second stacked layer on the second semiconductor layer; The first stack includes an electrode metal layer and a first bonding layer in order from bottom to top; the second stack includes a first electrode layer and a second bonding layer in order from bottom to top; the material of the electrode metal layer is the same as that of the first electrode layer, and the material of the first bonding layer is the same as that of the second bonding layer; Step S130: bonding the second bonding layer to the first bonding layer, so that the second bonding layer and the first bonding layer form a combined layer-bonded metal layer; Wherein, a side surface of the second bonding layer facing away from the growth substrate faces a side surface of the first bonding layer facing away from the conductive substrate; Step S140: removing the growth substrate, and preparing a light emitting diode based on the remaining structure of the light emitting structure layer and the conductive substrate after removing the growth substrate.

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