SDH optical interface adaptive rate identification method
By setting the same reference clock and data bit width at the optical transmitting and receiving end, cross-clock domain processing and frame head search, the problems of high rate identification cost and poor compatibility in the prior art are solved, and low Cost, unified optical interface rate identification.
Patent Information
- Application Number
- CN202411575210.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-06
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2044-11-06
AI Technical Summary
The existing SDH optical interface rate identification method has high cost, poor compatibility and poor flexibility, and it is impossible to efficiently identify unknown optical interface rates.
The optical transmitting and optical receiving end processing modules are used to set the same reference clock and data bit width to perform cross-clock domain processing, frame header search and line rate adaptation, and a set of programs are used to identify four optical interface rates.
It realizes low-cost, unified SDH code stream data optical interface rate recognition, reducing programming complexity and cost, and improving identification efficiency.
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Figure CN119316092A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of optical synchronous digital transmission, in particular to an SDH optical interface adaptive rate identification method. Background Art
[0002] The synchronous digital hierarchy (SDH) has transmission and switching functions, can flexibly implement various topology networks, has good horizontal compatibility, and is widely used in backbone networks and access networks.
[0003] SDH has a unified frame structure, standard digital transmission rate and standard optical path structure. Commonly used SDH frame formats include STM-1, STM-4, STM-16 and STM-64, and the corresponding optical interface rates are 155.52Mbit / s, 622.08Mbit / s, 2488.32Mbit / s and 9953.28Mbit / s. For SDH code stream data with unknown optical interface rate, efficient identification of its optical interface rate helps to quickly achieve network management system intercommunication. The existing optical interface rate identification method is to design a set of programs for each optical interface rate to identify, which has the disadvantages of high cost, poor compatibility and poor flexibility. Summary of the invention
[0004] The invention provides a method for identifying an SDH optical interface adaptive rate, which solves the problem of "high cost for identifying the optical interface rate of SDH code stream data" in the prior art.
[0005] The present invention solves the technical problem through the following technical solutions:
[0006] An SDH optical interface adaptive rate identification method includes an optical transmitting end processing module and an optical receiving end processing module;
[0007] At the optical transmitting end, the optical transmitting end processing module sets the reference clock, line rate and data bit width of the external optical signal according to the optical interface rate instruction, and then obtains the optical transmitting signal after framing and scrambling processing;
[0008] The optical interface rate is at least one; the reference clocks set for the optical interface rates are the same; the data bit widths set for the optical interface rates are the same; at each optical port rate;
[0009] The optical receiving end processing module includes a cross-clock domain processing submodule, a frame header search submodule and a line rate adaptation submodule; at the optical receiving end, the optical receiving end processing module performs cross-clock domain processing, frame header search and line rate adaptation on the optical transmission signal.
[0010] Further, the cross-clock domain processing submodule uses a first buffer;
[0011] For the optical transmission signal at each optical port rate, the cross-clock domain processing submodule reads and writes the data of the optical transmission signal in an asynchronous first-in-first-out manner, specifically:
[0012] Using the line clock corresponding to the line rate as a write clock signal, continuously and uninterruptedly write each SDH code stream data having a width equal to the data bit width;
[0013] After writing the valid data, using the local clock as the read clock signal, continuously and uninterruptedly read each SDH code stream data having a width equal to the data bit width to the first buffer;
[0014] The number of bits of the first buffer is the same as the data bit width; the first buffer outputs SDH code stream parallel data with the same width as the data bit width.
[0015] Furthermore, the frame header search submodule uses a second buffer and a third buffer; the number of bits of the second buffer is twice the number of bits of the data bit width; the number of bits of the third buffer is the same as the number of bits of the data bit width;
[0016] The frame header search submodule performs cyclic sorting and frame header search on the SDH code stream parallel data outputted by the first buffer each time;
[0017] The specific process of the circular sorting is:
[0018] For each piece of SDH code stream parallel data, storing the SDH code stream parallel data in the lower bit of the second buffer, delaying the SDH code stream parallel data by one clock cycle under the local clock, and then storing the SDH code stream parallel data in the higher bit of the second buffer;
[0019] The parallel data outputted from the second buffer is sequentially moved into the third buffer.
[0020] Furthermore, the SDH code stream parallel data entering the third buffer is continuously searched, and when 0XF6F6F6F6 is searched for the current data in the third buffer and 0X28282828 is searched for the subsequent data, a frame header search success flag is provided.
[0021] Furthermore, the bytes of the SDH code stream parallel data entering the third buffer are counted with the flag bit as the starting point, and the line rate is determined according to the number of bytes.
[0022] Furthermore, the optical interface rate is one of 155.52 Mbit / s, 622.08 Mbit / s, 2488.32 Mbit / s and 9953.28 Mbit / s.
[0023] Furthermore, the frame format involved in the framing is one of STM-1, STM-4, STM-16 and STM-64.
[0024] Furthermore, the framed signal is scrambled by a 7-level scrambler to obtain an optical transmission signal.
[0025] The advantages and effects of the present invention are:
[0026] At the optical transmitting end, a line rate equal to the optical interface rate, a corresponding reference clock and a data bit width are set according to the optical interface rate, and the four optical interface rates use the same reference clock and data bit width. At the optical receiving end, a local clock is used for cross-clock domain processing, and then a frame header search and line rate adaptation are performed. The present invention uses the same reference clock and data bit width at any optical interface rate at the optical transmitting end. Even if the optical interface rate is unknown at the optical receiving end, a cross-clock domain processing method can be uniformly used to realize the reading and writing of SDH code stream data, and then a frame header search is performed to obtain a frame header search success flag bit, and then the flag bit is used as a starting bit for byte statistics, and the SDH code stream data frame format is confirmed according to the bytes, and then the optical interface rate is confirmed. The present invention can identify the four optical interface rates using one set of programs, and there is no need to set 4 sets of programs to identify the four optical interface rates, thereby realizing low-cost identification of the optical interface rate of the SDH code stream data. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 The figure is a flow chart of the method of the present invention. DETAILED DESCRIPTION
[0028] The present invention will be further described below with reference to examples, but the present invention is not limited to these examples.
[0029] A method for identifying an adaptive rate of an SDH optical interface, comprising an optical transmitting end processing module and an optical receiving end processing module; at the optical transmitting end, the optical transmitting end processing module sets the reference clock, line rate and data bit width of an external optical signal according to the optical interface rate instruction, and then obtains an optical transmission signal after framing and scrambling processing; the optical interface rate is at least one; the reference clocks set for the various optical interface rates are the same; the data bit widths set for the various optical interface rates are the same; the optical receiving end processing module comprises a cross-clock domain processing submodule, a frame header search submodule and a line rate adaptation submodule; at the optical receiving end, the optical receiving end processing module performs cross-clock domain processing, frame header search and line rate adaptation on the optical transmission signal. The flowchart of the method of the present invention is as follows Figure 1 shown.
[0030] At the optical transmitter, after receiving the optical interface rate setting instruction, the reference clock, line rate and data bit width related to the optical interface rate can be set, and then the framing and scrambling processing can be performed. The specific mapping relationship is shown in Table 1:
[0031] Table 1 Mapping relationship of optical transmitter
[0032]
[0033] At the optical transmitting end, when the optical interface rate is 155.52Mbit / s, the first reference clock is set to 311.04Mbit / s, the first line rate is set to 622.08Mbit / s, the first data bit width is set to 32bit, and then the frame is formed according to the STM-1 frame format; when the optical interface rate is 622.08Mbit / s, the second reference clock is set to 311.04Mbit / s, the second line rate is set to 622.08Mbit / s, the second data bit width is set to 32bit, and then the frame is formed according to the STM-4 frame format. ; When the optical interface rate is 2488.32Mbit / s, the third reference clock is set to 311.04Mbit / s, the third line rate is set to 2488.32Mbit / s, the third data bit width is set to 32bit, and then the frame is formed according to the STM-16 frame format; when the optical interface rate is 9953.28Mbit / s, the fourth reference clock is set to 311.04Mbit / s, the fourth line rate is set to 9953.28Mbit / s, the fourth data bit width is set to 32bit, and then the frame is formed according to the STM-64 frame format. It can be seen from the above four optical interface rate setting methods that they use the same reference clock and data bit width, so that the cross-clock domain processing method, frame header search method and rate adaptation method can be shared at the receiving end, saving costs in code stream processing, and making the present invention more practical. Since the line rate cannot be lower than 500MHz, the present invention sets the line rate corresponding to the optical interface rate of 155.52Mbit / s to 622.08Mbit / s, and repeats the STM-1 data four times to meet the line rate requirement.
[0034] Framing is a prior art. A frame includes a header and a trailer, and contains many control signals for realizing frame delimitation, frame synchronization, flow control, error detection, etc. Framing refers to the process of adding a header and a trailer to the front and back parts of a piece of data to form a frame. The present invention frames the SDH code stream data using a frame format corresponding to the optical interface rate. The optical interface rate is related to the line rate and participates in framing, providing a basis for "using a set of procedures to identify four optical interface rates". The frame format is used to confirm the optical interface rate at the optical transmitting end, and accuracy and reliability are guaranteed.
[0035] Scrambling is an existing technology. After the optical transmitter completes the framing, it performs NRZ (non-return-to-zero) scrambling, which is completed by a 7-level scrambler that generates a polynomial. The scrambling code generating polynomial is 1+X 6 +X 7 The scrambling sequence length is 127 bits. The scrambler code is simple, does not increase the line signal rate, has no optical power penalty, and does not require encoding. Optical path interconnection can be achieved by using only a scrambler at the optical transmitter and a descrambler of the same standard at the optical receiver.
[0036] The optical transmission signal is 32-bit SDH code stream data. After reaching the optical receiving end, the optical receiving end performs cross-clock domain processing, frame header search, and line rate adaptation on the signal. At the optical receiving end, the mapping relationship between the frame format, line clock, local clock, code stream byte number under each frame format, and the corresponding optical interface rate is shown in Table 2.
[0037] Table 2 Mapping relationship of the optical receiving end
[0038]
[0039] The cross-clock domain processing submodule is used for cross-clock domain processing, and is used to synchronize the SDH code stream data from the optical transmitting end to the local clock domain. The cross-clock domain processing submodule uses the first buffer; for each optical transmission signal at the optical port rate, the cross-clock domain processing submodule reads and writes the data of the optical transmission signal in an asynchronous first-in-first-out (FIFO) manner, specifically:
[0040] Using the line clock corresponding to the line rate as a write clock signal, continuously and uninterruptedly write each SDH code stream data having a width equal to the data bit width;
[0041] After writing the valid data, using the local clock as the read clock signal, continuously and uninterruptedly read each SDH code stream data having a width equal to the data bit width to the first buffer;
[0042] The number of bits of the first buffer is the same as the data bit width, and the first buffer outputs SDH code stream parallel data of the same width as the data bit width.
[0043] Combining Table 1 and Table 2, it can be seen that at the optical transmitting end, the line rate of the frame format STM-1 is 622.08 Mbit / s, then the line clock of the 32-bit SDH code stream data is 19.44 MHz, the line rate of the frame format STM-4 is 622.08 Mbit / s, then the line clock of the 32-bit SDH code stream data is 19.44 MHz, the line rate of the frame format STM-16 is 2488.32 Mbit / s, then the line clock of the 32-bit SDH code stream data is 77.76 MHz, and the line rate of the frame format STM-64 is 9953.28 Mbit / s, then the line clock of the 32-bit SDH code stream data is 311.04 MHz. The specific steps of cross-clock domain processing are as follows: the write clock w_clk of the asynchronous FIFO is the line clock (one of 19.44MHz, 77.76MHz or 311.04MHz), the write data w_data is 32-bit wide SDH code stream parallel data, the read clock r_clk of the asynchronous FIFO is the local clock 320MHz, and the read data r_data is 32-bit wide SDH code stream parallel data; the write enable w_en of the asynchronous FIFO is always valid, so that the FIFO is always in a writing state. Since the read clock r_clk of the FIFO is 320MHz, which is greater than any line clock, the FIFO will not be fully written. When the FIFO stores valid data, the read enable signal r_en is set high and is in a valid state, and each time a valid value is read, the read data r_data is stored in the first buffer.
[0044] The frame header search submodule uses the second buffer and the third buffer; the number of bits of the second buffer is twice the data bit width; the number of bits of the third buffer is the same as the number of bits of the data bit width; the frame header search submodule performs cyclic sorting and frame header search on the SDH code stream parallel data output by the first buffer each time;
[0045] The specific process of the circular sorting is:
[0046] For each piece of SDH code stream parallel data, storing the SDH code stream parallel data in the lower bit of the second buffer, delaying the SDH code stream parallel data by one clock cycle under the local clock, and then storing the SDH code stream parallel data in the higher bit of the second buffer;
[0047] The parallel data outputted from the second buffer is sequentially moved into the third buffer.
[0048] Specifically: for each 32-bit SDH code stream parallel data, store the 32-bit SDH code stream parallel data in the low order of the 64-bit second buffer, and store the 32-bit SDH code stream parallel data in the high order of the 64-bit second buffer after a delay of one clock cycle under the local clock 320Mhz; sort the parallel data in the 64-bit second buffer in a circular manner, that is, shift the 64-bit parallel data into the 32-bit third buffer every 8 bits, shift four times, and obtain the sorted 32-bit wide circular parallel data.
[0049] Continuously search the SDH code stream parallel data entering the third buffer, and provide a frame header search success flag when 0XF6F6F6F6 is searched in the current data of the third buffer and 0X28282828 is searched in the subsequent data. Count the bytes of the SDH code stream parallel data entering the third buffer with the flag as the starting point, and determine the line rate according to the number of bytes. The SDH code stream bytes are counted starting from the flag bit. When the frame byte number is 2430 bytes, the optical interface rate of the current SDH code stream data can be determined to be 155.520Mbit / s. When the frame byte number is 9720 bytes, the optical interface rate of the current SDH code stream data can be determined to be 622.08Mbit / s. When the frame byte number is 38880 bytes, the optical interface rate of the current SDH code stream data can be determined to be 2488.32Mbit / s. When the frame byte number is 155520 bytes, the optical interface rate of the current SDH code stream data can be determined to be 9953.28Mbit / s.
[0050] The present invention provides an optical transmitting end processing module and an optical receiving end processing module: in the optical transmitting end processing module, for four optical interface rates, the corresponding line rates are set, the reference clocks set for the four optical interface rates are the same, the data bit widths set are also the same, and after the setting is completed, framing and scrambling are performed, and the obtained optical transmission signal contains optical interface rate information and has the same data bit width, which is convenient for the optical receiving end to perform unified processing; in the optical receiving end processing module, after the SDH code stream data is processed across the clock domain, cyclic sorting and frame header search are performed, and the number of bytes is counted with the frame header search success flag as the starting point, and the frame format of the SDH data code stream is judged by the number of bytes, and then the corresponding optical interface rate is confirmed. The present invention associates and maps the optical interface rate, line rate, line clock, local clock, and frame format at the optical transmitting end and the optical receiving end, and can accurately identify the four optical interface rates at low cost by using a set of programs, which well solves the problems existing in the prior art.
Claims
1. A method for identifying an adaptive rate of an SDH optical interface, characterized in that: It includes an optical transmitting end processing module and an optical receiving end processing module; At the optical transmitting end, the optical transmitting end processing module sets the reference clock, line rate and data bit width of the external optical signal according to the optical interface rate instruction, and then obtains the optical transmitting signal after framing and scrambling processing; The optical interface rate is at least one; the reference clocks set for the optical interface rates are the same; the data bit widths set for the optical interface rates are the same; at each optical port rate; The optical receiving end processing module includes a cross-clock domain processing submodule, a frame header search submodule and a line rate adaptation submodule; At the optical receiving end, the optical receiving end processing module performs cross-clock domain processing, frame header search, and line rate adaptation on the optical transmission signal.
2. A method for identifying an SDH optical interface adaptive rate according to claim 1, characterized in that: The cross-clock domain processing submodule uses a first buffer; For the optical transmission signal at each optical port rate, the cross-clock domain processing submodule reads and writes the data of the optical transmission signal in an asynchronous first-in-first-out manner, specifically: Using the line clock corresponding to the line rate as a write clock signal, continuously and uninterruptedly write each SDH code stream data having a width equal to the data bit width; After writing the valid data, using the local clock as the read clock signal, continuously and uninterruptedly read each SDH code stream data having a width equal to the data bit width to the first buffer; The number of bits of the first buffer is the same as the data bit width; the first buffer outputs SDH code stream parallel data with the same width as the data bit width.
3. A method for identifying an SDH optical interface adaptive rate according to claim 2, characterized in that: The frame header search submodule uses a second buffer and a third buffer; the number of bits of the second buffer is twice the data bit width; the number of bits of the third buffer is the same as the number of bits of the data bit width; The frame header search submodule performs cyclic sorting and frame header search on the SDH code stream parallel data outputted by the first buffer each time; The specific process of the circular sorting is: For each piece of SDH code stream parallel data, storing the SDH code stream parallel data in the lower bit of the second buffer, delaying the SDH code stream parallel data by one clock cycle under the local clock, and then storing the SDH code stream parallel data in the higher bit of the second buffer; The parallel data outputted from the second buffer is sequentially moved into the third buffer.
4. A method for identifying an SDH optical interface adaptive rate according to claim 3, characterized in that: The SDH code stream parallel data entering the third buffer is continuously searched, and when 0XF6F6F6F6 is searched in the current data of the third buffer and 0X28282828 is searched in the subsequent data, a frame header search success flag is provided.
5. A method for identifying an SDH optical interface adaptive rate according to claim 4, characterized in that: The bytes of the SDH code stream parallel data entering the third buffer are counted with the flag bit as the starting point, and the line rate is determined according to the number of bytes.
6. The method for identifying an SDH optical interface adaptive rate according to claim 1, characterized in that: The optical interface rate is one of 155.52 Mbit / s, 622.08 Mbit / s, 2488.32 Mbit / s and 9953.28 Mbit / s.
7. The method for identifying an SDH optical interface adaptive rate according to claim 1, characterized in that: The frame format involved in the framing is one of STM-1, STM-4, STM-16 and STM-64.
8. The method for identifying an SDH optical interface adaptive rate according to claim 1, characterized in that: The framed signal is scrambled by a 7-level scrambler to obtain an optical transmission signal.
Citation Information
Patent Citations
A method and system for transmitting synchronization digital system frame in optical network
CN101166062A
Method and apparatus for implementing multi-speed optical interface
CN101330328A
Time delay detection method for SDH time delay, time clock synchronization method, master and slave time clock entity and SDH network element
CN101499871A
Method and device for realizing SDH optical interface of STM-1 by employing oversampling method
CN106209292A
Multi-rate SDH optical interface multiplex circuit, FPGA chip and equipment
CN107579797A
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