Signal processing method, device and equipment

Abstract

The embodiment of the invention provides a signal processing method, device and equipment. The method comprises the following steps: acquiring a target frame rate and a screen refresh rate; determining a current frame rate according to the screen refresh rate; when the current frame rate is greater than the target frame rate, determining a reference frame loss ordinal number according to the current frame rate and the target frame rate, the reference frame loss ordinal number being used for indicating a vertical synchronization signal to be discarded; according to the reference frame loss ordinal number, vertical synchronization signals in the current processing period are discarded, at least one target signal is obtained, and the frame rate of an image frame corresponding to the at least one target signal is smaller than or equal to the target frame rate. According to the method, the display power consumption of the display is reduced.

Description

Technical Field

[0001] The present application belongs to the field of image processing, and specifically relates to a signal processing method, device and equipment. Background Art

[0002] The display effect of the monitor can be determined according to the screen refresh rate of the monitor and the frame rate of the displayed image.

[0003] In actual applications, the display performance of the terminal device's display is related to the display's screen refresh rate and the processing performance of the graphics processing unit (GPU) in the terminal device. If the displays in different terminal devices are the same, the screen refresh rate of the display in the terminal device may not match the frame rate corresponding to the GPU processing performance, and the display may not be smooth when processing and displaying image frames. The GPU will be under load, resulting in higher power consumption when the display is displayed. Summary of the invention

[0004] The embodiments of the present application relate to a signal processing method, device and equipment, which are used to solve the defect of high power consumption of the display during display in the prior art.

[0005] In a first aspect, an embodiment of the present application provides a signal processing method, the method comprising:

[0006] Get the target frame rate and screen refresh rate;

[0007] Determining a current frame rate according to the screen refresh rate;

[0008] When the current frame rate is greater than the target frame rate, determining a reference frame loss sequence number according to the current frame rate and the target frame rate, wherein the reference frame loss sequence number is used to indicate a vertical synchronization signal to be discarded;

[0009] According to the reference frame loss sequence number, multiple vertical synchronization signals in the current processing cycle are discarded to obtain at least one target signal, and the frame rate of the image frame corresponding to the at least one target signal is less than or equal to the target frame rate.

[0010] In a second aspect, an embodiment of the present application provides a signal processing device, the device comprising:

[0011] Acquisition module, used to obtain target frame rate and screen refresh rate;

[0012] A first determination module, used to determine a current frame rate according to the screen refresh rate;

[0013] A second determination module is used to determine a reference frame loss sequence number according to the current frame rate and the target frame rate when the current frame rate is greater than the target frame rate, wherein the reference frame loss sequence number is used to indicate a vertical synchronization signal to be discarded;

[0014] The processing module is used to discard multiple vertical synchronization signals in a current processing cycle to obtain at least one target signal, and the frame rate of the image frame corresponding to the at least one target signal is less than the target frame rate.

[0015] In a third aspect, an embodiment of the present application provides a signal processing device, including: a memory and a processor;

[0016] The memory stores computer program instructions;

[0017] The processor executes the computer program instructions stored in the memory to implement the method as described in any one of the first aspects.

[0018] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, they are used to implement any one of the methods in the first aspect.

[0019] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which implements any method in the first aspect when executed by a processor.

[0020] The embodiments of the present application provide a signal processing method, device and equipment to obtain a target frame rate and a screen refresh rate. According to the screen refresh rate, the current frame rate is determined. When the current frame rate is greater than the target frame rate, according to the current frame rate and the target frame rate, multiple vertical synchronization signals in the current processing cycle are discarded to obtain at least one target signal. The target frame rate is the optimal frame rate corresponding to displaying multiple image frames. In this way, the frame rate of the image frame corresponding to at least one target signal is less than or equal to the target frame rate. In a terminal device, when the screen refresh rate of the display may not match the frame rate corresponding to the GPU processing performance, the problem of the display being jerky when displaying image frames can be avoided. Frame drop processing based on the current frame rate and the target frame rate can reduce the load pressure of processing modules such as the display GPU and reduce the power consumption of the display when displaying. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the present application, a brief introduction will be given below to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 A schematic diagram of an application scenario provided for an embodiment of the present application;

[0023] Figure 2 A flowchart of a signal processing method provided in an embodiment of the present application;

[0024] Figure 3 A schematic diagram of the process of obtaining application-related information provided in an embodiment of the present application;

[0025] Figure 4 A schematic diagram of a process for obtaining a target frame rate provided in an embodiment of the present application;

[0026] Figure 5 A flowchart of another signal processing method provided in an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the signal processing process provided by an embodiment of the present application;

[0028] Figure 7 A schematic diagram of the structure of a signal processing device provided in an embodiment of the present application;

[0029] Figure 8 A schematic diagram of the structure of another signal processing device provided in an embodiment of the present application;

[0030] Fig. 9 A schematic diagram of the structure of a signal processing device provided in an embodiment of the present application.

[0031] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] It should be noted that, although the terms "first", "second", etc. are used to describe various information in the embodiments of the present application, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. Optionally, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information.

[0034] It should be understood that the terms "comprises" and "includes" indicate the presence of the previously mentioned features, steps, operations, but do not exclude the presence, occurrence or addition of one or at least one other feature, step, operation. The terms "and / or" and the like used in this application may be interpreted as inclusive, or mean any one or any combination. Optionally, "A and / or B" means "any of the following: A; B; A and B". In addition, the character " / " in this article generally indicates that the objects associated before and after are in an "or" relationship.

[0035] Figure 1 This is a schematic diagram of an application scenario provided by the embodiment of this application. Figure 1 , including a display 101. The display 101 can be set in the terminal device. The display 101 can display the image frames that need to be displayed when the application in the terminal device is running. The display 101 can refresh and display multiple image frames according to the screen refresh rate.

[0036] In actual application, the display performance of the terminal device's display is related to the display's screen refresh rate and the processing performance of the GPU in the terminal device. If the displays in different terminal devices are the same, the screen refresh rate of the display in the terminal device may not match the frame rate corresponding to the GPU processing performance, and the display may not display smoothly when displaying image frames. The same display cannot be applied to multiple terminal devices, resulting in low display flexibility.

[0037] In order to solve the above technical problems, an embodiment of the present application provides a signal processing method. When it is determined that the current frame rate corresponding to the screen refresh rate is greater than the target frame rate, multiple vertical synchronization signals in the current processing cycle are discarded according to the current frame rate and the target frame rate to obtain at least one target signal. The target frame rate is the optimal frame rate corresponding to displaying multiple image frames. In this way, the frame rate of the image frame corresponding to at least one target signal is less than or equal to the target frame rate. In a terminal device, when the screen refresh rate of the display may not match the frame rate corresponding to the GPU processing performance, the problem that the display may not be smooth when displaying the image frame can be avoided. And the vertical synchronization signal is directly discarded according to the current frame rate and the target frame rate, and there is no need to discard the image frame after the vertical synchronization signal is processed to obtain the image frame, thereby reducing the load pressure of processing modules such as the display GPU and reducing the power consumption of the display when displaying.

[0038] The technical solution shown in the present application is described in detail below through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be described repeatedly in different embodiments.

[0039] Figure 2 A flowchart of a signal processing method provided in an embodiment of the present application. Figure 2 , the method comprising:

[0040] S201. Obtain target frame rate and screen refresh rate.

[0041] The execution subject of the embodiment of the present application may be a signal processing device, or a signal processing device arranged in the signal processing device. The signal processing device may be implemented by software, or by a combination of software and hardware. The signal processing device may be a terminal device. A display is arranged in the signal processing device, and the operating system of the signal processing device is an Android system. The terminal device may be a mobile phone, a tablet computer, a computer, etc.

[0042] The optimal frame rate in the current scenario can be determined according to the application currently running on the signal processing device, and the optimal frame rate in the current scenario can be determined as the target frame rate.

[0043] It should be noted that the user-related data involved in this application (for example, user attribute data, application-related information acquisition permissions, etc.) are all obtained after obtaining the user's permission or consent; that is, when this application is applied to specific products or technologies, user permission is required to obtain and process relevant data, and the processing of relevant data needs to comply with relevant laws, regulations and regulatory standards of relevant countries and regions.

[0044] Next, combine Figure 3 , describes the process of obtaining information about an application. Figure 3 This is a schematic diagram of the process of obtaining application-related information provided in the embodiment of this application. Figure 3 , including interface 301. Interface 301 may be a page provided by the signal processing device. Before performing signal processing, a prompt for obtaining application-related information may be displayed on interface 301. After receiving a confirmation operation from the user for obtaining the prompt for obtaining application-related information, the terminal device may obtain application-related information and determine a target frame rate based on the application-related information, thereby performing signal processing.

[0045] The target frame rate may be obtained in the following manner: obtaining at least one currently running application; determining a request frame rate corresponding to each application; and determining the target frame rate according to the request frame rate corresponding to each application.

[0046] Next, combine Figure 4 , the process of obtaining the target frame rate is explained. Figure 4 This is a schematic diagram of the process of obtaining the target frame rate provided in the embodiment of the present application. Figure 4 , including a signal processing device 401. The signal processing device 401 may be a terminal device, and a display is provided in the signal processing device 401. The signal processing device 401 obtains at least one currently running application including application 1, application 2, and application 3. The signal processing device 401 determines the request frame rate corresponding to each application, and sends the request frame rate corresponding to each application to the frame rate service process. The frame rate service process of the signal processing device 401 determines the target frame rate through a preset algorithm according to the request frame rate corresponding to each application, and sends the target frame rate to the display process, so that the display process performs signal processing according to the target frame rate.

[0047] S202: Determine the current frame rate according to the screen refresh rate.

[0048] A frame rate that matches the screen refresh rate may be determined as the current frame rate.

[0049] The screen refresh rate refers to the number of times the display refreshes the image per second. For example, if the screen refresh rate is 60Hz, it can be determined that the display refreshes 60 times per second.

[0050] The frame rate may be the number of image frames generated and processed by the image processing device per second. For example, if the frame rate is 30 FPS, it can be determined that the image processing device generates 30 image frames per second.

[0051] For example, assuming that the screen refresh rate is 60 Hz, it can be determined that the frame rate matching the screen refresh rate is 60 FPS. Therefore, it can be determined that the current frame rate is 60 FPS.

[0052] S203: When the current frame rate is greater than the target frame rate, determine a reference frame loss sequence number according to the current frame rate and the target frame rate.

[0053] When the current frame rate is greater than the target frame rate, the same image frame may be displayed multiple times, resulting in the image not looking smooth enough. In order to improve the display effect, multiple image frames in the current processing cycle may be dropped so that the same image frame is displayed once and the image is displayed smoothly.

[0054] The reference frame loss number is used to indicate a vertical synchronization (VSYNC) signal to be discarded.

[0055] The reference frame loss number may be determined according to the current frame rate and the target frame rate in the following manner: the product of a preset ratio and the current frame rate is determined as an intermediate frame rate; and the reference frame loss number is determined according to the current frame rate, the target frame rate and the intermediate frame rate.

[0056] The ordinal number corresponding to at least one vertical synchronization signal to be discarded in the current processing cycle may be determined according to the reference frame loss coefficient.

[0057] For example, according to the above example, the current frame rate is determined to be 60FPS. Assuming that the target frame rate is 30FPS, it can be determined that the current frame rate is greater than the target frame rate. At this time, among the 60 vertical synchronization signals in the current processing cycle, 30 vertical synchronization signals need to be discarded so that the frame rate of the image frame corresponding to at least one target signal in the current processing cycle is equal to the target frame rate. When discarding 30 vertical synchronization signals, it can be determined that the base frame loss sequence number is 2. Therefore, among the 60 vertical synchronization signals, according to the base frame loss sequence number, it can be determined that the vertical synchronization signals to be discarded include the 2nd vertical synchronization signal, the 4th vertical synchronization signal, the 6th vertical synchronization signal, ..., the 60th vertical synchronization signal.

[0058] S204: Discard multiple vertical synchronization signals in the current processing cycle according to the reference frame loss sequence number to obtain at least one target signal.

[0059] A frame rate of an image frame corresponding to at least one target signal is lower than a target frame rate.

[0060] When the frame is dropped, the time interval between two adjacent dropped image frames is the same. To ensure the smoothness of the picture, the frame drop process must be continuous. That is, the base frame drop sequence number is a positive integer. For example, if the screen refresh rate of the display is 60Hz, the display can only perform frame drop processing when the target frame rate is 10 frames, 15 frames, 20 frames, 30 frames, and 45 frames.

[0061] Through the above Figure 4 The display process shown performs frame drop processing on multiple image frames in the current processing cycle to obtain at least one target image frame. The display process may be a SurfaceFlinger process.

[0062] For example, according to the above example, the vertical synchronization signals to be discarded include the 2nd vertical synchronization signal, the 4th vertical synchronization signal, the 6th vertical synchronization signal, ..., the 60th vertical synchronization signal. In this way, the time interval between two adjacent discarded image frames can be ensured to be the same.

[0063] The signal processing method provided in this embodiment obtains a target frame rate and a screen refresh rate. According to the screen refresh rate, the current frame rate is determined. When the current frame rate is greater than the target frame rate, the reference frame loss sequence is determined according to the current frame rate and the target frame rate. According to the reference frame loss sequence, multiple vertical synchronization signals in the current processing cycle are discarded to obtain at least one target signal. The target frame rate is the optimal frame rate corresponding to displaying multiple image frames. In this way, the frame rate of the image frame corresponding to at least one target image signal is less than or equal to the target frame rate. In a terminal device, when the screen refresh rate of the display may not match the frame rate corresponding to the GPU processing performance, the problem that the display may not be smooth when displaying the image frame can be avoided. And the vertical synchronization signal is directly discarded according to the current frame rate and the target frame rate, and there is no need to discard the image frame after the vertical synchronization signal is processed to obtain the image frame, thereby reducing the load pressure of the processing modules such as the display GPU and reducing the power consumption of the display when displaying.

[0064] Based on any of the above embodiments, Figure 5 , the detailed process of signal processing is explained.

[0065] Figure 5 A flowchart of another signal processing method provided in an embodiment of the present application. Figure 5 , the method comprising:

[0066] S501. Obtain target frame rate and screen refresh rate.

[0067] It should be noted that the execution process of S501 can refer to S201 and will not be repeated here.

[0068] S502: Determine the current frame rate according to the screen refresh rate.

[0069] It should be noted that the execution process of S502 can refer to S202 and will not be repeated here.

[0070] S503: When the current frame rate is greater than the target frame rate, obtain the i-th vertical synchronization signal in the current processing cycle.

[0071] i is 1, 2, ..., N in sequence, where N is the total number of at least one vertical synchronization signal acquired in the current processing cycle.

[0072] The vertical synchronization signal is used to indicate processing and displaying the current image frame.

[0073] S504: Determine the product of the preset ratio and the current frame rate as the intermediate frame rate.

[0074] The preset ratio may be set in advance and stored in a preset storage space of the signal processing device. The preset ratio may be 0.5.

[0075] For example, assuming that the current frame rate is 30 FPS, it can be determined that the intermediate frame rate=30*0.5=15 FPS.

[0076] S505: Determine whether the target frame rate is less than the intermediate frame rate.

[0077] If yes, execute S506.

[0078] If not, execute S508.

[0079] S506: Determine the ratio of the screen refresh rate to the target frame rate as a reference frame loss sequence number.

[0080] For example, assuming that the target frame rate is 10 FPS and the screen refresh rate is 30 Hz, according to the above example, if the intermediate frame rate is determined to be 15 FPS, it can be determined that the target frame rate is less than the intermediate frame rate. Therefore, the benchmark frame loss number is determined to be 30 / 10=3.

[0081] S507: When the ratio of i to the reference frame loss sequence number is not a positive integer, the i-th vertical synchronization signal is determined as a candidate signal.

[0082] For example, the first vertical synchronization signal in the current processing cycle is obtained as signal 1. According to the above example, the benchmark frame loss number is determined to be 3. When i is 1, the ratio of i to the benchmark frame loss number 3, 0.5, is not a positive integer. Therefore, the first vertical synchronization signal is determined to be the signal to be selected. The second vertical synchronization signal in the current processing cycle is obtained as signal 2. When i is 2, the ratio of i to the benchmark frame loss number 3, 0.67, is not a positive integer. Therefore, the second vertical synchronization signal is determined to be the signal to be selected. The third vertical synchronization signal in the current processing cycle is obtained as signal 3. When i is 3, the ratio of i to the benchmark frame loss number 3, 1, is a positive integer. Therefore, it is determined that the third vertical synchronization signal is not a signal to be selected. By analogy, among the 30 vertical synchronization signals in the current processing cycle, at least one selected signal includes signal 1, signal 2, signal 4, signal 5, signal 7, signal 8, signal 10, signal 11, signal 13, signal 14, signal 16, signal 17, signal 19, signal 20, signal 22, signal 23, signal 25, signal 26, signal 28, and signal 29.

[0083] After S507, S511 is executed.

[0084] S508: Determine the difference between the screen refresh rate and the target frame rate as an intermediate value.

[0085] For example, assuming that the target frame rate is 20 FPS and the screen refresh rate is 30 Hz, according to the above example, if the intermediate frame rate is determined to be 15 FPS, it can be determined that the target frame rate is greater than the intermediate frame rate. Therefore, the intermediate value of the benchmark frame loss sequence number is determined to be 30-20=10.

[0086] S509: Determine the ratio of the screen refresh rate to the middle value as the benchmark frame loss number.

[0087] For example, according to the above example, the screen refresh rate is determined to be 30 Hz, and the median value is 10. Therefore, the reference frame loss sequence number can be determined to be 30 / 10=3.

[0088] S510: When the ratio of the reference frame loss sequence number to i is a positive integer, the i-th vertical synchronization signal is determined as a candidate signal.

[0089] For example, the first vertical synchronization signal in the current processing cycle is obtained as signal 1. According to the above example, the base frame loss number is determined to be 3. When i is 1, the ratio of i to the base frame loss number 3, 0.5, is not a positive integer. Therefore, it is determined that the first vertical synchronization signal is not a candidate signal. The second vertical synchronization signal in the current processing cycle is obtained as signal 2. When i is 2, the ratio of i to the base frame loss number 3, 0.67, is not a positive integer. Therefore, it is determined that the second vertical synchronization signal is not a candidate signal. The third vertical synchronization signal in the current processing cycle is obtained as signal 3. When i is 3, the ratio of i to the base frame loss number 3, 1, is a positive integer. Therefore, it is determined that the third vertical synchronization signal is a candidate signal. By analogy, it is obtained that among the 30 vertical synchronization signals in the current processing cycle, at least one candidate signal includes signal 3, signal 6, signal 9, signal 12, signal 15, signal 18, signal 21, signal 24, signal 27, and signal 30.

[0090] S511. Determine whether i is equal to N.

[0091] If so, execute S512.

[0092] If not, update i to i+1 and execute S503.

[0093] S512: Discard at least one candidate signal among multiple vertical synchronization signals to obtain at least one target signal.

[0094] For example, according to the above example, it is determined that among the 30 vertical synchronization signals in the current processing cycle, at least one candidate signal includes signal 1, signal 2, signal 4, signal 5, signal 7, signal 8, signal 10, signal 11, signal 13, signal 14, signal 16, signal 17, signal 19, signal 20, signal 22, signal 23, signal 25, signal 26, signal 28, and signal 29. The at least one candidate signal is discarded to obtain at least one target signal including signal 3, signal 6, signal 9, signal 12, signal 15, signal 18, signal 21, signal 24, signal 27, and signal 30. The frame rate of the image frame corresponding to the at least one target signal is the target frame rate 10 FPS.

[0095] For another example, according to the above example, it is determined that among the 30 vertical synchronization signals in the current processing cycle, at least one candidate signal includes signal 3, signal 6, signal 9, signal 12, signal 15, signal 18, signal 21, signal 24, signal 27, and signal 30. The at least one candidate signal is discarded to obtain at least one target signal including signal 1, signal 2, signal 4, signal 5, signal 7, signal 8, signal 10, signal 11, signal 13, signal 14, signal 16, signal 17, signal 19, signal 20, signal 22, signal 23, signal 25, signal 26, signal 28, and signal 29. The frame rate of the image frame corresponding to the at least one target signal is the target frame rate 20 FPS.

[0096] After determining at least one target signal, the target signal is processed for any target signal to obtain an image frame corresponding to the target signal; and the image frame corresponding to the target signal is displayed on a display.

[0097] For example, according to the above example, it is determined that at least one target signal includes signal 1, signal 2, signal 4, signal 5, signal 7, signal 8, signal 10, signal 11, signal 13, signal 14, signal 16, signal 17, signal 19, signal 20, signal 22, signal 23, signal 25, signal 26, signal 28, and signal 29. For signal 1, signal 1 is processed to obtain image frame 1 corresponding to signal 1, and image frame 1 is displayed. For signal 2, signal 2 is processed to obtain image frame 2 corresponding to signal 2, and image frame 2 is displayed. And so on, only the image frame corresponding to at least one target signal in the current processing cycle is displayed.

[0098] The signal processing method provided in this embodiment obtains a target frame rate and a screen refresh rate. According to the screen refresh rate, the current frame rate is determined. When the current frame rate is greater than the target frame rate, the i-th vertical synchronization signal is obtained in the current processing cycle. The product of the preset ratio and the current frame rate is determined as the intermediate frame rate. If the current frame rate is less than the target frame rate, the ratio of the screen refresh rate to the target frame rate is determined as the reference frame loss sequence number. And when the ratio of the reference frame loss sequence number to i is a positive integer, the i-th vertical synchronization signal is determined as the selected signal. If the current frame rate is greater than or equal to the target frame rate, the difference between the screen refresh rate and the target frame rate is determined as the intermediate value. The ratio of the screen refresh rate to the intermediate value is determined as the reference frame loss sequence number. When the ratio of the reference frame loss sequence number to i is not a positive integer, the i-th vertical synchronization signal is determined as the selected signal. At least one selected signal is discarded to obtain at least one target signal. The target frame rate is the optimal frame rate corresponding to displaying multiple image frames. In this way, the frame rate corresponding to at least one target image frame is less than or equal to the target frame rate. In the terminal device, when the screen refresh rate of the display may not match the frame rate corresponding to the GPU processing performance, the problem that the display may not be smooth when displaying image frames can be avoided. The vertical synchronization signal is directly discarded according to the current frame rate and the target frame rate. There is no need to discard the image frame after processing the vertical synchronization signal to obtain the image frame, which reduces the load pressure of the processing modules such as the display GPU and reduces the power consumption of the display during display. It can also further save the frequency of use of computing units such as GPUs and extend the service life of the terminal device hardware.

[0099] Based on any of the above embodiments, Figure 6 , the signal processing process is illustrated with examples.

[0100] Figure 6 This is a schematic diagram of the signal processing process provided by the embodiment of the present application. Figure 6 , including a signal processing device 601. The signal processing device 601 may be a terminal device, and the terminal device may be a mobile phone, a tablet computer, a computer, etc. A display is provided in the signal processing device 601, and the operating system of the signal processing device is an Android system. The architecture in the signal processing device 601 includes three levels, namely, an application layer, a decision layer, and an execution layer. The application in the application layer determines the requested frame rate according to business requirements. The frame rate service process in the decision layer is used to receive the requested frame rate of each application and determine the target frame rate. The execution layer includes a display process, and the display process is used to perform signal processing according to the target frame rate so that the display component displays each processed image frame. The display process may be a SurfaceFlinger process. The display component may be HardwareCompose (HWC).

[0101] The signal processing device 601 obtains at least one currently running application including application 1, application 2, ..., application L. The signal processing device 601 determines the requested frame rate corresponding to each application, and sends the requested frame rate corresponding to each application to the frame rate service process. The frame rate service process of the signal processing device 601 determines the target frame rate as 15FPS through a preset algorithm based on the requested frame rate corresponding to each application, and sends the target frame rate to the display process.

[0102] The display process of the signal processing device 601 obtains a screen refresh rate of 30Hz, and can determine that the current frame rate is 30FPS, which is greater than the target frame rate. The display process of the signal processing device 601 obtains a preset ratio of 0.5, and determines that the intermediate frame rate is 30*0.5=15FPS. The display process of the signal processing device 601 determines that the target frame rate is equal to the intermediate frame rate. Therefore, the display process of the signal processing device 601 determines the difference between the screen refresh rate and the target frame rate, 15, as the intermediate value. And determine that the benchmark frame loss sequence number is 30 / 15=2.

[0103] The display process of the signal processing device 601 obtains the first vertical synchronization signal in the current processing cycle. When i is 1, the ratio of i to the reference frame loss number 2, 0.5, is not a positive integer. Therefore, it is determined that the first vertical synchronization signal is not a candidate signal. At this time, the signal processing device 601 processes signal 1 to obtain image frame 1 corresponding to signal 1, and displays image frame 1 through the display component. The display process of the signal processing device 601 obtains the second vertical synchronization signal in the current processing cycle as signal 2. When i is 2, the ratio of i to the reference frame loss number 2, 1, is a positive integer. Therefore, it is determined that the second vertical synchronization signal is a candidate signal. At this time, the signal processing device directly discards signal 2. The display process of the signal processing device 601 obtains the third vertical synchronization signal in the current processing cycle as signal 3. When i is 3, the ratio of i to the reference frame loss number 2, 1.5, is not a positive integer. Therefore, it is determined that the third vertical synchronization signal is not a candidate signal. At this time, the signal processing device 601 processes the signal 3, obtains the image frame 3 corresponding to the signal 3, and displays the image frame 3 through the display component. Similarly, the display process of the signal processing device 601 obtains at least one selected signal including signal 2, signal 4, signal 6, signal 8, signal 10, signal 12, signal 14, signal 16, signal 18, signal 20, signal 22, signal 24, signal 26, signal 28, and signal 30 among the 30 vertical synchronization signals in the current processing cycle.

[0104] The display process of the signal processing device 601 directly discards the above-mentioned at least one candidate signal, and obtains at least one target signal including signal 1, signal 3, signal 5, signal 7, signal 9, signal 11, signal 13, signal 15, signal 17, signal 19, signal 21, signal 23, signal 25, signal 27, and signal 29. And according to the above method, the image frame corresponding to each target signal is displayed by the display component of the signal processing device 601. The frame rate of the image frame corresponding to the at least one target signal is the target frame rate 15FPS.

[0105] The signal processing process provided in this embodiment obtains the target frame rate and the screen refresh rate. According to the screen refresh rate, the current frame rate is determined. When the current frame rate is greater than the target frame rate, the i-th vertical synchronization signal is obtained in the current processing cycle. The product of the preset ratio and the current frame rate is determined as the intermediate frame rate. If the current frame rate is less than the target frame rate, the ratio of the screen refresh rate to the target frame rate is determined as the reference frame loss sequence number. And when the ratio of the reference frame loss sequence number to i is a positive integer, the i-th vertical synchronization signal is determined as the selected signal. If the current frame rate is greater than or equal to the target frame rate, the difference between the screen refresh rate and the target frame rate is determined as the intermediate value. The ratio of the screen refresh rate to the intermediate value is determined as the reference frame loss sequence number. When the ratio of the reference frame loss sequence number to i is not a positive integer, the i-th vertical synchronization signal is determined as the selected signal. At least one selected signal is discarded to obtain at least one target signal. The target frame rate is the optimal frame rate corresponding to displaying multiple image frames. In this way, the frame rate corresponding to at least one target image frame is less than or equal to the target frame rate. In the terminal device, when the screen refresh rate of the display may not match the frame rate corresponding to the GPU processing performance, the problem that the display may not be smooth when displaying image frames can be avoided. The vertical synchronization signal is directly discarded according to the current frame rate and the target frame rate. There is no need to discard the image frame after processing the vertical synchronization signal to obtain the image frame, which reduces the load pressure of the processing modules such as the display GPU and reduces the power consumption of the display during display. It can also further save the frequency of use of computing units such as GPUs and extend the service life of the terminal device hardware.

[0106] Figure 7 This is a schematic diagram of the structure of a signal processing device provided in an embodiment of the present application. Figure 7 , the signal processing device 700 may include:

[0107] An acquisition module 710 is used to acquire a target frame rate and a screen refresh rate;

[0108] A first determination module 720, configured to determine a current frame rate according to the screen refresh rate;

[0109] A second determination module 730 is configured to determine a reference frame loss sequence number according to the current frame rate and the target frame rate when the current frame rate is greater than the target frame rate, wherein the reference frame loss sequence number is used to indicate a vertical synchronization signal to be discarded;

[0110] The processing module 740 is used to discard multiple vertical synchronization signals in the current processing cycle to obtain at least one target signal, and the frame rate of the image frame corresponding to the at least one target signal is less than the target frame rate.

[0111] In a possible implementation manner, the second determining module 730 is specifically configured to:

[0112] The product of the preset ratio and the current frame rate is determined as the intermediate frame rate;

[0113] The reference frame loss sequence number is determined according to the current frame rate, the target frame rate and the intermediate frame rate.

[0114] In a possible implementation manner, the second determining module 730 is specifically configured to:

[0115] If the target frame rate is greater than or equal to the intermediate frame rate, the difference between the screen refresh rate and the target frame rate is determined as the intermediate value, and the ratio of the screen refresh rate to the intermediate value is determined as the reference frame loss ordinal number;

[0116] If the target frame rate is less than the intermediate frame rate, the ratio of the screen refresh rate to the target frame rate is determined as the reference frame loss number.

[0117] In a possible implementation manner, the processing module 740 is specifically used to:

[0118] Acquire an i-th vertical synchronization signal in the current processing cycle, wherein the vertical synchronization signal is used to instruct processing and displaying a current image frame;

[0119] Determine a candidate signal according to the i-th vertical synchronization signal and the reference frame loss sequence number, and obtain the at least one candidate signal, wherein i is 1, 2, ..., N in sequence, and N is the total number of at least one vertical synchronization signal obtained in the current processing cycle;

[0120] Among the multiple vertical synchronization signals, the at least one selected signal is discarded to obtain the at least one target signal.

[0121] In a possible implementation manner, the processing module 740 is specifically used to:

[0122] If the target frame rate is greater than or equal to the intermediate frame rate, then when the ratio of i to the reference frame loss sequence number is a positive integer, the i-th vertical synchronization signal is determined as a candidate signal;

[0123] If the target frame rate is less than the intermediate frame rate, then when the ratio of i to the reference frame loss sequence number is not a positive integer, the i-th vertical synchronization signal is determined as the signal to be selected.

[0124] In a possible implementation manner, the acquisition module 710 is specifically used for:

[0125] Get at least one currently running application;

[0126] Determine the requested frame rate corresponding to each application;

[0127] The target frame rate is determined according to the requested frame rate corresponding to each application.

[0128] Figure 8 A schematic diagram of the structure of another signal processing device provided in an embodiment of the present application. Figure 7 Based on the examples shown, see Figure 8 , the signal processing device 700 also includes a display module 750.

[0129] The display module 750 is used for:

[0130] For any target signal, the target signal is processed to obtain an image frame corresponding to the target signal;

[0131] The image frame corresponding to the target signal is displayed on a display.

[0132] Fig. 9 This is a schematic diagram of the structure of the signal processing device provided in the embodiment of the present application. Fig. 9 The signal processing device 900 may include: a memory 910 and a processor 920. Exemplarily, the memory 910 and the processor 920 are interconnected via a bus 930.

[0133] The memory 910 is used to store program instructions;

[0134] The processor 920 is used to execute the program instructions stored in the memory, so as to enable the signal processing device 900 to execute the method shown in the above method embodiment.

[0135] An embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the above method.

[0136] The embodiment of the present application also provides a computer program product, which can be executed by a processor. When the computer program product is executed, the above method can be implemented.

[0137] The signal processing device, signal processing equipment, computer-readable storage medium and computer program product of the embodiments of the present application can execute the technical solutions shown in the above-mentioned vehicle control method embodiments. Their implementation principles and beneficial effects are similar and will not be repeated here.

[0138] All or part of the steps of the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned memory (storage medium) includes: read-only memory (ROM), random access memory (RAM), flash memory, hard disk, solid state drive, magnetic tape, floppy disk, optical disc and any combination thereof.

[0139] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0140] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0141] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0142] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A signal processing method, characterized in that: The method comprises: Get the target frame rate and screen refresh rate; Determining a current frame rate according to the screen refresh rate; When the current frame rate is greater than the target frame rate, determining a reference frame loss sequence number according to the current frame rate and the target frame rate, wherein the reference frame loss sequence number is used to indicate a vertical synchronization signal to be discarded; According to the reference frame loss sequence number, multiple vertical synchronization signals in the current processing cycle are discarded to obtain at least one target signal, and the frame rate of the image frame corresponding to the at least one target signal is less than the target frame rate.

2. The method according to claim 1, characterized in that Determining a reference frame loss sequence number according to the current frame rate and the target frame rate includes: The product of the preset ratio and the current frame rate is determined as the intermediate frame rate; The reference frame loss sequence number is determined according to the current frame rate, the target frame rate and the intermediate frame rate.

3. The method according to claim 2, characterized in that Determining the reference frame loss sequence number according to the current frame rate, the target frame rate, and the intermediate frame rate includes: If the target frame rate is greater than or equal to the intermediate frame rate, the difference between the screen refresh rate and the target frame rate is determined as the intermediate value, and the ratio of the screen refresh rate to the intermediate value is determined as the reference frame loss number; If the target frame rate is less than the intermediate frame rate, the ratio of the screen refresh rate to the target frame rate is determined as the reference frame loss number.

4. The method according to any one of claims 1 to 3, characterized in that: According to the reference frame loss sequence number, a plurality of vertical synchronization signals in a current processing cycle are discarded to obtain the at least one target signal, including: Acquire an i-th vertical synchronization signal in the current processing cycle, wherein the vertical synchronization signal is used to instruct processing and displaying a current image frame; Determine a candidate signal according to the i-th vertical synchronization signal and the reference frame loss sequence number, and obtain the at least one candidate signal, wherein i is 1, 2, ..., N in sequence, and N is the total number of at least one vertical synchronization signal obtained in the current processing cycle; Among the multiple vertical synchronization signals, the at least one selected signal is discarded to obtain the at least one target signal.

5. The method according to claim 4, characterized in that Determining a signal to be selected according to the i-th vertical synchronization signal and the reference frame loss sequence number includes: If the target frame rate is greater than or equal to the intermediate frame rate, then when the ratio of i to the reference frame loss sequence number is a positive integer, the i-th vertical synchronization signal is determined as the candidate signal; If the target frame rate is less than the intermediate frame rate, then when the ratio of i to the reference frame loss sequence number is not a positive integer, the i-th vertical synchronization signal is determined as the candidate signal.

6. The method according to any one of claims 1 to 5, characterized in that: Get the target frame rate, including: Get at least one currently running application; Determine the requested frame rate corresponding to each application; The target frame rate is determined according to the requested frame rate corresponding to each application.

7. The method according to any one of claims 1 to 6, characterized in that: The method further comprises: For any target signal, the target signal is processed to obtain an image frame corresponding to the target signal; The image frame corresponding to the target signal is displayed on a display.

8. A signal processing device, characterized in that: The device comprises: Acquisition module, used to obtain target frame rate and screen refresh rate; A first determination module, used to determine a current frame rate according to the screen refresh rate; A second determination module is used to determine a reference frame loss sequence number according to the current frame rate and the target frame rate when the current frame rate is greater than the target frame rate, wherein the reference frame loss sequence number is used to indicate a vertical synchronization signal to be discarded; The processing module is used to discard multiple vertical synchronization signals in a current processing cycle to obtain at least one target signal, and the frame rate of the image frame corresponding to the at least one target signal is less than the target frame rate.

9. A signal processing device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 7.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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