Phase-locked loop circuit, electronic equipment and driving current adjusting method

Abstract

The invention discloses a phase-locked loop circuit, electronic equipment and a driving current adjusting method, and belongs to the technical field of circuits. The phase-locked loop circuit comprises a power supply unit, a feedback loop and a driving branch connected with the feedback loop in parallel, wherein the feedback loop comprises a phase discriminator, a filter, a voltage-controlled oscillator, a level conversion module and a frequency divider which are connected in sequence, the driving branch and the feedback loop are respectively connected with the power supply unit in series, a first end of the driving branch is connected with the filter in series, a second end of the driving branch is connected to the level conversion module, and a third end of the driving branch is connected with the frequency divider. The third end of the driving branch is grounded, and the driving branch is used for adjusting the driving current of the level conversion module by using the current provided by the power supply unit when the voltage-controlled oscillator is in a starting state.

Description

Technical Field

[0001] The present application belongs to the field of circuit technology, and specifically relates to a phase-locked loop circuit, an electronic device, and a method for adjusting a driving current. Background Art

[0002] The voltage-controlled oscillator (VCO) circuit controls the frequency output by adjusting the external voltage input. Therefore, the stability of the voltage determines the accuracy and drift range of the output clock frequency. Excessive voltage fluctuations often cause the output clock frequency to deviate from the expected range, resulting in unstable system performance. Even worse, it will cause the VCO to be unable to output the clock, and ultimately cause system function abnormalities. However, due to production process deviations, there are differences in chip performance. Therefore, chips in the critical performance range may have internal MOS tube leakage problems, which will cause the VCO input voltage to experience large fluctuations, and then cause the phase-locked loop circuit to be unable to output a stable clock signal. Summary of the invention

[0003] The purpose of the embodiments of the present application is to provide a phase-locked loop circuit, an electronic device and a method for adjusting a driving current, which can solve the problem that the phase-locked loop circuit cannot output a stable clock signal due to large fluctuations in the input voltage of the VCO.

[0004] In a first aspect, an embodiment of the present application provides a phase-locked loop circuit, which includes: a power supply unit, a feedback loop, and a driving branch connected in parallel with the feedback loop; wherein the feedback loop includes a phase detector, a filter, a voltage-controlled oscillator, a level conversion module and a divider connected in sequence, the driving branch and the feedback loop are respectively connected in series with the power supply unit, the first end of the driving branch is connected in series with the filter, the second end of the driving branch is connected to the level conversion module, the third end of the driving branch is grounded, and the driving branch is used to adjust the driving current of the level conversion module using the current provided by the power supply unit when the voltage-controlled oscillator is in a startup state.

[0005] In a second aspect, an embodiment of the present application provides an electronic device, which includes the phase-locked loop circuit described in the first aspect.

[0006] In a third aspect, an embodiment of the present application provides a method for adjusting a driving current, which is applied to the phase-locked loop circuit described in the first aspect, and the method includes: obtaining a residual voltage of a filter and an initial input voltage of a voltage-controlled oscillator; and adjusting a driving current of a level conversion module according to the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator.

[0007] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the third aspect are implemented.

[0008] In a fifth aspect, an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the method described in the third aspect.

[0009] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the third aspect.

[0010] In an embodiment of the present application, a phase-locked loop circuit is provided, comprising a power supply unit, a feedback loop, and a driving branch connected in parallel with the feedback loop; wherein the feedback loop comprises a phase detector, a filter, a voltage-controlled oscillator, a level conversion module and a frequency divider connected in sequence, the driving branch and the feedback loop are respectively connected in series with the power supply unit, a first end of the driving branch is connected in series with the filter, a second end of the driving branch is connected to the level conversion module, a third end of the driving branch is grounded, and the driving branch is used to adjust the driving current of the level conversion module using the current provided by the power supply unit when the voltage-controlled oscillator is in a startup state. In the phase-locked loop circuit, the problem that the frequency of a clock signal generated by the voltage-controlled oscillator may be too large due to large fluctuations in the input voltage of the voltage-controlled oscillator, which makes the level conversion module unable to process normally and further causes the clock signal to be unable to output normally can be effectively avoided, and the level conversion module can be enabled to process a clock signal with a higher frequency, thereby ensuring the stable output of the final clock signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 2 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 3 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 4 is a schematic diagram of a power supply unit leakage provided in an embodiment of the present application; Figure 5 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 6 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 7 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 8 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Fig. 9 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Fig.10 is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Fig.11 is a simulation schematic diagram related to a phase-locked loop circuit provided in an embodiment of the present application; Fig.12a is a schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 12b is a schematic diagram of the structure of another phase-locked loop circuit provided in an embodiment of the present application; Fig.13 is a flow chart of a method for adjusting a driving current provided in an embodiment of the present application; Fig.14 is a flow chart of another method for adjusting driving current provided in an embodiment of the present application; Fig.15 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0012] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0013] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0014] The following is a detailed description of the phase-locked loop circuit, electronic device and driving current adjustment method provided in the embodiments of the present application through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0015] Figure 1A phase-locked loop circuit provided in an embodiment of the present application is shown. Figure 1 As shown, the phase-locked loop circuit 100 includes: a power supply unit 110, a feedback loop 120, and a driving branch 130 connected in parallel with the feedback loop; wherein the feedback loop 120 includes a phase detector 121, a filter 122, a voltage-controlled oscillator 123, a level conversion module 124 and a frequency divider 125 connected in sequence, the driving branch 130 and the feedback loop 120 are respectively connected in series with the power supply unit 110, a first end of the driving branch 130 is connected in series with the filter 122, a second end of the driving branch 130 is connected to the level conversion module 124, a third end of the driving branch 130 is grounded, and the driving branch 130 is used to adjust the driving current of the level conversion module 124 using the current provided by the power supply unit 110 when the voltage-controlled oscillator 123 is in the startup state.

[0016] The phase detector 121 is used to generate an error signal based on the feedback signal and the preset reference signal; the filter 122 is used to eliminate the high-frequency noise of the error signal; the voltage-controlled oscillator 123 is used to generate a clock signal based on the error signal processed by the filter 122; the level conversion module 124 is used to make the level of the clock signal generated by the voltage-controlled oscillator 123 compatible with the subsequent circuit to ensure that the clock signal can be correctly identified; the frequency divider 125 is used to adjust the frequency of the clock signal generated by the voltage-controlled oscillator 123 to match the frequency of the preset reference signal. The power supply unit is used to supply power to the feedback loop 120 and the drive branch 130.

[0017] In the feedback loop 120, the input voltage of the voltage-controlled oscillator 123 usually controls the frequency of the oscillator. The higher the input voltage, the higher the output frequency may be; the lower the input voltage, the lower the output frequency may be. Therefore, if the input voltage of the voltage-controlled oscillator 123 is too large, the output frequency of the clock signal will increase, which may cause the output frequency of the clock signal to exceed the processing bandwidth of the level conversion module 124, and the clock signal will not be output normally. In one embodiment, the input voltage fluctuates greatly, and there may be at least one of the following reasons: the voltage of the power supply unit 110 is unstable, there is a residual voltage in the filter 122, there is a residual voltage in other front-stage links, etc. In order to deal with the problem that the output frequency of the clock signal exceeds the processing bandwidth of the level conversion module 124 due to the large fluctuation of the input voltage, the driving current of the level conversion module 124 can be increased by adding a driving branch 130, thereby improving the processing bandwidth of the level conversion module 124. It is understandable that when the voltage-controlled oscillator 123 is started, the input voltage received by the voltage-controlled oscillator 123 is the same as the load voltage of the driving branch 130. Then, when the voltage-controlled oscillator 123 adjusts the output frequency of the clock signal based on the input voltage, the current flowing through the driving branch 130 will flow to the level conversion module 124 as a driving current. In addition, the resistance of the driving branch 130 is constant, so the input voltage will be proportional to the current, and the driving current received by the level conversion module 124 will match the input voltage of the voltage-controlled oscillator 123, thereby avoiding the problem that the level conversion module 124 cannot process normally due to the excessive output frequency of the clock signal. It is understandable that increasing the driving current of the level conversion module 124 is equivalent to providing more charge to the level conversion module 124, so that the capacitor in the level conversion module 124 can be charged or discharged faster in the same time, thereby increasing the processing bandwidth of the level conversion module 124.

[0018] In an embodiment of the present application, a phase-locked loop circuit is provided, comprising a power supply unit, a feedback loop, and a driving branch connected in parallel with the feedback loop; wherein the feedback loop comprises a phase detector, a filter, a voltage-controlled oscillator, a level conversion module and a frequency divider connected in sequence, the driving branch and the feedback loop are respectively connected in series with the power supply unit, a first end of the driving branch is connected in series with the filter, a second end of the driving branch is connected to the level conversion module, a third end of the driving branch is grounded, and the driving branch is used to adjust the driving current of the level conversion module using the current provided by the power supply unit when the voltage-controlled oscillator is in a startup state. In the phase-locked loop circuit, the problem that the frequency of a clock signal generated by the voltage-controlled oscillator may be too large due to large fluctuations in the input voltage of the voltage-controlled oscillator, which makes the level conversion module unable to process normally and further causes the clock signal to be unable to output normally can be effectively avoided, and the level conversion module can be enabled to process a clock signal with a higher frequency, thereby ensuring the stable output of the final clock signal.

[0019] In one implementation, Figure 2 As shown, the driving branch 130 includes a first resistor 131 and a second resistor 132, wherein a first end of the first resistor 131 is connected in series with the filter 122, a second end of the first resistor 131 is connected in series with a first end of the second resistor 132, and a second end of the second resistor 132 is grounded. In this embodiment, the first resistor 131 and the second resistor 132 are used to divide the input voltage of the voltage-controlled oscillator 123 in the driving branch. It can be understood that, through voltage division, the current flowing through the load can be indirectly controlled to avoid large changes in the driving current, thereby affecting the stability of the level conversion module 124.

[0020] Furthermore, in another implementation, Figure 3 As shown, the driving branch 130 also includes N first current branches 133; wherein, the first ends of the N first current branches 133 are respectively connected in series with the power supply unit 110, the second ends of the N first current branches 133 are respectively connected in series with the level conversion module 124, and the N first current branches 133 are connected in parallel, each of the first current branches 133 corresponds to a different conduction threshold voltage, and any one of the N first current branches 133 is turned on and uses the current provided by the power supply unit 110 to increase the driving current of the level conversion module 124 when the load voltage meets the corresponding conduction threshold voltage, the load voltage is a voltage divided by the input voltage, the first resistor and the second resistor, the input voltage is the sum of the residual voltage of the filter 122 and the initial input voltage of the voltage-controlled oscillator 123, and N is an integer greater than or equal to 1.

[0021] In this embodiment, the input voltage of the voltage-controlled oscillator 123 is the sum of the residual voltage of the filter 122 and the initial input voltage of the voltage-controlled oscillator 123. The input voltage is divided by the first resistor 131 and the second resistor 132. The divided voltage, i.e., the load voltage, is , It can be expressed by the following formula:

[0022] in, represents the load voltage, represents the initial input voltage, Residual voltage, represents the resistance value of the first resistor 131, represents the resistance value of the second resistor 132. It is understandable that when the voltage-controlled oscillator 123 is turned off, that is, the power supply unit 110 stops supplying power, but due to the leakage of the components inside the power supply unit 110, such as the MOS tube, Figure 4 As shown, the leakage current becomes the charging current source of the capacitor in the filter 122, so that the filter 122 generates floating pressure due to the accumulation of charge, and the filter 122 has nowhere to discharge the residual pressure. Therefore, after the voltage-controlled oscillator 123 is started next time, the power supply unit 110 supplies power to the voltage-controlled oscillator 123, and the residual voltage in the filter 122 is superimposed, so that the input voltage of the voltage-controlled oscillator 123 In order to dynamically adjust the load voltage of the driving branch 130, and then dynamically adjust the input of the driving current of the level conversion module 124, by adding N first current branches 133, the dynamic adjustment of the driving current can be achieved. In this way, for the case of large residual voltage, the driving current of the level conversion module 124 can be increased, thereby improving the processing bandwidth of the level conversion module 124. For the case of small residual voltage, the working current of the level conversion module 124 can be reduced to avoid additional power consumption due to long-term excessive driving current. For example, Figure 5 As shown, assuming that the driving branch 130 includes three first current branches 133, each first current branch 133 corresponds to a different conduction threshold voltage, assuming that the conduction threshold voltage of the first first current branch 1331 is , the conduction threshold voltage of the second first current branch 1332 is , the turn-on threshold voltage of the third first current branch 1333 is ,in, > > , assuming Greater than , then, the first current branch 1331 is turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 Assumptions Greater than , then, the first current branch 1331 and the first current branch 1332 are turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 and the current flowing through the first current branch 1332 The sum of, that is, Assumptions Greater than , then, the first current branch 1331, the first current branch 1332 and the first current branch 1333 are all turned on, and the driving current of the level conversion module 124 is the sum of the three, that is, .

[0023] In one implementation, Figure 6 As shown, each of the first current branches 133 includes a first on-off unit 134, wherein when the load voltage satisfies the on-threshold voltage corresponding to the corresponding first current branch 133, the first on-off unit 134 in the corresponding first current branch 133 is turned on.

[0024] It can be understood that the conduction of each first current branch 133 is controlled by the corresponding first on-off unit 134, that is, the conduction threshold voltage corresponding to each first current branch 133 is the conduction threshold voltage of the corresponding first on-off unit 134. Figure 7 As shown, assuming that the driving branch 130 includes three first current branches 133, the first on-off unit 134 corresponding to each first current branch 133 corresponds to a different on-threshold voltage, assuming that the on-threshold voltage of the first on-off unit 1341 in the first first current branch 1331 is , the turn-on threshold voltage of the first on-off unit 1342 in the second first current branch 1332 is , the turn-on threshold voltage of the first on-off unit 1343 in the third first current branch 1333 is ,in, > > , assuming Greater than , then, the first on-off unit 1341 is turned on, that is, the first current branch 1331 is turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 Assumptions Greater than , then, the first on-off unit 1341 and the first on-off unit 1342 are turned on, that is, the first current branch 1331 and the first current branch 1332 are turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 and the current flowing through the first current branch 1332 The sum of, that is, Assumptions Greater than , then, the first on-off unit 1341, the first on-off unit 1342 and the first on-off unit 1343 are all turned on, that is, the first current branch 1331, the first current branch 1332 and the first current branch 1333 are all turned on, and the driving current of the level conversion module 124 is the sum of the three, that is, .

[0025] Optionally, the first on-off unit 134 may be a MOS transistor. Since the on-resistance of the MOS transistor is very low when it is in the on state, the power loss can be effectively reduced.

[0026] Optionally, the first on-off unit 134 may also include other devices, modules or apparatuses such as transistors and relays for controlling the on-off of a circuit based on comparison of load voltage.

[0027] In one implementation, Figure 8 As shown, the driving branch 130 further includes a second current branch 135 ; wherein the power supply unit 110 is connected in series with the level conversion module 124 through the second current branch 135 , and the second current branch 135 is connected in parallel with the N first current branches 133 .

[0028] It is understandable that the second current branch 135 has no limit on the conduction threshold voltage, that is, no matter how large the load voltage is, the second current branch 135 is always on, that is, an initial driving current is applied to the level conversion module 124. For example, in another implementation, Fig. 9 As shown, assuming that the driving branch 130 includes three first current branches 133, each first current branch 133 corresponds to a different conduction threshold voltage, assuming that the conduction threshold voltage of the first on-off unit 1341 in the first first current branch 1331 is , the turn-on threshold voltage of the first on-off unit 1442 in the second first current branch 1332 is , the turn-on threshold voltage of the first on-off unit 1443 in the third first current branch 1333 is ,in, > > , assuming Greater than , then, the first on-off unit 1341 is turned on, that is, the first current branch 1331 is turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 With the initial drive current The sum, that is, Assumptions Greater than , then, the first on-off unit 1341 and the first on-off unit 1342 are turned on, that is, the first current branch 1331 and the first current branch 1332 are turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 , the current flowing through the first current branch 1332 With the initial drive current The sum of, that is, Assumptions Greater than , then, the first on-off unit 1341, the first on-off unit 1342 and the first on-off unit 1343 are all turned on, that is, the first current branch 1331, the first current branch 1332, and the first current branch 1333 are all turned on, and the driving current of the level conversion module 124 is the sum of the three and the initial driving current The sum of .

[0029] In one implementation, Fig.10 As shown, the phase-locked loop circuit 100 also includes a voltage discharge branch 140; wherein the first end of the voltage discharge branch 140 is connected in series with the filter 122, and the second end of the voltage discharge branch 140 is grounded, and the voltage discharge branch 140 is used to discharge the residual voltage inside the filter 122 when the voltage-controlled oscillator 123 is in a closed state.

[0030] It can be understood that, as mentioned above, when the voltage-controlled oscillator 123 is turned off, that is, the power supply unit 110 stops supplying power, but due to the leakage of the device inside the power supply unit 110, such as the MOS tube, the leakage current becomes the charging current source of the capacitor in the filter 122, so that the filter 122 generates floating pressure due to the accumulation of charge, and the filter 122 has nowhere to discharge the residual pressure. Therefore, after the voltage-controlled oscillator 123 is started next time, the power supply unit 110 supplies power to the voltage-controlled oscillator 123, and at this time, the residual voltage in the filter 122 will be superimposed, so that the input voltage of the voltage-controlled oscillator 123 , which may increase the output frequency of the clock signal generated by the voltage-controlled oscillator 123. Therefore, in this embodiment, a voltage discharge branch is added to discharge the voltage of the filter when the voltage-controlled oscillator is in the off state. In this way, when the voltage-controlled oscillator 123 is started next time, the input voltage of the voltage-controlled oscillator 123 after startup can be substantially equal to the initial input voltage, thereby avoiding the level conversion module 124 being unable to normally process the clock signal output by the voltage-controlled oscillator 123 due to the input voltage being too high. At the same time, the driving branch 130 is combined to increase the processing bandwidth of the level conversion module 124, further ensuring the stable output of the clock signal. Fig.11 , which is a simulation schematic diagram of the phase-locked loop circuit, can adjust the input residual voltage up to 1.22V to within a normal controllable range, thereby ensuring the output frequency of the voltage-controlled oscillator 123.

[0031] Furthermore, in another implementation, Fig.12aAs shown, the voltage discharge branch 140 includes a second on-off unit 141 and a third resistor 142, wherein a first end of the second on-off unit 141 is connected in series with the filter 122, and a second end of the second on-off unit 141 is grounded through the third resistor 142. It can be understood that the second on-off unit 141 may have a corresponding on-threshold voltage, and when the residual voltage inside the filter 122 is greater than the on-threshold voltage corresponding to the second on-off unit 141, the voltage discharge branch 140 is turned on, and the charge is discharged through the third resistor 142, so that the residual voltage inside the filter 122 is 0V.

[0032] Based on the above implementations, an embodiment of the present application further provides another structural schematic diagram of a phase-locked loop circuit, such as Figure 12b As shown, the phase-locked loop circuit may include a power supply unit 110 , a feedback loop 120 , a driving branch 130 connected in parallel with the feedback loop, and a voltage discharge branch 140 .

[0033] The feedback loop 120 includes a phase detector 121 , a filter 122 , a voltage-controlled oscillator 123 , a level conversion module 124 and a frequency divider 125 which are connected in sequence.

[0034] The driving branch 130 includes a first resistor 131, a second resistor 132, three first current branches 133 and a second current branch 135, each of the first current branches 133 includes a first on-off unit 134, the three first current branches 133 respectively include a first current branch 1331, a first current branch 1332, and a first current branch 1333, the first current branch 1331 includes a first on-off unit 1341, the first current branch 1332 includes a first on-off unit 1342, and the first current branch 1333 includes a first on-off unit 1343.

[0035] The voltage discharge branch 140 includes a second switching unit 141 and a third resistor 142 .

[0036] In this embodiment, when the voltage-controlled oscillator 123 is turned off, that is, when the voltage-controlled oscillator 123 is switched from the working state to the off state, the voltage of the filter 122 is discharged through the voltage discharge branch 140, wherein, when the residual voltage inside the filter 122 is greater than the conduction threshold voltage corresponding to the second on-off unit 141, the voltage discharge branch 140 is turned on, and the charge is discharged through the third resistor 142, so that the residual voltage inside the filter 122 is 0V. When the voltage-controlled oscillator 123 is started, that is, in the working state, the driving current of the level conversion module 124 is increased through the driving branch 130, thereby improving the processing bandwidth of the level conversion module 124, so as to avoid the problem that the level conversion module 124 cannot process normally due to the excessive output frequency of the clock signal of the voltage-controlled oscillator 123. In the working process of the driving branch 130, the input voltage of the voltage-controlled oscillator 123 is first divided by the first resistor 131 and the second resistor 132, and the voltage after the voltage division, that is, the load voltage, is The first on-off unit 1341, the first on-off unit 1342, and the first on-off unit 1343 have different on-threshold voltages. , and ,in, > > Assumptions Greater than , then, the first on-off unit 1341 is turned on, that is, the first current branch 1331 is turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 With the initial drive current The sum, that is, Assumptions Greater than , then, the first on-off unit 1341 and the first on-off unit 1342 are turned on, that is, the first current branch 1331 and the first current branch 1332 are turned on, and the driving current of the level conversion module 124 is the current flowing through the first current branch 1331 , the current flowing through the first current branch 1332 With the initial drive current The sum of, that is, Assumptions Greater than , then, the first on-off unit 1341, the first on-off unit 1342 and the first on-off unit 1343 are all turned on, that is, the first current branch 1331, the first current branch 1332, and the first current branch 1333 are all turned on, and the driving current of the level conversion module 124 is the sum of the three and the initial driving current The sum of .

[0037] In this embodiment, when the voltage-controlled oscillator 123 is turned off, the voltage of the filter is discharged through the voltage discharge branch 140, so that when the voltage-controlled oscillator 123 is started next time, the input voltage of the voltage-controlled oscillator 123 after startup can be substantially equal to the initial input voltage, thereby avoiding the level conversion module 124 being unable to normally process the clock signal output by the voltage-controlled oscillator 123 due to the input voltage being too high. At the same time, when the voltage-controlled oscillator 123 is started, the driving current of the level conversion module 124 is dynamically adjusted through the driving branch 130. For the case of a large residual voltage, the driving current of the level conversion module 124 is increased, thereby improving the processing bandwidth of the level conversion module 124. For the case of a small residual voltage, the working current of the level conversion module 124 is reduced, which can avoid the generation of additional power consumption due to the long-term excessive driving current.

[0038] An embodiment of the present application further provides an electronic device, the electronic device comprising a phase-locked loop circuit 200, wherein the phase-locked loop circuit can be the above-mentioned Figures 1 to 12b A phase-locked loop circuit provided by any embodiment.

[0039] Fig.13 FIG. 1 is a schematic flow chart of a method for adjusting a driving current according to an embodiment of the present application. Fig.13 As shown, this method is applied to the above Figures 1 to 12b The phase-locked loop circuit provided in any embodiment may include the following steps: S1330: Obtain the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator.

[0040] S1340: Adjust the driving current of the level conversion module according to the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator.

[0041] In this embodiment, by obtaining the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator, and adjusting the driving current of the level conversion module according to the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator, it is possible to effectively avoid the problem that the frequency of the clock signal generated by the voltage-controlled oscillator is too high due to the input voltage of the voltage-controlled oscillator being too high, making it impossible for the level conversion module to process normally, and thus causing the clock signal to be unable to be output normally. The level conversion module can be enabled to process a higher frequency clock signal, thereby ensuring the stable output of the final clock signal.

[0042] In one implementation, the adjusting the discharge current of the power supply unit according to the residual voltage of the filter and the input voltage of the voltage-controlled oscillator includes: calculating the load voltage of the driving branch according to the residual voltage, the initial input voltage, and the resistance value of the first resistor and the resistance value of the second resistor; when the load voltage is less than a first threshold, determining that the driving current of the level conversion module is the current flowing through the second current branch; when the load voltage is greater than the first threshold and satisfies the corresponding conduction threshold voltage of the corresponding first current branch, determining that the driving current of the level conversion module is the sum of the current flowing through the second current branch and the current flowing through the corresponding first current branch.

[0043] For a detailed description of this implementation, please refer to Fig. 9 The description in the illustrated embodiment will not be repeated here.

[0044] Fig.14 FIG. 1 is a schematic flow chart of a method for adjusting a driving current according to an embodiment of the present application. Fig.14 As shown, the following steps may be included: S1411: When the voltage-controlled oscillator is turned off, the voltage-controlled oscillator is powered off.

[0045] S1412: In case of leakage in the power supply unit, the filter is charged and the residual voltage increases.

[0046] S1413: Turn on the second on-off unit to discharge the residual voltage.

[0047] S1414: When the voltage-controlled oscillator is turned off, determine whether the load voltage is greater than the turn-on threshold voltage Vth1 of the first on-off unit.

[0048] If so, go to S1416; if not, go to S1415.

[0049] S1415: Maintain I0 driving.

[0050] S1416: When the voltage-controlled oscillator is turned off, determine whether the load voltage is greater than the turn-on threshold voltage Vth2 of the second first turn-on / off unit.

[0051] If so, go to S1418; if not, go to S1417.

[0052] S1417: The first on-off unit corresponding to Vth1 is turned on, and the driving strength = I0 + I1.

[0053] S1418: When the voltage-controlled oscillator is turned off, determine whether the load voltage is greater than the turn-on threshold voltage Vth3 of the second first turn-on / off unit.

[0054] If so, go to S1420; if not, go to S1419.

[0055] S1419: The first on-off unit corresponding to Vth1 and Vth2 is turned on, and the driving strength = I0 + I1 + I2.

[0056] S1420: The first on-off units corresponding to Vth1, Vth2 and Vth3 are turned on, and the driving strength = I0+I1+I2+I3.

[0057] S1421: Output clock signal.

[0058] Alternatively, if Fig.15 As shown, an embodiment of the present application also provides an electronic device 1500, including a processor 1501 and a memory 1502, wherein the memory 1502 stores programs or instructions that can be executed on the processor 1501, and when the program or instructions are executed by the processor 1501, the various steps of the above-mentioned driving current adjustment method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, they are not repeated here.

[0059] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0060] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, each process of the above-mentioned driving current adjustment method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0061] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0062] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned drive current adjustment method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0063] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0064] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned driving current adjustment method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0065] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0066] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0067] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A phase-locked loop circuit, characterized in that: It includes a power supply unit, a feedback loop, and a driving branch connected in parallel with the feedback loop; The feedback loop includes a phase detector, a filter, a voltage-controlled oscillator, a level conversion module and a frequency divider connected in sequence, the driving branch and the feedback loop are respectively connected in series with the power supply unit, the first end of the driving branch is connected in series with the filter, the second end of the driving branch is connected to the level conversion module, the third end of the driving branch is grounded, and the driving branch is used to adjust the driving current of the level conversion module using the current provided by the power supply unit when the voltage-controlled oscillator is in the startup state.

2. The phase-locked loop circuit according to claim 1, characterized in that: The driving branch includes a first resistor and a second resistor, wherein a first end of the first resistor is connected in series with the filter, a second end of the first resistor is connected in series with a first end of the second resistor, and a second end of the second resistor is grounded.

3. The phase-locked loop circuit according to claim 2, characterized in that: The driving branch further includes N first current branches; Among them, the first ends of N first current branches are respectively connected in series with the power supply unit, the second ends of N first current branches are respectively connected in series with the level conversion module, and the N first current branches are connected in parallel. Each first current branch corresponds to a different turn-on threshold voltage. When the load voltage meets the corresponding turn-on threshold voltage, any one of the N first current branches is turned on and uses the current provided by the power supply unit to increase the driving current of the level conversion module. The load voltage is a voltage divided by the input voltage, the first resistor and the second resistor. The input voltage is the sum of the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator. N is an integer greater than or equal to 1.

4. The phase-locked loop circuit according to claim 3, characterized in that: Each of the first current branches includes a first on-off unit, wherein when the load voltage satisfies the on-threshold voltage corresponding to the corresponding first current branch, the first on-off unit in the corresponding first current branch is turned on.

5. The phase-locked loop circuit according to claim 3, characterized in that: The driving branch further includes a second current branch; wherein the power supply unit is connected in series with the level conversion module through the second current branch, and the second current branch is connected in parallel with the N first current branches.

6. The phase-locked loop circuit according to claim 1, characterized in that: The phase-locked loop circuit also includes a voltage discharge branch; wherein a first end of the voltage discharge branch is connected in series with the filter, a second end of the voltage discharge branch is grounded, and the voltage discharge branch is used to discharge the residual voltage inside the filter when the voltage-controlled oscillator is in a closed state.

7. The phase-locked loop circuit according to claim 6, characterized in that: The voltage discharge branch includes a second on-off unit and a third resistor, wherein a first end of the second on-off unit is connected in series with the filter, and a second end of the second on-off unit is grounded through the third resistor.

8. An electronic device, characterized in that: A phase-locked loop circuit comprising any one of claims 1 to 7.

9. A method for adjusting a driving current, characterized in that: The phase-locked loop circuit according to any one of claims 1 to 7 comprises: Obtaining the residual voltage of the filter and the initial input voltage of the voltage-controlled oscillator; The driving current of the level conversion module is adjusted according to the residual voltage of the filter and the initial input voltage of the voltage controlled oscillator.

10. The method according to claim 9, characterized in that The step of adjusting the discharge current of the power supply unit according to the residual voltage of the filter and the input voltage of the voltage-controlled oscillator comprises: Calculating a load voltage of the driving branch according to the residual voltage, the initial input voltage, the resistance value of the first resistor, and the resistance value of the second resistor; When the load voltage is less than a first threshold, determining that the driving current of the level conversion module is a current flowing through a second current branch; When the load voltage is greater than the first threshold and satisfies the turn-on threshold voltage corresponding to the corresponding first current branch, the driving current of the level conversion module is determined to be the sum of the current flowing through the second current branch and the current flowing through the corresponding first current branch.

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