Over-current protection circuit and energy storage device
By designing an overcurrent protection circuit for transistors and utilizing the cooperation of the detection module and the control module, the overcurrent protection of the transistors is realized, which solves the problem that the transistors are easily damaged in the existing technology and improves the safety and reliability of the circuit. .
Patent Information
- Application Number
- CN202411377377.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-01-21
AI Technical Summary
In the prior art, transistors are not overcurrent protection, which can easily cause transistor damage in the case of overcurrent or short circuit, affecting the operation of the circuit.
Design an overcurrent protection circuit that includes a detection module and a control module. The detection module is used to obtain the current of the transistor to be protected and output a signal when the current is greater than the preset overcurrent threshold. The control module controls the The transistor to be protected is in a cut-off state.
Realize the timely cutting off in time when the transistor to be protected to protect the transistor, avoid damage, and improve the safety of the transistor and the reliability of the circuit.
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Figure CN119340931A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of circuit technology, and in particular to an overcurrent protection circuit and an energy storage device. Background Art
[0002] Transistors are commonly used components in circuits. For example, transistors are used in commonly used inverters or LLC resonant conversion circuits. However, in the related art, transistors are not protected against overcurrent. When an overcurrent or short circuit occurs in a transistor, it is easy to damage the transistor, thereby affecting the operation of the circuit. Therefore, how to protect transistors from overcurrent becomes a technical problem that needs to be solved urgently. Summary of the invention
[0003] Based on this, it is necessary to provide an overcurrent protection circuit and an energy storage device that can provide overcurrent protection for transistors in response to the above technical problems.
[0004] In a first aspect, the present application provides an overcurrent protection circuit, comprising a detection module and a control module; the detection module is connected to a transistor to be protected and the control module respectively;
[0005] A detection module, used for acquiring the current of the transistor to be protected, and outputting a first signal when the current of the transistor to be protected is greater than a preset overcurrent threshold;
[0006] The control module is used to control the transistor to be protected to be in a cut-off state according to the first signal and a preset driving signal of the transistor to be protected.
[0007] In one embodiment, the control module includes a logic unit and a first transistor, and the logic unit is connected to the detection module and the first transistor respectively;
[0008] The logic unit is used to generate a first output signal according to the first signal and a preset driving signal of the transistor to be protected; the first output signal is used to control the first transistor to be in an on state, and the transistor to be protected is in an off state when the first transistor is in the on state.
[0009] In one embodiment, the logic unit includes a logic gate device, a first input end of the logic gate device is used to receive a preset drive signal, a second input end of the logic gate device is respectively connected to the detection module and the pull-up resistor, and an output end of the logic gate device is connected to the first transistor.
[0010] In one embodiment, the logic gate device includes an AND gate, the base of the first transistor is connected to the output end of the AND gate, the emitter of the first transistor is grounded, and the collector of the first transistor is used to receive a preset driving signal.
[0011] In one embodiment, the detection module includes a comparator; a first input terminal of the comparator is connected to the transistor to be protected, a second input terminal of the comparator is respectively connected to the protection transistor and a reference voltage source, and an output terminal of the comparator is connected to the control module.
[0012] In one embodiment, the detection module also includes a first resistor, a second resistor and a diode; the first resistor is arranged between the transistor to be protected and the first input terminal of the comparator, the second resistor is arranged between the transistor to be protected and the second input terminal of the comparator, the first end of the diode is arranged between the first resistor and the first input terminal of the comparator, and the second end of the diode is arranged between the second resistor and the second input terminal of the comparator.
[0013] In one of the embodiments, the detection module is further configured to output a second signal when the current of the transistor to be protected is not greater than a preset overcurrent threshold;
[0014] The control module is further used to control the state of the transistor to be protected through a preset driving signal when the detection module outputs the second signal.
[0015] In one embodiment, the control module includes a logic unit and a first transistor, and the logic unit is connected to the detection module and the first transistor respectively;
[0016] The logic unit is used to generate a second output signal according to the second signal; the second output signal is used to control the first transistor to be in an off state, and when the first transistor is in the off state, the state of the transistor to be protected is determined according to a preset driving signal.
[0017] In one embodiment, the transistor to be protected is any transistor in a boost bridge arm or a buck bridge arm of a buck-boost circuit.
[0018] In a second aspect, the present application also provides an energy storage device, which includes any of the overcurrent protection circuits described above.
[0019] The above-mentioned overcurrent protection circuit and energy storage device, the overcurrent protection circuit includes a detection module and a control module, and the detection module is connected to the transistor to be protected and the control module respectively. Since the detection module can obtain the current of the transistor to be protected and output the first signal when the current of the transistor to be protected is greater than the preset overcurrent threshold, the detection module can output the first signal in time when an overcurrent occurs in the transistor to be protected. Furthermore, the control module can control the transistor to be protected to be in a cut-off state according to the first signal and the preset drive signal of the transistor to be protected. Therefore, in the case of an overcurrent in the transistor to be protected, the control module can control the transistor to be protected to be in a cut-off state in time, that is, turn off the transistor to be protected, thereby realizing overcurrent protection of the transistor to be protected in the case of an overcurrent in the transistor to be protected, thereby improving the safety of the transistor to be protected. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0021] Figure 1 A schematic diagram of a buck-boost circuit;
[0022] FIG2 is a schematic diagram of an overcurrent protection circuit in one embodiment;
[0023] Figure 3 is a schematic diagram of a control module in one embodiment;
[0024] Figure 4 is a schematic diagram of a logic unit in one embodiment;
[0025] Figure 5 is a schematic diagram of yet another control module in an embodiment;
[0026] Figure 6 is a schematic diagram of a detection module in an embodiment;
[0027] Figure 7 is a schematic diagram of yet another detection module in an embodiment;
[0028] Figure 8 is a schematic diagram of yet another overcurrent protection circuit in an embodiment;
[0029] Fig. 9 Schematic diagram of an energy storage device in one embodiment. DETAILED DESCRIPTION
[0030] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0031] Figure 1 is a schematic diagram of a buck-boost circuit, such as Figure 1 As shown, the buck-boost circuit may include a power supply BAT+, a resistor R4, a resistor R7, a transistor Q2, a resistor R6, a resistor R8, a transistor Q3, a resistor R9, a resistor R11, a transistor Q5, a resistor R10, a resistor R12, a transistor Q5, and a transformer T1. Transistor Q2, transistor Q3, transistor Q4, and transistor Q5 may be N-type MOS (Metal-Oxide-Semiconductor Field-Effect Transistor). Among them, transistor Q2, transistor Q3, transistor Q4, and transistor Q5 constitute a common four-tube buck-boost structure.
[0032] However, the related art does not provide overcurrent protection for the above-mentioned transistors Q2 to Q5. When any of the transistors Q2 to Q5 experiences overcurrent or short circuit, the transistor may be easily damaged, thereby affecting the operation of the above-mentioned buck-boost circuit.
[0033] Based on this, it is necessary to provide an overcurrent protection circuit that can protect transistors from overcurrent. The overcurrent protection circuit will be introduced below. It can be understood that the overcurrent protection circuit can be applied not only to buck-boost circuits, but also to any other circuits including transistors.
[0034] FIG2 is a schematic diagram of an overcurrent protection circuit in an embodiment. As shown in FIG2 , the overcurrent protection circuit 100 includes a detection module 101 and a control module 102 . The detection module 101 is connected to the transistor 200 to be protected and the control module 102 , respectively.
[0035] The detection module 101 is used to obtain the current of the transistor 200 to be protected, and output according to the current of the transistor 200 to be protected and a preset overcurrent threshold. Exemplarily, the detection module 101 may include a current sensor, and this embodiment does not limit the form of the detection module 101.
[0036] The transistor to be protected 200 refers to a transistor that needs to be protected from overcurrent, and can be any transistor in a circuit. Optionally, the transistor to be protected can be a MOS transistor.
[0037] In one embodiment, optionally, the transistor 200 to be protected is any transistor in a boost bridge arm or a buck bridge arm of a boost-boost circuit. Figure 1 Any one of the transistors Q2 to Q5 is used as the transistor to be protected. Figure 1 Take transistor Q2 in FIG. 1 for example.
[0038] Furthermore, when the current of the transistor 200 to be protected is greater than the preset overcurrent threshold, that is, when the transistor 200 to be protected has an overcurrent, the detection module 101 will output a first signal. The first signal may be, for example, a high level or a high impedance state.
[0039] The control module 102 is used to control the transistor 200 to be protected to be in a cut-off state according to the first signal and a preset driving signal of the transistor 200 to be protected.
[0040] The preset driving signal refers to a driving signal for controlling the transistor to be protected 200. Optionally, the gate of the transistor to be protected 200 is used to receive the preset driving signal. Further optionally, the gate of the transistor to be protected 200 can receive the preset driving signal through other devices such as resistors.
[0041] The preset driving signal may be a pulse width modulation (PWM) signal. Exemplarily, when the preset driving signal is at a high level, it is used to control the transistor to be protected 200 to be in an on state, and when the preset driving signal is at a low level, it is used to control the transistor to be protected 200 to be in an off state.
[0042] Optionally, the preset driving signal may be a signal sent by a central processing unit (CPU), or may be a driving signal input by a user, but the present embodiment is not limited thereto.
[0043] Furthermore, when the current of the transistor to be protected 200 is greater than the preset overcurrent threshold, the first signal output by the detection module 101 is received by the control module 102, and the control module 102 controls the transistor to be protected 200 to be in the cut-off state according to the first signal and the preset driving signal of the transistor to be protected 200.
[0044] Optionally, the control module 102 may control a driving signal of the transistor 200 to be protected to change a state of the transistor 200 to be protected.
[0045] Further optionally, the control module 102 may control the transistor to be protected 200 to be in a cut-off state when the first signal is received and the preset driving signal is at a high level.
[0046] In the above-mentioned overcurrent protection circuit 100, the overcurrent protection circuit 100 includes a detection module 101 and a control module 102, and the detection module 101 is connected to the transistor 200 to be protected and the control module 102 respectively. Since the detection module 101 can obtain the current of the transistor 200 to be protected, and output the first signal when the current of the transistor 200 to be protected is greater than the preset overcurrent threshold, the detection module 101 can output the first signal in time when the transistor to be protected is overcurrent. Furthermore, the control module 102 can control the transistor 200 to be protected to be in a cut-off state according to the first signal and the preset drive signal of the transistor 200 to be protected. Therefore, when the transistor 200 to be protected is overcurrent, the control module 102 can control the transistor 200 to be protected to be in a cut-off state in time, that is, turn off the transistor 200 to be protected, thereby realizing overcurrent protection of the transistor 200 to be protected when the transistor 200 to be protected is overcurrent, thereby improving the safety of the transistor 200 to be protected.
[0047] In an exemplary embodiment, optionally, the detection module 101 is further configured to output a second signal when the current of the transistor 200 to be protected is not greater than a preset overcurrent threshold, that is, when the transistor 200 to be protected does not have an overcurrent. The second signal may be, for example, a low level.
[0048] The control module 102 is further configured to control the state of the transistor 200 to be protected by a preset driving signal when the detection module 101 outputs the second signal.
[0049] That is, when the detection module 101 outputs the second signal, the transistor to be protected 200 can continue to receive the preset driving signal to control the state of the transistor to be protected 200 through the preset driving signal. For example, when the detection module 101 outputs the second signal, if the preset driving signal is at a high level, the transistor to be protected 200 is controlled to be in an on state, and if the preset driving signal is at a low level, the transistor to be protected 200 is controlled to be in an off state.
[0050] In the above embodiment, since the detection module 101 is also used to output the second signal when the current of the transistor to be protected 200 is not greater than the preset overcurrent threshold, therefore, when no overcurrent occurs in the transistor to be protected 200, the detection module 101 can also output the second signal to the control module 102, and the control module 102 is also used to control the state of the transistor to be protected 200 through a preset drive signal when the detection module 101 outputs the second signal. In this way, when no overcurrent occurs in the transistor to be protected 200, the normal control of the transistor to be protected 200 by the preset drive signal will not be affected, thereby improving the flexibility and reliability of the overcurrent protection circuit 100.
[0051] Figure 3 is a schematic diagram of a control module in an embodiment, such as Figure 3 As shown, in an exemplary embodiment, optionally, the control module 102 includes a logic unit 1021 and a first transistor 1022 , and the logic unit 1021 is connected to the detection module 101 and the first transistor 1022 , respectively.
[0052] The logic unit 1021 is used to output according to the output signal of the detection module 102 and the preset driving signal. The output of the logic unit 1021 is used to control the first transistor 1022, and the first transistor 1022 is used to control the transistor to be protected 200. The first transistor 1022 may include but is not limited to a MOS transistor or a triode. In some embodiments, for fast response, etc., the first transistor 1022 may generally be a triode.
[0053] When the current of the transistor to be protected 200 is greater than the preset overcurrent threshold, the detection module 101 outputs a first signal, and then the logic unit 1021 generates a first output signal according to the first signal and the preset drive signal of the transistor to be protected 200. The first output signal is used to control the first transistor 1022 to be in a conducting state, and the first output signal is, for example, a high level.
[0054] Optionally, the logic unit 1021 can generate a first output signal when the detection module 101 outputs a first signal and the preset drive signal is at a high level. The logic unit 1021 may include, but is not limited to, a central processing unit (CPU), a digital signal processor (DSP), a field programmable gate array (FPGA) or other programmable logic devices. In some embodiments, the logic unit 1021 may also be implemented by a logic gate device, such as an AND gate or a NOR gate, which is not limited in this embodiment.
[0055] Furthermore, when the first transistor 1022 is in the on state, the transistor to be protected 200 is in the off state.
[0056] For example, the first transistor 1022 may be an NPN-type triode, the transistor 200 to be protected may be an N-type MOS transistor, and the gate of the transistor 200 to be protected is connected to the collector of the first transistor 1022, so that when the first transistor 1022 is in the on state, the base of the first transistor 1022 is pulled down, so that the transistor 200 to be protected is in the off state. For another example, when the first transistor 1022 is in the on state, the normally closed relay can be controlled to be disconnected, and when the normally closed relay is disconnected, the transistor 200 to be protected can be controlled to be in the off state. This embodiment is not limited to this, as long as the transistor 200 to be protected can be in the off state when the first transistor 1022 is in the on state.
[0057] In the above embodiment, the control module 102 includes a logic unit 1021 and a first transistor 1022, and the logic unit 1021 is respectively connected to the detection module 101 and the first transistor 1022. Since the logic unit 1021 is used to generate a first output signal according to the first signal and the preset drive signal of the transistor 200 to be protected, and the first output signal is used to control the first transistor 1022 to be in a conducting state, and the transistor 200 to be protected is in a cut-off state when the first transistor 1022 is in a conducting state, therefore, according to the first signal and the preset drive signal of the transistor 200 to be protected, the transistor to be protected can be efficiently and accurately controlled to be in a cut-off state, so as to timely perform overcurrent protection on the transistor 200 to be protected.
[0058] In an exemplary embodiment, the logic unit 1021 is used to generate a second output signal according to the second signal. That is, when the current of the transistor 200 to be protected is not greater than the preset overcurrent threshold, the detection module 101 outputs the second signal, and then the logic unit 1021 generates a second output signal according to the second signal. The second output signal is used to control the first transistor 1022 to be in a cut-off state, and the second output signal is, for example, a low level.
[0059] Further, when the first transistor 1022 is in the off state, the state of the transistor to be protected 200 is determined according to the preset driving signal. For example, when the first transistor 1022 is in the off state, the first transistor 1022 normally receives the preset driving signal to control the transistor to be protected 200 by the preset driving signal.
[0060] In the above embodiment, since the logic unit 1021 is used to generate a second output signal according to the second signal, and the second output signal is used to control the first transistor 1022 to be in the off state, and when the first transistor 1022 is in the off state, the state of the transistor 200 to be protected is determined according to the preset drive signal, therefore, when the detection module 101 outputs the second signal, the state of the transistor 200 to be protected can be controlled by the preset drive signal, so that when no overcurrent occurs, the normal control of the transistor 200 to be protected by the preset drive signal will not be affected.
[0061] Figure 4 is a schematic diagram of a logic unit in an embodiment, such as Figure 4 As shown, in an exemplary embodiment, optionally, the logic unit 1021 includes a logic gate device 1021a, a first input end of the logic gate device 1021a is used to receive a preset drive signal, a second input end of the logic gate device 1021a is respectively connected to the detection module 101 and the pull-up resistor 401, and an output end of the logic gate device 1021a is connected to the first transistor 1022.
[0062] The pull-up resistor 401 is used to change the high impedance state output by the detection module 101 to a high level. Figure 4 The pull-up resistor 101 may be connected to a preset power source, which may be, for example, 3.3 volts (V).
[0063] On the one hand, when the current of the transistor to be protected 200 is greater than the preset overcurrent threshold, that is, when overcurrent occurs in the transistor to be protected 200, the detection module 101 outputs a first signal, and then the logic gate device 1021a generates a first output signal according to the first signal output by the detection module 101 and the preset drive signal of the transistor to be protected 200, so as to control the first transistor 1022 to be in the on state through the first output signal.
[0064] On the other hand, when the current of the transistor 200 to be protected is not greater than the preset overcurrent threshold, that is, when no overcurrent occurs in the transistor 200 to be protected, the detection module 101 outputs a second signal, and the logic gate device 1021a can generate a second output signal based only on the second signal output by the detection module 101, so as to control the first transistor 1022 to be in the cut-off state through the second output signal.
[0065] In the above embodiment, since the logic unit 1021 includes a logic gate device 1021a, the first input end of the logic gate device 1021a is used to receive a preset drive signal, the second input end of the logic gate device 1021a is respectively connected to the detection module 101 and the pull-up resistor 401, and the output end of the logic gate device 1021a is connected to the first transistor 1022, therefore, the first output signal or the second output signal can be efficiently determined through the logic gate device 1021a.
[0066] Figure 5 FIG. 1 is a schematic diagram of another control module in an embodiment, Figure 5 As shown, in an exemplary embodiment, optionally, the logic gate device 1021a includes an AND gate U2D, the base of the first transistor 1022 is connected to the output end of the AND gate U2D, the emitter of the first transistor 1022 is grounded, and the collector of the first transistor 1022 is used to receive a preset drive signal.
[0067] Exemplarily, when the current of the transistor 200 to be protected is not greater than the preset overcurrent threshold, the detection module 101 outputs a low-level second signal, and no matter whether the preset drive signal is high or low, the output of the AND gate U2D is always a low-level second output signal, and the first transistor 1022 can be controlled to be in an off state through the second output signal. Further, when the first transistor 1022 is in an off state, the preset drive signal is not pulled down by the ground terminal GND, and the preset drive signal can control the state of the transistor 200 to be protected, for example, when the preset drive signal is high, the transistor 200 to be protected is in an on state, and when the preset drive signal is low, the transistor 200 to be protected is in an off state.
[0068] When the current of the transistor 200 to be protected is greater than the preset overcurrent threshold, the detection module 101 outputs a high-level second signal, and the output of the AND gate U2D will follow the preset drive signal. In other words, if the preset drive signal is high, the AND gate U2D outputs a high-level first output signal, and if the preset drive signal is low, the AND gate U2D still outputs a low-level second output signal.
[0069] The process of the gate U2D outputting the second output signal of a low level can refer to the above process. The first transistor 1022 is in the cut-off state, and the state of the transistor 200 to be protected is controlled by a preset driving signal, which will not be repeated here.
[0070] When the gate U2D outputs a first output signal of a high level, the first output signal can control the first transistor 1022 to be in an on state. When the first transistor 1022 is in an on state, the preset drive signal is pulled low by the ground terminal GND. In this way, when the preset drive signal is at a low level, the transistor 200 to be protected will be in an off state, so as to achieve the purpose of turning off the transistor 200 to be protected.
[0071] In the above embodiment, since the logic gate device 1021a includes an AND gate, the base of the first transistor 1022 is connected to the output end of the AND gate, the emitter of the first transistor 1022 is grounded, and the collector of the first transistor 1022 is used to receive a preset drive signal. Therefore, when the preset drive signal V1 is at a high level, if an overcurrent occurs in the transistor 200 to be protected, the first transistor 1022 can be promptly controlled to be in a conducting state, thereby pulling down the preset drive signal to perform overcurrent protection on the transistor 200 to be protected.
[0072] Figure 6 is a schematic diagram of a detection module in an embodiment, such as Figure 6 As shown, in an exemplary embodiment, optionally, the detection module 101 includes a comparator 101a.
[0073] The first input terminal of the comparator 101 a is connected to the transistor 200 to be protected, the second input terminal of the comparator 101 a is connected to the transistor 200 to be protected and the reference voltage source 601 respectively, and the output terminal of the comparator 101 a is connected to the control module 102 .
[0074] The reference voltage source 601 provides a reference voltage for the second input terminal of the comparator 101a. In this way, the comparator 101a can determine whether the current of the transistor 200 to be protected is greater than the preset overcurrent threshold by comparing the voltage of its first input terminal with the voltage of the second output terminal. Among them, the voltage of the second output terminal is also the reference voltage provided by the reference voltage source 601. Exemplarily, if the voltage of the first input terminal of the comparator 101a is not lower than the reference voltage corresponding to the second input terminal, it means that the current of the transistor to be protected is greater than the preset overcurrent threshold, and the comparator 101a outputs a first signal. If the voltage of the first input terminal of the comparator 101a is lower than the reference voltage corresponding to the second input terminal, it means that the current of the transistor to be protected is not greater than the preset overcurrent threshold, and the comparator 101a outputs a second signal.
[0075] Optionally, the reference voltage source 601 can be determined according to the specifications of the transistor 200 to be protected. For example, the internal resistance of a general MOS tube is 10 mΩ, and the corresponding reference voltage is 1 V when the overcurrent is 100 A, so the reference voltage source 601 can be 1 V. Optionally, the reference voltage source 601 can be provided by a conventional 3.3 V voltage divider circuit, which is not shown in the figure.
[0076] In the above embodiment, the detection module 101 includes a comparator 101a. Since the first input terminal of the comparator 101a is connected to the transistor 200 to be protected, the second input terminal of the comparator 101a is respectively connected to the transistor 200 to be protected and the reference voltage source 501, and the output terminal of the comparator 101a is connected to the control module 102, the transistor 200 to be protected can be compared with the preset overcurrent threshold value through the detection module 101, so as to timely determine the overcurrent situation of the transistor 200 to be protected.
[0077] Figure 7 FIG. 1 is a schematic diagram of another detection module in an embodiment, Figure 7 As shown, in an exemplary embodiment, the detection module 101 further includes a first resistor 101b, a second resistor 101c and a diode 101d.
[0078] Among them, the first resistor 101b is arranged between the transistor to be protected 200 and the first input terminal of the comparator 101a, the second resistor 101c is arranged between the transistor to be protected 200 and the second input terminal of the comparator 101a, the first end of the diode 101d is arranged between the first resistor 101b and the first input terminal of the comparator 101a, and the second end of the diode 101d is arranged between the second resistor 101c and the second input terminal of the comparator 101a.
[0079] In the above embodiment, the detection module 101 also includes a first resistor 101b, a second resistor 101c and a diode 101d. Since the first resistor 101b is arranged between the transistor to be protected 200 and the first input terminal of the comparator 101a, the second resistor 101c is arranged between the transistor to be protected 200 and the second input terminal of the comparator 101a, the first end of the diode 101d is arranged between the first resistor 101b and the first input terminal of the comparator 101a, and the second end of the diode 101d is arranged between the second resistor 101c and the second input terminal of the comparator 101a, the detection module 101 can efficiently and accurately compare the transistor to be protected 200 with the preset overcurrent threshold.
[0080] In order to more clearly describe the overcurrent protection circuit 100 of the present application, Figure 8 To explain, Figure 8 FIG. 1 is a schematic diagram of yet another overcurrent protection circuit in an embodiment, Figure 8 As shown, the transistor 200 to be protected is Figure 1 The transistor Q2 in FIG. 1 is used as an example for explanation.
[0081] When transistor Q2 is working normally, transistor Q2 does not have overcurrent, the current of transistor Q2 is not greater than the preset overcurrent threshold, the voltage of the in-phase input terminal (i.e., the first input terminal) of comparator U1B (i.e., comparator 101a) is lower than the voltage of the inverting input terminal (i.e., the second input terminal), and comparator U1B outputs a low level, and then the second input terminal (i.e., pin 13) of AND gate U2D is always at a low level. In this case, regardless of whether the preset drive signal V1 is a high level or a low level, the output terminal (i.e., pin 11) of AND gate U2D is also always at a low level, so that the low level output by AND gate U2D will control the first transistor Q1 (i.e., the first transistor 1022) to be in the off state. When the first transistor Q1 is in the off state, the preset drive signal V1 is not pulled down by the ground terminal GND, and the preset drive signal V1 drives transistor Q2 normally, that is, when the preset drive signal V1 is at a high level, transistor Q2 is controlled to be in the on state, and when the preset drive signal V1 is at a low level, transistor Q2 is controlled to be in the off state.
[0082] When an overcurrent occurs in transistor Q2, the current of transistor Q2 is greater than the preset overcurrent threshold, the voltage of the non-inverting input terminal (i.e., the first input terminal) of the comparator U1B (i.e., the comparator 101a) is greater than the voltage of the inverting input terminal (i.e., the second input terminal), and the comparator U1B outputs a high level, and then the output of the AND gate U2D follows the preset drive signal of pin 12.
[0083] If the preset drive signal V1 is a low level, the AND gate U2D will follow the preset drive signal V1 to output a low level. In this way, the low level output by the AND gate U2D will control the first transistor Q1 to be in the cut-off state. At this time, the preset drive signal V1 normally drives the transistor Q2. Since the preset drive signal V1 is a low level, the transistor Q2 is still in the cut-off state.
[0084] If the preset driving signal V1 is at a high level, the AND gate U2D will follow the preset driving signal V1 to output a high level, so that the high level output by the AND gate U2D will control the first transistor Q1 to be in a conducting state. When the first transistor Q1 is in a conducting state, the preset driving signal V1 will be pulled down by the ground terminal GND, thereby controlling the transistor Q2 to be in a cut-off state through the preset driving signal V1 that has been pulled down.
[0085] In this way, during the on-time of the preset drive signal V1, that is, when the preset drive signal V1 is at a high level, if an overcurrent occurs in the transistor Q2, the first transistor Q1 will be controlled to be in an on state, thereby pulling down the preset drive signal V1 and turning off the transistor Q2 in time to protect the MOS from being damaged.
[0086] It should be noted that the first resistor 101b can be Figure 8 The second resistor 101c can be R1. Figure 8 In R3, diode 101d can be Figure 8 The voltage regulator ZD1 in it.
[0087] Fig. 9 is a schematic diagram of an energy storage device in one embodiment, such as Fig. 9 As shown, in one embodiment, an energy storage device 900 is further provided, and the energy storage device 900 includes any of the above-mentioned overcurrent protection circuits 100. The principle of the energy storage device 900 can refer to the above-mentioned overcurrent protection circuit 100, and will not be repeated here.
[0088] Each module in the above energy storage device can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.
[0089] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.
[0090] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.
[0091] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. An overcurrent protection circuit, characterized in that: The overcurrent protection circuit includes a detection module and a control module; the detection module is connected to the transistor to be protected and the control module respectively; The detection module is used to obtain the current of the transistor to be protected and output a first signal when the current of the transistor to be protected is greater than a preset overcurrent threshold; The control module is used to control the transistor to be protected to be in a cut-off state according to the first signal and a preset driving signal of the transistor to be protected.
2. The overcurrent protection circuit according to claim 1, characterized in that: The control module includes a logic unit and a first transistor, and the logic unit is connected to the detection module and the first transistor respectively; The logic unit is used to generate a first output signal according to the first signal and a preset driving signal of the transistor to be protected; The first output signal is used to control the first transistor to be in an on state. When the first transistor is in the on state, the transistor to be protected is in an off state.
3. The overcurrent protection circuit according to claim 2, characterized in that: The logic unit includes a logic gate device, a first input end of the logic gate device is used to receive the preset driving signal, a second input end of the logic gate device is respectively connected to the detection module and the pull-up resistor, and an output end of the logic gate device is connected to the first transistor.
4. The overcurrent protection circuit according to claim 3, characterized in that: The logic gate device comprises an AND gate, the base of the first transistor is connected to the output end of the AND gate, the emitter of the first transistor is grounded, and the collector of the first transistor is used to receive the preset driving signal.
5. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The detection module includes a comparator; a first input terminal of the comparator is connected to the transistor to be protected, a second input terminal of the comparator is respectively connected to the protection transistor and a reference voltage source, and an output terminal of the comparator is connected to the control module.
6. The overcurrent protection circuit according to claim 5, characterized in that: The detection module also includes a first resistor, a second resistor and a diode; the first resistor is arranged between the transistor to be protected and the first input terminal of the comparator, the second resistor is arranged between the transistor to be protected and the second input terminal of the comparator, the first end of the diode is arranged between the first resistor and the first input terminal of the comparator, and the second end of the diode is arranged between the second resistor and the second input terminal of the comparator.
7. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The detection module is further configured to output a second signal when the current of the transistor to be protected is not greater than the preset overcurrent threshold; The control module is further configured to control the state of the transistor to be protected by using the preset driving signal when the detection module outputs the second signal.
8. The overcurrent protection circuit according to claim 7, characterized in that: The control module includes a logic unit and a first transistor, and the logic unit is connected to the detection module and the first transistor respectively; The logic unit is used to generate a second output signal according to the second signal; the second output signal is used to control the first transistor to be in an off state, and when the first transistor is in the off state, the state of the transistor to be protected is determined according to the preset drive signal.
9. The overcurrent protection circuit according to any one of claims 1 to 4, characterized in that: The transistor to be protected is any one transistor in a boost bridge arm or a buck bridge arm of a boost-buck circuit.
10. An energy storage device, characterized in that: The energy storage device comprises the overcurrent protection circuit as described in any one of claims 1-9.