On-chip 32.768 kHz oscillator with low temperature coefficient and low power consumption and electronic equipment

Abstract

The invention provides an on-chip 32.768 kHz oscillator with a low temperature coefficient and low power consumption and electronic equipment. The low-temperature-coefficient low-power-consumption on-chip 32.768 kHz oscillator comprises a power supply circuit, a current mirror circuit, a PATA current source circuit, an oscillating circuit and an output circuit, the output end of the power supply circuit is connected with one input end of the current mirror circuit, the PATA current source circuit is connected with the other input end of the current mirror circuit, the output end of the current mirror circuit is connected with the input end of the oscillating circuit, and the output end of the oscillating circuit is connected with the output circuit. The CK signal end and the CKBAR signal end of the output circuit are connected with the oscillating circuit. An electronic circuit is used for replacing an existing crystal, a clock circuit can be integrated into the circuit, and the purposes of improving the integration level and reducing the cost are achieved.

Description

Technical Field

[0001] The invention belongs to the technical field of clock circuits, and in particular relates to a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator and electronic equipment. Background Art

[0002] The 32.768kHz oscillator is a very common and important clock source, which plays an important role in various electronic devices and systems. Its application areas are very wide, such as portable wearable devices, medical devices, industrial control systems, automotive applications, low-power design, Internet of Things (IOT) devices, etc. Its main function is to provide accurate and stable clocks for various electronic devices, as well as sleep and wake-up clocks. Due to its low clock frequency and low power consumption, it is particularly suitable for providing system clocks and sleep and wake-up timing clocks for low-power electronic products.

[0003] Typically 32.768kHz oscillators are implemented using passive and active crystal oscillators, which take up printed circuit board (PCB) space and increase cost. Summary of the invention

[0004] In view of the problems existing in the prior art, the present invention provides a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator and electronic equipment, which at least partially solve the problems of occupying PCB space and increasing costs existing in the prior art.

[0005] In a first aspect, an embodiment of the present invention provides a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator, comprising: a power supply circuit, a current mirror circuit, a PATA current source circuit, an oscillation circuit and an output circuit; the output end of the power supply circuit is connected to an input end of the current mirror circuit, the PATA current source circuit is connected to the other input end of the current mirror circuit, the output end of the current mirror circuit is connected to the input end of the oscillation circuit, the output end of the oscillation circuit is connected to the output circuit, and the CK signal end and CK_BAR signal end of the output circuit are connected to the oscillation circuit.

[0006] Optionally, the oscillation circuit includes a field effect tube S1, a field effect tube S2, a field effect tube S3, a field effect tube S4, a field effect tube S5, a field effect tube S6 and a comparator, the source of the field effect tube S1 is connected to the drain of the field effect tube S5, the capacitor C1 is connected between the drain and the source of the field effect tube S5, the source of the field effect tube S5 is grounded, the source of the field effect tube S3 is connected to the source of the field effect tube S4, a resistor R1 is connected in series between the node between the source of the field effect tube S3 and the source of the field effect tube S4 and the ground, the capacitor C3 is connected in parallel with the resistor R1, and the field effect tube S1 is connected to the drain of the field effect tube S5. The source of the field effect transistor S2 is connected to the drain of the field effect transistor S6, the capacitor C2 is connected between the drain and the source of the field effect transistor S6, the source of the field effect transistor S6 is grounded, the drains of the field effect transistor S1 and the field effect transistor S3 are respectively connected to the non-inverting input terminal of the comparator, the drains of the field effect transistor S2 and the field effect transistor S4 are respectively connected to the inverting input terminal of the comparator, the gates of the field effect transistor S1, the field effect transistor S4 and the field effect transistor S6 are connected to the CK_BAR signal terminal, and the gates of the field effect transistor S2, the field effect transistor S3 and the field effect transistor S5 are connected to the CK_BAR signal terminal.

[0007] Optionally, the output circuit includes a Schmitt trigger, a first NOT gate, a second NOT gate and an inverter, the output end of the comparator is connected to the input end of the Schmitt trigger, one output signal of the Schmitt trigger is output as a CK_BAR signal via the first NOT gate, the CK_BAR signal is output as a CK signal via the second NOT gate, the output end of the first NOT gate is a CK_BAR signal end, the output end of the second NOT gate is a CK signal end, and another output signal of the Schmitt trigger is output via the inverter.

[0008] Optionally, it is characterized in that the capacitor C3 is a decoupling capacitor.

[0009] Optionally, the resistor R1 includes a positive temperature coefficient digitally controlled resistor array and a negative temperature coefficient digitally controlled resistor array, and the positive temperature coefficient digitally controlled resistor array and the negative temperature coefficient digitally controlled resistor array are connected in series.

[0010] Optionally, the current mirror circuit includes a field effect transistor M1, a field effect transistor M2, a field effect transistor M3, a field effect transistor M4, a field effect transistor M5 and a field effect transistor M6; The drain of the field effect transistor M5 is connected to the drains of the field effect transistor S1 and the field effect transistor S3 respectively, the drain of the field effect transistor M6 is connected to the drains of the field effect transistor S2 and the field effect transistor S4 respectively, the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6 are connected together, the drain of the field effect transistor M2 is connected to the source of the field effect transistor M5, the drain of the field effect transistor M3 is connected to the source of the field effect transistor M6, the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3 are connected together, the drain of the field effect transistor M1 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M1 is connected to the drain of the field effect transistor M4, and the sources of the field effect transistors M1, the field effect transistor M2 and the field effect transistor M3 are connected to the power supply circuit.

[0011] Optionally, the PATA current source circuit includes a PATA current source and a resistor R2, one end of the PATA current source is grounded, the other end of the PATA current source is connected to one end of the resistor R2, the node between the resistor R2 and the PATA current source is respectively connected to the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6, the other end of the resistor R2 is connected to the drain of the field effect transistor M4, and the other end of the resistor R2 is connected to the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3.

[0012] Optionally, the power supply circuit includes a voltage reference source and a low-dropout voltage regulator, and the output end of the voltage reference source is connected to the input end of the low-dropout voltage regulator.

[0013] Optionally, the voltage reference source is an ultra-low power consumption voltage reference source based on subthreshold region transistors.

[0014] In a second aspect, an embodiment of the present invention further provides an electronic device, using the low temperature coefficient and low power consumption on-chip 32.768kHz oscillator as described in any one of the first aspects.

[0015] The present invention provides a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator and electronic equipment. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator replaces the existing crystal by an electronic circuit, and can integrate the clock circuit into the circuit, thereby achieving the purpose of improving integration and reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other objects, features and advantages of the present invention will become more apparent through a more detailed description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, wherein like reference numerals generally represent like components throughout the exemplary embodiments of the present invention.

[0017] Figure 1 The electronic circuit diagram of the low temperature coefficient and low power consumption on-chip 32.768kHz oscillator disclosed in the embodiment of the present invention; Figure 2 It is a principle block diagram of a power supply circuit disclosed in an embodiment of the present invention; Figure 3 This is a working timing diagram of a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator disclosed in an embodiment of the present invention; Figure 4 This is a working flow chart of a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0019] It should be clear that the following embodiments of the present invention are described by specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present invention.

[0020] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. It should be understood by those skilled in the art based on the invention that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0021] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention. The illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0022] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects described may be practiced without these specific details.

[0023] The clock circuit in the prior art is provided by an external crystal, which takes up additional space.

[0024] For ease of understanding, Figure 1 As shown, this embodiment discloses a low temperature coefficient and low power consumption on-chip 32.768kHz oscillator, including: a power supply circuit, a current mirror circuit, a PATA current source circuit, an oscillation circuit and an output circuit; the output end of the power supply circuit is connected to one input end of the current mirror circuit, the PATA current source circuit is connected to the other input end of the current mirror circuit, the output end of the current mirror circuit is connected to the input end of the oscillation circuit, the output end of the oscillation circuit is connected to the output circuit, and the CK signal end and CK_BAR signal end of the output circuit are connected to the oscillation circuit.

[0025] Optionally, the oscillation circuit includes a field effect tube S1, a field effect tube S2, a field effect tube S3, a field effect tube S4, a field effect tube S5, a field effect tube S6 and a comparator, the source of the field effect tube S1 is connected to the drain of the field effect tube S5, the capacitor C1 is connected between the drain and the source of the field effect tube S5, the source of the field effect tube S5 is grounded, the source of the field effect tube S3 is connected to the source of the field effect tube S4, a resistor R1 is connected in series between the node between the source of the field effect tube S3 and the source of the field effect tube S4 and the ground, the capacitor C3 is connected in parallel with the resistor R1, and the field effect tube S1 is connected to the drain of the field effect tube S5. The source of the field effect transistor S2 is connected to the drain of the field effect transistor S6, the capacitor C2 is connected between the drain and the source of the field effect transistor S6, the source of the field effect transistor S6 is grounded, the drains of the field effect transistor S1 and the field effect transistor S3 are respectively connected to the non-inverting input terminal of the comparator, the drains of the field effect transistor S2 and the field effect transistor S4 are respectively connected to the inverting input terminal of the comparator, the gates of the field effect transistor S1, the field effect transistor S4 and the field effect transistor S6 are connected to the CK_BAR signal terminal, and the gates of the field effect transistor S2, the field effect transistor S3 and the field effect transistor S5 are connected to the CK_BAR signal terminal.

[0026] Optionally, the output circuit includes a Schmitt trigger, a first NOT gate, a second NOT gate and an inverter, the output end of the comparator is connected to the input end of the Schmitt trigger, one output signal of the Schmitt trigger is output as a CK_BAR signal via the first NOT gate, the CK_BAR signal is output as a CK signal via the second NOT gate, the output end of the first NOT gate is a CK_BAR signal end, the output end of the second NOT gate is a CK signal end, and another output signal of the Schmitt trigger is output via the inverter.

[0027] Optionally, it is characterized in that the capacitor C3 is a decoupling capacitor.

[0028] Optionally, the resistor R1 includes a positive temperature coefficient digitally controlled resistor array and a negative temperature coefficient digitally controlled resistor array, and the positive temperature coefficient digitally controlled resistor array and the negative temperature coefficient digitally controlled resistor array are connected in series.

[0029] Optionally, the current mirror circuit includes a field effect transistor M1, a field effect transistor M2, a field effect transistor M3, a field effect transistor M4, a field effect transistor M5 and a field effect transistor M6; The drain of the field effect transistor M5 is connected to the drains of the field effect transistor S1 and the field effect transistor S3 respectively, the drain of the field effect transistor M6 is connected to the drains of the field effect transistor S2 and the field effect transistor S4 respectively, the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6 are connected together, the drain of the field effect transistor M2 is connected to the source of the field effect transistor M5, the drain of the field effect transistor M3 is connected to the source of the field effect transistor M6, the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3 are connected together, the drain of the field effect transistor M1 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M1 is connected to the drain of the field effect transistor M4, and the sources of the field effect transistors M1, the field effect transistor M2 and the field effect transistor M3 are connected to the power supply circuit.

[0030] Optionally, the PATA current source circuit includes a PATA current source and a resistor R2, one end of the PATA current source is grounded, the other end of the PATA current source is connected to one end of the resistor R2, the node between the resistor R2 and the PATA current source is respectively connected to the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6, the other end of the resistor R2 is connected to the drain of the field effect transistor M4, and the other end of the resistor R2 is connected to the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3.

[0031] like Figure 2 As shown, the power supply circuit includes a voltage reference source and a low-dropout voltage regulator, and the output end of the voltage reference source is connected to the input end of the low-dropout voltage regulator.

[0032] Optionally, the voltage reference source is an ultra-low power consumption voltage reference source based on subthreshold region transistors.

[0033] like Figure 1 , Figure 3 and Figure 4 As shown, the oscillator works as follows: 1. The voltage reference source and LDO are powered on to provide the oscillator with operating power and reference current; 2. The PATA current source generates the charging current I1 and current I2 required by the oscillator and I1=I2=I, that is, the current values ​​of current I1 and current I2 are the same, and the charging capacitors of the two charging branches are capacitors C1 and capacitor C2 respectively and C1=C2=C, that is, the capacitance values ​​of capacitors C1 and C2 are the same; 3. When CK=0, CK_BAR=1, FET S1, FET S4 and FET S6 are turned on, current I2 flows through S4 and resistor R1 to generate IR voltage at point V2, and at the same time, the mirror current I1 of the same size matches the capacitor C1 through FET S1, and FET S6 resets the voltage of the capacitor C2 node to 0. In this way, when the voltage of node V1 exceeds the voltage IR+Vos of node V2 after passing through RC, CK changes from 0 to 1, and the comparator output flips; 4. After the output level of the comparator is flipped through process 3, CK=1, CK_BAR=0. At this time, field effect transistors S2, S3 and S5 are turned on, and field effect transistor S5 will reset the voltage of capacitor C1 node to 0. The voltage of the two input nodes of the comparator is switched from the positive terminal connected to capacitor C1 and the negative terminal connected to IR in process 3 to the positive terminal connected to IR and the negative terminal connected to capacitor C2. The current mirror charges capacitor C2 through I2 so that node V2 is charged from voltage 0 after RC time and exceeds the voltage IR-Vos of node V1, causing the comparator output to flip again. 5. After process 4, it returns to the state of process 3. The circuit state repeats processes 3 and 4 to achieve the output oscillation clock output. Processes 3 and 4 realize an output clock cycle. The fixed voltage IR can complete a switching operation at the positive and negative ends of the comparator input in one cycle. Then, the two capacitor charging voltages are compared with the fixed voltage, and the two charging voltages that flip the comparator are IR+Vos and IR-Vos, respectively. This realizes that the oscillator output frequency is accurately related to the 2RC=(IR+Vos)+(IR-Vos) time constant, eliminating the influence of the comparator Vos; 6. After the oscillator is started, accurate frequency calibration can be achieved through a 10-bit digitally controlled resistor array.

[0034] In the above RC, R is the resistance value of resistor R1, and C is the capacitance value of capacitor C1 or capacitor C2. The resistance value of R1 is controlled by 10 bits to facilitate the system to automatically calibrate it to meet the accuracy requirements of the oscillator frequency.

[0035] The low temperature coefficient and low power consumption on-chip 32.768 kHz oscillator of the present embodiment can be realized using a standard CMOS process.

[0036] The voltage reference source implemented by ultra-low power transistors working in the subthreshold region provides a reference voltage with a temperature coefficient close to zero and a current with a positive temperature coefficient (PTAT) for the low dropout regulator (LDO). The LDO circuit design is also based on the low power design of transistors working in the subthreshold region. In order to achieve the low power oscillator, the current mirror current is at the nA level. Since the oscillator operating frequency is at kHz, the comparator and Schmitt trigger currents are both at the nA level. In this way, the overall oscillator power consumption is controlled at the nA level.

[0037] By using a reference voltage with a temperature coefficient close to zero and an LDO to power the oscillator, the oscillator can operate within a larger supply voltage range, which is more conducive to the application of low-power portable devices.

[0038] Usually the comparator has a fixed input offset voltage Vos that is sensitive to temperature. In order to prevent Vos from affecting the oscillation frequency, the oscillator has two charging capacitor branch nodes and a fixed IR voltage node. By comparing the IR node voltage and the C1 C2 capacitor node voltage through the output signal phase control, the positive and negative inputs of the comparator are switched in one cycle, which can eliminate the influence of the Vos voltage on the oscillation frequency.

[0039] In order to achieve a more accurate frequency, a 10-bit control word digital control resistor array is used to make the oscillation calibration accuracy lower than 10Hz. At the same time, the digital control resistor array selects two groups of resistors with opposite temperature coefficients in series to achieve a lower temperature coefficient.

[0040] The main performance indicators of the oscillator disclosed in this implementation are: Suitable for a wide range of power supply voltages from 1V to 5V; temperature coefficient 0.3±% (-40 to 130°C); overall power consumption 300nA; resistor array frequency calibration accuracy 10Hz.

[0041] Ultra-low power consumption: Uses voltage reference, LDO, and comparator based on subthreshold transistor structure to achieve overall nA level power consumption; Low temperature coefficient: The oscillator supply voltage and reference current source are provided by a voltage reference source and LDO with a temperature coefficient close to zero; Eliminate comparator offset voltage Vos: The fixed voltage IR can complete a switching operation at the positive and negative ends of the input comparator in one cycle, and the charging node voltage can complete a switching operation at the positive and negative ends of the comparator input in one cycle, thereby achieving an oscillator output frequency that is accurately related to the 2RC=(IR+Vos)+(IR-Vos) time constant, eliminating the influence of the comparator Vos; Temperature coefficient complementary resistor array: Two sets of resistor types with opposite temperature coefficients connected in series achieve a lower temperature coefficient.

[0042] The low temperature coefficient is achieved by using a voltage reference source with a temperature coefficient close to zero and an LDO as the oscillator power supply voltage and reference current source. At the same time, the comparator switches the input voltage within one oscillation cycle to prevent the input offset voltage of the comparator from affecting the output frequency.

[0043] The low power design uses a voltage reference source and comparator based on subthreshold transistors to control its power consumption to nA level. Two capacitor charging branches generate V1 V2 node voltages and an IR reference voltage branch.

[0044] This implementation can be applied in low-power design and IoT-related applications, such as smart wearables, smart furniture, smart locks, smart speakers, smart home appliances, in-vehicle networking devices, and various wireless sensor networks to provide a sleep and wake-up timing clock for the system.

[0045] This embodiment also discloses an electronic device, which uses the low temperature coefficient and low power consumption on-chip 32.768kHz oscillator disclosed in this embodiment.

[0046] Electronic devices include smart wearables, smart furniture, smart locks, smart speakers, smart home appliances, medical equipment, industrial control systems, automotive applications, low-power designs and Internet of Things (IOT) devices.

[0047] The basic principle of the present invention is described above in conjunction with specific embodiments. However, it should be pointed out that the advantages, strengths, effects, etc. mentioned in the present invention are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. must be possessed by each embodiment of the present invention. In addition, the specific details disclosed above are only for the purpose of illustration and facilitation of understanding, rather than limitation, and the above details do not limit the present invention to being implemented by adopting the above specific details.

[0048] In the present invention, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Words such as "including", "comprising", "having", etc. are open words, meaning "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used herein refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to", and can be used interchangeably with it.

[0049] Additionally, as used herein, "or" used in a list of items beginning with "at least one" indicates a separate list, so that, for example, a list of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not mean that the example described is preferred or better than other examples.

[0050] Various changes, substitutions and alterations may be made to the techniques described herein without departing from the teachings as defined by the appended claims.

[0051] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present invention. Therefore, the present invention is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0052] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present invention to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A low temperature coefficient and low power consumption on-chip 32.768kHz oscillator, characterized in that: include: A power supply circuit, a current mirror circuit, a PATA current source circuit, an oscillation circuit and an output circuit; the output end of the power supply circuit is connected to an input end of the current mirror circuit, the PATA current source circuit is connected to the other input end of the current mirror circuit, the output end of the current mirror circuit is connected to the input end of the oscillation circuit, the output end of the oscillation circuit is connected to the output circuit, and the CK signal end and the CK_BAR signal end of the output circuit are connected to the oscillation circuit.

2. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 1, characterized in that: The oscillation circuit includes a field effect tube S1, a field effect tube S2, a field effect tube S3, a field effect tube S4, a field effect tube S5, a field effect tube S6 and a comparator, the source of the field effect tube S1 is connected to the drain of the field effect tube S5, the capacitor C1 is connected between the drain and the source of the field effect tube S5, the source of the field effect tube S5 is grounded, the source of the field effect tube S3 is connected to the source of the field effect tube S4, a node between the source of the field effect tube S3 and the source of the field effect tube S4 is connected in series with a resistor R1, the capacitor C3 is connected in parallel with the resistor R1, and the field effect tube The source of S2 is connected to the drain of the field effect transistor S6, the capacitor C2 is connected between the drain and source of the field effect transistor S6, the source of the field effect transistor S6 is grounded, the drains of the field effect transistor S1 and the field effect transistor S3 are respectively connected to the non-inverting input terminal of the comparator, the drains of the field effect transistor S2 and the field effect transistor S4 are respectively connected to the inverting input terminal of the comparator, the gates of the field effect transistors S1, S4 and S6 are connected to the CK_BAR signal terminal, and the gates of the field effect transistors S2, S3 and S5 are connected to the CK_BAR signal terminal.

3. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 2, characterized in that: The output circuit includes a Schmitt trigger, a first NOT gate, a second NOT gate and an inverter. The output end of the comparator is connected to the input end of the Schmitt trigger. One output signal of the Schmitt trigger outputs a CK_BAR signal through the first NOT gate, and the CK_BAR signal outputs a CK signal through the second NOT gate. The output end of the first NOT gate is a CK_BAR signal end, the output end of the second NOT gate is a CK signal end, and the other output signal of the Schmitt trigger is output through the inverter.

4. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 2, characterized in that: The capacitor C3 is a decoupling capacitor.

5. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 2, characterized in that: The resistor R1 includes a positive temperature coefficient digitally controlled resistor array and a negative temperature coefficient digitally controlled resistor array, and the positive temperature coefficient digitally controlled resistor array and the negative temperature coefficient digitally controlled resistor array are connected in series.

6. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 2, characterized in that: The current mirror circuit includes a field effect transistor M1, a field effect transistor M2, a field effect transistor M3, a field effect transistor M4, a field effect transistor M5 and a field effect transistor M6; The drain of the field effect transistor M5 is connected to the drains of the field effect transistor S1 and the field effect transistor S3 respectively, the drain of the field effect transistor M6 is connected to the drains of the field effect transistor S2 and the field effect transistor S4 respectively, the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6 are connected together, the drain of the field effect transistor M2 is connected to the source of the field effect transistor M5, the drain of the field effect transistor M3 is connected to the source of the field effect transistor M6, the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3 are connected together, the drain of the field effect transistor M1 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M1 is connected to the drain of the field effect transistor M4, and the sources of the field effect transistors M1, the field effect transistor M2 and the field effect transistor M3 are connected to the power supply circuit.

7. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 6, characterized in that: The PATA current source circuit includes a PATA current source and a resistor R2, one end of the PATA current source is grounded, the other end of the PATA current source is connected to one end of the resistor R2, the node between the resistor R2 and the PATA current source is respectively connected to the gates of the field effect transistor M4, the field effect transistor M5 and the field effect transistor M6, the other end of the resistor R2 is connected to the drain of the field effect transistor M4, and the other end of the resistor R2 is connected to the gates of the field effect transistor M1, the field effect transistor M2 and the field effect transistor M3.

8. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 1, characterized in that: The power supply circuit comprises a voltage reference source and a low-dropout voltage regulator, wherein the output end of the voltage reference source is connected to the input end of the low-dropout voltage regulator.

9. The low temperature coefficient and low power consumption on-chip 32.768kHz oscillator according to claim 8, characterized in that: The voltage reference source is an ultra-low power consumption voltage reference source based on subthreshold region transistors.

10. An electronic device, characterized in that: Use the low temperature coefficient and low power consumption on-chip 32.768kHz oscillator as claimed in any one of claims 1 to 9.

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