Strain active layer, preparation method of strain active layer, semiconductor light-emitting structure and preparation method of semiconductor light-emitting structure
By arranging quantum well layers and barrier layers of specific materials and structures in the strained active layer, and using high-temperature growth technology to increase tensile strain, the problem of insufficient crystal quality and performance stability of the strained active layer is solved, and higher performance is achieved. reliability and broadened application range.
Patent Information
- Application Number
- CN202411844952.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-01-21
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
How to improve the crystal quality and performance stability of the strained active layer including the large stress sub-well layer, and thus improve reliability.
By arranging a first combined barrier layer, a quantum well layer and a second combined barrier layer in the strained active layer, the material of the quantum well layer is Inb(Ga1-aAla)1-bAs, b is greater than or equal to 0.1, and the first combined barrier layer is used. The high-temperature growth technology of the first barrier layer and the third barrier layer increases the proportion of P to obtain a larger tensile strain and balance the larger compressive strain of the quantum well layer.
It improves the crystal quality and performance stability of the strained active layer, broadens the application range of the quantum well layer, increases the switching speed of the semiconductor structure, and can adjust the emission wavelength, thereby enhancing reliability.
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Figure CN119342954A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a strained active layer and a preparation method thereof, a semiconductor light-emitting structure and a preparation method thereof. Background Art
[0002] Semiconductor light-emitting devices are devices that use certain semiconductor materials as working materials to produce stimulated emission. Their working principle is: through a certain excitation method, a particle population inversion of non-equilibrium carriers is achieved between the energy bands (conduction band and valence band) of the semiconductor material, or between the energy bands of the semiconductor material and the energy levels of impurities (acceptor or donor). When a large number of electrons in the particle population inversion state recombine with holes, stimulated emission occurs. Semiconductor light-emitting devices are widely used due to their small size and high electro-optical conversion efficiency.
[0003] However, how to improve the crystal quality and performance stability of the strained active layer including the large stress quantum well layer, and thus improve the reliability, is a technical problem that needs to be solved. Summary of the invention
[0004] Therefore, the technical problem to be solved by the present invention is how to improve the crystal quality and performance stability of the strained active layer including the large stress quantum well layer, thereby improving the reliability, thereby providing a strained active layer and a preparation method thereof, a semiconductor light-emitting structure and a preparation method thereof.
[0005] The present invention provides a strained active layer, comprising: a first combined barrier layer, a quantum well layer, and a second combined barrier layer stacked along a first direction, wherein the quantum well layer is located between the first combined barrier layer and the second combined barrier layer, and the material of the quantum well layer is In b (Ga 1-a Al a ) 1-b As, b is greater than or equal to 0.1; wherein the first combined barrier layer includes a first barrier layer and a second barrier layer stacked along a first direction, the second barrier layer is located on both sides of the first barrier layer, and the energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer; wherein the second combined barrier layer includes a third barrier layer and a fourth barrier layer stacked along the first direction, the fourth barrier layer is located on both sides of the third barrier layer, and the energy band gap of the fourth barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer; wherein the material of the first barrier layer and the third barrier layer is Al c Ga 1-c As 1-d P d , the material of the second barrier layer and the material of the fourth barrier layer are Al f Ga1-f As.
[0006] Optionally, a is greater than zero and less than or equal to 0.2, and b is greater than or equal to 0.1 and less than or equal to 0.45.
[0007] Optionally, a is greater than zero and less than or equal to 0.1, and b is greater than or equal to 0.14 and less than or equal to 0.35.
[0008] Optionally, c is greater than zero and less than or equal to 0.35, and d is greater than zero and less than or equal to 0.3.
[0009] Optionally, f is greater than zero and less than or equal to 0.5.
[0010] Optionally, the thickness of the first barrier layer is greater than or equal to twice the thickness of the quantum well layer, and the thickness of the third barrier layer is greater than or equal to twice the thickness of the quantum well layer.
[0011] Optionally, there are multiple quantum well layers, each of which is located between the first combined barrier layer and the second combined barrier layer, the first combined barrier layer is located between a portion of adjacent quantum well layers, and the second combined barrier layer is located between another portion of adjacent quantum well layers.
[0012] The present application also provides a method for preparing a strained active layer, comprising: forming a first combined barrier layer, a quantum well layer, and a second combined barrier layer stacked along a first direction, wherein the quantum well layer is located between the first combined barrier layer and the second combined barrier layer, and the material of the quantum well layer is In b (Ga 1-a Al a ) 1-b As, b is greater than or equal to 0.1; wherein the step of forming the first combined barrier layer comprises: forming a first barrier layer and a second barrier layer stacked along a first direction, the second barrier layer is located on both sides of the first barrier layer, the energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer; the process temperature for forming the first barrier layer is greater than the process temperature for forming the quantum well layer; wherein the step of forming the second combined barrier layer comprises: forming a third barrier layer and a fourth barrier layer stacked along the first direction, the fourth barrier layer is located on both sides of the third barrier layer, the energy band gap of the fourth barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer; the process temperature for forming the third barrier layer is greater than the process temperature for forming the quantum well layer; wherein the material of the first barrier layer and the third barrier layer is Al c Ga 1-c As 1-d Pd , the material of the second barrier layer and the material of the fourth barrier layer are Al f Ga 1-f As.
[0013] Optionally, the process temperature for forming the second barrier layer between the quantum well layer and the first barrier layer is lower than the process temperature for forming the first barrier layer; and the process temperature for forming the fourth barrier layer between the quantum well layer and the third barrier layer is lower than the process temperature for forming the third barrier layer.
[0014] The present application also provides a semiconductor light-emitting structure, comprising: a semiconductor substrate layer; a first confinement layer, located on one side of the semiconductor substrate layer; a first waveguide layer, located on a side of the first confinement layer away from the semiconductor substrate layer; the strained active layer of the present application, the strained active layer is located on a side of the first waveguide layer away from the first confinement layer; a second waveguide layer, located on a side of the strained active layer away from the first waveguide layer; and a second confinement layer, located on a side of the second waveguide layer away from the strained active layer.
[0015] Optionally, the quantum well layer is under compressive strain relative to the semiconductor substrate layer, and the first barrier layer and the third barrier layer are under tensile strain relative to the semiconductor substrate layer.
[0016] The present application also provides a method for preparing a semiconductor light-emitting structure, including: a method for preparing the strained active layer of the present application; the method for preparing the semiconductor light-emitting structure also includes: before forming the strained active layer, sequentially forming a first confinement layer and a first waveguide layer on one side of a semiconductor substrate layer; and sequentially forming a second waveguide layer and a second confinement layer on a side of the strained active layer away from the first waveguide layer.
[0017] The technical solution of this application has the following technical effects: The strained active layer and semiconductor light-emitting structure of the technical solution of the present application, the material of the quantum well layer is In b (Ga 1- a Al a ) 1-bAs, b is greater than or equal to 0.1, and the In content in the quantum well layer is relatively high, which can make the quantum well layer have a large strain. The strained active layer is applied to the semiconductor structure of optical communication to improve the switching speed of the semiconductor structure; and the Al element in the quantum well layer can adjust the luminescence wavelength of the strained active layer. The more Al elements in the quantum well layer, the more the luminescence wavelength of the strained active layer tends to decrease, and the more In elements in the quantum well layer, the more the luminescence wavelength of the strained active layer tends to increase. The Al element and the In element in the quantum well layer can jointly adjust the luminescence wavelength of the strained active layer, which can broaden the luminescence wavelength range of the strained active layer; and the strained active layer can be adjusted to have different stresses under a certain wavelength. For the quantum well layer with large stress of the above-mentioned material, a first combined barrier layer and a second combined barrier layer are arranged on both sides of the quantum well layer. The first combined barrier layer includes a first barrier layer and a second barrier layer stacked along a first direction, and the second barrier layer is located on both sides of the first barrier layer. The energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer. The second barrier layer located between the first barrier layer and the quantum well layer can protect the first barrier layer, so that the first barrier layer can be grown at a higher temperature, so that the first barrier layer can obtain a larger tensile strain by increasing the proportion of P, thereby balancing the quantum well layer with a larger compressive strain. This broadens the scope of application of the quantum well layer. Growing the first barrier layer at high temperature improves the decomposition efficiency of the gas used to grow the first barrier layer, reduces the difficulty of interface switching between the first combined barrier layer and the quantum well layer, and improves the interface quality between the first combined barrier layer and the quantum well layer. The second barrier layer below the first barrier layer is also used as a matrix layer for growing the first barrier layer to improve the crystal quality of the first barrier layer. In addition, the second combined barrier layer includes a third barrier layer and a fourth barrier layer stacked along a first direction, the fourth barrier layer is located on both sides of the third barrier layer, and the energy band gap of the fourth barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer. The fourth barrier layer located between the third barrier layer and the quantum well layer can protect the third barrier layer, so that the third barrier layer can be grown at a higher temperature, so that the third barrier layer can obtain a larger tensile strain by increasing the proportion of P, thereby balancing the quantum well layer with a larger compressive strain. This broadens the application range of the quantum well layer. Growing the third barrier layer at high temperature improves the decomposition efficiency of the gas used to grow the third barrier layer, reduces the difficulty of interface switching between the second combined barrier layer and the quantum well layer, and improves the interface quality between the second combined barrier layer and the quantum well layer. The fourth barrier layer below the third barrier layer is used as a matrix layer for growing the third barrier layer to improve the crystal quality of the third barrier layer. In summary, the crystal quality of the strained active layer including the large stress quantum well layer is improved, the performance stability is improved, and the reliability is improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0019] Figure 1 is a schematic diagram of a strained active layer according to an embodiment of the present application; Figure 2 is a schematic diagram of a strained active layer according to another embodiment of the present application; Figures 3 to 5 It is a structural schematic diagram of a process for preparing a strained active layer in one embodiment of the present application; Figure 6 A schematic diagram of a semiconductor light emitting structure according to an embodiment of the present application; Figure 7 XRD (X-ray diffraction) spectrum of the strained active layer of the comparative example; Figure 8 This is the XRD (X-ray diffraction) spectrum of the strained active layer of the test example. DETAILED DESCRIPTION
[0020] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0021] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0022] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0023] An embodiment of the present invention provides a strained active layer, referring to Figure 1 and 2 ,include: A first combined barrier layer 100, a quantum well layer 300, and a second combined barrier layer 200 are stacked along a first direction, wherein the quantum well layer 300 is located between the first combined barrier layer 100 and the second combined barrier layer 200, and the material of the quantum well layer 300 is In b (Ga 1-a Al a ) 1-b As, b is greater than or equal to 0.1; The first combined barrier layer 100 includes a first barrier layer 101 and a second barrier layer 102 stacked along a first direction, the second barrier layer 102 is located between two sides of the first barrier layer 101, and the energy band gap of the second barrier layer 102 is greater than the energy band gap of the quantum well layer 300 and less than or equal to the energy band gap of the first barrier layer 101; The second combined barrier layer 200 includes a third barrier layer 201 and a fourth barrier layer 202 stacked along a first direction, the fourth barrier layer 202 is located on both sides of the third barrier layer 201, and the energy band gap of the fourth barrier layer 202 is greater than the energy band gap of the quantum well layer 300 and less than or equal to the energy band gap of the third barrier layer 201; The material of the first barrier layer 101 and the third barrier layer 201 is Al c Ga 1-c As 1-d P d The material of the second barrier layer 102 and the material of the fourth barrier layer 202 are Al f Ga 1-f As.
[0024] The strained active layer and quantum well layer 300 of this embodiment are made of In b (Ga 1-a Al a ) 1-b As, b is greater than or equal to 0.1, and the In content in the quantum well layer 300 is relatively high, which can make the quantum well layer 300 have a larger strain. The strained active layer is applied to the semiconductor structure of optical communication to improve the switching speed of the semiconductor structure; and the Al element in the quantum well layer 300 can adjust the light-emitting wavelength of the strained active layer. The more Al elements in the quantum well layer 300, the lighter the light-emitting wavelength of the strained active layer tends to be, and the more In elements in the quantum well layer 300, the lighter the light-emitting wavelength of the strained active layer tends to be, and the Al element and the In element in the quantum well layer 300 can jointly adjust the light-emitting wavelength of the strained active layer, so that the light-emitting wavelength range of the strained active layer can be broadened; and when the strained active layer has a certain wavelength, the strained active layer can be adjusted to have different stresses.
[0025] A first combined barrier layer 100 and a second combined barrier layer 200 are arranged on both sides of the quantum well layer 300. The first combined barrier layer 100 includes a first barrier layer 101 and a second barrier layer 102 stacked along a first direction, wherein the second barrier layer 102 is located on both sides of the first barrier layer 101, and the energy band gap of the second barrier layer 102 is greater than the energy band gap of the quantum well layer 300 and less than or equal to the energy band gap of the first barrier layer 101. The second barrier layer 102 located between the first barrier layer 101 and the quantum well layer 300 can protect the first barrier layer 101, so that the first barrier layer 101 can be grown at a higher temperature, so that the first barrier layer 101 can obtain a larger tensile strain by increasing the proportion of P, thereby balancing the quantum well layer 300 with a larger compressive strain. This broadens the application range of the quantum well layer 300. The first barrier layer 101 is grown at a high temperature, so that the decomposition efficiency of the gas used to grow the first barrier layer 101 is improved, the difficulty of interface switching between the first combined barrier layer 100 and the quantum well layer 300 is reduced, and the interface quality between the first combined barrier layer 100 and the quantum well layer 300 is improved. The second barrier layer 102 below the first barrier layer 101 is also used as a matrix layer for growing the first barrier layer 101, thereby improving the crystal quality of the first barrier layer 101. In addition, the second combined barrier layer 200 includes a third barrier layer 201 and a fourth barrier layer 202 stacked along a first direction, the fourth barrier layer 202 is located on both sides of the third barrier layer 201, and the energy band gap of the fourth barrier layer 202 is greater than the energy band gap of the quantum well layer 300 and less than or equal to the energy band gap of the third barrier layer 201. The fourth barrier layer 202 located between the third barrier layer 201 and the quantum well layer 300 can protect the third barrier layer 201, so that the third barrier layer 201 can be grown at a higher temperature, so that the third barrier layer 201 can obtain a larger tensile strain by increasing the proportion of P, thereby balancing the quantum well layer 300 with a larger compressive strain. This broadens the application range of the quantum well layer 300. Growing the third barrier layer 201 at high temperature improves the decomposition efficiency of the gas used to grow the third barrier layer 201, reduces the difficulty of interface switching between the second combined barrier layer 200 and the quantum well layer 300, and improves the interface quality between the second combined barrier layer 200 and the quantum well layer 300. The fourth barrier layer 202 below the third barrier layer 201 is used as a matrix layer for growing the third barrier layer 201, thereby improving the crystal quality of the third barrier layer 201. In summary, the crystal quality of the strained active layer is high, the performance is stable, and the reliability is improved.
[0026] In the present application, the periodic thickness of the strained active layer is tested by the peak intensity of XRD, which indicates that the crystal quality of the strained active layer is high and the performance is stable.
[0027] The periodic thickness of the strained active layer is the sum of 1 / 2 of the thickness of the first combined barrier layer 100 , the thickness of the quantum well layer 300 , and 1 / 2 of the thickness of the second combined barrier layer 200 .
[0028] In one embodiment, a is greater than zero and less than or equal to 0.2, and b is greater than or equal to 0.1 and less than or equal to 0.45. Preferably, a is greater than zero and less than or equal to 0.1, and preferably, b is greater than or equal to 0.14 and less than or equal to 0.35, such as 0.14, 0.16, 0.18, 0.2, 0.25, 0.3 or 0.35.
[0029] In one embodiment, c is greater than zero and less than or equal to 0.35, and d is greater than zero and less than or equal to 0.3, such as 0.1, 0.2 or 0.3.
[0030] In one embodiment, f is greater than zero and less than or equal to 0.5.
[0031] In one embodiment, the thickness of the first barrier layer 101 is greater than or equal to 2 times the thickness of the quantum well layer 300, and the thickness of the third barrier layer 201 is greater than or equal to 2 times the thickness of the quantum well layer 300. The thickness of the first barrier layer 101 and the proportion of P in the first barrier layer 101 both contribute to the strain of the first barrier layer 101. The greater the thickness of the first barrier layer 101, the proportion of P in the first barrier layer 101 can be relatively reduced, so that the proportion of P in the first barrier layer 101 is not too large, reducing the process difficulty. The thickness of the third barrier layer 201 and the proportion of P in the third barrier layer 201 both contribute to the strain of the third barrier layer 201. The greater the thickness of the third barrier layer 201, the proportion of P in the third barrier layer 201 can be relatively reduced, so that the proportion of P in the third barrier layer 201 is not too large, reducing the process difficulty.
[0032] In one embodiment, the energy band gap of the second barrier layer 102 is greater than the energy band gap of the quantum well layer 300 and less than the energy band gap of the first barrier layer 101 ; the energy band gap of the fourth barrier layer 202 is greater than the energy band gap of the quantum well layer 300 and less than the energy band gap of the third barrier layer 201 .
[0033] The quantum well layer 300 has a high In content and a large lattice constant, which causes the quantum well layer 300 to be subjected to biaxial compressive strain, thereby causing degeneration of the light and heavy hole bands in the quantum well layer 300. The separation of the light and heavy hole bands can effectively suppress Auger recombination and absorption between valence bands, thereby obtaining a lower threshold current density, a smaller linewidth enhancement factor, and a higher retarded oscillation frequency, modulation bandwidth, and differential gain coefficient. These characteristics make the quantum well layer 300 widely used in lasers, optoelectronic special detectors, solar cells and other fields, especially in long-wavelength lasers, optical communication lasers and other fields. With the expansion of applications, such as the application requirements of longer wavelengths and higher switching rate communication lasers, it is necessary to grow a quantum well layer with greater strain, which puts higher requirements on the epitaxial growth of the quantum well layer 300. In the present application, the first barrier layer 101 and the third barrier layer 201 are used to obtain a greater tensile strain by increasing the proportion of P, so as to balance the quantum well layer 300 with a greater compressive strain.
[0034] This embodiment also avoids excessive local stress when the quantum well layer and the first barrier layer 101 and the quantum well layer and the third barrier layer 201 are in direct contact.
[0035] Figure 1 In the figure, a strained active layer including a first combined barrier layer 100, a quantum well layer 300 and a second combined barrier layer 200 is taken as an example.
[0036] Figure 2 In the example, a strained active layer includes a plurality of quantum well layers 300, each of the quantum well layers 300 is located between the first combined barrier layer 100 and the second combined barrier layer 200, a portion of adjacent quantum well layers 300 have the first combined barrier layer 100 between them, and another portion of adjacent quantum well layers 300 have the second combined barrier layer 200 between them.
[0037] In other embodiments, there are multiple quantum well layers 300, multiple first combination barrier layers 100, and one second combination barrier layer 200; or, there are multiple quantum well layers 300, multiple second combination barrier layers 200, and one first combination barrier layer 100.
[0038] The comparative example provides a strained active layer, which includes a plurality of barrier layers and a plurality of quantum well layers, wherein the barrier layers and the quantum well layers are alternately stacked, and the material of the barrier layers is Al 0.15 Ga 0.85 As 0.88 P 0.12 , the material of the quantum well layer is In 0.3 Ga 0.65 Al 0.05As.
[0039] The test example provides a strained active layer, which includes a stacked first combined barrier layer 100, a quantum well layer 300 and a second combined barrier layer 200, wherein the material of the quantum well layer 300 is In 0.3 Ga 0.65 Al 0.05 As, the first combined barrier layer 100 includes a first barrier layer 101 and a second barrier layer 102, and the second combined barrier layer 200 includes a third barrier layer 201 and a fourth barrier layer 202 stacked along a first direction, and the materials of the first barrier layer 101 and the third barrier layer 201 are Al 0.15 Ga 0.85 As 0.88 P 0.12 The material of the second barrier layer 102 and the material of the fourth barrier layer 202 are Al 0.15 Ga 0.85 As.
[0040] The strained active layer of the comparative example is grown at 550°C with 6 barrier layers and 6 quantum well layers. Figure 7 The XRD (X-ray diffraction) spectrum of the strained active layer of the comparative example is shown in Figure 2. Figure 7 The horizontal axis is θ, 2θ is the diffraction angle of XRD test, Figure 7 The unit of the horizontal axis is arcsec, Figure 7 The vertical axis is the diffraction intensity. Intensity (cps) is a physics unit. The full name of CPS is "Counts Per Second", which means counts per second.
[0041] The number of quantum well layers 300 in the strained active layer of the test example is 6, the process temperature used by the quantum well layer 300 is 550 degrees Celsius, the process temperature of the first barrier layer 101 and the third barrier layer 201 is 650 degrees Celsius, and the material of the second barrier layer 102 and the process temperature of the fourth barrier layer 202 are 550 degrees Celsius. Figure 8 This is the XRD (X-ray diffraction) spectrum of the strained active layer of the test example. Figure 8 The horizontal axis is θ, 2θ is the diffraction angle of XRD test, Figure 8 The unit of the horizontal axis is arcsec, Figure 8 The vertical axis is the diffraction intensity. Intensity (cps) is a physics unit. The full name of CPS is "Counts Per Second", which means counts per second.
[0042] Comparing the XRD patterns of the test example and the comparative example, the strained active layer of the comparative example has no obvious satellite peaks, the process temperature of the barrier layer of the comparative example is lower than the process temperature of the first barrier layer 101 and the third barrier layer 201 of the test example, the tensile stress of the barrier layer of the comparative example is small, and it is difficult to effectively compensate for the stress of the quantum well lamination, resulting in the growth of a large stress quantum well layer (In 0.3 Ga 0.65 Al 0.05 As) relaxes, so that periodic satellite peaks can no longer appear in the XRD spectrum, that is, the quality of the strained active layer of the comparative example is poor and it is difficult to emit light. The satellite peaks of the XRD spectrum of the strained active layer of the test example are obvious, indicating that the quality of the strained active layer is good, the interface between the first combined barrier layer 100 and the quantum well layer 300 is clear, and the interface between the second combined barrier layer 200 and the quantum well layer 300 is clear, and it can emit light of the designed wavelength.
[0043] The present application also provides a method for preparing a strained active layer, comprising: forming a first combined barrier layer, a quantum well layer, and a second combined barrier layer stacked along a first direction, wherein the quantum well layer is located between the first combined barrier layer and the second combined barrier layer, and the material of the quantum well layer is In b (Ga 1-a Al a ) 1-b As, b is greater than or equal to 0.1; wherein the step of forming the first combined barrier layer comprises: forming a first barrier layer and a second barrier layer stacked along a first direction, the second barrier layer being located on both sides of the first barrier layer; the energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer; the process temperature for forming the first barrier layer is greater than the process temperature for forming the quantum well layer; wherein the step of forming the second combined barrier layer comprises: forming a third barrier layer and a fourth barrier layer stacked along the first direction, the fourth barrier layer being located on both sides of the third barrier layer, the energy band gap of the fourth barrier layer being greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer; the process temperature for forming the third barrier layer is greater than the process temperature for forming the quantum well layer; wherein the material of the first barrier layer and the third barrier layer is Al c Ga 1-c As 1-d P d , the material of the second barrier layer and the material of the fourth barrier layer are Al f Ga 1-f As.
[0044] In one embodiment, the process temperature for forming the second barrier layer between the quantum well layer and the first barrier layer is lower than the process temperature for forming the first barrier layer; the process temperature for forming the fourth barrier layer between the quantum well layer and the third barrier layer is lower than the process temperature for forming the third barrier layer.
[0045] Refer to the following Figures 3 to 5 The preparation process of the strained active layer is introduced in detail.
[0046] refer to Figure 3 , forming a first combined barrier layer 100 .
[0047] The step of forming the first combined barrier layer 100 includes: forming a first barrier layer 101 and a second barrier layer 102 stacked along a first direction, the second barrier layer 102 being located on both sides of the first barrier layer 101; the energy band gap of the second barrier layer 102 is less than or equal to the energy band gap of the first barrier layer 101. In one embodiment, the energy band gap of the second barrier layer 102 is smaller than the energy band gap of the first barrier layer 101 .
[0048] The process of forming the first barrier layer 101 and the second barrier layer 102 includes an epitaxial process.
[0049] In one embodiment, the process parameters for forming the second barrier layer 102 include: the reaction gases used include Ga source, Al source and arsine, and the growth temperature is 500 degrees Celsius to 600 degrees Celsius.
[0050] In one embodiment, the process parameters for forming the first barrier layer 101 include: the reaction gases used include Ga source, Al source, arsine and phosphine, and the growth temperature is 650 degrees Celsius to 750 degrees Celsius.
[0051] The process temperature for forming the first barrier layer 101 is higher than the process temperature for forming the subsequent quantum well layer. The higher process temperature for forming the first barrier layer 101 enables more effective thermal decomposition of phosphine, which can reduce the use of phosphine, improve the use efficiency of phosphine, reduce the difficulty of interface switching, and improve the interface quality.
[0052] In one embodiment, the process temperature for forming the second barrier layer 102 is lower than the process temperature for forming the first barrier layer.
[0053] refer to Figure 3 , forming a quantum well layer 300.
[0054] Specifically, the quantum well layer 300 is formed on one side of the first combined barrier layer 100 along the first direction.
[0055] The process temperature for forming the first barrier layer 101 is higher than the process temperature for forming the quantum well layer 300 . In other words, the process temperature for forming the quantum well layer 300 is lower than the process temperature for forming the first barrier layer 101 .
[0056] In one embodiment, the process temperature used to form the quantum well layer 300 is 500 degrees Celsius to 600 degrees Celsius.
[0057] refer to Figure 4 , forming a second combined barrier layer 200 .
[0058] The step of forming the second combined barrier layer 200 includes: forming a third barrier layer 201 and a fourth barrier layer 202 stacked along a first direction, wherein the fourth barrier layer 202 is located on both sides of the third barrier layer 201, and the energy band gap of the fourth barrier layer 202 is greater than the energy band gap of the quantum well layer 300 and less than or equal to the energy band gap of the third barrier layer 201; the process temperature for forming the third barrier layer 201 is greater than the process temperature for forming the quantum well layer 300.
[0059] In one embodiment, the energy band gap of the fourth barrier layer 202 is greater than the energy band gap of the quantum well layer 300 and less than the energy band gap of the third barrier layer 201 .
[0060] In one embodiment, the process temperature for forming the fourth barrier layer 202 is lower than the process temperature for forming the third barrier layer 201. The process temperature for forming the fourth barrier layer 202 is relatively low, so that during the process of forming the fourth barrier layer 202, the In segregation of the quantum well layer 300 to the fourth barrier layer 202 can be reduced, and the interface quality between the quantum well layer 300 and the fourth barrier layer 202 can be improved.
[0061] In one embodiment, the process temperature for forming the fourth barrier layer is equal to the process temperature for forming the quantum well layer, so that the chamber temperature does not need to be adjusted during the process of switching from the process of the quantum well layer to the process of the fourth barrier layer.
[0062] In other embodiments, the process temperature for forming the fourth barrier layer is greater than the process temperature for forming the quantum well layer.
[0063] In one embodiment, the process parameters for forming the fourth barrier layer 202 include: the reaction gases used include Ga source, Al source and arsine, and the growth temperature is 500 degrees Celsius to 600 degrees Celsius.
[0064] In one embodiment, the process parameters for forming the third barrier layer 201 include: the reaction gases used include Ga source, Al source, arsine and phosphine, and the growth temperature is 650 degrees Celsius to 750 degrees Celsius.
[0065] The process temperature for forming the third barrier layer 201 is relatively high, so that phosphine is thermally decomposed more effectively, the use of phosphine can be reduced, the use efficiency of phosphine can be improved, the difficulty of interface switching can be reduced, and the interface quality can be improved.
[0066] Another embodiment of the present application further provides a semiconductor light emitting structure, referring to Figure 5 , comprising: a semiconductor substrate layer 400; a first restriction layer 500, located on one side of the semiconductor substrate layer 400; a first waveguide layer 600, located on a side of the first restriction layer 500 away from the semiconductor substrate layer 400; the strained active layer of the present application, the strained active layer is located on a side of the first waveguide layer 600 away from the first restriction layer 500; a second waveguide layer 700, located on a side of the strained active layer away from the first waveguide layer 600; and a second restriction layer 800, located on a side of the second waveguide layer 700 away from the strained active layer.
[0067] Optionally, the quantum well layer 300 is under compressive strain relative to the semiconductor substrate layer 400 , and the first barrier layer 101 and the third barrier layer 201 are under tensile strain relative to the semiconductor substrate layer 400 .
[0068] The semiconductor substrate layer 400 includes a GaAs substrate.
[0069] Another embodiment of the present application also provides a method for preparing a semiconductor light-emitting structure, including: the method for preparing the above-mentioned strained active layer; the method for preparing the semiconductor light-emitting structure also includes: before forming the strained active layer, sequentially forming a first confinement layer and a first waveguide layer on one side of a semiconductor substrate layer; and sequentially forming a second waveguide layer and a second confinement layer on a side of the strained active layer away from the first waveguide layer.
[0070] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.
Claims
1. A strained active layer, characterized in that: include: A first combined barrier layer, a quantum well layer, and a second combined barrier layer are stacked along a first direction, wherein the quantum well layer is located between the first combined barrier layer and the second combined barrier layer, and the material of the quantum well layer is In b (Ga 1-a Al a ) 1- b As, b is greater than or equal to 0.1; The first combined barrier layer includes a first barrier layer and a second barrier layer stacked along a first direction, the second barrier layer is located on both sides of the first barrier layer, and the energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer; Wherein, the second combined barrier layer comprises a third barrier layer and a fourth barrier layer stacked along a first direction, the fourth barrier layer is located on both sides of the third barrier layer, and the energy band gap of the fourth barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer; Wherein, the material of the first barrier layer and the third barrier layer is Al c Ga 1-c As 1-d P d , the material of the second barrier layer and the material of the fourth barrier layer are Al f Ga 1-f As. 2 . The strained active layer according to claim 1 , wherein a is greater than zero and less than or equal to 0.2, and b is greater than or equal to 0.1 and less than or equal to 0.
45.
3. The strained active layer according to claim 2, characterized in that: a is greater than zero and less than or equal to 0.1, and b is greater than or equal to 0.14 and less than or equal to 0.
35.
4. The strained active layer according to claim 1, characterized in that: c is greater than zero and less than or equal to 0.35, and d is greater than zero and less than or equal to 0.
3.
5. The strained active layer according to claim 1, characterized in that: f is greater than zero and less than or equal to 0.
5.
6. The strained active layer according to claim 1, characterized in that: The thickness of the first barrier layer is greater than or equal to twice the thickness of the quantum well layer, and the thickness of the third barrier layer is greater than or equal to twice the thickness of the quantum well layer.
7. The strained active layer according to claim 1, characterized in that: There are multiple quantum well layers, each of which is located between the first combined barrier layer and the second combined barrier layer. The first combined barrier layer is located between some adjacent quantum well layers, and the second combined barrier layer is located between another part of adjacent quantum well layers.
8. A method for preparing a strained active layer, characterized in that: include: A first combined barrier layer, a quantum well layer, and a second combined barrier layer are formed and stacked along a first direction, wherein the quantum well layer is located between the first combined barrier layer and the second combined barrier layer, and the material of the quantum well layer is In b (Ga 1- a Al a ) 1-b As, b is greater than or equal to 0.1; The step of forming the first combined barrier layer includes: forming a first barrier layer and a second barrier layer stacked along a first direction, wherein the second barrier layer is located on both sides of the first barrier layer, and the energy band gap of the second barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the first barrier layer; the process temperature for forming the first barrier layer is greater than the process temperature for forming the quantum well layer; The step of forming the second combined barrier layer includes: forming a third barrier layer and a fourth barrier layer stacked along a first direction, wherein the fourth barrier layer is located on both sides of the third barrier layer, and the energy band gap of the fourth barrier layer is greater than the energy band gap of the quantum well layer and less than or equal to the energy band gap of the third barrier layer; the process temperature for forming the third barrier layer is greater than the process temperature for forming the quantum well layer; Wherein, the material of the first barrier layer and the third barrier layer is Al c Ga 1-c As 1-d P d , the material of the second barrier layer and the material of the fourth barrier layer are Al f Ga 1-f As.
9. The method for preparing a strained active layer according to claim 8, characterized in that: The process temperature for forming the second barrier layer between the quantum well layer and the first barrier layer is lower than the process temperature for forming the first barrier layer; the process temperature for forming the fourth barrier layer between the quantum well layer and the third barrier layer is lower than the process temperature for forming the third barrier layer.
10. A semiconductor light emitting structure, characterized in that: include: Semiconductor substrate layer; A first restriction layer, located on one side of the semiconductor substrate layer; A first waveguide layer, located on a side of the first confinement layer away from the semiconductor substrate layer; The strained active layer according to any one of claims 1 to 7, wherein the strained active layer is located on a side of the first waveguide layer away from the first confinement layer; A second waveguide layer, located on a side of the strained active layer away from the first waveguide layer; The second confinement layer is located on a side of the second waveguide layer away from the strained active layer.
11. The semiconductor light emitting structure according to claim 10, characterized in that: The quantum well layer is in compressive strain relative to the semiconductor substrate layer, and the first barrier layer and the third barrier layer are in tensile strain relative to the semiconductor substrate layer.
12. A method for preparing a semiconductor light-emitting structure, characterized in that: include: The method for preparing the strained active layer according to any one of claims 8 to 9; The method for preparing the semiconductor light emitting structure further includes: before forming the strained active layer, sequentially forming a first confinement layer and a first waveguide layer on one side of the semiconductor substrate layer; A second waveguide layer and a second confinement layer are sequentially formed on a side of the strained active layer away from the first waveguide layer.
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