Pixel repairing method and display panel
By screening and fixing sub -pixels of the filter layer defects during the preparation of the display panel, the color bias and 'dark dot' of the filter layer defects are solved, and the yield of the display panel is improved and the production cost is reduced.
Patent Information
- Application Number
- CN202411437656.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-15
- Publication Date
- 2025-01-21
AI Technical Summary
In the existing organic light-emitting display panel, due to defects in the filter layer, sub-pixels cannot emit light of the desired color, resulting in color offsets, and a large number of "dark spots" will affect the display effect and increase production costs.
During the display panel preparation process, sub-pixels with filter layer defects are screened and repaired. The passivation layer is removed by cutting off the connection points between the drive circuit and the metal wiring, forming a planarization layer and anode, and connecting them with adjacent sub-pixels. Shared power cord to achieve repair.
Reduce the abandonment rate of display panels, improve the yield of display panels, reduce production costs, and improve the display effect.
Smart Images

Figure CN119343018A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to display technology, and in particular to a pixel repair method and a display panel. Background Art
[0002] The organic light emitting display panel is a self-luminous display panel that emits light by exciting organic compounds. The organic light emitting display panel does not require a backlight unit used in a liquid crystal display panel, and thus has a thin profile and light weight as well as a simple manufacturing process.
[0003] A common sub-pixel structure of an organic light-emitting display panel includes an organic light-emitting diode and a filter layer. The organic light-emitting diode emits white light, and after passing through the filter layer, light of a desired color, such as red light, green light or blue light, is obtained. Due to the influence of the manufacturing process, the filter layer of some sub-pixels may have defects such as missing or partially missing, resulting in the sub-pixel being unable to emit light of the desired color, causing color deviation of the display panel. In response to this situation, the usual treatment method is to completely cut off the metal wiring connected to the driving circuit of the sub-pixel, such as power lines, data lines, scan lines, etc., through a laser, so that the sub-pixel becomes a "dark spot" that cannot be lit.
[0004] However, when there are a large number of "dark spots" on the display panel, the display effect will be affected. Therefore, the display panel must be scrapped, which increases the production cost. Summary of the invention
[0005] The present invention provides a pixel repair method and a display panel, which can repair sub-pixels with filtering defects during the display panel preparation process, thereby reducing the discard rate of the display panel, improving the yield of the display panel, and reducing the production cost.
[0006] In a first aspect, the present invention provides a pixel repair method, which includes screening target sub-pixels with filter layer defects after preparing the filter layer;
[0007] Cutting off the connection point between the driving circuit and the metal wiring of the target sub-pixel;
[0008] removing a portion of the passivation layer covering the metal electrode expected to be connected to the anode of the target sub-pixel, exposing the metal electrode;
[0009] forming a planarization layer on a side of the passivation layer away from the metal electrode;
[0010] An anode is formed on a side of the planarization layer away from the passivation layer, wherein the anode shares a power line with the target sub-pixel, and the anode of an adjacent sub-pixel adjacent to the target sub-pixel has a first extension portion, and the first extension portion is connected to the metal electrode;
[0011] forming a light-emitting layer on a side of the anode away from the planarization layer;
[0012] A cathode is formed on a side of the light emitting layer away from the anode.
[0013] Optionally, before screening the target sub-pixel with filter layer defects, the method further includes:
[0014] Providing a substrate, wherein the substrate is divided into a plurality of sub-pixel regions, wherein the sub-pixel regions include a light-emitting region and a non-light-emitting region;
[0015] forming a light absorbing layer in a non-luminescent region on one side of the substrate;
[0016] forming a buffer layer on a side of the light absorbing layer away from the substrate;
[0017] forming a metal electrode intended to be connected to the anode of the sub-pixel on a side of the buffer layer away from the light absorbing layer;
[0018] forming a passivation layer on a side of the metal electrode away from the buffer layer;
[0019] A filter layer is formed in the light emitting area on one side of the substrate.
[0020] Optionally, while forming the metal electrode, a source and a drain of a driving transistor in the driving circuit are formed on a side of the buffer layer away from the light absorption layer, and the drain is connected to the metal electrode.
[0021] Optionally, after forming the source and the drain, the method further includes:
[0022] forming an active layer on a side of the source electrode and the drain electrode away from the buffer layer;
[0023] forming a gate insulating layer on a side of the active layer away from the source electrode and the drain electrode;
[0024] forming a gate on a side of the gate insulating layer away from the active layer;
[0025] forming a first insulating layer on a side of the gate away from the gate insulating layer;
[0026] The planarization layer is formed on a side of the first insulating layer away from the gate, and the planarization layer covers the first insulating layer and the passivation layer. The anode is formed on a side of the planarization layer away from the first insulating layer and the passivation layer, and the anode also has a second extension portion, and the second extension portion is connected to the drain.
[0027] Optionally, before forming the light-emitting layer on the side of the anode away from the planarization layer, the method further comprises:
[0028] In the non-light-emitting region, a bank layer is formed on a side of the anode away from the planarization layer, the bank layer is provided with a plurality of openings, and the light-emitting layer is provided in the openings of the bank layer.
[0029] Optionally, after forming a cathode on a side of the light-emitting layer away from the anode, the method further comprises:
[0030] An encapsulation layer is formed on a side of the cathode away from the light-emitting layer, and the encapsulation layer covers the cathode and the bank layer.
[0031] Optionally, while an anode is formed on a side of the planarization layer away from the passivation layer, a power line is formed on a side of the planarization layer away from the passivation layer, the power line having a third extension portion connected to the source electrode.
[0032] Optionally, the metal wiring is a power line, a data line, a scan line, an initialization signal line or a reference voltage line, and the metal electrode is an electrode of a capacitor in the driving circuit.
[0033] Optionally, the connection point that is cut off is the connection point that is farthest from the metal electrode among all the connection points.
[0034] In a second aspect, the present invention provides a display panel prepared by the pixel repair method provided in the first aspect of the present invention.
[0035] The pixel repair method provided by the present invention, after preparing the filter layer, screens the target sub-pixels with filter layer defects, cuts off the connection points between the drive circuit and the metal wiring of the target sub-pixel, removes part of the passivation layer covering the metal electrode expected to be connected to the anode of the target sub-pixel, exposes the metal electrode, forms a planarization layer on the side of the passivation layer away from the metal electrode, and forms an anode on the side of the planarization layer away from the passivation layer, wherein the anode of the adjacent sub-pixel that shares the power line with the target sub-pixel and is adjacent to the target sub-pixel has a first extension portion, the first extension portion is connected to the metal electrode, forms a light-emitting layer on the side of the anode away from the planarization layer, and forms a cathode on the side of the light-emitting layer away from the anode, and repairs the sub-pixels with filter defects during the preparation of the display panel, thereby reducing the scrap rate of the display panel, improving the yield of the display panel, and reducing the production cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The present invention is further described in detail below based on the accompanying drawings and embodiments.
[0037] Figure 1 A partial process flow chart of a pixel repair method provided by the present invention;
[0038] Figure 2 A schematic diagram of the structure of a display panel provided by the present invention;
[0039] Figure 3 A schematic diagram of the structure of a driving circuit provided by the present invention;
[0040] Figure 4 A partial process flow chart of a pixel repair method provided by the present invention;
[0041] Figure 5 A partial process flow chart of a pixel repair method provided by the present invention;
[0042] Figure 6 A schematic diagram of a driving circuit of adjacent sub-pixels after repair provided by the present invention. DETAILED DESCRIPTION
[0043] In order to make the technical problems solved by the present invention, the technical solutions adopted and the technical effects achieved clearer, the technical solutions of the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0044] In the description of the present invention, unless otherwise clearly specified and limited, the terms "connected", "connected", and "fixed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0045] In the present invention, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through another feature between them. Moreover, the first feature being "above", "above" and "above" the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature includes the first feature being directly below and obliquely below the second feature, or simply means that the first feature is lower in level than the second feature. In addition, the terms "first" and "second" are only used to distinguish in description and have no special meaning.
[0046] The present invention provides a pixel repair method, which is performed during the preparation process of a display panel. Therefore, the pixel repair method can also be considered as a display panel preparation method. Figure 1 FIG. 1 is a partial process flow chart of a pixel repair method provided by the present invention. The structure diagram in the flow chart is a cross-sectional view without showing the source and drain electrodes, and shows the process of step S101 to step S106. Figure 1 As shown, the pixel repair method includes:
[0047] S101. Provide a substrate.
[0048] like Figure 1 As shown, the substrate 101 may be a transparent glass substrate or a transparent organic material substrate, which is not limited in the present embodiment. The substrate 101 is divided into a plurality of sub-pixel regions (only one of which is shown in the figure), and the sub-pixel regions include a light-emitting region LA and a non-light-emitting region BA.
[0049] S102, forming a light absorbing layer in a non-luminescent region on one side of the substrate.
[0050] like Figure 1 As shown, a light absorbing layer 102 is formed in the non-luminous area BA on one side of the substrate 101. The light absorbing layer 102 has a light absorbing function. When the external ambient light irradiates the light absorbing layer 102, the light absorbing layer 102 can absorb most of the light in the visible light band, thereby preventing the external ambient light from being reflected by the subsequent metal layer, causing the problem of reflection of the display panel, and enhancing the display effect.
[0051] S103, forming a buffer layer on a side of the light absorbing layer away from the substrate.
[0052] like Figure 1 As shown, a buffer layer 103 is formed on a side of the light absorbing layer 102 away from the substrate 101 , and the buffer layer 103 is made of an insulating material.
[0053] S104 , forming a metal electrode intended to be connected to an anode of the sub-pixel on a side of the buffer layer away from the light absorbing layer.
[0054] like Figure 1 As shown, a metal electrode TGA which is expected to be connected to the anode of the sub-pixel is formed on a side of the buffer layer 103 away from the light absorption layer 102 .
[0055] Figure 2 A schematic diagram of the structure of a display panel provided by the present invention is shown in FIG. Figure 2 As shown, the display panel includes a plurality of sub-pixels Pixel, and the sub-pixel Pixel includes a light-emitting area LA and a non-light-emitting area BA. A filter layer is formed in the light-emitting area LA, and red light, green light, blue light or white light is obtained after filtering by the filter layer. The sub-pixel emitting red light is shown in FIG. Figure 2R in the figure indicates that the sub-pixel emitting green light is Figure 2 The G in the middle indicates that the sub-pixel emitting blue light is Figure 2 B in the figure indicates that the sub-pixel emitting white light is as follows Figure 2 W in the figure indicates that a driving circuit is formed in the non-luminous area BA, and the driving circuit is connected to the metal wiring through a connection point. The connection point can be a metal hole, and the metal wiring can be a power line, a data line, a scan line, an initialization signal line or a reference voltage line, which is not limited in the embodiment of the present invention.
[0056] Figure 3 A schematic diagram of a driving circuit provided by the present invention is shown in FIG. Figure 3 As shown, the driving circuit includes a driving transistor DT, a first switching transistor ST1, a second switching transistor ST2 and a capacitor Cst, the source of the driving transistor DT is connected to the power line VDD, the drain of the driving transistor DT is connected to the anode of the organic light emitting diode OLED, the cathode of the organic light emitting diode OLED is connected to the low voltage source VSS, the first end of the first switching transistor ST1 is connected to the data line Data, the second end of the first switching transistor ST1 is connected to the gate of the driving transistor DT, the control end of the first switching transistor ST1 is connected to the scanning signal line Scan, the first end of the second switching transistor ST2 is connected to the reference voltage line Vref, the second end of the second switching transistor ST2 is connected to the drain of the driving transistor DT, the control end of the second switching transistor ST2 is connected to the initialization signal line Sense, the first end of the capacitor Cst is connected to the gate of the driving transistor DT, and the second end of the capacitor Cst is connected to the drain of the driving transistor DT.
[0057] Exemplarily, in the initialization stage t1, the initialization signal line Sense provides a high level, controls the second switch transistor ST2 to be turned on, initializes the drain of the capacitor Cst and the driving transistor DT, and initializes the potential of the capacitor Cst and the second end of the driving transistor DT to the reference voltage provided by the reference voltage line Vref. Exemplarily, the reference voltage is a constant low-level voltage. In the data writing stage t2, the initialization signal line Sense continuously provides a high level, the scanning signal line Scan provides a high level, the first switch transistor ST1 and the second switch transistor ST2 are both turned on, and the data signal provided by the data line Data is written into the control end of the driving transistor DT, that is, the capacitor Cst is charged, and the potential of the control end of the driving transistor DT is gradually raised. When the potential of the control end of the driving transistor DT reaches the driving transistor DT on potential, the scanning signal line Scan and the initialization signal line Sense both provide low-level signals, the first switch transistor ST1 and the second switch transistor ST2 are both turned off, the driving transistor DT is turned on, and the light-emitting stage t3 is entered. The power supply voltage provided by the power line VDD and the low voltage provided by the low voltage source VSS form a driving current on the driving transistor DT and the organic light-emitting diode OLED, driving the organic light-emitting diode OLED to emit light, and the capacitor Cst is discharged to maintain the high level of the gate of the driving transistor DT, and maintain the organic light-emitting diode OLED to continue to emit light. After the light-emitting stage t3 ends, the initialization stage t1 is entered again, and the cycle is repeated.
[0058] like Figure 2 As shown, the display panel includes a plurality of pixel units Cell, each pixel unit Cell includes four sub-pixels Pixel, which are respectively the first sub-pixel R, the second sub-pixel G, the third sub-pixel B and the fourth sub-pixel W along the row direction, and emit red light, green light, blue light and white light respectively. Of course, in other embodiments of the present invention, the sub-pixels in the pixel unit may also be arranged in other orders, and the present invention does not limit the arrangement order of R, G, B, and W.
[0059] like Figure 2 As shown, the power line is arranged between two adjacent columns of pixel units Cell, and in the same display unit Cell, the first sub-pixel R and the second sub-pixel G share a first power line VDD1, and the third sub-pixel B and the fourth sub-pixel W share a second power line VDD2. That is, the source electrodes of the driving transistors DT of the first sub-pixel R and the second sub-pixel G are both connected to the first power line VDD1, and the source electrodes of the driving transistors DT of the third sub-pixel B and the fourth sub-pixel W are both connected to the second power line VDD2.
[0060] A first data line Data1 and a second data line Data2 are provided between the first sub-pixel R and the second sub-pixel G. The first sub-pixel R is connected to the first data line Data1, that is, the first end of the first switch transistor ST1 of the first sub-pixel R is connected to the first data line Data1; the second sub-pixel G is connected to the second data line Data2, that is, the first end of the first switch transistor ST1 of the second sub-pixel R is connected to the second data line Data2. A third data line Data3 and a fourth data line Data4 are provided between the third sub-pixel B and the fourth sub-pixel W. The third sub-pixel B is connected to the third data line Data3, that is, the first end of the first switch transistor ST1 of the third sub-pixel B is connected to the third data line Data3; the fourth sub-pixel W is connected to the fourth data line Data4, that is, the first end of the first switch transistor ST1 of the fourth sub-pixel W is connected to the fourth data line Data4.
[0061] The scan line Scan and the initialization signal line Sense are arranged between two adjacent rows of sub-pixels, and the sub-pixels in the same row are connected to a corresponding scan line Scan and an initialization signal line Sense, that is, the gates of the first switching transistors ST1 of all sub-pixels in the same row of sub-pixels are connected to an adjacent scan line Scan, and the gates of the second switching transistors ST2 of all sub-pixels are connected to an adjacent initialization signal line Sense.
[0062] The reference voltage line Vref is arranged between the second sub-pixel G and the third sub-pixel B. The four sub-pixels in the pixel unit Cell share the reference voltage line Vref, that is, the first ends of the second switch transistors ST2 of the four sub-pixels in the pixel unit Cell are all connected to the reference voltage line Vref.
[0063] refer to Figure 3 The metal electrode TGA may be an electrode of the capacitor Cst, specifically an electrode connecting the capacitor Cst to the anode of the organic light emitting diode OLED.
[0064] In some embodiments of the present invention, while forming the metal electrode, the source and drain of the driving transistor in the driving circuit are formed on the side of the buffer layer away from the light absorption layer, and the drain is connected to the metal electrode.
[0065] Figure 4 This is a partial process flow chart of a pixel repair method provided by the present invention. The structural diagram in the flow chart is a cross-sectional view showing the source, drain and metal electrode, such as Figure 4 As shown, the pixel repair method also includes:
[0066] S1041, forming a source and a drain of a driving transistor in a driving circuit on a side of the buffer layer away from the light absorbing layer.
[0067] like Figure 4 As shown, a source 1091 and a drain 1092 of a driving transistor DT in a driving circuit are formed on a side of the buffer layer 103 away from the light absorption layer 102. The source 1091 is used to connect to a subsequent power line, and the drain 1092 is connected to a metal electrode TGA and is used to connect to a subsequent anode.
[0068] S1042, forming an active layer on a side of the source and the drain away from the buffer layer.
[0069] like Figure 4 As shown, an active layer 110 is formed on a side of the source 1091 and the drain 1092 away from the buffer layer 103 .
[0070] S1043, forming a gate insulating layer on a side of the active layer away from the source and the drain.
[0071] like Figure 4 As shown, a gate insulating layer 111 is formed on a side of the active layer 110 away from the source electrode 1091 and the drain electrode 1092 .
[0072] S1044, forming a gate on a side of the gate insulating layer away from the active layer.
[0073] like Figure 4 As shown, a gate 112 is formed on a side of the gate insulating layer 111 away from the active layer 110 .
[0074] S1045, forming a first insulating layer on a side of the gate away from the gate insulating layer.
[0075] like Figure 4 As shown, a first insulating layer 113 is formed on a side of the gate 112 away from the gate insulating layer 111 .
[0076] S105 , forming a passivation layer on a side of the metal electrode away from the buffer layer.
[0077] like Figure 1 As shown, a passivation layer 104 is formed on the side of the metal electrode TGA away from the buffer layer 103, and the passivation layer 104 covers the metal electrode TGA. Exemplarily, the passivation layer 104 can be formed in the same process as the gate insulating layer 111 or the first insulating layer 113.
[0078] S106, forming a filter layer in the light emitting area on one side of the substrate.
[0079] like Figure 1As shown, a filter layer 105 is formed in the light emitting area LA on one side of the substrate 101. In the embodiment of the present invention, the process of preparing the display panel is to prepare the filter layer on the substrate and then prepare the light emitting diode (including the anode, the light emitting layer and the cathode) on the filter layer. Due to the influence of the preparation process, the filter layer of some sub-pixels may have defects such as missing or partially missing, resulting in the sub-pixel being unable to emit light of the desired color, resulting in color deviation of the display panel.
[0080] S107 , after preparing the filter layer, screening target sub-pixels with filter layer defects.
[0081] In an embodiment of the present invention, after preparing the filter layer, target sub-pixels with filter layer defects are screened. Exemplarily, in some embodiments of the present invention, the entire semi-finished panel can be photographed by an inspection machine and enlarged, and then an algorithm or manual inspection is used to screen out target sub-pixels with filter layer defects. The filter layer defects may include but are not limited to the absence or partial absence of the filter layer and the misalignment of the filter layer, which are not limited in the embodiment of the present invention.
[0082] S108 , cutting off the connection point between the driving circuit and the metal wiring of the target sub-pixel.
[0083] For example, Figure 2 As shown, taking the first sub-pixel R as an example, the source of the driving transistor DT is connected to the first power line VDD1 through a connection point P1, the first end of the first switching transistor ST1 is connected to the first data line Data1 through a connection point P2, the gate of the first switching transistor ST1 is connected to the scan line Scan through a connection point P3, the gate of the second switching transistor ST2 is connected to the initialization signal line Sense through a connection point P4, and the first end of the second switching transistor ST2 is connected to the reference voltage line Vref through a connection point P5.
[0084] In the embodiment of the present invention, at least one of the connection points P1, P2, P3, P4, and P5 is cut off, so that the sub-pixel cannot be normally lit.
[0085] S109 , removing a portion of the passivation layer covering the metal electrode intended to be connected to the anode of the target sub-pixel, exposing the metal electrode.
[0086] Figure 5 FIG. 1 is a partial process flow chart of a pixel repair method provided by the present invention. The structure diagram in the flow chart is a cross-sectional view without showing the source and drain electrodes, and shows the process of step S109 to step S115. Figure 5As shown, the non-luminescent area BA includes a metal electrode TGA, which is expected to be connected to the anode of the target sub-pixel and is covered with a passivation layer 104. In the embodiment of the present invention, part of the passivation layer 104 covering the metal electrode TGA is removed to expose part of the metal electrode TGA.
[0087] Exemplarily, in the aforementioned step S108, laser irradiation is usually used, and the high temperature generated by the laser is used to melt the connection point. During the laser irradiation process, the heat generated by the laser will radiate to the passivation layer 104 on the metal electrode TGA, causing the passivation layer 104 to solidify, resulting in the passivation layer 104 being difficult to remove, thereby causing the subsequently formed anode to be unable to form an electrical connection with the metal electrode TGA. Therefore, in an embodiment of the present invention, the connection point selected to be cut off is the connection point farthest from the metal electrode among the connection points, so as to minimize the influence of the heat generated by the laser on the passivation layer 104, and ensure that the subsequently formed anode can form an electrical connection with the metal electrode TGA.
[0088] S110 , forming a planarization layer on a side of the passivation layer away from the metal electrode.
[0089] In the embodiment of the present invention, Figure 5 As shown, a planarization layer 106 is formed on the side of the passivation layer 104 away from the metal electrode TGA. The planarization layer 106 also covers the filter layer 113 in the light-emitting area LA and the first insulating layer 113 in the non-light-emitting area BA. The planarization layer 106 is mainly used to reduce the step difference between the light-emitting area LA and the non-light-emitting area BA.
[0090] S111 , forming an anode on a side of the planarization layer away from the passivation layer.
[0091] In the embodiment of the present invention, Figure 5As shown, an anode is formed on the side of the planarization layer 106 away from the passivation layer 104. Among them, the anode 107 (A) of the target sub-pixel is connected to the metal electrode TGA through an extension. The anode 107 (B) of the adjacent sub-pixel that shares the power line with the target sub-pixel and is adjacent to the target sub-pixel has a first extension 1071, and the first extension 1071 is connected to the metal electrode TGA. Since the metal electrode TGA is connected to the anode 107 (A) of the target sub-pixel, connecting the anode 107 (B) of the adjacent sub-pixel with the metal electrode TGA is actually connecting the anode 107 (A) of the target sub-pixel with a filter defect to the anode 107 (B) of the adjacent sub-pixel, so that the two sub-pixels emit light together. Since the power source drives the two sub-pixels to emit light at the same time, the brightness of the two sub-pixels is weakened relative to the normal situation, so that the impact of the target sub-pixel with a filter defect on the user can be reduced, and the display effect can be improved. At the same time, the sub-pixel with a filter defect is repaired, thereby reducing the discard rate of the display panel, improving the yield of the display panel, and reducing the production cost.
[0092] In some embodiments of the present invention, an anode is formed on a side of the planarization layer away from the passivation layer, and a power line is formed on a side of the planarization layer away from the passivation layer. The power line has a third extension portion connected to the source electrode.
[0093] S112, forming a dam layer on a side of the anode away from the planarization layer, wherein the dam layer is provided with a plurality of openings, and the light-emitting layer is provided in the openings of the dam layer.
[0094] like Figure 5 As shown, in the non-luminescent area BA, a bank layer 114 is formed on the side of the anodes 107 (A) and 107 (B) away from the planarization layer 106. The bank layer 114 is patterned and has a plurality of openings. The bank layer 114 is used to form a black matrix between sub-pixels.
[0095] S113, forming a light-emitting layer on a side of the anode away from the planarization layer.
[0096] like Figure 5 As shown, in the light emitting area LA, the light emitting layer 108 is formed on the side of the anodes 107 (A) and 107 (B) away from the planarization layer 106. Exemplarily, the light emitting layer 108 is formed in the opening of the bank layer 114.
[0097] S114. Form a cathode on a side of the light-emitting layer away from the anode.
[0098] like Figure 5 As shown, a cathode 109 is formed on a side of the light emitting layer 108 away from the anodes 107 (A) and 107 (B).
[0099] S115 , forming an encapsulation layer 115 on a side of the cathode away from the light-emitting layer 108 , wherein the encapsulation layer 115 covers the cathode 109 and the dam layer 114 .
[0100] Figure 6 A schematic diagram of a driving circuit of adjacent sub-pixels after repair provided by the present invention, such as Figure 6 As shown, in some embodiments of the present invention, the connection between the target sub-pixel with the filter defect and the scan line Scan can be cut off, so that the target sub-pixel is completely unaffected by the drive circuit of the target sub-pixel. The target sub-pixel shares the power line VDD with the target sub-pixel, and the anode of the adjacent adjacent sub-pixel is connected to the anode of the target sub-pixel. The target sub-pixel is only controlled by the drive circuit of the adjacent sub-pixel. When the adjacent sub-pixel is driven to emit light, the target sub-pixel is also driven to emit light at the same time.
[0101] The pixel repair method provided by the present invention, after preparing the filter layer, screens the target sub-pixels with filter layer defects, cuts off the connection points between the drive circuit and the metal wiring of the target sub-pixel, removes part of the passivation layer covering the metal electrode expected to be connected to the anode of the target sub-pixel, exposes the metal electrode, forms a planarization layer on the side of the passivation layer away from the metal electrode, and forms an anode on the side of the planarization layer away from the passivation layer, wherein the anode of the adjacent sub-pixel that shares the power line with the target sub-pixel and is adjacent to the target sub-pixel has a first extension portion, the first extension portion is connected to the metal electrode, forms a light-emitting layer on the side of the anode away from the planarization layer, and forms a cathode on the side of the light-emitting layer away from the anode, and repairs the sub-pixels with filter defects during the preparation of the display panel, thereby reducing the scrap rate of the display panel, improving the yield of the display panel, and reducing the production cost.
[0102] The embodiment of the present invention further provides a display panel, which is prepared by using the pixel repair method provided by any of the above embodiments of the present invention. The structure of the display panel can refer to Figure 2 , the embodiments of the present invention will not be described in detail here.
[0103] In the description of this article, it is necessary to understand that the terms "up", "down", "left", "right", and other orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of description and simplification of operation, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0104] In the description of this specification, the description with reference to the terms "an embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.
[0105] In addition, it should be understood that although this specification is described according to implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.
[0106] The technical principle of the present invention is described above in conjunction with specific embodiments. These descriptions are only for explaining the principle of the present invention and cannot be interpreted as limiting the scope of protection of the present invention in any way. Based on the explanations herein, those skilled in the art can associate other specific implementations of the present invention without paying creative labor, and these methods will fall within the scope of protection of the present invention.
Claims
1. A pixel repair method, characterized in that: include: After preparing the filter layer, screening the target sub-pixels with filter layer defects; Cutting off the connection point between the driving circuit and the metal wiring of the target sub-pixel; removing a portion of the passivation layer covering the metal electrode expected to be connected to the anode of the target sub-pixel, exposing the metal electrode; forming a planarization layer on a side of the passivation layer away from the metal electrode; An anode is formed on a side of the planarization layer away from the passivation layer, wherein the anode shares a power line with the target sub-pixel, and the anode of an adjacent sub-pixel adjacent to the target sub-pixel has a first extension portion, and the first extension portion is connected to the metal electrode; forming a light-emitting layer on a side of the anode away from the planarization layer; A cathode is formed on a side of the light emitting layer away from the anode.
2. The pixel repair method according to claim 1, characterized in that: Before screening the target sub-pixel for filter layer defects, it also includes: Providing a substrate, wherein the substrate is divided into a plurality of sub-pixel regions, wherein the sub-pixel regions include a light-emitting region and a non-light-emitting region; forming a light absorbing layer in a non-luminescent region on one side of the substrate; forming a buffer layer on a side of the light absorbing layer away from the substrate; forming a metal electrode intended to be connected to the anode of the sub-pixel on a side of the buffer layer away from the light absorbing layer; forming a passivation layer on a side of the metal electrode away from the buffer layer; A filter layer is formed in the light emitting area on one side of the substrate.
3. The pixel repair method according to claim 2, characterized in that: While the metal electrode is being formed, a source electrode and a drain electrode of a driving transistor in the driving circuit are formed on a side of the buffer layer away from the light absorption layer, and the drain electrode is connected to the metal electrode.
4. The pixel repair method according to claim 3, characterized in that: After forming the source and the drain, the method further comprises: forming an active layer on a side of the source electrode and the drain electrode away from the buffer layer; forming a gate insulating layer on a side of the active layer away from the source electrode and the drain electrode; forming a gate on a side of the gate insulating layer away from the active layer; forming a first insulating layer on a side of the gate away from the gate insulating layer; The planarization layer is formed on a side of the first insulating layer away from the gate, and the planarization layer covers the first insulating layer and the passivation layer. The anode is formed on a side of the planarization layer away from the first insulating layer and the passivation layer, and the anode also has a second extension portion, and the second extension portion is connected to the drain.
5. The pixel repair method according to any one of claims 2 to 4, characterized in that: Before forming the light emitting layer on the side of the anode away from the planarization layer, the method further comprises: In the non-light-emitting region, a bank layer is formed on a side of the anode away from the planarization layer, the bank layer is provided with a plurality of openings, and the light-emitting layer is provided in the openings of the bank layer.
6. The pixel repair method according to claim 5, characterized in that: After forming a cathode on a side of the light-emitting layer away from the anode, the method further comprises: An encapsulation layer is formed on a side of the cathode away from the light-emitting layer, and the encapsulation layer covers the cathode and the bank layer.
7. The pixel repair method according to claim 3 or 4, characterized in that: While an anode is formed on a side of the planarization layer away from the passivation layer, a power line is formed on a side of the planarization layer away from the passivation layer. The power line has a third extension portion connected to the source electrode.
8. The pixel repair method according to any one of claims 1 to 4, characterized in that: The metal wiring is a power line, a data line, a scan line, an initialization signal line or a reference voltage line, and the metal electrode is an electrode of a capacitor in the driving circuit.
9. The pixel repair method according to any one of claims 1 to 4, characterized in that: The connection point that is cut off is the connection point farthest from the metal electrode among all the connection points.
10. A display panel, characterized in that: The method is prepared by the pixel repair method as described in any one of claims 1 to 9.