Mother plate of flow channel substrate, preparation method of flow channel substrate and micro-fluidic chip

Abstract

The invention provides a flow channel substrate mother board, a preparation method of a flow channel substrate and a flow channel chip, and relates to the technical field of microfluidics, the flow channel substrate mother board comprises a flow channel substrate setting area and a first redundancy area surrounding the flow channel substrate setting area; a plurality of runner substrates are arranged in the runner substrate setting area, and each runner substrate comprises a first substrate and a first metal mask layer located on one side of the first substrate; a first adhesive layer is arranged in the first redundant area, the first metal mask layer extends from the runner substrate setting area to the first redundant area, the first adhesive layer surrounds the first metal mask layer, and a gap is formed between the first adhesive layer and the first metal mask layer. By designing the runner substrate mother board, a high-quality runner substrate can be obtained in the process of preparing the runner substrate by adopting the runner substrate mother board; therefore, the preparation yield of the runner substrate and the runner chip is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a flow channel substrate motherboard, a method for preparing a flow channel substrate, and a microfluidic chip. Background Art

[0002] With the application of flow channel chips in gene sequencing and other fields, flow channel chips have been vigorously developed. Usually, the flow channel chip has a double substrate structure, one of which is provided with a flow channel (called a flow channel substrate), and the other substrate has a through hole (called a cover plate). After the two substrates are bonded together, the flow channel is enclosed in the middle of the chip to form a sequencing channel. The sequencing channel can be connected to the outside world through the through hole for operations such as liquid injection and liquid discharge.

[0003] However, the fabrication yield and fabrication accuracy of flow channel chips need to be improved. Summary of the invention

[0004] The embodiments of the present application provide a flow channel substrate motherboard, a method for preparing a flow channel substrate, and a flow channel chip; by designing the above-mentioned flow channel substrate motherboard, a high-quality flow channel substrate can be obtained in the process of preparing the flow channel substrate using the flow channel substrate motherboard; thereby improving the preparation yield of the flow channel substrate and the flow channel chip.

[0005] The embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a flow channel substrate motherboard, comprising: a flow channel substrate setting area and a first redundant area surrounding the flow channel substrate setting area;

[0007] A plurality of the flow channel substrates are arranged in the flow channel substrate arrangement area, and the flow channel substrate includes a first substrate and a first metal mask layer located on one side of the first substrate;

[0008] A first glue layer is disposed in the first redundant area. The first metal mask layer extends from the flow channel substrate arrangement area to the first redundant area. The first glue layer surrounds the first metal mask layer, and a gap is provided between the first glue layer and the first metal mask layer.

[0009] In some flow channel substrate mother plates provided in the embodiments of the present application, a dimension of the gap in a direction from the flow channel substrate setting area to the first redundant area is greater than or equal to 0.5 mm.

[0010] In some flow channel substrate motherboards provided in the embodiments of the present application, the thickness of the first glue layer along the normal direction of the flow channel substrate motherboard is greater than or equal to twice the thickness of the first metal mask layer.

[0011] In some flow channel substrate motherboards provided in embodiments of the present application, the first metal mask layer is used to prepare a flow channel pattern set on the first substrate, and the minimum planar dimension of the portion of the first metal mask layer located in the first redundant area is greater than or equal to twice the depth of the flow channel pattern.

[0012] In some flow channel substrate motherboards provided in the embodiments of the present application, a plurality of rows of the flow channel substrates are arranged in the flow channel setting area, a plurality of the flow channel substrates in the same row are arranged in a connected manner, a spacing is provided between two adjacent rows of the flow channel substrates, and a second redundant area is provided between two adjacent rows of the flow channel substrates;

[0013] A second glue layer is provided in at least one of the second redundant regions, and the second glue layer is connected to the first glue layer.

[0014] In some flow channel substrate motherboards provided in embodiments of the present application, the second glue layer is provided in each second redundant area; wherein, along the arrangement direction perpendicular to the same row of multiple flow channel substrates, the distance between two adjacent second glue layers is less than or equal to 119 mm.

[0015] In some flow channel substrate motherboards provided in the embodiments of the present application, a plurality of flow channel substrates arranged in an array are arranged in the flow channel setting area, and each of the flow channel substrates is connected and arranged;

[0016] A plurality of third adhesive layers are arranged in the flow channel setting area, and the orthographic projection of the third adhesive layer on the flow channel substrate overlaps with at least one of the flow channel substrates; and the minimum distance between the third adhesive layer and the edge of the flow channel substrate is greater than or equal to 150 μm.

[0017] In some flow channel substrate mother plates provided in the embodiments of the present application, an orthographic projection of the third glue layer on the flow channel substrate overlaps with another flow channel substrate, and an outer contour of the orthographic projection of the third glue layer on the flow channel substrate is a closed figure.

[0018] In some flow channel substrate motherboards provided in the embodiments of the present application, along the first direction or the second direction, the planar size of the third adhesive layer is less than or equal to 140 mm; the first direction is the direction from the flow channel substrate setting area to the first redundant area, and the second direction is perpendicular to the first direction.

[0019] In some flow channel substrate motherboards provided in embodiments of the present application, an orthographic projection of one of the third adhesive layers on the flow channel substrate overlaps with a row of the flow channel substrates, and an extension direction of the third adhesive layer is consistent with an arrangement direction of a row of the flow channel substrates.

[0020] In some embodiments, along an extension direction perpendicular to the third adhesive layer, a distance between two adjacent third adhesive layers is less than or equal to 119 mm.

[0021] In some flow channel substrate motherboards provided in the embodiments of the present application, a fourth adhesive layer is isolatedly arranged on each of the flow channel substrates, and a plurality of the fourth adhesive layers are arranged at equal intervals along the first direction and at equal intervals along the second direction;

[0022] The thickness of the fourth adhesive layer is less than or equal to the thickness of the first adhesive layer; the first direction is the direction from the flow channel substrate setting area to the first redundant area, and the second direction is perpendicular to the first direction.

[0023] In some flow channel substrate motherboards provided in embodiments of the present application, the fourth glue layer is arranged on a side of the first metal mask layer away from the first substrate, and the thickness of the fourth glue layer is less than the thickness of the first glue layer.

[0024] In some flow channel substrate mother boards provided in the embodiments of the present application, a hollow area is provided on the first metal mask layer, the orthographic projection of the fourth adhesive layer on the first substrate falls within the orthographic projection of the outer contour of the hollow area on the first substrate, and the thickness of the fourth adhesive layer is equal to the thickness of the first adhesive layer.

[0025] In some flow channel substrate motherboards provided by embodiments of the present application, a plurality of fifth glue layers and a plurality of sixth glue layers are further provided in the first redundant area; the plurality of fifth glue layers are arranged at equal intervals along the first direction, and the plurality of sixth glue layers are arranged at equal intervals along the second direction;

[0026] Among them, along the second direction, the minimum distance between the fifth adhesive layer and the fourth adhesive layer is equal to the distance between two adjacent fourth adhesive layers; along the first direction, the minimum distance between the sixth adhesive layer and the fourth adhesive layer is equal to the distance between two adjacent fourth adhesive layers.

[0027] In some flow channel substrate motherboards provided in the embodiments of the present application, a distance between two adjacent fourth adhesive layers along the first direction or the second direction is less than or equal to 68 mm.

[0028] In a second aspect, an embodiment of the present application provides a method for preparing a flow channel substrate, the method comprising:

[0029] Providing a substrate substrate; the substrate substrate comprises a plurality of first flow channel substrate motherboard substrates;

[0030] forming a plurality of second metal mask layers on the base substrate;

[0031] Performing a first cutting process on the base substrate to obtain a plurality of first flow channel substrate master boards; the first flow channel substrate master board comprises the substrate of the first flow channel substrate master board and the second metal mask layer; the first flow channel substrate master board is a flow channel substrate master board as described in any one of the first aspects without a glue layer;

[0032] The first flow channel substrate motherboard and the second flow channel substrate motherboard are sealed together by a first adhesive layer on the second flow channel substrate motherboard, wherein the second flow channel substrate motherboard is the flow channel substrate motherboard as described in any one of the first aspects;

[0033] Performing a thinning process on the substrate of the first flow channel substrate master plate and the substrate of the second flow channel substrate master plate;

[0034] A second cutting process is performed to cut off the first adhesive layer and unpack the box.

[0035] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the steps of performing a second cutting process, cutting off the first adhesive layer and unpacking the box, the method further includes:

[0036] Using the plurality of the first metal mask layers as masks, etching the first flow channel substrate master plate to obtain a first flow channel pattern; using the plurality of the second metal mask layers as masks, etching the second flow channel substrate master plate to obtain a second flow channel pattern;

[0037] Removing the first metal mask layer and the second metal mask layer respectively to obtain the first flow channel substrate master board and the second flow channel substrate master board without the glue layer;

[0038] The first flow channel substrate master board and the second flow channel substrate master board without the adhesive layer are cut respectively to obtain a plurality of flow channel substrates.

[0039] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the step of performing a first cutting process on the base substrate to obtain a plurality of first flow channel substrate motherboards and before the step of sealing the first flow channel substrate motherboard and the second flow channel substrate motherboard in a box through the first adhesive layer, the method further includes:

[0040] A plurality of fourth adhesive layers are formed on the second flow channel substrate motherboard, a plurality of the flow channel substrates are arranged on the second flow channel substrate motherboard, and the fourth adhesive layer is isolatedly arranged on the flow channel substrate; the fourth adhesive layer is used to support the box-matching structure.

[0041] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the step of performing a second cutting process, cutting off the first glue layer and performing unpacking, and before the step of etching the first flow channel substrate motherboard using the plurality of first metal mask layers as masks to obtain a first flow channel pattern; and etching the second flow channel substrate motherboard using the plurality of second metal mask layers as masks to obtain a second flow channel pattern, the method further includes:

[0042] The plurality of fourth adhesive layers are removed.

[0043] In a third aspect, an embodiment of the present application provides a microfluidic chip, including a flow channel substrate and a cover plate;

[0044] The cover plate is provided with an opening, and the flow channel substrate is a flow channel substrate prepared by the method described in any one of the second aspects.

[0045] Embodiments of the present application provide a flow channel substrate motherboard, a method for preparing a flow channel substrate, and a flow channel chip; the flow channel substrate motherboard includes a flow channel substrate setting area and a first redundant area surrounding the flow channel substrate setting area; a plurality of flow channel substrates are arranged in the flow channel substrate setting area, and the flow channel substrate includes a first substrate and a first metal mask layer located on one side of the first substrate; a first glue layer is arranged in the first redundant area, the first metal mask layer extends from the flow channel substrate setting area to the first redundant area, the first glue layer surrounds the first metal mask layer, and there is a gap between the first glue layer and the first metal mask layer.

[0046] In the present application, in the process of preparing the flow channel substrate, the first flow channel substrate mother board and the second flow channel substrate mother board can be sealed in a box by a first adhesive layer. After the box is sealed, the metal mask layer is protected inside the box structure, and the substrate of the first flow channel substrate mother board and the substrate of the second flow channel substrate mother board are thinned to avoid damage to the metal mask layer during the thinning process. Then, the box is disassembled, the flow channel is etched, and the metal mask layer is removed in turn to obtain the first flow channel substrate mother board and the second flow channel substrate mother board without the adhesive layer; these two mother boards are cut again to obtain multiple high-quality flow channel substrates.

[0047] Since the quality of the metal mask layer largely determines the etching depth and accuracy of the flow channel, by designing the above-mentioned flow channel substrate motherboard, the metal mask layer can be well protected in the process of preparing the flow channel substrate using the flow channel substrate motherboard, thereby obtaining a high-quality flow channel substrate; thereby improving the preparation yield of the flow channel substrate and the flow channel chip.

[0048] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] Figure 1 A schematic structural diagram of a flow channel substrate motherboard provided in an embodiment of the present application;

[0051] Figure 2 for Figure 1 A local enlarged view of the position of the middle dotted circle;

[0052] Figure 3 for Figure 2 Schematic diagram of the cross section along the aa' direction;

[0053] Figure 4 and Figure 5 for Figure 1 Two schematic cross-sectional structures of the flow channel substrate after the motherboard is assembled into a box are shown;

[0054] Figure 6 for Figure 1 The deformation simulation diagram of the flow channel substrate mother plate is shown;

[0055] Figure 7 to Figure 9 Schematic diagrams of the structures of three other flow channel substrate motherboards provided in the embodiments of the present application;

[0056] Fig.10 for Figure 7 or Fig. 9 A local enlarged view of the position of the middle dotted circle;

[0057] Fig.11 for Fig. 9 The deformation simulation diagram of the flow channel substrate mother plate is shown;

[0058] Fig.12 and Fig.13 A schematic diagram of the structure of two flow channel substrate motherboards provided in the embodiments of the present application;

[0059] Fig.14 A square glass with a side length of 140 mm is provided in the following arrangement: Fig.12Schematic diagram of deformation simulation when the first adhesive layer and the third adhesive layer are shown;

[0060] Fig.15 and Fig.17 A schematic diagram of the structure of two flow channel substrate motherboards provided in the embodiments of the present application;

[0061] Fig.16 A square glass with a side length of 119 mm is provided in the following arrangement: Fig.15 Schematic diagram of deformation simulation when the first adhesive layer and the third adhesive layer are shown;

[0062] Fig.18 and Fig.19 The present invention also provides two schematic structural diagrams of flow channel substrate motherboards;

[0063] Fig. 20 for Fig.19 A partial enlarged schematic diagram of the location of the middle hollow area;

[0064] Fig.21 for Fig. 20 Schematic diagram of the cross section along the bb' direction;

[0065] Fig. 22 and Fig.23 for Fig.19 Two cross-sectional structural schematic diagrams of the hollow area of ​​the flow channel substrate after the motherboard is assembled into a box;

[0066] Fig.24 for Fig.19 The deformation simulation diagram of the flow channel substrate mother plate is shown;

[0067] Fig.25 and Fig.26 A schematic diagram of the structure of two flow channel substrate motherboards provided again in the embodiments of the present application;

[0068] Fig. 27 Provides a square glass with a side length of 68mm in the setting Fig.26 Schematic diagram of deformation simulation when the glue layer is shown in . DETAILED DESCRIPTION

[0069] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0070] In the embodiments of the present application, words such as "first", "second", "third", and "fourth" are used to distinguish between identical or similar items with basically the same functions and effects. This is only for the purpose of clearly describing the technical solutions of the embodiments of the present application and shall not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0071] In the embodiments of the present application, the terms "upper", "lower", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0072] In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example" or "some examples" are intended to indicate that a specific feature, structure, material or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present application. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0073] In the embodiments of the present application, “plurality” means two or more, and “at least one” means one or more, unless otherwise clearly and specifically defined.

[0074] The features such as "parallel", "perpendicular", and "same" used in the embodiments of the present application include the features such as "parallel", "perpendicular", and "same" in a strict sense, as well as the cases where "approximately parallel", "approximately perpendicular", "approximately the same", etc. include certain tolerances, taking into account the tolerances related to the measurement of specific quantities (e.g., the limitations of the measurement system), and are expressed as being within the acceptable deviation range for a specific value determined by a person of ordinary skill in the art. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of the value.

[0075] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, ie, meaning "including, but not limited to."

[0076] The polygon in this specification is not a strict polygon, and may be an approximate triangle, parallelogram, trapezoid, pentagon or hexagon, etc., and there may be some small deformations caused by tolerance.

[0077] It should be noted that the samples to be tested, the testing process, etc. related to the organisms involved in this application are obtained and conducted with the permission of the individual or guardian and in compliance with laws and regulations.

[0078] Microfluidics is a technology that integrates basic operating units such as sample preparation, reaction, separation, and detection in biological, chemical, and medical analysis processes onto a micrometer-scale chip, and automatically completes the entire analysis process. Due to its huge potential in the fields of biology, chemistry, and medicine, it has developed into an emerging interdisciplinary subject involving chemistry, fluid physics, microelectronics, new materials, biology, and biomedical engineering, and has received widespread attention from industry insiders.

[0079] Microfluidic chips mainly include flow cell chips and digital microfluidic chips. With the application of flow cell chips in technical fields such as gene sequencing, flow cell chips have been vigorously developed. Usually, the flow cell chip has a double substrate structure, one of which is provided with a flow channel (called a flow cell substrate), and the other substrate has a through hole (called a cover plate). After the two substrates are attached, the flow channel is enclosed in the middle of the chip to form a sequencing channel. The sequencing channel can be connected to the outside world through the through hole for operations such as liquid injection and liquid discharge.

[0080] Gene sequencing technology is the most commonly used technology in molecular biology research, and its emergence has greatly promoted the development of biology. High-throughput gene sequencing technology first randomly fragments the genome to prepare a library, and then detects the signals generated by the extension reaction of tens of thousands of clone arrays to finally obtain sequencing information. The commonly used detection signals for gene sequencing are optical signals, so the appearance requirements for the chip are generally high. It is necessary to ensure that the chip surface is clean and there is no unexpected scattered refracted light. Based on the above detection principle, glass has become the preferred substrate material for flow channel chips due to its good optical properties and easy processing.

[0081] Since the glass thickness specifications corresponding to the glass raw materials and factory production lines are fixed, and the thickness of the microfluidic chip varies according to the detection equipment, the glass needs to be thinned when making the flow channel substrate of the flow channel chip. In the related art, the preparation process of the flow channel substrate is briefly as follows: Step 1, due to the small size of the flow channel chip, in order to improve production efficiency, a metal mask layer is prepared on a large glass plate; Step 2, cutting to form a flow channel substrate motherboard; Step 3, attaching a protective film to protect the metal mask layer; Step 4, glass thinning; Step 5, removing the protective film; Step 6, using the metal mask layer as a mask, channel etching is performed on the glass; Step 7, removing the metal mask layer; Step 8, cutting the flow channel substrate motherboard to obtain multiple flow channel substrates.

[0082] Since the glass is easily damaged when the metal mask layer is prepared after the glass is thinned, the preparation process of the flow channel substrate in the related art is to perform glass thinning after the metal mask layer is formed. In order to protect the metal mask layer, a protective film is attached to protect the metal mask layer before the glass thinning process. However, chemical liquids can easily penetrate into the interface between the protective film and the metal mask layer, causing corrosion on the side of the metal mask layer. In addition, in the process of removing the protective film at a later stage, the protective layer can easily remain on the metal mask layer. In this way, when the flow channel is etched using the metal mask layer as a mask at a later stage, the depth of the flow channel and the accuracy of the flow channel pattern are difficult to guarantee, which greatly reduces the production yield and increases the cost.

[0083] Based on this, the embodiments of the present application provide a flow channel substrate motherboard and a preparation method thereof, and a flow channel chip; by designing the above-mentioned flow channel substrate motherboard, the metal mask layer can be effectively protected during the preparation of the flow channel substrate, and a high-quality flow channel substrate can be obtained by subsequently cutting the flow channel substrate motherboard; thereby improving the preparation yield of the flow channel substrate and the flow channel chip.

[0084] The following is a description with reference to the accompanying drawings.

[0085] The embodiment of the present application provides a flow channel substrate motherboard, such as Figure 1 As shown, it includes: a flow channel substrate setting area A and a first redundant area B1 surrounding the flow channel substrate setting area A;

[0086] A plurality of flow channel substrate chips are arranged in the flow channel substrate arrangement area A, and the flow channel substrate chip includes a first substrate and a first metal mask layer M1 located on one side of the first substrate;

[0087] A first glue layer J1 is disposed in the first redundant area B1. The first metal mask layer M1 extends from the flow channel substrate arrangement area A to the first redundant area B1. The first glue layer J1 surrounds the first metal mask layer M1, and a gap is formed between the first glue layer J1 and the first metal mask layer M1.

[0088] In an exemplary embodiment, the mother board of the flow channel substrate is used to prepare the flow channel substrate. In practical applications, due to the small size of the flow channel substrate chip, in order to improve production efficiency, many processes are directly performed on the mother board of the flow channel substrate, and finally the mother board of the flow channel substrate is cut into flow channel substrates by a cutting process.

[0089] The first metal mask layer M1 and the second metal mask M2 mentioned later are both metal masks used to form a channel pattern on the channel substrate chip. The relevant introduction of the metal mask forming the channel pattern can refer to the description in the relevant technology, which will not be repeated here.

[0090] Exemplarily, the difference between the first metal mask layer M1 and the second metal mask M2 is that the mask patterns of the two are different, and they are used to form different flow channel patterns.

[0091] Exemplarily, the first metal mask layer M1 is the same as the second metal mask layer M2 (same thickness, same mask pattern), and can form the same flow channel pattern.

[0092] In the introduction of the structure of the flow channel substrate motherboard, the present application mainly introduces the first metal mask layer M1. In the description related to the preparation process, the second metal mask layer M2 is introduced to distinguish the metal mask layers in the two flow channel substrate motherboards. In fact, the first metal mask layer M1 and the second metal mask M2 can be the same or similar structure.

[0093] The first base is a part of the substrate 1 of the flow channel substrate motherboard.

[0094] Exemplarily, the substrate and the first base of the flow channel substrate motherboard are both made of optical glass of the same specification.

[0095] Exemplarily, the first adhesive layer J1 is used to seal two flow channel substrate mother boards together; wherein, the first adhesive layer J1 is provided on one flow channel substrate mother board, and the first adhesive layer J1 may not be provided on the other flow channel substrate mother board.

[0096] Of course, in some embodiments, the first adhesive layer J1 may be provided on both flow channel substrate motherboards to seal the two flow channel substrate motherboards together. In this case, the thickness of the two first adhesive layers J1 may be adjusted according to the situation.

[0097] In some embodiments, Figure 2 As shown, in order to avoid the problem of the first adhesive layer J1 being broken or punctured, the portion of the first adhesive layer J1 located at the corner is set to be rounded. Figure 2 for Figure 1 A local enlarged view of the dotted circle.

[0098] like Figure 2 As shown, in the first redundant area B1, a first marking pattern bj1 is provided on the side of the first glue layer J1 away from the first metal mask layer M1, and a second marking pattern bj2 is also provided in a local area of ​​the first metal mask layer M1; both marking patterns are used to improve the box alignment accuracy of the two flow channel substrate motherboards in the subsequent preparation process.

[0099] During the preparation of the flow channel substrate in the related art, the side of the metal mask layer is prone to corrosion, such as Figure 1As shown, by extending the first metal mask layer M1 to the first redundant area B1, a buffer space is reserved to prevent corrosion to the portion of the first metal mask layer M1 located in the flow channel substrate setting area A; combined with the improvement of the process method described later, that is, in the process of preparing the flow channel substrate, the first flow channel substrate mother board and the second flow channel substrate mother board are sealed in a box through the first adhesive layer J1, as shown in FIG. Figure 4 or Figure 5 As shown, after the box is sealed, the metal mask layer (including the first metal mask layer M1 and the second metal mask layer M2) is protected inside the box structure, and the substrate of the first flow channel substrate motherboard and the substrate of the second flow channel substrate motherboard are thinned to avoid damage to the metal mask layer during the thinning process, and then the box is disassembled, the flow channel is etched, and the metal mask layer is removed in turn to obtain the first flow channel substrate motherboard and the second flow channel substrate motherboard without a glue layer; these two motherboards are cut again to obtain multiple high-quality flow channel substrates.

[0100] Since the quality of the metal mask layer largely determines the etching depth and accuracy of the flow channel, by designing the above-mentioned flow channel substrate motherboard, the metal mask layer can be well protected in the process of preparing the flow channel substrate using the flow channel substrate motherboard, thereby obtaining a high-quality flow channel substrate; thereby improving the preparation yield of the flow channel substrate and the flow channel chip.

[0101] By setting a gap between the first glue layer J1 and the first metal mask layer M1, it is prevented that the first glue layer J1 causes damage to the first metal mask layer M1 during the unpacking process.

[0102] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Figure 1 As shown, the dimension d1 of the gap in the direction from the flow channel substrate setting area A to the first redundant area B1 is greater than or equal to 0.5 mm.

[0103] Since the first adhesive layer J1 needs to be removed in the preparation process of the flow channel substrate mentioned later, for example, a cutting process is adopted, with the area between the first adhesive layer J1 and the first metal mask layer M1 as the cutting area, and the first adhesive layer J1 on the box structure is cut off to complete the box disassembly; by setting the size d1 of the gap between the first adhesive layer J1 and the first metal mask layer M1 to be greater than or equal to 0.5 mm; on the one hand, a cutting space is reserved for the subsequent cutting of the first adhesive layer J1, and on the other hand, the first adhesive layer J1 is further prevented from pulling and damaging the first metal mask layer M1.

[0104] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Figure 3 As shown, the thickness t1 of the first glue layer J1 along the normal direction of the flow channel substrate motherboard is greater than or equal to twice the thickness t2 of the first metal mask layer M1. Figure 3 for Figure 2Schematic diagram of the cross section along the aa' direction.

[0105] Exemplarily, when the thickness t2 of the first metal mask layer M1 is equal to the thickness t3 of the second metal mask layer M3, as shown in FIG. Figure 4 As shown, the thickness t1 of the first glue layer J1 along the normal direction of the flow channel substrate motherboard is greater than twice the thickness t2 of the first metal mask layer M1.

[0106] Exemplarily, when the thickness t2 of the first metal mask layer M1 is equal to the thickness t3 of the second metal mask layer M2, as shown in FIG. Figure 5 As shown, the thickness t1 of the first glue layer J1 along the normal direction of the flow channel substrate motherboard is equal to twice the thickness t2 of the first metal mask layer M1.

[0107] It should be noted that, when the thickness t1 of the first adhesive layer J1 along the normal direction of the flow channel substrate motherboard is equal to twice the thickness t2 of the first metal mask layer M1, or when the thickness t1 of the first adhesive layer J1 along the normal direction of the flow channel substrate motherboard is equal to the sum of the thickness t2 of the first metal mask layer M1 and the thickness t3 of the second metal mask layer M3, the metal mask layers of the two flow channel substrate motherboards are in contact during the subsequent box alignment; in order to avoid the metal mask layer causing indentations on the base of the flow channel substrate (a base with indentations will reduce the accuracy of subsequent preparation of the flow channel pattern), the metal mask layers of the two flow channel substrate motherboards can be set to have the same mask pattern, and the two metal mask layers are mirror-symmetrical and can completely overlap when the box is aligned.

[0108] Of course, when the thickness t2 of the first metal mask layer M1 is equal to the thickness t3 of the second metal mask layer M3, as shown in FIG. Figure 4 As shown, the thickness t1 of the first adhesive layer J1 along the normal direction of the flow channel substrate motherboard is greater than twice the thickness t2 of the first metal mask layer M1, and there is a gap between the two metal mask layers after the box is aligned. When the amount of glass deformation caused by gravity is smaller than the size of the gap, the metal mask layers of the two flow channel substrate motherboards do not contact, and the metal mask layers of the two flow channel substrate motherboards can have different patterns, or the metal mask layers of the two flow channel substrate motherboards can not overlap in the box alignment.

[0109] When the amount of glass deformation caused by gravity is greater than or equal to the size of the gap, the metal mask layers of the two flow channel substrate mother plates are in contact; Figure 6 From the deformation simulation diagram of the flow channel substrate motherboard, it can be seen that when the thickness of the glass substrate is 0.7mm and the size of the flow channel substrate motherboard is 319mm*359mm, the maximum deformation under the influence of gravity is 120μm. Figure 1In the structure shown, the flow channel substrate motherboard is supported only on four sides after the box is assembled. The glass substrate will deform under the action of gravity, and the deformation amount is much larger than the thickness of the first adhesive layer J1 (for example, the thickness of the first adhesive layer J1 is 3μm). In order to prevent the metal mask layer from causing indentation on the base of the flow channel substrate, it is necessary to set the metal mask layers of the two flow channel substrate motherboards to be able to completely overlap when the box is assembled.

[0110] in, Figure 6 for Figure 1 The deformation simulation diagram of the flow channel substrate motherboard is shown, in which different colors represent the deformation amount, and the unit of the numerical value is micrometer; the meaning of the simulation diagram in the following text is the same as here and will not be repeated.

[0111] In some flow channel substrate mother plates provided in the embodiments of the present application, the first metal mask layer M1 is used to prepare a flow channel pattern disposed on the first substrate, such as Figure 1 As shown, the minimum plane dimension d2 of the portion of the first metal mask layer M1 located in the first redundant area B1 is greater than or equal to twice the depth of the channel pattern.

[0112] In the embodiments of the present application, on the one hand, Figure 1 As shown, by extending the first metal mask layer M1 to the first redundant area B1, a buffer space is reserved to prevent corrosion to the portion of the first metal mask layer M1 located in the flow channel substrate setting area A; on the other hand, by setting the minimum plane dimension d2 of the portion of the first metal mask layer M1 located in the first redundant area B1 to be greater than or equal to twice the depth of the flow channel pattern, when the flow channel pattern is subsequently etched using the metal mask layer as a mask, due to the supporting effect of the glass substrate in the first redundant area B1 on the first metal mask layer M1, insufficient supporting force caused by etching of the glass substrate in the flow channel substrate setting area A can be avoided, thereby avoiding the problem of collapse of the first metal mask layer M1 during the etching process.

[0113] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Figure 7 As shown, multiple rows of channel substrate chips are arranged in the channel setting area A, multiple channel substrate chips in the same row are connected, there is a spacing between two adjacent rows of channel substrate chips, and a second redundant area B2 is arranged between two adjacent rows of channel substrate chips; wherein a second adhesive layer J2 is arranged in at least one second redundant area B2, and the second adhesive layer J2 is connected to the first adhesive layer J1.

[0114] For example, Figure 7 As shown, in each second redundant area B2, a second adhesive layer J2 is disposed, wherein the extension direction (eg, OB direction) of the second adhesive layer J2 is consistent with the arrangement direction of the plurality of flow channel substrates in the same row.

[0115] Among them, Figure 7 or Fig.10 As shown, the distance (d3 or d4) between the second adhesive layer J2 and the first metal mask layer M1 is greater than 0.5 mm. This is similar to the distance d1 between the first adhesive layer J1 and the first metal mask layer M1 in the previous text, in order to avoid the adhesive layer from pulling and damaging the metal mask layer during the subsequent cutting and unpacking process. Fig.10 for Figure 7 or Fig. 9 A local enlarged view of the position indicated by the dotted circle.

[0116] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Figure 7 or Fig. 9 As shown, a second adhesive layer J2 is disposed in each second redundant area B2; wherein, along a direction perpendicular to the arrangement direction of the plurality of flow channel substrates in the same row (eg Figure 7 In the OA direction), the distance H1 between two adjacent second adhesive layers J2 is less than or equal to 119 mm.

[0117] Exemplarily, the width W of the first adhesive layer J1 and the second adhesive layer J2 are both greater than or equal to 1 mm. The thickness of the first adhesive layer J1 and the second adhesive layer J2 are both greater than or equal to 3 μm.

[0118] Fig.11 Provides such as Fig. 9 The deformation simulation diagram of the flow channel substrate motherboard is shown. Among them, when the first glue layer J1 and the second glue layer J2 are set in the flow channel substrate motherboard at the same time, and the distance H1 between two adjacent second glue layers is equal to 119mm, the maximum deformation of the flow channel substrate motherboard is about 2.9μm, which is less than the thickness of the glue layer. In this way, after the subsequent boxing, the metal mask layers of the two flow channel substrate motherboards will not contact each other, avoiding the scratches between the metal mask layers and also avoiding the metal mask layers from causing indentations on the substrate. Based on this, Fig. 9 As shown, the distance H1 between two adjacent second adhesive layers J2 is set to be less than or equal to 119 mm. At this time, it is not required that the first metal mask layer M1 and the second metal mask layer M2 have patterns that can overlap when assembling the cells.

[0119] In some embodiments, when the distance H2 between the second adhesive layer J2 in the second redundant area B1 and the first adhesive layer J1 along the extension direction perpendicular to the second adhesive layer J2 (eg, the OA direction) is greater than 119 mm, Figure 8 As shown, a second glue layer J2 can be provided in the first redundant area B1 to further improve the scratches between the metal mask layers caused by the deformation of the flow channel substrate mother plate after subsequent boxing, and also avoid the metal mask layer causing indentations on the substrate.

[0120] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.12 and Fig.15 As shown, a plurality of array-arranged flow channel substrates are provided in the flow channel setting area A, and the flow channel substrates are connected and arranged; a plurality of third adhesive layers J3 are provided in the flow channel setting area A, and the orthographic projection of the third adhesive layer J3 on the flow channel substrate overlaps with at least one flow channel substrate; and the minimum distance (d5 or d6) between the third adhesive layer J3 and the edge of the flow channel substrate is greater than or equal to 150 μm.

[0121] like Fig.12 and Fig.15 As shown, the third adhesive layer J3 is located near the junction of two adjacent flow channel substrates. In order to avoid the material of the third adhesive layer J3 remaining near the cutting line during subsequent cutting, the minimum distance (d5 or d6) between the third adhesive layer J3 and the edge of the flow channel substrate is set to be greater than or equal to 150μm. While avoiding the influence of material residue on cutting, each flow channel substrate chip in the flow channel substrate motherboard is supported to the greatest extent after box assembly.

[0122] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.12 As shown, an orthographic projection of a third adhesive layer J3 on the flow channel substrate overlaps with a flow channel substrate chip, and the outer contour of the orthographic projection of the third adhesive layer J3 on the flow channel substrate is a closed figure. Fig.13 For Fig.12 A top view of the structure after the first metal mask layer M1 is set on the basis of.

[0123] Exemplarily, the figure formed by the outer contour of the orthographic projection of the third adhesive layer J3 on the flow channel substrate is similar to the figure formed by the outer contour of the flow channel substrate, that is, the two figures have the same shape but different size ratios.

[0124] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.12 As shown, along the first direction or the second direction, the plane size of the third adhesive layer J3 is less than or equal to 140 mm; the first direction is the direction from the flow channel substrate setting area A to the first redundant area B1, and the second direction is perpendicular to the first direction.

[0125] For example, Fig.12 As shown, a plane dimension H3 of the third adhesive layer J3 along the first direction is less than or equal to 140 mm; a plane dimension H4 of the third adhesive layer J3 along the second direction is less than or equal to 140 mm.

[0126] Fig.14 Provided that the square glass with a side length of 140mm is supported on four sides (while setting Fig.12The deformation simulation diagram of the first adhesive layer J1 and the third adhesive layer J3 shown in FIG. 1 shows that the maximum deformation is less than 3 μm. Based on this, it can be deduced that when the flow channel substrate motherboard is provided with the following Fig.12 As shown in the first adhesive layer J1 and the third adhesive layer J3, when the plane size of the third adhesive layer J3 along the first direction or the second direction is less than or equal to 140 mm, the maximum deformation of the flow channel substrate motherboard is less than 3 μm, which is less than the thickness of the first adhesive layer J1. In this way, after the subsequent box formation, the metal mask layers of the two flow channel substrate motherboards will not contact each other, thereby avoiding scratches between the metal mask layers and avoiding indentations on the substrate caused by the metal mask layers.

[0127] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.15 As shown, the orthographic projection of a third adhesive layer J3 on the flow channel substrate overlaps with a row of flow channel substrate chips, and the extension direction (eg, horizontal direction) of the third adhesive layer J3 is consistent with the arrangement direction of a row of flow channel substrate chips.

[0128] For example, Fig.15 As shown, the third glue layer J3 is disposed in the flow channel arrangement area A and is not connected to the first glue layer J1 in the first redundant area B1; in some embodiments, the third glue layer J3 may be extended to be connected to the first glue layer J1.

[0129] In some embodiments, Fig.15 As shown, along the extending direction perpendicular to the third adhesive layer J3, the distance H5 between two adjacent third adhesive layers J3 is less than or equal to 119 mm.

[0130] Fig.16 Provided that the square glass with a side length of 119 mm is supported on both sides (while setting Fig.15 The deformation simulation diagram of the first adhesive layer J1 and the third adhesive layer J3 shown in FIG. 1 shows that the maximum deformation is less than 3 μm. Based on this, it can be deduced that when the flow channel substrate motherboard is provided with the following Fig.15 When the first adhesive layer J1 and the third adhesive layer J3 shown in the figure are arranged perpendicular to the extension direction of the third adhesive layer J3 and the distance H5 between two adjacent third adhesive layers J3 is less than or equal to 119 mm, the maximum deformation of the flow channel substrate motherboard is less than 3 μm, which is less than the thickness of the first adhesive layer J1. In this way, after subsequent box formation, the metal mask layers of the two flow channel substrate motherboards will not contact each other, thereby avoiding scratches between the metal mask layers and avoiding indentations on the substrate caused by the metal mask layers.

[0131] In some embodiments, Fig.17As shown, when the distance H6 between the third adhesive layer J3 and the first adhesive layer J1 along the extension direction perpendicular to the third adhesive layer J3 is greater than 119 mm, a third adhesive layer J3 can be set in the first redundant area B1 to further improve the scratch problem between the metal mask layers caused by the deformation of the flow channel substrate mother plate after subsequent boxing, and also avoid the metal mask layer causing indentations on the substrate.

[0132] Exemplarily, the thickness of the third adhesive layer J2 is smaller than the thickness of the first adhesive layer J1 .

[0133] like Fig.18 , Fig.19 or Fig.25 As shown, in some flow channel substrate motherboards provided in the embodiments of the present application, a fourth adhesive layer J4 is isolatedly arranged on each flow channel substrate, and multiple fourth adhesive layers J4 are arranged at equal intervals along a first direction (for example, a horizontal direction) and are arranged at equal intervals along a second direction (for example, a vertical direction); the thickness of the fourth adhesive layer J4 is less than or equal to the thickness of the first adhesive layer J1; the first direction is the direction from the flow channel substrate setting area A to the first redundant area B1, and the second direction is perpendicular to the first direction.

[0134] For example, Fig.25 As shown, the distance H8 between two adjacent fourth adhesive layers J4 in the horizontal direction is equal; and the distance H7 between two adjacent fourth adhesive layers J4 in the vertical direction is equal.

[0135] For example, Fig.25 As shown, the distance d7 between the fourth glue layer J4 and the edge of the flow channel chip is greater than 150 μm.

[0136] The shape of the plane figure of the fourth adhesive layer J4 is not limited here. For example, the shapes of the plane figures of the hollow area L and the fourth adhesive layer J4 can be both circular, rounded polygonal or polygonal.

[0137] Exemplarily, the diameter of the circular hollow area L is less than or equal to 2 mm.

[0138] Exemplarily, the diameter of the circular fourth adhesive layer J4 is less than or equal to 1 mm.

[0139] The minimum distance between the edge of the hollow area L and the fourth adhesive layer J4 is less than or equal to 0.5 mm.

[0140] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.18 As shown, the fourth adhesive layer J4 is disposed on a side of the first metal mask layer M1 away from the first substrate, and the thickness of the fourth adhesive layer J4 is less than the thickness of the first adhesive layer J1.

[0141] exist Fig.18In the embodiment, the fourth adhesive layer J4 is disposed above the first metal mask layer M1. In this way, the design space of the first metal mask layer M1 can be saved. At this time, in some embodiments, the thickness of the first adhesive layer J1 can be substantially equal to the sum of the thicknesses of the fourth adhesive layer J4 and the first metal mask layer M1.

[0142] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.19 and Fig. 20 As shown, a hollow area L is provided on the first metal mask layer M1, the orthographic projection of the fourth adhesive layer J4 on the first substrate falls within the orthographic projection of the outer contour of the hollow area L on the first substrate, and the thickness t4 of the fourth adhesive layer J4 is equal to the thickness t1 of the first adhesive layer J1. Fig. 20 for Fig.19 A local enlarged view of the area near the hollow area L.

[0143] Fig.21 Provided in Fig. 20 Schematic diagram of the cross-sectional structure along the bb' direction. When the motherboards of the two flow channel substrates are assembled into a box, Fig. 22 or Fig.23 As shown, since the thickness t4 of the fourth adhesive layer J4 is equal to the thickness t1 of the first adhesive layer J1, illustratively, when the thickness t2 of the first metal mask layer M1 is equal to the thickness t3 of the second metal mask layer M3, as shown in FIG. Fig. 22 As shown, the thickness t4 of the fourth adhesive layer J4 is greater than twice the thickness t2 of the first metal mask layer M1, and the motherboards of the two flow channel substrates are not in contact after being assembled; illustratively, when the thickness t2 of the first metal mask layer M1 is equal to the thickness t3 of the second metal mask layer M2, as shown in FIG. Fig.23 As shown, the thickness t4 of the fourth glue layer J4 is equal to twice the thickness t2 of the first metal mask layer M1.

[0144] In the embodiment of the present application, since a fourth adhesive layer J4 is provided in the flow channel substrate setting area A, in the process of preparing the flow channel substrate, after cutting the first adhesive layer J1 and unpacking the box, the fourth adhesive layer J4 provided in the flow channel substrate setting area A needs to be removed, and then the flow channel pattern is etched.

[0145] In the flow channel substrate motherboard provided by the embodiment of the present application, when the fourth adhesive layer J4 is provided in the flow channel substrate setting area A, the glass substrate is effectively supported. Fig.24 Provides such as Fig.19 The deformation simulation diagram of the flow channel substrate motherboard shown in the figure shows that the maximum deformation of the flow channel substrate motherboard is about 1.8μm. This means that when this design is adopted, after the subsequent box formation, the metal mask layers of the two flow channel substrate motherboards will not contact each other, thus avoiding the scratches between the metal mask layers and also avoiding the metal mask layers from causing indentations on the substrate.

[0146] In some flow channel substrate motherboards provided in the embodiments of the present application, such as Fig.26 As shown, a plurality of fifth adhesive layers J5 and a plurality of sixth adhesive layers J6 are further provided in the first redundant area B1; the plurality of fifth adhesive layers J5 are arranged at equal intervals along the first direction, and the plurality of sixth adhesive layers J6 are arranged at equal intervals along the second direction; wherein, along the second direction (for example, the vertical direction), the minimum spacing H9 between the fifth adhesive layer J5 and the fourth adhesive layer J4 is equal to the spacing H7 between two adjacent fourth adhesive layers J4; along the first direction (for example, the horizontal direction), the minimum spacing H10 between the sixth adhesive layer J6 and the fourth adhesive layer J4 is equal to the spacing H8 between two adjacent fourth adhesive layers J4.

[0147] In some flow channel substrate motherboards provided in the embodiments of the present application, the distance (H7 or H8) between two adjacent fourth adhesive layers J4 along the first direction or the second direction is less than or equal to 68 mm.

[0148] Fig. 27 A square glass with a side length of 68 mm is provided when supported at four points (for example, Fig.26 The maximum deformation of the adhesive layer is about 3 μm. Based on this, it can be deduced that when the following are set in the flow channel substrate motherboard Fig.15 When the first adhesive layer J1 and the fourth adhesive layer J4 shown in the figure (or the first adhesive layer J1, the fourth adhesive layer J4, the fifth adhesive layer J5 and the sixth adhesive layer J6 are set at the same time), and the spacing (H7 or H8) between two adjacent fourth adhesive layers J4 along the first direction or the second direction is less than or equal to 68mm, the maximum deformation of the flow channel substrate motherboard is less than 3μm, which is less than the thickness of the first adhesive layer J1. In this way, after the subsequent box forming, the metal mask layers of the two flow channel substrate motherboards will not contact each other, thereby avoiding scratches between the metal mask layers and avoiding the metal mask layers from causing indentations on the substrate.

[0149] It should be noted that if Fig.26 As shown, when the minimum distance between the fourth adhesive layer J4 and the first adhesive layer J1 is less than or equal to 68 mm, the fifth adhesive layer J5 and the sixth adhesive layer J6 may not be provided.

[0150] In the embodiment of the present application, the shape of the flow channel substrate may include a rectangle or a square.

[0151] Exemplarily, based on the solution in the foregoing text of the present application, when the size of the flow channel substrate in the flow channel substrate motherboard is 74.2mm*34.5mm, and its short side length 34.5mm is less than 68mm, a solution of providing a first adhesive layer J1 and a fourth adhesive layer J4 can be adopted.

[0152] In summary, for the adhesive layer arranged in the flow channel substrate arrangement area A, when the minimum side length of a single flow channel substrate is less than or equal to 68 mm, the first adhesive layer J1 and the fourth adhesive layer J4 can be arranged to support the box-pairing structure; when the minimum side length of a single flow channel substrate is greater than 68 mm and less than or equal to 119 mm, the following scheme can be adopted: Fig.15 The first adhesive layer J1 and the third adhesive layer J3 (e.g., in a strip shape) shown in the figure support the box-to-box structure; when the minimum side length of a single flow channel substrate is greater than 119 mm and less than or equal to 150 mm, the following can be used: Fig.12 The solution of the first glue layer J1 and the third glue layer J3 (for example, a closed ring-shaped rectangle) shown supports the box-to-box structure. In this way, while ensuring that the box-to-box structure has a high supporting effect, the area of ​​the glue layer set in the flow channel substrate setting area A can be reduced as much as possible, thereby facilitating the subsequent removal of the glue layer in the flow channel substrate setting area A and reducing the risk of glue layer material remaining on the metal mask layer.

[0153] The adhesive layers mentioned in the embodiments of the present application can all be prepared using ultraviolet light curing adhesive (UV adhesive).

[0154] An embodiment of the present application provides a method for preparing a flow channel substrate, the method comprising:

[0155] S1, providing a substrate substrate; the substrate substrate comprises a plurality of first flow channel substrate motherboard substrates;

[0156] Since the size of the flow channel chip is small, in order to improve production efficiency, a metal mask layer is prepared on a large glass plate, and after the metal mask layer is formed, it is cut into mother plates.

[0157] S2, forming a plurality of second metal mask layers M2 on the substrate;

[0158] The second metal mask layer M2 can be formed by film formation, exposure, and development. The specific process can be referred to the introduction in the relevant technology, which will not be repeated here.

[0159] S3, performing a first cutting process on the substrate to obtain a plurality of first flow channel substrate master plates; the first flow channel substrate master plates include a substrate of the first flow channel substrate master plate and a second metal mask layer M2;

[0160] The first flow channel substrate motherboard is a flow channel substrate motherboard as described above without a glue layer, and the second flow channel substrate motherboard is a flow channel substrate motherboard as described above.

[0161] Exemplarily, the first flow channel substrate master plate and the second flow channel substrate master plate may have the same or similar structures.

[0162] For example, the structures of the first flow channel substrate master plate and the second flow channel substrate master plate are completely the same.

[0163] For another example, in addition to the glue layer, the patterns of the metal mask layers in the two mother boards are different.

[0164] In the introduction of the structure of the flow channel substrate motherboard, the present application mainly introduces the first metal mask layer M1. In the description related to the preparation process, the second metal mask layer M2 is introduced to distinguish the metal mask layers in the two flow channel substrate motherboards. In fact, the first metal mask layer M1 and the second metal mask M2 can be the same or similar structure.

[0165] Exemplarily, the difference between the first metal mask layer M1 and the second metal mask M2 is that the mask patterns of the two are different, and they are used to form different flow channel patterns.

[0166] Exemplarily, the first metal mask layer M1 is the same as the second metal mask layer M2 (same thickness, same mask pattern), and can form the same flow channel pattern.

[0167] S4, sealing the first flow channel substrate motherboard and the second flow channel substrate motherboard through the first adhesive layer J1 on the second flow channel substrate motherboard, the second flow channel substrate motherboard being the flow channel substrate motherboard described in any one of the above texts;

[0168] Specifically, after the first glue layer J1 is coated on the second flow channel substrate motherboard, the first flow channel substrate motherboard and the second flow channel substrate motherboard after glue coating are subjected to a box-matching process, and the first glue layer J1 is cured by light or heating, so as to achieve the box-matching and sealing of the first flow channel substrate motherboard and the second flow channel substrate motherboard. At this time, the first metal mask layer M1 and the second metal mask layer M2 are both protected inside the box-matching structure, and the substrates of the first flow channel substrate motherboard and the second flow channel substrate motherboard are thinned to avoid damage to the metal mask layer during the thinning process.

[0169] It should be noted that when the box is sealed, the first flow channel substrate motherboard and the second flow channel substrate motherboard are mirror-imaged. For example, in the box structure after sealing, the first metal mask layer M1 and the second metal mask layer M2 are mirror-symmetric.

[0170] S5, performing a thinning process on the substrate of the first flow channel substrate motherboard and the substrate of the second flow channel substrate motherboard;

[0171] Exemplarily, the substrate 1 is usually made of glass, and the substrate 1 can be thinned by chemical liquid etching. The specific process can be referred to the introduction in the relevant technology, which will not be described here.

[0172] S6, performing a second cutting process, cutting off the first adhesive layer J1 and unpacking the box.

[0173] In the preparation method provided in the embodiment of the present application, the first flow channel substrate motherboard and the second flow channel substrate motherboard are sealed in a box by the first adhesive layer J1. After the box is sealed, the metal mask layer (including the first metal mask layer M1 and the second metal mask layer M2) is protected inside the box structure, and then the substrate of the first flow channel substrate motherboard and the substrate of the second flow channel substrate motherboard are thinned, thereby avoiding damage to the metal mask layer during the thinning process.

[0174] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the step of performing a second cutting process in S6, cutting off the first adhesive layer J1 and performing unpacking, the method further includes:

[0175] S7, using the plurality of first metal mask layers M1 as masks, etching the first flow channel substrate master plate to obtain a first flow channel pattern; using the plurality of second metal mask layers M2 as masks, etching the second flow channel substrate master plate to obtain a second flow channel pattern;

[0176] S8, removing the first metal mask layer M1 and the second metal mask layer M2 respectively to obtain a first flow channel substrate master plate and a second flow channel substrate master plate without a glue layer;

[0177] S9, cutting the first flow channel substrate master board and the second flow channel substrate master board without the adhesive layer respectively to obtain a plurality of flow channel substrates.

[0178] In an embodiment of the present application, in the process of preparing the flow channel substrate, the first flow channel substrate motherboard and the second flow channel substrate motherboard are sealed in a box by the first adhesive layer J1. After the box is sealed, the metal mask layer (including the first metal mask layer M1 and the second metal mask layer M2) is protected inside the box structure, and the substrate of the first flow channel substrate motherboard and the substrate of the second flow channel substrate motherboard are thinned to avoid damage to the metal mask layer during the thinning process. Then, the box is disassembled, the flow channel is etched, and the metal mask layer is removed in turn to obtain the first flow channel substrate motherboard and the second flow channel substrate motherboard without the adhesive layer; these two motherboards are cut again to obtain multiple high-quality flow channel substrates. Since the quality of the metal mask layer largely determines the etching depth and accuracy of the flow channel, by designing the above-mentioned preparation method, in the process of preparing the flow channel substrate, a high-quality flow channel substrate can be obtained after cutting the above-mentioned two flow channel substrate motherboards; thereby improving the preparation yield of the flow channel substrate and the flow channel chip.

[0179] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the step of performing a first cutting process on the base substrate to obtain a plurality of first flow channel substrate motherboards in S3, and before the step of sealing the first flow channel substrate motherboard and the second flow channel substrate motherboard in a box in S4 through a first adhesive layer, the method further includes:

[0180] S31, forming a plurality of fourth adhesive layers J4 on the second flow channel substrate motherboard, wherein a plurality of flow channel substrates are arranged on the second flow channel substrate motherboard, and the fourth adhesive layer J4 is isolatedly arranged on the flow channel substrate; the fourth adhesive layer J4 is used to support the box-matching structure.

[0181] In some methods for preparing flow channel substrate motherboards provided in embodiments of the present application, after the step of performing a second cutting process, cutting off the first glue layer J1 and unpacking the box in S6, and before the step of etching the first flow channel substrate motherboard with multiple first metal mask layers as masks to obtain a first flow channel pattern and etching the second flow channel substrate motherboard with multiple second metal mask layers as masks to obtain a second flow channel pattern in S7, the method further includes:

[0182] S61 , removing a plurality of fourth adhesive layers J4 .

[0183] The glue layer in the flow channel substrate setting area is removed to avoid interference of the glue layer on the etching process when the flow channel pattern is subsequently etched.

[0184] Specifically, when the fourth adhesive layer J4 is provided in the flow channel substrate motherboard, the preparation method of the flow channel substrate is as follows:

[0185] 1. Provide a substrate substrate; the substrate substrate includes a plurality of first flow channel substrate motherboard substrates;

[0186] 2. Forming a plurality of second metal mask layers M2 on the substrate;

[0187] 3. Perform a first cutting process on the substrate substrate to obtain a plurality of first flow channel substrate master plates; the first flow channel substrate master plates include the substrate of the first flow channel substrate master plate and the second metal mask layer M2; the first flow channel substrate master plate is a flow channel substrate master plate as described in any one of the first aspects without a glue layer;

[0188] 4. Apply the material of the fourth adhesive layer J4, and cure it by light or heat to form the fourth adhesive layer J4;

[0189] 5. After coating the first adhesive layer J1, the first flow channel substrate motherboard and the second flow channel substrate motherboard after adhesive coating are subjected to a box-matching process, and the first adhesive layer J1 is cured by light or heating, so as to achieve the box-matching and sealing of the first flow channel substrate motherboard and the second flow channel substrate motherboard;

[0190] 6. Thinning the substrate of the first flow channel substrate motherboard and the substrate of the second flow channel substrate motherboard;

[0191] 7. Perform the second cutting process, cut off the first adhesive layer J1 and unpack;

[0192] 8. Use chemical liquid (such as acetone) to remove the fourth adhesive layer J4;

[0193] 9. Using the first metal mask layers M1 as masks, the first flow channel substrate master plate is etched to obtain a first flow channel pattern; using the second metal mask layers M2 as masks, the second flow channel substrate master plate is etched to obtain a second flow channel pattern;

[0194] 10. Remove the first metal mask layer M1 and the second metal mask layer M2 respectively to obtain a first flow channel substrate master board and a second flow channel substrate master board without a glue layer;

[0195] 11. Cut the first flow channel substrate master plate and the second flow channel substrate master plate without the adhesive layer respectively to obtain a plurality of flow channel substrates.

[0196] It should be noted that the glue layer disposed in the flow channel substrate setting area A of the flow channel substrate motherboard described above is prepared and removed in a manner similar to the fourth glue layer J4, and the glue layer disposed in the redundant area (such as B1 or B2) can be cut and removed in a manner similar to the cutting of the first glue layer J1. The specific process will not be repeated here.

[0197] An embodiment of the present application provides a microfluidic chip, including a flow channel substrate and a cover plate;

[0198] The cover plate is provided with an opening, and the flow channel substrate is prepared by the method described in any one of the above texts.

[0199] The opening is connected to the outside world and is used for operations such as adding liquid and discharging liquid.

[0200] It should be noted that the microfluidic chip also includes other components and structures. Only the structures related to the invention point are described here. The other components and structures included in the microfluidic chip can refer to the relevant technology and will not be repeated here.

[0201] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A flow channel substrate motherboard, characterized in that: include: A flow channel substrate setting area and a first redundant area surrounding the flow channel substrate setting area; A plurality of the flow channel substrates are arranged in the flow channel substrate arrangement area, and the flow channel substrate includes a first substrate and a first metal mask layer located on one side of the first substrate; A first glue layer is disposed in the first redundant area. The first metal mask layer extends from the flow channel substrate arrangement area to the first redundant area. The first glue layer surrounds the first metal mask layer, and a gap is provided between the first glue layer and the first metal mask layer.

2. The flow channel substrate motherboard according to claim 1, characterized in that: A dimension of the gap along a direction from the flow channel substrate setting area to the first redundant area is greater than or equal to 0.5 mm.

3. The flow channel substrate motherboard according to claim 1, characterized in that: The thickness of the first glue layer along the normal direction of the flow channel substrate motherboard is greater than or equal to twice the thickness of the first metal mask layer.

4. The flow channel substrate motherboard according to claim 1, characterized in that: The first metal mask layer is used to prepare a flow channel pattern disposed on the first substrate, and a minimum plane dimension of a portion of the first metal mask layer located in the first redundant area is greater than or equal to twice a depth of the flow channel pattern.

5. The flow path substrate motherboard according to any one of claims 1 to 4, characterized in that: The flow channel setting area is provided with a plurality of rows of the flow channel substrates, and a plurality of the flow channel substrates in the same row are connected and arranged, and there is a spacing between two adjacent rows of the flow channel substrates, and a second redundant area is provided between two adjacent rows of the flow channel substrates; A second glue layer is provided in at least one of the second redundant regions, and the second glue layer is connected to the first glue layer.

6. The flow channel substrate motherboard according to claim 5, characterized in that: The second adhesive layer is disposed in each of the second redundant regions; wherein, along a direction perpendicular to the arrangement direction of the plurality of flow channel substrates in the same row, a distance between two adjacent second adhesive layers is less than or equal to 119 mm.

7. The flow path substrate motherboard according to any one of claims 1 to 4, characterized in that: The flow channel setting area is provided with a plurality of flow channel substrates arranged in an array, and each of the flow channel substrates is connected and arranged; A plurality of third adhesive layers are arranged in the flow channel setting area, and the orthographic projection of the third adhesive layer on the flow channel substrate overlaps with at least one of the flow channel substrates; and the minimum distance between the third adhesive layer and the edge of the flow channel substrate is greater than or equal to 150 μm.

8. The flow channel substrate motherboard according to claim 7, characterized in that: An orthographic projection of one of the third adhesive layers on the flow channel substrate overlaps with another of the flow channel substrates, and an outer contour of the orthographic projection of the third adhesive layer on the flow channel substrate is a closed figure.

9. The flow channel substrate motherboard according to claim 7, characterized in that: An orthographic projection of one of the third adhesive layers on the flow channel substrate overlaps with a row of the flow channel substrates, and an extending direction of the third adhesive layer is consistent with an arrangement direction of a row of the flow channel substrates.

10. The flow path substrate motherboard according to any one of claims 1 to 4, characterized in that: A fourth adhesive layer is isolatedly disposed on each of the flow channel substrates, and a plurality of the fourth adhesive layers are arranged at equal intervals along the first direction and at equal intervals along the second direction; The thickness of the fourth adhesive layer is less than or equal to the thickness of the first adhesive layer; the first direction is the direction from the flow channel substrate setting area to the first redundant area, and the second direction is perpendicular to the first direction.

11. The flow channel substrate motherboard according to claim 10, characterized in that: The fourth adhesive layer is disposed on a side of the first metal mask layer away from the first substrate, and a thickness of the fourth adhesive layer is smaller than a thickness of the first adhesive layer.

12. The flow channel substrate motherboard according to claim 10, characterized in that: A hollow area is provided on the first metal mask layer, the orthographic projection of the fourth adhesive layer on the first substrate falls within the orthographic projection of the outer contour of the hollow area on the first substrate, and the thickness of the fourth adhesive layer is equal to the thickness of the first adhesive layer.

13. The flow channel substrate motherboard according to claim 10, characterized in that: A plurality of fifth adhesive layers and a plurality of sixth adhesive layers are further arranged in the first redundant area; the plurality of fifth adhesive layers are arranged at equal intervals along the first direction, and the plurality of sixth adhesive layers are arranged at equal intervals along the second direction; Among them, along the second direction, the minimum distance between the fifth adhesive layer and the fourth adhesive layer is equal to the distance between two adjacent fourth adhesive layers; along the first direction, the minimum distance between the sixth adhesive layer and the fourth adhesive layer is equal to the distance between two adjacent fourth adhesive layers.

14. A method for preparing a flow channel substrate, characterized in that: The method comprises: Providing a substrate substrate; the substrate substrate comprises a plurality of first flow channel substrate motherboard substrates; forming a plurality of second metal mask layers on the base substrate; The base substrate is subjected to a first cutting process to obtain a plurality of the first flow channel substrate master plates; the first flow channel substrate master plates include the substrate of the first flow channel substrate master plate and the second metal mask layer; the first flow channel substrate master plate is the flow channel substrate master plate according to any one of claims 1 to 13 without a glue layer; The first flow channel substrate motherboard and the second flow channel substrate motherboard are sealed together by a first adhesive layer on the second flow channel substrate motherboard, wherein the second flow channel substrate motherboard is the flow channel substrate motherboard according to any one of claims 1 to 13; Performing a thinning process on the substrate of the first flow channel substrate master plate and the substrate of the second flow channel substrate master plate; A second cutting process is performed to cut off the first adhesive layer and unpack the box.

15. The preparation method according to claim 14, characterized in that: After the steps of performing a second cutting process, cutting off the first adhesive layer and unpacking the box, the method further comprises: Using the plurality of the first metal mask layers as masks, etching the first flow channel substrate master plate to obtain a first flow channel pattern; using the plurality of the second metal mask layers as masks, etching the second flow channel substrate master plate to obtain a second flow channel pattern; Removing the first metal mask layer and the second metal mask layer respectively to obtain the first flow channel substrate master board and the second flow channel substrate master board without the glue layer; The first flow channel substrate master board and the second flow channel substrate master board without the adhesive layer are cut respectively to obtain a plurality of flow channel substrates.

16. The preparation method according to claim 15, characterized in that: After the step of performing a first cutting process on the base substrate to obtain a plurality of first flow channel substrate mother boards and before the step of sealing the first flow channel substrate mother board and the second flow channel substrate mother board together with the first adhesive layer, the method further includes: A plurality of fourth adhesive layers are formed on the second flow channel substrate motherboard, a plurality of the flow channel substrates are arranged on the second flow channel substrate motherboard, and the fourth adhesive layer is isolatedly arranged on the flow channel substrate; the fourth adhesive layer is used to support the box-matching structure.

17. The preparation method according to claim 16, characterized in that: After the second cutting process is performed to cut off the first glue layer and to remove the box, the first flow channel substrate mother board is etched using the first plurality of metal mask layers as masks to obtain a first flow channel pattern; Before the step of etching the second flow channel substrate mother board using the plurality of the second metal mask layers as masks to obtain the second flow channel pattern, the method further includes: The plurality of fourth adhesive layers are removed.

18. A microfluidic chip, characterized in that: It includes a flow channel substrate and a cover plate; The cover plate is provided with an opening, and the flow channel substrate is prepared by the method according to any one of claims 15 to 17.

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