Method for forming deep trench isolation structure in rear active region

Abstract

The invention provides a method for forming a deep trench isolation structure in a rear active region, which comprises the following steps of: providing a substrate, forming a first hard mask layer on the substrate, forming shallow trenches on the first hard mask layer and the substrate below the first hard mask layer by utilizing photoetching and etching methods, and then forming shallow trench isolation in the shallow trenches to define an active region; forming a second hard mask layer on the shallow trench isolation and the first hard mask layer; forming a through deep trench on the second hard mask layer, the shallow trench isolation below the second hard mask layer and the substrate; forming a protective layer on the deep trench and the second hard mask layer, and then forming a polycrystalline silicon layer on the protective layer; and forming the polycrystalline silicon layer into an oxide layer by using a thermal oxidation method, and then grinding the shallow trench isolation to a required height. According to the process, a window is large, film layer residues are not prone to being generated, a gap from deep trench isolation to an active region does not need to be set, and the deep trench isolation structure is small in size.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for forming a deep trench isolation structure in a rear active area. Background Art

[0002] Trench isolation is an isolation technology widely used to prevent crosstalk between integrated circuit devices. As the requirements for device breakdown resistance increase, traditional trench isolation technology can no longer meet the isolation requirements.

[0003] Deep trench isolation technology came into being and has been widely used in various processes including BCD.

[0004] The current process for forming a deep trench isolation structure in the post-active region has a small process window and is prone to produce film residues, resulting in wafer scrapping.

[0005] In the current process, in order to reduce the SIN warping (such as Figure 1 As shown in the figure, and the impact on CMOS devices, the deep trench isolation structure is limited to 5um to the active area boundary.

[0006] In order to solve the above problems, it is necessary to propose a novel method for forming a deep trench isolation structure in the rear active region. Summary of the invention

[0007] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a method for forming a deep trench isolation structure in a post-active area, so as to solve the problem that the process of forming a deep trench isolation structure in the post-active area in the prior art has a small process window, is prone to produce film layer residues, and causes wafer scrapping.

[0008] To achieve the above objectives and other related objectives, the present invention provides a method for forming a deep trench isolation structure in a rear active region, comprising:

[0009] Step 1, providing a substrate, forming a first hard mask layer on the substrate, forming a shallow trench on the first hard mask layer and the substrate below the first hard mask layer by photolithography and etching, and then forming a shallow trench isolation in the shallow trench to define an active area;

[0010] Step 2, forming a second hard mask layer on the shallow trench isolation and the first hard mask layer;

[0011] Step 3, forming a through deep trench on the second hard mask layer and the shallow trench isolation thereunder, and the substrate;

[0012] Step 4: forming a protective layer on the deep trench and the second hard mask layer, and then forming a polysilicon layer on the protective layer;

[0013] Step 5: Form the polysilicon layer into an oxide layer by thermal oxidation, and then grind the shallow trench isolation to a desired height.

[0014] Preferably, the first hard mask layer in step 1 is an ONO layer, and the ONO layer consists of a bottom oxide layer, a nitride layer, and a top oxide layer stacked in sequence from bottom to top.

[0015] Preferably, the etching method in step one is dry etching.

[0016] Preferably, the shallow trench isolation material in step 1 is spin-on-glass, dense oxide formed by high-density plasma chemical vapor deposition, silicon dioxide, or double filling of silicon dioxide and silicon nitride.

[0017] Preferably, the material of the second hard mask layer in step 2 is silicon dioxide.

[0018] Preferably, in step three, the deep groove is formed by photolithography and etching.

[0019] Preferably, the protective layer in step 4 is a trench isolation oxide layer.

[0020] Preferably, the grinding method in step five is chemical mechanical planarization grinding.

[0021] Preferably, in step five, after the polysilicon layer is formed into the oxide layer, if there is still a gap in the deep trench, the gap is filled with polysilicon.

[0022] Preferably, in step five, the polysilicon and the shallow trench isolation are ground onto the nitride layer, and then the nitride layer is removed by wet etching.

[0023] As described above, the method for forming a deep trench isolation structure in the rear active area of ​​the present invention has the following beneficial effects:

[0024] The method of the present invention does not consume the silicon substrate at the bottom / sidewall of the deep trench isolation, and forms an isolation oxide medium by oxidizing the polysilicon layer, which can effectively eliminate the lifting of the hard mask (such as silicon nitride) caused by thermal oxidation in the prior art method, and further eliminate the film layer residue on the wafer surface caused by polysilicon residue; there is no need to limit the size of the DTI and STI boundaries, which is conducive to reducing the device size, increasing the device density, and lowering the cost; there is no need for a deep trench SIN hard mask and a subsequent removal process, so the process is simplified and the process cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Shown is a schematic diagram of silicon nitride warping in the prior art;

[0026] Figure 2Shown is a schematic diagram of the process flow of the present invention;

[0027] Figure 3 It is a schematic diagram showing the formation of shallow trench isolation and a second hard mask layer according to the present invention;

[0028] Figure 4 It is a schematic diagram of forming a deep trench according to the present invention;

[0029] Figure 5 It is a schematic diagram showing the formation of a protective layer and a polysilicon layer according to the present invention;

[0030] Figure 6 It is a schematic diagram showing the oxidation of a polysilicon layer into an oxide layer according to the present invention;

[0031] Figure 7 It is a schematic diagram of using polysilicon to fill deep trench gaps according to the present invention;

[0032] Figure 8 Shown is a schematic diagram of the grinding of the present invention;

[0033] Fig. 9 It is a schematic diagram of removing the nitride layer according to the present invention. DETAILED DESCRIPTION

[0034] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0035] See also Figure 2 The present invention provides a method for forming a deep trench isolation structure in a rear active area, comprising:

[0036] Step 1, providing a substrate 101, forming a first hard mask layer 102 on the substrate 101, forming a shallow trench on the first hard mask layer 102 and the substrate 101 thereunder by photolithography and etching, and then forming a shallow trench isolation 103 in the shallow trench to define an active area; specifically, forming a photoresist layer on the first hard mask layer 102, opening the photoresist layer by photolithography to define a shallow trench formation area, forming a shallow trench by etching, and removing the photoresist layer by an ashing process and a wet cleaning method;

[0037] In some embodiments, the first hard mask layer 102 in step 1 is an ONO layer, and the ONO layer is composed of a bottom oxide layer 1021, a nitride layer 1022, and a top oxide layer 1023 stacked in sequence from bottom to top.

[0038] In some embodiments, the etching method in step 1 is dry etching.

[0039] In some embodiments, the material of the shallow trench isolation 103 in step 1 is spin-on-glass, dense oxide formed by high-density plasma chemical vapor deposition, silicon dioxide, or double filling of silicon dioxide and silicon nitride.

[0040] Step 2: forming a second hard mask layer 104 on the shallow trench isolation 103 and the first hard mask layer 102, which is used to reduce etching loss when etching deep trenches, forming a second hard mask layer 104. Figure 3 The structure shown;

[0041] In some embodiments, the material of the second hard mask layer 104 in step 2 is silicon dioxide.

[0042] Step 3: forming a through deep trench on the second hard mask layer 104 and the shallow trench isolation 103 thereunder and the substrate 101, forming a Figure 4 The structure shown;

[0043] In some embodiments, in step three, deep trenches are formed by photolithography and etching.

[0044] Step 4: forming a protective layer 105 on the deep trench and the second hard mask layer 104, and then forming a polysilicon layer 106 on the protective layer 105, so as to form Figure 5 The structure shown;

[0045] In some embodiments, the protection layer 105 in step 4 is a trench isolation oxide layer (liner oxide).

[0046] Step 5: Use thermal oxidation to form the polysilicon layer 106 into an oxide layer 107, as shown in FIG. Figure 6 The structure shown is then polished to a desired height for the shallow trench isolation 103. For example, if the oxide layer 107 fills the remaining deep trench, the oxide layer 107 is polished to the nitride layer 1022, and then the nitride layer 1022 is removed by wet etching.

[0047] In some embodiments, the polishing method in step five is chemical mechanical planarization polishing.

[0048] In some embodiments, after the polysilicon layer 106 is formed into the oxide layer 107 in step 5, if there is still a gap in the deep trench, the gap is filled with polysilicon 108 to form a Figure 7 The structure shown.

[0049] In some embodiments, in step 5, the polysilicon 108 and the shallow trench isolation 103 thereunder are ground onto the nitride layer 1022 to form a Figure 8The structure shown in FIG. 1 is then removed by wet etching to form a nitride layer 1022. Fig. 9 The structure shown.

[0050] The method of the present invention does not consume the silicon substrate 101 at the bottom / sidewall of the deep trench isolation, and forms an isolation oxidation medium by oxidizing the polysilicon layer 106, which can effectively eliminate the lifting of the hard mask (such as silicon nitride) caused by thermal oxidation in the prior art method, and further eliminate the film residue on the wafer surface caused by the polysilicon residue;

[0051] In order to avoid the influence of the thermal oxidation layer on the adjacent active area of ​​the deep trench isolation, the original process method needs to limit the minimum size of the DTI and STI boundary to 5 microns. The method of the present invention has no requirement for this distance, which is conducive to reducing the device size, increasing the device density, and lowering the cost.

[0052] The present invention does not require a deep trench SIN hard mask and a subsequent removal process, thus simplifying the process and reducing the process cost.

[0053] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0054] In summary, the method of the present invention does not consume the silicon substrate at the bottom / sidewall of the deep trench isolation, and forms an isolation oxide medium by oxidizing the polysilicon layer, which can effectively eliminate the lifting of the hard mask (such as silicon nitride) caused by thermal oxidation in the prior art method, and further eliminate the film layer residue on the wafer surface caused by polysilicon residue; it does not need to limit the size of the DTI and STI boundaries, which is conducive to reducing the device size, increasing the device density, and lowering the cost; it does not require a deep trench SIN hard mask and subsequent removal process, which simplifies the process and reduces the process cost. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0055] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for forming a deep trench isolation structure in a rear active area, characterized in that: At least: Step 1, providing a substrate, forming a first hard mask layer on the substrate, forming a shallow trench on the first hard mask layer and the substrate below the first hard mask layer by photolithography and etching, and then forming a shallow trench isolation in the shallow trench to define an active area; Step 2, forming a second hard mask layer on the shallow trench isolation and the first hard mask layer; Step 3, forming a through deep trench on the second hard mask layer and the shallow trench isolation thereunder, and the substrate; Step 4: forming a protective layer on the deep trench and the second hard mask layer, and then forming a polysilicon layer on the protective layer; Step 5: Form the polysilicon layer into an oxide layer by thermal oxidation, and then grind the shallow trench isolation to a desired height.

2. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The first hard mask layer in step 1 is an ONO layer, and the ONO layer is composed of a bottom oxide layer, a nitride layer, and a top oxide layer stacked in sequence from bottom to top.

3. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The etching method in step one is dry etching.

4. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The material of the shallow trench isolation in step 1 is spin-on glass, dense oxide formed by high-density plasma chemical vapor deposition, silicon dioxide, or double filling of silicon dioxide and silicon nitride.

5. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The material of the second hard mask layer in step 2 is silicon dioxide.

6. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: In step three, the deep trench is formed by photolithography and etching.

7. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The protection layer in step 4 is a trench isolation oxide layer.

8. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: The polishing method in step five is chemical mechanical planarization polishing.

9. The method for forming a deep trench isolation structure in a rear active area according to claim 1, characterized in that: In step 5, after the polysilicon layer is formed into the oxide layer, if there is still a gap in the deep trench, the gap is filled with polysilicon.

10. The method for forming a deep trench isolation structure in a rear active area according to claim 9, characterized in that: In step five, the polysilicon and the shallow trench isolation are ground onto the nitride layer, and then the nitride layer is removed by wet etching.

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