Semiconductor light emitting structure and preparation method and testing method thereof

Abstract

The present invention provides a semiconductor light-emitting structure and a preparation method and a testing method thereof. The semiconductor light-emitting structure comprises: a semiconductor substrate layer; an active layer, located on one side of the semiconductor substrate layer; a first electrode layer, located on the side of the semiconductor substrate layer away from the active layer; wherein the first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, the plurality of openings are arranged in a periodic array along a first direction and a second direction, the spacing distance between adjacent openings along the first direction is less than or equal to 10 microns, the spacing distance between adjacent openings along the second direction is less than or equal to 10 microns, the ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor light-emitting structure and a preparation method and a testing method thereof. Background Art

[0002] The development direction of high-power semiconductor laser chips includes higher power conversion efficiency, higher output optical power and higher brightness. High-power semiconductor laser chips are highly nonlinear systems of photons, carriers and phonons that are mutually coupled. It is very important to obtain the spatial distribution of carriers and temperature in the active region of high-power semiconductor laser chips under working conditions and directly observe the failure behavior of high-power semiconductor laser chips for performance evaluation and optimization of high-power semiconductor laser chips.

[0003] However, the current process of obtaining information on the spatial distribution of carriers and temperature and failure behavior of semiconductor light-emitting structures, such as high-power semiconductor laser chips, will affect the electrical distribution inside the semiconductor light-emitting structures. Summary of the invention

[0004] Therefore, the technical problem to be solved by the present invention is how to reduce the impact on the electrical distribution inside the semiconductor light-emitting structure during the process of acquiring the spatial distribution of carriers and temperature and failure behavior information, thereby providing a semiconductor light-emitting structure and its preparation method and testing method.

[0005] The present invention provides a semiconductor light-emitting structure, comprising: a semiconductor substrate layer; an active layer, located on one side of the semiconductor substrate layer; and a first electrode layer, located on the side of the semiconductor substrate layer away from the active layer; wherein the first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, and the plurality of openings are arranged in a periodic array along a first direction and a second direction, the spacing distance between adjacent openings along the first direction is less than or equal to 10 microns, the spacing distance between adjacent openings along the second direction is less than or equal to 10 microns, the ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%.

[0006] Optionally, the shape of the orthographic projection of the opening on the semiconductor substrate layer is rectangular or circular.

[0007] Optionally, the dimension of the end portion of the opening away from the semiconductor substrate layer in the first direction is greater than or equal to the dimension of the end portion of the opening toward the semiconductor substrate layer in the first direction; the dimension of the end portion of the opening away from the semiconductor substrate layer in the second direction is greater than or equal to the dimension of the end portion of the opening toward the semiconductor substrate layer in the second direction.

[0008] Optionally, the active layer has a first surface facing the first electrode layer; the center of the bottom surface of the opening facing the semiconductor substrate layer is projected on the first surface as a first point; the first surface has a second point and a third point, the connection between the second point and the first point is parallel to the first direction, the distance from the second point to the first point is greater than 1 / 2 of the periodic size in the first direction, the connection between the third point and the first point is parallel to the second direction, and the distance from the third point to the first point is greater than 1 / 2 of the periodic size in the second direction; the line from the center of the bottom surface to the first edge point and the second edge point of the edge of the bottom surface is parallel to the first direction, and the first edge point and the second edge point are located on both sides of the center along the first direction; the line from the center of the bottom surface to the third edge point and the fourth edge point of the edge of the bottom surface is parallel to the second direction, and the third edge point and the fourth edge point are located on both sides of the center along the second direction; wherein, the angle between the line from the second point to the first edge point and the line from the second point to the second edge point is greater than or equal to 30 degrees; the angle between the line from the third point to the third edge point and the line from the third point to the fourth edge point is greater than or equal to 30 degrees.

[0009] The present application also provides a method for preparing a semiconductor light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate layer; forming a first electrode layer on a side of the semiconductor substrate layer away from the active layer; wherein the first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, the plurality of openings are arranged in a periodic array along a first direction and a second direction, the spacing distance between adjacent openings along the first direction is less than or equal to 10 microns, the spacing distance between adjacent openings along the second direction is less than or equal to 10 microns, the ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%.

[0010] Optionally, the step of forming a first electrode layer on the side of the semiconductor substrate layer facing away from the active layer includes: forming a patterned photoresist layer on the side of the semiconductor substrate layer facing away from the active layer, the photoresist layer having a groove; forming a first initial electrode layer in the groove and on the surface of the photoresist layer facing away from the semiconductor substrate layer; peeling off the photoresist layer and the portion of the first initial electrode layer located on the surface of the photoresist layer facing away from the semiconductor substrate layer from the semiconductor substrate layer, and forming the first electrode layer with the portion of the first initial electrode layer located in the groove.

[0011] The present application also provides a testing method, comprising: providing the semiconductor light-emitting structure of the present application; performing any one or more of a failure behavior test, a temperature test in an active layer, and a carrier distribution test in an active layer on the semiconductor light-emitting structure from a side of the first electrode layer away from the semiconductor substrate layer.

[0012] Optionally, performing a failure behavior test on the semiconductor light-emitting structure includes: applying a working current to the semiconductor light-emitting structure to make the semiconductor light-emitting structure emit light; using an image sensor to acquire a test image through the plurality of openings from a side of the first electrode layer away from the semiconductor substrate layer; and acquiring a failure position of the semiconductor light-emitting structure based on the test image.

[0013] Optionally, performing a carrier distribution test in the active layer of the semiconductor light-emitting structure includes: obtaining an intensity modulation function Φ(X,Y) of the first electrode layer according to the spacing distance between adjacent openings along the first direction, the spacing distance between adjacent openings along the second direction, the size of the openings in the first direction, and the size of the openings in the second direction; obtaining a normalized intensity distribution I(X,Y) of spontaneous radiation when the semiconductor light-emitting structure is working from a side of the first electrode layer away from the semiconductor substrate layer through a plurality of the openings; and obtaining a carrier distribution N(X,Y) in the active layer according to the intensity modulation function Φ(X,Y) and the normalized intensity distribution I(X,Y) of spontaneous radiation, where N(X,Y)= .

[0014] Optionally, performing a temperature test in the active layer of the semiconductor light-emitting structure includes: obtaining a spontaneous radiation peak wavelength drift coefficient δ of the semiconductor light-emitting structure; placing the semiconductor light-emitting structure on a heat sink, and the heat sink cools the semiconductor light-emitting structure; setting the temperature of the heat sink to a first temperature T1, providing a pulse operating current to the semiconductor light-emitting structure, and obtaining a first spontaneous radiation peak wavelength λ(T1) of light emitted from the opening by the semiconductor light-emitting structure under the pulse operating current; providing a continuous operating current to the semiconductor light-emitting structure, and obtaining a second spontaneous radiation peak wavelength λ(T) of light emitted from the opening by the semiconductor light-emitting structure under the continuous operating current; obtaining a second temperature T according to the second spontaneous radiation peak wavelength λ(T), the first spontaneous radiation peak wavelength λ(T1), the first temperature and the spontaneous radiation peak wavelength drift coefficient δ; λ(T)=δ(T-T1)+λ(T1). BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1A schematic diagram of a semiconductor light emitting structure provided by an embodiment of the present invention;

[0017] Figure 2 for Figure 1 A bottom view of the first electrode layer;

[0018] Figure 3 for Figure 1 A bottom view of the first electrode layer;

[0019] Figure 4 for Figure 1 A partial schematic diagram of a semiconductor light emitting structure;

[0020] Figure 5 This is a test image of a partial opening area obtained during a failure behavior test on a semiconductor light-emitting structure. DETAILED DESCRIPTION

[0021] In the related technology, increasing the width of the light-emitting area of ​​the semiconductor laser chip in the slow axis direction, extending the resonance length of the semiconductor laser chip, and preparing a semiconductor laser chip with a wide waveguide and a long cavity length are the main means to increase the optical power, so that the size of the semiconductor laser chip in the slow axis direction is much larger than its working wavelength. When working at a large current, due to the combined effect of the diffusion of carriers and heat in the slow axis direction, multiple modes are distributed in the slow axis direction, thereby affecting the power efficiency and greatly reducing the beam quality in the slow axis direction. The cavity length direction of the semiconductor laser chip is unevenly distributed along the direction from the anti-reflection film to the anti-reflection film due to the extremely asymmetric coating. Especially when working at a large current far from the threshold, the uneven distribution of carriers and temperature gradually increases, and the performance of the semiconductor laser chip degrades, which is not conducive to further improvement of the optical output power. With the continuous improvement of the output power of semiconductor laser chips, reliability has become a key issue in the development and application of semiconductor laser chips as core devices, and has gradually attracted the attention of researchers and the industry. Studying the failure mechanism of semiconductor laser chips and directly observing failures are the prerequisites for proposing improvement measures and the only way to improve the reliability of semiconductor laser chips. These effects limit the further application of high-power, wide-area, long-cavity semiconductor laser chips. Therefore, it is very important to optimize the structure of high-power, wide-area, long-cavity semiconductor laser chips, further improve the output optical power, power conversion efficiency and reliability, obtain the temperature distribution and carrier distribution in the active area under real working conditions, and directly test the failure behavior. At present, the mainstream solution is to evaluate the temperature distribution and carrier distribution of semiconductor laser chips and observe the failure behavior through substrate spontaneous radiation. However, the substrate spontaneous radiation test requires the destruction of the back electrode, which leads to changes in the internal electrical distribution of the semiconductor laser chip.

[0022] On this basis, the present application provides a semiconductor light-emitting structure and a preparation method and a testing method thereof, and the process of obtaining information on the spatial distribution of carriers and temperature and failure behavior of the semiconductor light-emitting structure reduces the impact on the electrical distribution inside the semiconductor light-emitting structure.

[0023] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0025] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0026] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0027] An embodiment of the present invention provides a semiconductor light emitting structure, referring to Figures 1 to 3 ,include:

[0028] Semiconductor substrate layer 110;

[0029] The active layer 140 is located on one side of the semiconductor substrate layer 110;

[0030] A first electrode layer 100 is located on a side of the semiconductor substrate layer 110 away from the active layer 140;

[0031] The first electrode layer 100 has a plurality of openings 101, the openings 101 penetrate the first electrode layer 100, and the plurality of openings 101 are arranged in a periodic array along the first direction X and the second direction Y. The spacing distance between adjacent openings 101 along the first direction X is less than or equal to 10 microns, and the spacing distance between adjacent openings 101 along the second direction Y is less than or equal to 10 microns. The ratio of a size d1 of the opening 101 in the first direction X to a periodic size d2 of the plurality of openings 101 in the first direction X is less than or equal to 60%, and the ratio of a size d3 of the opening 101 in the second direction Y to a periodic size d4 of the plurality of openings 101 in the second direction Y is less than or equal to 60%.

[0032] In the present embodiment, since the first electrode layer 100 has a plurality of openings 101 arranged in a periodic array along the first direction X and the second direction Y, and the plurality of openings 101 have the size characteristics as described above, the spontaneous radiation of the active layer 140 of the semiconductor light-emitting structure in the working state can be tested through the plurality of openings 101, and the carrier distribution in the active layer of the semiconductor light-emitting structure is tested through the openings 101 without affecting the electrical distribution inside the semiconductor light-emitting structure, thereby making the carrier distribution in the active layer, the temperature test in the active layer and the failure behavior test more accurate.

[0033] In this embodiment, the semiconductor light emitting structure provided in this embodiment is used for testing and can also be used to emit light in actual work.

[0034] Within a periodic size d2 in the first direction X, spontaneous radiation information of the active layer 140 corresponding to the opening 101 and the active layer 140 corresponding to the area between the adjacent openings 101 can be radiated through the opening 101, thereby realizing failure behavior testing of the semiconductor light-emitting structure, temperature measurement in the active layer, and carrier distribution testing in the active layer.

[0035] Furthermore, the intensity modulation function Φ(X,Y) of the first electrode layer can be obtained through the period size d2, the period size d4, the ratio of the size d1 of the opening 101 in the first direction X to the period size d2, and the ratio of the size d3 of the opening 101 in the second direction Y to the period size d4, and the carrier distribution N(X,Y) in the active layer can be obtained based on the normalized intensity distribution I(X,Y) of the spontaneous radiation obtained from the opening and the intensity modulation function Φ(X,Y).

[0036] The periodic size d2 of the plurality of openings 101 in the first direction X refers to the sum of the size of one opening 101 along the first direction X and the spacing distance between the adjacent openings 101 along the first direction X. The periodic size d4 of the plurality of openings 101 in the second direction Y refers to the sum of the size of one opening 101 along the second direction Y and the spacing distance between the adjacent openings 101 along the second direction Y.

[0037] In one embodiment, the spacing distance between adjacent openings 101 along the first direction X is less than or equal to 10 microns and greater than or equal to 3 microns, such as 3 microns, 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, 9 microns or 10 microns; the spacing distance between adjacent openings 101 along the second direction Y is less than or equal to 10 microns and greater than or equal to 3 microns, such as 3 microns, 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, 9 microns or 10 microns; the ratio of the size d1 of the opening 101 in the first direction X to the periodic size d2 of the plurality of openings 101 in the first direction X is less than or equal to 60% and greater than or equal to 30%, such as 30%, 40%, 50% or 60%; the ratio of the size d3 of the opening 101 in the second direction Y to the periodic size d4 of the plurality of openings 101 in the second direction Y is less than or equal to 60% and greater than or equal to 30%, such as 30%, 40%, 50% or 60%. The accuracy of the failure behavior test, the temperature measurement in the active layer and the carrier distribution test in the active layer is further improved.

[0038] In one embodiment, the orthographic projection of the opening 101 on the semiconductor substrate layer 110 is in the shape of a rectangle or a circle. Figure 2 In the example, the shape of the orthographic projection of the opening 101 on the semiconductor substrate layer 110 is a rectangle. Figure 3 In the example, the shape of the orthographic projection of the opening 101 on the semiconductor substrate layer 110 is a circle. In other embodiments, there is no limitation on the shape of the orthographic projection of the opening on the semiconductor substrate layer.

[0039] In one embodiment, the size of the end of the opening 101 away from the semiconductor substrate layer 110 in the first direction X is greater than or equal to the size of the end of the opening 101 facing the semiconductor substrate layer 110 in the first direction X; the size of the end of the opening 101 away from the semiconductor substrate layer 110 in the second direction Y is greater than or equal to the size of the end of the opening 101 facing the semiconductor substrate layer 110 in the second direction Y. When the size of the end of the opening 101 away from the semiconductor substrate layer 110 in the first direction X is greater than the size of the end of the opening 101 facing the semiconductor substrate layer 110 in the first direction X, the size of the end of the opening 101 away from the semiconductor substrate layer 110 in the second direction Y is greater than the size of the end of the opening 101 facing the semiconductor substrate layer 110 in the second direction Y, so that it is easier to collect test signals from the opening 101.

[0040] When the dimension of the end of the opening 101 away from the semiconductor substrate layer 110 in the first direction X is greater than or equal to the dimension of the end of the opening 101 facing the semiconductor substrate layer 110 in the first direction X, and the dimension of the end of the opening 101 away from the semiconductor substrate layer 110 in the second direction Y is greater than or equal to the dimension of the end of the opening 101 facing the semiconductor substrate layer 110 in the second direction Y, the spacing distance between adjacent openings 101 along the first direction X refers to: the dimension of the surface of the first electrode layer 100 facing the semiconductor substrate layer 110 between adjacent openings 101 along the first direction X. The dimension d1 of the opening 101 in the first direction X refers to: the dimension of the end of the opening 101 facing the semiconductor substrate layer 110 in the first direction X. The dimension d3 of the opening 101 in the second direction Y refers to: the dimension of the end of the opening 101 facing the semiconductor substrate layer 110 in the second direction Y.

[0041] refer to Figure 4 , the active layer 140 has a first surface facing the first electrode layer 100; the orthographic projection of the center of the opening 101 facing the bottom surface of the semiconductor substrate layer 110 on the first surface is a first point H1; the first surface has a second point H2 and a third point (not shown), the connection between the second point H2 and the first point H1 is parallel to the first direction X, the distance from the second point H2 to the first point H1 is greater than 1 / 2 of the periodic size d2 of the first direction X, the connection between the third point and the first point H1 is parallel to the second direction Y, and the distance from the third point to the first point H1 is greater than 1 / 2 of the periodic size d4 of the second direction X; the line connecting the center of the opening 101 facing the bottom surface of the semiconductor substrate layer 110 to the first edge point H3 and the second edge point H4 of the edge of the bottom surface is parallel to In the first direction X, the first edge point H3 and the second edge point H4 are located on both sides of the center of the bottom surface of the opening 101 facing the semiconductor substrate layer 110 along the first direction X; the line connecting the third edge point and the fourth edge point from the center of the bottom surface of the opening 101 facing the semiconductor substrate layer 110 to the edge of the bottom surface is parallel to the second direction Y, and the third edge point and the fourth edge point are located on both sides of the center of the bottom surface of the opening 101 facing the semiconductor substrate layer 110 along the second direction Y; wherein, the angle θ2 between the line connecting the second point H2 to the first edge point H3 and the line connecting the second point H2 to the second edge point H4 is greater than or equal to 30 degrees; the angle between the line connecting the third point to the third edge point and the line connecting the third point to the fourth edge point is greater than or equal to 30 degrees. In this way, the normalized intensity of the spontaneous radiation of the second point and the third point through an opening 101 is not too small and can be easily detected.

[0042] An angle θ1 is formed between a line connecting the first point H1 to the first edge point H3 and a line connecting the first point H1 to the second edge point H4.

[0043] The spontaneous radiation of any light-emitting point in the active layer is a non-directional spherical wave. The normalized intensity of the spontaneous radiation of the first point H1 through an opening 101 is θ1 / 2π; the normalized intensity of the spontaneous radiation of the second point H2 through an opening 101 is θ2 / 2π.

[0044] In this embodiment, the semiconductor light emitting structure is an edge-emitting semiconductor laser device. The semiconductor light emitting structure further includes: a first confinement layer located between the semiconductor substrate layer and the active layer; a first waveguide layer located between the first confinement layer and the active layer; a second waveguide layer located on a side of the active layer away from the first waveguide layer; a second confinement layer located on a side of the second waveguide layer away from the active layer; and a second electrode layer located on a side of the second confinement layer away from the second waveguide layer.

[0045] In other embodiments, the semiconductor light emitting structure may be a vertical cavity surface emitting semiconductor laser. The semiconductor light emitting structure further includes: a first Bragg mirror located between the semiconductor substrate layer and the active layer; a second Bragg mirror located on a side of the active layer away from the first Bragg mirror; and a second electrode layer located on a side of the second Bragg mirror away from the active layer.

[0046] Comparative example: No opening is provided in the first electrode layer of the semiconductor light emitting structure, and the rest of the structure is the same as that of the semiconductor light emitting structure of the present application.

[0047] The electrical distribution inside the semiconductor light emitting structure of this embodiment is relatively consistent with the electrical distribution inside the semiconductor light emitting structure of the comparative example.

[0048] The present application also provides a method for preparing a semiconductor light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate layer; forming a first electrode layer on a side of the semiconductor substrate layer away from the active layer; wherein the first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, and the plurality of openings are arranged in a periodic array along a first direction and a second direction, the distance between adjacent openings along the first direction is less than or equal to 10 microns, the distance between adjacent openings along the second direction is less than or equal to 10 microns, the ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%.

[0049] In one embodiment, the step of forming a first electrode layer on a side of the semiconductor substrate layer facing away from the active layer includes: forming a patterned photoresist layer on a side of the semiconductor substrate layer facing away from the active layer, the photoresist layer having a groove; forming a first initial electrode layer in the groove and on a surface of the photoresist layer facing away from the semiconductor substrate layer; peeling off the photoresist layer and portions of the first initial electrode layer located on a surface of the photoresist layer facing away from the semiconductor substrate layer from the semiconductor substrate layer, and forming the first electrode layer with a portion of the first initial electrode layer located in the groove.

[0050] In this embodiment, the semiconductor light emitting structure is an edge-emitting semiconductor laser device. The method for preparing the semiconductor light emitting structure further includes: forming a first confinement layer on one side of the semiconductor substrate layer; forming a first waveguide layer on the side of the first confinement layer away from the semiconductor substrate layer. Forming the active layer is: forming the active layer on the side of the first waveguide layer away from the first confinement layer. The method for preparing the semiconductor light emitting structure further includes: forming a second waveguide layer on the side of the active layer away from the first waveguide layer; forming a second confinement layer on the side of the second waveguide layer away from the active layer; forming a second electrode layer on the side of the second confinement layer away from the second waveguide layer.

[0051] In other embodiments, the semiconductor light emitting structure may be a vertical cavity surface emitting semiconductor laser. The method for preparing the semiconductor light emitting structure further includes: forming a first Bragg mirror on one side of the semiconductor substrate layer. Forming the active layer includes: forming the active layer on the side of the first Bragg mirror away from the semiconductor substrate layer. The method for preparing the semiconductor light emitting structure further includes: forming a second Bragg mirror on the side of the active layer away from the first Bragg mirror; and forming a second electrode layer on the side of the second Bragg mirror away from the active layer.

[0052] Another embodiment of the present application also provides a testing method, including: providing the above-mentioned semiconductor light-emitting structure; performing any one or more of a failure behavior test, a temperature test in the active layer, and a carrier distribution test in the active layer on the semiconductor light-emitting structure from the side of the first electrode layer away from the semiconductor substrate layer.

[0053] In one embodiment, performing a failure behavior test on the semiconductor light-emitting structure includes: applying a working current to the semiconductor light-emitting structure to make the semiconductor light-emitting structure emit light; using an image sensor to obtain a test image from a side of the first electrode layer away from the semiconductor substrate layer through the plurality of openings; and obtaining a failure position of the semiconductor light-emitting structure based on the test image.

[0054] Figure 5 This is a test image of a part of the opening area obtained when performing a failure behavior test on a semiconductor light-emitting structure. Figure 5From the test image, it can be seen that there is a large black spot area in the test image, and the failure position corresponding to the semiconductor light-emitting structure can be obtained based on it.

[0055] When the test image obtained during the failure behavior test of the semiconductor light emitting structure emits light uniformly and has no black spots, it is determined that the semiconductor light emitting structure has not failed.

[0056] In one embodiment, the carrier distribution test in the active layer of the semiconductor light-emitting structure includes: obtaining an intensity modulation function Φ(X,Y) of the first electrode layer according to the spacing distance between adjacent openings along the first direction, the spacing distance between adjacent openings along the second direction, the size of the openings in the first direction, and the size of the openings in the second direction; obtaining the normalized intensity distribution I(X,Y) of spontaneous radiation when the semiconductor light-emitting structure is working from a side of the first electrode layer away from the semiconductor substrate layer through a plurality of the openings; obtaining the carrier distribution N(X,Y) in the active layer according to the intensity modulation function Φ(X,Y) and the normalized intensity distribution I(X,Y) of spontaneous radiation, where N(X,Y)= .

[0057] In one embodiment, performing a temperature test in the active layer of the semiconductor light-emitting structure includes: obtaining a spontaneous radiation peak wavelength drift coefficient δ of the semiconductor light-emitting structure; placing the semiconductor light-emitting structure on a heat sink, and the heat sink cools the semiconductor light-emitting structure; setting the temperature of the heat sink to a first temperature T1, providing a pulsed operating current to the semiconductor light-emitting structure, and obtaining a first spontaneous radiation peak wavelength λ(T1) of light emitted from the opening by the semiconductor light-emitting structure under the pulsed operating current; providing a continuous operating current to the semiconductor light-emitting structure, and obtaining a second spontaneous radiation peak wavelength λ(T) of light emitted from the opening by the semiconductor light-emitting structure under the continuous operating current; obtaining a second temperature T according to the second spontaneous radiation peak wavelength λ(T), the first spontaneous radiation peak wavelength λ(T1), the first temperature, and the spontaneous radiation peak wavelength drift coefficient δ; λ(T)=δ(T-T1)+λ(T1).

[0058] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.

Claims

1. A semiconductor light emitting structure, characterized in that: include: Semiconductor substrate layer; An active layer, located on one side of the semiconductor substrate layer; A first electrode layer, located on a side of the semiconductor substrate layer away from the active layer; The first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, the plurality of openings are arranged in a periodic array along the first direction and the second direction, the spacing distance between adjacent openings along the first direction is less than or equal to 10 microns, the spacing distance between adjacent openings along the second direction is less than or equal to 10 microns, the ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%; The second direction is perpendicular to the first direction.

2. The semiconductor light emitting structure according to claim 1, characterized in that: The orthographic projection of the opening on the semiconductor substrate layer is in the shape of a rectangle or a circle.

3. The semiconductor light emitting structure according to claim 1, characterized in that: The dimension of the end portion of the opening away from the semiconductor substrate layer in the first direction is greater than or equal to the dimension of the end portion of the opening toward the semiconductor substrate layer in the first direction; the dimension of the end portion of the opening away from the semiconductor substrate layer in the second direction is greater than or equal to the dimension of the end portion of the opening toward the semiconductor substrate layer in the second direction.

4. The semiconductor light emitting structure according to claim 1, characterized in that: The active layer has a first surface facing the first electrode layer; the center of the bottom surface of the opening facing the semiconductor substrate layer is projected on the first surface as a first point; the first surface has a second point and a third point, the connection between the second point and the first point is parallel to the first direction, the distance from the second point to the first point is greater than 1 / 2 of the periodic size in the first direction, the connection between the third point and the first point is parallel to the second direction, and the distance from the third point to the first point is greater than 1 / 2 of the periodic size in the second direction; the line from the center of the bottom surface to the first edge point and the second edge point of the edge of the bottom surface is parallel to the first direction, and the first edge point and the second edge point are located on both sides of the center along the first direction; the line from the center of the bottom surface to the third edge point and the fourth edge point of the edge of the bottom surface is parallel to the second direction, and the third edge point and the fourth edge point are located on both sides of the center along the second direction; Among them, the angle between the line connecting the second point to the first edge point and the line connecting the second point to the second edge point is greater than or equal to 30 degrees; the angle between the line connecting the third point to the third edge point and the line connecting the third point to the fourth edge point is greater than or equal to 30 degrees.

5. A method for preparing a semiconductor light emitting structure according to any one of claims 1 to 4, characterized in that: include: forming an active layer on one side of the semiconductor substrate layer; forming a first electrode layer on a side of the semiconductor substrate layer away from the active layer; Among them, the first electrode layer has a plurality of openings, the openings penetrate the first electrode layer, and the plurality of openings are arranged in a periodic array along the first direction and the second direction. The spacing distance between adjacent openings along the first direction is less than or equal to 10 microns, and the spacing distance between adjacent openings along the second direction is less than or equal to 10 microns. The ratio of the size of the opening in the first direction to the periodic size of the plurality of openings in the first direction is less than or equal to 60%, and the ratio of the size of the opening in the second direction to the periodic size of the plurality of openings in the second direction is less than or equal to 60%.

6. The method for preparing a semiconductor light emitting structure according to claim 5, characterized in that: The step of forming a first electrode layer on the side of the semiconductor substrate layer away from the active layer includes: forming a patterned photoresist layer on the side of the semiconductor substrate layer away from the active layer, wherein the photoresist layer has a groove; forming a first initial electrode layer in the groove and on the surface of the photoresist layer away from the semiconductor substrate layer; peeling off the photoresist layer and the portion of the first initial electrode layer located on the surface of the photoresist layer away from the semiconductor substrate layer from the semiconductor substrate layer, and forming the first electrode layer with the portion of the first initial electrode layer located in the groove.

7. A testing method, characterized in that: include: Providing a semiconductor light emitting structure according to any one of claims 1 to 4; Any one or more of the following tests are performed on the semiconductor light emitting structure from the side of the first electrode layer away from the semiconductor substrate layer: a failure behavior test, a temperature test in the active layer, and a carrier distribution test in the active layer.

8. The testing method according to claim 7, characterized in that: The failure behavior test of the semiconductor light-emitting structure includes: supplying a working current to the semiconductor light-emitting structure to make the semiconductor light-emitting structure emit light; using an image sensor to obtain a test image through a plurality of the openings from a side of the first electrode layer away from the semiconductor substrate layer; and obtaining a failure position of the semiconductor light-emitting structure based on the test image.

9. The testing method according to claim 7, characterized in that: The carrier distribution test in the active layer of the semiconductor light-emitting structure includes: obtaining an intensity modulation function Φ(X,Y) of the first electrode layer according to the spacing distance between adjacent openings along the first direction, the spacing distance between adjacent openings along the second direction, the size of the openings in the first direction, and the size of the openings in the second direction; obtaining the normalized intensity distribution I(X,Y) of spontaneous radiation when the semiconductor light-emitting structure is working from a side of the first electrode layer away from the semiconductor substrate layer through a plurality of the openings; obtaining the carrier distribution N(X,Y) in the active layer according to the intensity modulation function Φ(X,Y) and the normalized intensity distribution I(X,Y) of spontaneous radiation, where N(X,Y)= .

10. The testing method according to claim 7, characterized in that: The temperature test of the semiconductor light-emitting structure in the active layer includes: obtaining the spontaneous radiation peak wavelength drift coefficient δ of the semiconductor light-emitting structure; placing the semiconductor light-emitting structure on a heat sink, and the heat sink cools the semiconductor light-emitting structure; setting the temperature of the heat sink to a first temperature T1, providing a pulse working current to the semiconductor light-emitting structure, and obtaining a first spontaneous radiation peak wavelength λ(T1) of light emitted from the opening by the semiconductor light-emitting structure under the pulse working current; providing a continuous working current to the semiconductor light-emitting structure, and obtaining a second spontaneous radiation peak wavelength λ(T) of light emitted from the opening by the semiconductor light-emitting structure under the continuous working current; obtaining a second temperature T according to the second spontaneous radiation peak wavelength λ(T), the first spontaneous radiation peak wavelength λ(T1), the first temperature, and the spontaneous radiation peak wavelength drift coefficient δ; λ(T)=δ(T-T1)+λ(T1).

Images