Power-on time sequence and voltage detection device of multi-voltage circuit

Abstract

The invention provides a power-on time sequence and voltage detection device of a multi-voltage circuit, which comprises a power-on time sequence detection unit, a voltage detection unit and a result output unit, and is characterized in that the power-on time sequence detection unit comprises a power-on signal processing module, a power-on time sequence comparison module and a result processing module; the invention provides a quick and simple method for testing the power-on time sequence and the voltage of the power supply in an environment without an oscilloscope, solves the problems of tedious debugging operation of the power-on time sequence, high labor cost, long consumed time and the like, releases the productivity of developers, and improves the working efficiency of the developers.

Description

Technical Field

[0001] The present invention relates to the field of timing test of multiple power supplies, and more specifically, to a power-on timing and voltage detection device for a multiple voltage circuit. Background Art

[0002] The chips required for the boards currently being developed are becoming increasingly more powerful, and the complexity of the systems is increasing. Complex integrated circuit chips have increasingly higher requirements for power supplies in order to reduce power consumption and increase operating speed. In addition to the high accuracy requirements for chip power supply voltage, most complex chips also use low-voltage multi-level distributed power supply, and have clear requirements for the power-on sequence of each power supply. When a problem occurs on a board, it is very important to quickly measure the power-on sequence and power supply voltage in order to quickly troubleshoot the problem and save testing time.

[0003] During the board testing and troubleshooting stages, it is necessary to test the power-on timing of some signals. Since logic analyzers are relatively expensive, the current traditional approach is to reserve test points for these signals, use an oscilloscope to select a signal as a reference, use its changing edge as a trigger, measure the waveforms of these signals, and then read the time difference between the edges of the two signals to draw a timing diagram. This method is limited by the number of oscilloscope channels and requires repeated power-on tests, which wastes a lot of time. Summary of the invention

[0004] The present invention aims at the technical problems existing in the prior art and provides a power-on timing and voltage detection device for a multi-voltage circuit, which can overcome the problem that the timing detection in the prior art is limited by an oscilloscope.

[0005] The present invention provides a power-on timing and voltage detection device for a multi-voltage circuit, comprising a power-on timing detection unit, a voltage detection unit and a result output unit, wherein the power-on timing detection unit comprises a power-on signal processing module, a power-on timing comparison module and a result processing module;

[0006] The power-on signal processing module comprises n power-on signal processing circuits, the n power-on signal processing circuits being used to process n power supply signals into levels that can be recognized by the power-on timing comparison unit, wherein the multi-voltage circuit to be tested is powered by n power supplies of different levels;

[0007] The power-on timing comparison module includes n (n-1) power-on timing comparison circuits, each of which is used to determine the power-on timing between every two power supply signals;

[0008] The result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits;

[0009] The voltage detection unit is used to detect the actual voltages of n power supplies;

[0010] The result output unit is used to display the power-on timing of n power supply signals and the actual voltages of n power supplies.

[0011] Based on the above technical solution, the present invention can also make the following improvements.

[0012] Optionally, the n power-on signal processing circuits are used to process the n power supply signals into levels that can be recognized by the power-on timing comparison unit, including:

[0013] n power-on signal processing circuits are used to process n power supply signals of different levels into unified signals with the same level standard that can be recognized by the power-on timing comparison unit;

[0014] Each of the power-on signal processing circuits includes a transistor Qn and a resistor Rn, wherein n is the index of the transistor, corresponding to the index of the power signal and the resistor, the collector of the transistor Qn is connected to VDD, the gate of the transistor Qn is connected to the power signal Vn, the emitter of the transistor Qn is connected to GND through the resistor Rn, and the emitter of the transistor Qn leads to the processed Vn_PG signal, and the Vn_PG signal can be recognized by the power-on timing comparison unit.

[0015] Optionally, each of the power-on timing comparison circuits is a D flip-flop, used to determine the power-on timing sequence between two power supply signals;

[0016] Each of the power-on timing comparison circuits is used to determine the power-on timing between each two power supply signals, including:

[0017] For two power supply signals Vh_PG signal and Vg_PG signal, the Vh_PG signal is connected to the D interface of the D flip-flop, and the Vg_PG signal is input to the clock CLK interface of the D flip-flop. When the Vh_PG signal is powered on before the Vg_PG signal, the D interface is at a high level at the rising edge of the V2_PG signal, and the output Qh_g is a low level 0; when the Vh_PG signal is powered on after the Vg_PG signal, the D interface is at a low level at the rising edge of the Vg_PG signal, and the output Qh_g is a high level 1. Qh_g represents the output level of the power-on timing comparison circuit based on the comparison of the power supply h and the power supply g;

[0018] The power-on timing of the Vh_PG signal and the Vg_PG signal is determined according to the high and low levels output by the Q interface.

[0019] Optionally, the result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits, including:

[0020] The n(n-1) high and low level signals output by the n(n-1) power-on timing comparison circuits are grouped, Q1_2, Q1_3, ..., Q1_n are the first group, Q2_3, Q2_2, ..., Q2_n are the second group, ...., and the other groups are analogous to each other, and the n(n-1) high and low level signals are divided into (n-1) groups;

[0021] The number of high-level signals in each group is counted, and the power-on timing of the n power supplies is determined according to the number of high-level signals in each group.

[0022] Optionally, the result processing module includes (n-1) adders and a multiplexer;

[0023] Each of the adders is used to calculate the number of high-level signals in each group;

[0024] The multiplexer is used to record the power-on timing of n power supplies in the order of the number of high-level signals in each group from small to large, where:

[0025] When the number of high-level signals in the Xth group is 0, the power supply X is the first power-on signal;

[0026] When the number of high-level signals in the Yth group is 1, the power supply Y is the second power-on signal; ....

[0028] When the number of high-level signals in the Mth group is (n-1), the power source M is the nth power-on signal.

[0029] Optionally, the voltage detection unit includes n voltage detection circuits, each of which is used to detect an actual voltage of one power supply;

[0030] Each of the voltage detection circuits includes w precision resistors with the same resistance, a selection switch, a transistor Qp and a resistor Rp. The power supply p is connected in series with the w precision resistors and then grounded. Each precision resistor is connected to multiple input ports of the selection switch. The output port of the selection switch is connected to the gate of the transistor Qp. The collector of the transistor Qp is connected to VDD. The emitter of the transistor Qp is grounded through the resistor Rp. The emitter of the transistor Qp leads to an EN signal.

[0031] Control the number of precision resistors connected to the gating switch so that the output of the gating switch reaches the conduction voltage V of the transistor QpGS At this time, the EN signal is pulled high to enable the control center to stop the gating of the switch and record the number of precision resistors connected to the gating switch;

[0032] According to the conduction voltage V of transistor Qp GS , the resistance value of the precision resistor, the total number of the precision resistors and the number of precision resistors connected to the selection switch to calculate the input voltage of the power supply p.

[0033] Optionally, the conduction voltage V of the transistor Qp is GS , the resistance value of the precision resistor, the total number of the precision resistors and the number of the precision resistors connected to the selection switch to calculate the input voltage of the power supply p, including:

[0034] Vp=w*V GS / m;

[0035] Where Vp is the actual voltage of the power supply, V GS is the on-state voltage of transistor Qp, w is the total number of precision resistors, and m is the number of precision resistors connected to the selection switch.

[0036] Optionally, the result output unit is used to display the power-on timing of n power supply signals and the actual voltages of n power supplies, including:

[0037] All power supplies output their actual voltage according to the power-on sequence.

[0038] The present invention provides a power-on timing and voltage detection device for a multi-voltage circuit, comprising a power-on timing detection unit, a voltage detection unit and a result output unit. The power-on timing detection unit comprises a power-on signal processing module, a power-on timing comparison module and a result processing module.

[0039] The power-on signal processing module processes n power supply signals into a level that can be recognized by the power-on timing comparison unit, and the power-on timing comparison module is used to determine the power-on timing between every two power supply signals; the result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits; the voltage detection unit is used to detect the actual voltage of n power supplies. The present invention can quickly determine whether the power-on timing and power supply voltage are correct in an oscilloscope-free test environment, thereby significantly reducing the debugging time and improving work efficiency. In addition, the method also solves the inconvenience of frequent repeated power-on operations when testing the power supply timing due to the limited number of oscilloscope channels. By implementing this method, the debugging problems caused by power supply voltage or power-on timing errors will be effectively reduced, making the entire debugging process more efficient and accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A structural block diagram of a power-on timing sequence and voltage detection device for a multi-voltage circuit provided by the present invention;

[0041] Figure 2 This is the schematic diagram of the power-on signal processing circuit;

[0042] Figure 3 This is the schematic diagram of the power-on timing comparison circuit;

[0043] Figure 4 Schematic diagram of all power-on timing comparison circuits;

[0044] Figure 5 It is the circuit schematic diagram of the adder in the result processing module;

[0045] Figure 6 It is the circuit schematic diagram of the multiplexer in the result processing module;

[0046] Figure 7 A flow chart for determining the power-on timing of n power supplies in the result processing module;

[0047] Figure 8 This is the schematic diagram of the voltage detection circuit. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In addition, the technical features in the various embodiments or single embodiments provided by the present invention can be arbitrarily combined with each other to form a feasible technical solution. This combination is not subject to the constraints of the sequence of steps and / or the structural composition mode, but must be based on the ability of ordinary technicians in this field to achieve. When the combination of technical solutions is contradictory or cannot be achieved, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0049] The present invention proposes a device suitable for power-on timing and voltage detection of a multi-voltage circuit, which is used for quickly and flexibly realizing power-on timing sequencing and power supply voltage measurement of the multi-voltage circuit.

[0050] like Figure 1 The present invention provides a power-on timing and voltage detection device for a multi-voltage circuit, including a power-on timing detection unit, a voltage detection unit and a result output unit. The power-on timing detection unit includes a power-on signal processing module, a power-on timing comparison module and a result processing module.

[0051] The power-on signal processing module includes n power-on signal processing circuits, and the n power-on signal processing circuits are used to process n power supply signals into levels that can be recognized by the power-on timing comparison unit, wherein the multi-voltage circuit to be tested is powered by n power supplies of different levels;

[0052] The power-on timing comparison module includes n (n-1) power-on timing comparison circuits, each of which is used to determine the power-on timing between every two power supply signals;

[0053] The result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits;

[0054] The voltage detection unit is used to detect the actual voltages of n power supplies;

[0055] The result output unit is used to display the power-on timing of n power supply signals and the actual voltages of n power supplies.

[0056] in, Figure 1 The power supply 1, power supply 2, ..., power supply n are power supply signals derived from the circuit to be tested, that is, the power supplies 1, power supply 2, ..., power supply n of different levels jointly supply power to the multi-voltage circuit to be tested.

[0057] Figure 1 When designing the circuit, the power-on timing comparison module, the result processing module and the result output unit can use modules or chips with the above functions, such as SOC chips, FPGAs, etc. as the calculation and control center.

[0058] The function of the power-on signal processing circuit in the power-on signal processing module is to unify the power-on signals of different power supply voltage levels into signals with the same level standard that can be recognized by subsequent circuits. The level range used by the multi-voltage circuit is large, so the power-on signal processing circuit is required to process the power supply power-on signal into a PG signal that can be recognized by subsequent circuits.

[0059] The power-on signal processing module includes n power-on signal processing circuits, and one power-on signal processing circuit is used to process one power supply power-on signal.

[0060] Exemplarily, the n power-on signal processing circuits are used to process the n power supply signals into levels that can be recognized by the power-on timing comparison unit, including:

[0061] The n power-on signal processing circuits process n power supply signals of different levels into unified signals with the same level standard that can be recognized by the power-on timing comparison unit.

[0062] Among them, the power-on signal processing circuit is as follows Figure 2 As shown, each power-on signal processing circuit includes a transistor Qn and a resistor Rn, wherein n is the index of the transistor, corresponding to the index of the power signal and the resistor, the collector of the transistor Qn is connected to VDD, the gate of the transistor Qn is connected to the power signal Vn, the emitter of the transistor Qn is connected to GND through the resistor Rn, and the emitter of the transistor Qn leads to a processed Vn_PG signal, and the Vn_PG signal can be recognized by the power-on timing comparison unit.

[0063] Specifically, the power supply signal collected from the multi-voltage circuit rises from a low level to a high level when powered on, the MOS tube is turned on when the voltage increases, and the corresponding PG signal is pulled to VDD, converting different levels into signals of the same level standard that can be recognized by subsequent digital circuits, where VDD is the power supply provided by the sequencing circuit that is independent of the multi-voltage circuit being tested, and the MOS tube model can be determined according to the size of the turn-on voltage.

[0064] Exemplarily, each power-on timing comparison circuit is a D flip-flop, which is used to determine the power-on timing sequence between two power supply signals. The schematic diagram of the D flip-flop can be found in Figure 3 .

[0065] The working principle of each power-on timing comparison circuit to judge the power-on timing between each two power supply signals is:

[0066] For two power supply signals Vh_PG and Vg_PG, the Vh_PG signal is connected to the D interface of the D flip-flop, and the Vg_PG signal is input to the clock CLK interface of the D flip-flop. When the Vh_PG signal is powered on before the Vg_PG signal, the D interface is at a high level at the rising edge of the V2_PG signal, and the output Qh_g is at a low level 0; when the Vh_PG signal is powered on after the Vg_PG signal, the D interface is at a low level at the rising edge of the Vg_PG signal, and the output Qh_g is at a high level 1. Qh_g represents the output level of the power-on timing comparison circuit based on the comparison of power supply h and power supply g. The power-on timing of the Vh_PG signal and the Vg_PG signal is determined according to the high and low levels output by the Q interface.

[0067] See also Figure 4 The power-on timing comparison module includes n(n-1) power-on timing comparison circuits, each of which is used to compare the timings of two power supply signals to obtain the Q levels output by the n(n-1) power-on timing comparison circuits.

[0068] The result processing module is mainly used to process the result generated by the power-on comparison module. Exemplarily, the result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits, including:

[0069] The n(n-1) high and low level signals output by the n(n-1) power-on timing comparison circuits are grouped, Q1_2, Q1_3, ..., Q1_n are the first group, Q2_3, Q2_2, ..., Q2_n are the second group, ...., and the other groups are analogous to each other, and the n(n-1) high and low level signals are divided into (n-1) groups;

[0070] The number of high-level signals in each group is counted, and the power-on timing of the n power supplies is determined according to the number of high-level signals in each group.

[0071] The result processing module includes (n-1) adders and a multiplexer. For the circuit schematic diagram of the adder, please refer to Figure 5 , input the Q level of each group into the adder, and count the number of high-level signals in each group, for example, Figure 5 As shown, the Q level of the first group is input into the adder, and the output S1 is the number of high levels in all Q levels of the group.

[0072] The multiplexer is used to record the power-on timing of n power supplies in ascending order according to the number of high-level signals in each group.

[0073] The circuit diagram of the multiplexer can be found in Figure 6 The working principle is: when each group is at a low level, it is powered on first, only one is at a high level, there are two high levels... and so on, and the selected results are stored in the reserved memory.

[0074] The workflow of the result processing module for determining the power-on sequence of n power supplies can be found in Figure 7 , when the number of high-level signals in the Xth group is 0, power supply X is the first power-on signal; when the number of high-level signals in the Yth group is 1, power supply Y is the second power-on signal; ....; when the number of high-level signals in the Mth group is (n-1), power supply M is the nth power-on signal, and the power-on timing of n power supplies is obtained.

[0075] In addition, the present invention also detects the actual voltages of the n power supplies, thereby determining the level of the powered-on power supply.

[0076] Exemplarily, the voltage detection unit includes n voltage detection circuits, each of which is used to detect an actual voltage of a power supply.

[0077] For n power supplies, n voltage detection circuits can be designed, one voltage detection circuit corresponding to detecting the actual voltage of one power supply. The n power supplies can also share one voltage detection circuit, which detects the actual voltages of the n power supplies in sequence.

[0078] See also Figure 8 , is a schematic diagram of a voltage detection circuit. Each voltage detection circuit includes w precision resistors with the same resistance, a selection switch, a transistor Qp and a resistor Rp. The power supply p is connected in series with the w precision resistors and then grounded. Each precision resistor is connected to multiple input ports of the selection switch. The output port of the selection switch is connected to the gate of the transistor Qp. The collector of the transistor Qp is connected to VDD, the emitter of the transistor Qp is grounded through the resistor Rp, and the emitter of the transistor Qp leads to an EN signal.

[0079] The principle of detecting the actual voltage of the power supply is to control the number of precision resistors connected to the gating switch so that the output of the gating switch reaches the conduction voltage V of the transistor Qp. GS At this time, the EN signal is pulled high to enable the control center to stop the gating of the switch and record the number of precision resistors connected to the gating switch;

[0080] According to the conduction voltage V of transistor Qp GS , the resistance value of the precision resistor, the total number of the precision resistors and the number of precision resistors connected to the selection switch to calculate the input voltage of the power supply p.

[0081] The actual voltage of the power supply is:

[0082] Vp=w*V GS / m;

[0083] Wherein Vp is the actual voltage of the power supply, VGS is the on-state voltage of the transistor Qp, w is the total number of precision resistors, and m is the number of precision resistors connected to the selection switch.

[0084] The voltage of the power supply is determined by the number of precision resistors actually involved in the voltage division. Other power supplies of the multi-voltage circuit can be calculated in the same way. After the input voltage value is calculated in the control center, the data is stored in the reserved memory. By detecting the actual voltage of each power supply, it can be determined whether the actual voltage of the power supply is consistent with the expected voltage.

[0085] The power-on timing of the n power supplies and the actual voltage of each power supply are detected by the power-on timing detection unit and the voltage detection unit respectively.

[0086] The result output unit is used to display the power-on timing sequence of n power supply signals and the actual voltage of n power supplies, including: outputting the actual voltage of all power supplies according to the power-on timing sequence.

[0087] Specifically, the main function of the result output module is to match and read the actual voltage of each power supply outputted by the voltage detection unit with the power-on timing of each power supply outputted by the power-on timing detection unit, and display the result through a serial port or display screen. For example: power supply 4: 3.3V> power supply 2: 1.2V> power supply 1: 5V> power supply 3: 1.8V, the power-on timing and power supply voltage of each power supply of the multi-voltage circuit can be determined through the output.

[0088] The present invention provides a power-on timing and voltage detection device for a multi-voltage circuit, which has the following beneficial effects:

[0089] (1) The power-on timing and voltage detection circuit of multi-voltage circuits can be expanded accordingly according to the number of power supply voltages of the circuit being tested, increasing the flexibility of the solution.

[0090] (2) The designed multi-voltage circuit power-on timing and voltage detection circuit provides a quick and easy method to test the power-on timing and power supply voltage in an environment without an oscilloscope, solving the problems of cumbersome power-on timing debugging operation, high labor costs and long time, thus releasing the productivity of developers and improving their work efficiency.

[0091] (3) The power-on timing and voltage detection circuit of the multi-voltage circuit can synchronously output the voltage of each power supply, and can synchronously determine whether the power supply voltage of each voltage is normal, and eliminate the situation where the power-on timing error is caused by mistakenly connecting the wrong power supply under test.

[0092] (4) The power-on timing and voltage detection circuit of the multi-voltage circuit has the advantages of simple structure and cost saving.

[0093] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0094] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0095] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0096] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0097] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0098] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0099] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A power-on timing and voltage detection device for a multi-voltage circuit, characterized in that: It includes a power-on timing detection unit, a voltage detection unit and a result output unit, wherein the power-on timing detection unit includes a power-on signal processing module, a power-on timing comparison module and a result processing module; The power-on signal processing module comprises n power-on signal processing circuits, the n power-on signal processing circuits being used to process n power supply signals into levels that can be recognized by the power-on timing comparison unit, wherein the multi-voltage circuit to be tested is powered by n power supplies of different levels; The power-on timing comparison module includes n (n-1) power-on timing comparison circuits, each of which is used to determine the power-on timing between every two power supply signals; The result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits; The voltage detection unit is used to detect the actual voltages of n power supplies; The result output unit is used to display the power-on timing of n power supply signals and the actual voltages of n power supplies.

2. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 1, characterized in that: The n power-on signal processing circuits are used to process the n power supply signals into levels that can be recognized by the power-on timing comparison unit, including: n power-on signal processing circuits are used to process n power supply signals of different levels into unified signals with the same level standard that can be recognized by the power-on timing comparison unit; Each of the power-on signal processing circuits includes a transistor Qn and a resistor Rn, wherein n is the index of the transistor, corresponding to the index of the power signal and the resistor, the collector of the transistor Qn is connected to VDD, the gate of the transistor Qn is connected to the power signal Vn, the emitter of the transistor Qn is connected to GND through the resistor Rn, and the emitter of the transistor Qn leads to the processed Vn_PG signal, and the Vn_PG signal can be recognized by the power-on timing comparison unit.

3. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 2, characterized in that: Each of the power-on timing comparison circuits is a D flip-flop, used to determine the power-on timing sequence between two power supply signals; Each of the power-on timing comparison circuits is used to determine the power-on timing between each two power supply signals, including: For two power supply signals Vh_PG signal and Vg_PG signal, the Vh_PG signal is connected to the D interface of the D flip-flop, and the Vg_PG signal is input to the clock CLK interface of the D flip-flop. When the Vh_PG signal is powered on before the Vg_PG signal, the D interface is at a high level at the rising edge of the V2_PG signal, and the output Qh_g is a low level 0; when the Vh_PG signal is powered on after the Vg_PG signal, the D interface is at a low level at the rising edge of the Vg_PG signal, and the output Qh_g is a high level 1. Qh_g represents the output level of the power-on timing comparison circuit based on the comparison of the power supply h and the power supply g; The power-on timing of the Vh_PG signal and the Vg_PG signal is determined according to the high and low levels output by the Q interface.

4. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 3, characterized in that: The result processing module is used to calculate the power-on timing between n power supply signals according to the power-on timing between every two power supply signals output by n (n-1) power-on timing comparison circuits, and includes: The n(n-1) high and low level signals output by the n(n-1) power-on timing comparison circuits are grouped, Q1_2, Q1_3, ..., Q1_n are the first group, Q2_3, Q2_2, ..., Q2_n are the second group, ...., and the other groups are analogous to each other, and the n(n-1) high and low level signals are divided into (n-1) groups; The number of high-level signals in each group is counted, and the power-on timing of the n power supplies is determined according to the number of high-level signals in each group.

5. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 4, characterized in that: The result processing module includes (n-1) adders and a multiplexer; Each of the adders is used to calculate the number of high-level signals in each group; The multiplexer is used to record the power-on timing of n power supplies in the order of the number of high-level signals in each group from small to large, where: When the number of high-level signals in the Xth group is 0, the power supply X is the first power-on signal; When the number of high-level signals in the Yth group is 1, the power supply Y is the second power-on signal; .... When the number of high-level signals in the Mth group is (n-1), the power source M is the nth power-on signal.

6. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 1, characterized in that: The voltage detection unit includes n voltage detection circuits, each of which is used to detect the actual voltage of one power supply; Each of the voltage detection circuits includes w precision resistors with the same resistance, a selection switch, a transistor Qp and a resistor Rp. The power supply p is connected in series with the w precision resistors and then grounded. Each precision resistor is connected to multiple input ports of the selection switch. The output port of the selection switch is connected to the gate of the transistor Qp. The collector of the transistor Qp is connected to VDD. The emitter of the transistor Qp is grounded through the resistor Rp. The emitter of the transistor Qp leads to an EN signal. Control the number of precision resistors connected to the gating switch so that the output of the gating switch reaches the conduction voltage V of the transistor Qp GS At this time, the EN signal is pulled high to enable the control center to stop the gating of the switch and record the number of precision resistors connected to the gating switch; According to the conduction voltage V of transistor Qp GS , the resistance value of the precision resistor, the total number of the precision resistors and the number of precision resistors connected to the selection switch to calculate the input voltage of the power supply p.

7. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 6, characterized in that: The conduction voltage V of the transistor Qp is GS , the resistance value of the precision resistor, the total number of the precision resistors and the number of the precision resistors connected to the selection switch to calculate the input voltage of the power supply p, including: Vp=w*V GS / m; Where Vp is the actual voltage of the power supply, V GS is the on-state voltage of transistor Qp, w is the total number of precision resistors, and m is the number of precision resistors connected to the selection switch.

8. The power-on timing and voltage detection device for a multi-voltage circuit according to claim 1, characterized in that: The result output unit is used to display the power-on timing of n power supply signals and the actual voltages of n power supplies, including: All power supplies output their actual voltage according to the power-on sequence.

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