High-voltage damped oscillation waveform generation circuit based on cascade self-triggering

Abstract

The invention discloses a high-voltage damped oscillation waveform generation circuit based on cascade self-triggering, which belongs to the technical field of high-voltage damped oscillation and comprises a single series IGBT (Insulated Gate Bipolar Translator) discharge switch mode and a plurality of series IGBT discharge switch modes based on a Marx structure. According to the invention, a self-triggering series switch is adopted to increase the single-stage voltage level of the Marx circuit, power superposition is realized through the Marx circuit, and finally, high-voltage damped oscillation waveforms are generated on resistor and inductive loads. The problems that the voltage level of a single-stage module is limited by a power semiconductor and the DC power supply voltage level is reduced are solved.

Description

Technical Field

[0001] The invention belongs to the technical field of high-voltage damped oscillation, and in particular relates to a high-voltage damped oscillation waveform generating circuit based on cascade self-triggering. Background Art

[0002] Damped oscillation waves are high-frequency transient interference waveforms caused by restrike operations on high-voltage bus switches and circuit breaker opening and closing operations. They affect secondary equipment through conduction, capacitive coupling, and magnetic field coupling, causing secondary equipment to malfunction and be damaged, seriously threatening the safety of the distribution network.

[0003] With the development of primary and secondary integration technology in power systems, complete sets of equipment with integrated intelligent monitoring and other functions have been widely used in working environments with 10 kV or even higher voltages. A large number of actual measurements of the secondary equipment ports of primary and secondary integrated switchgear in medium and high voltage substations can test high-frequency transient damped oscillation interference waveforms. The electromagnetic compatibility test based on the standard 3kV damped oscillation generator can no longer meet the application requirements. The use of a higher voltage damped oscillation generator to conduct electromagnetic compatibility testing of primary high-voltage switches and secondary sensitive equipment is of great significance to the safe operation of the entire power grid high-voltage switch equipment.

[0004] For traditional damped oscillation generators, the voltage of the damped oscillation waveform depends on the charging voltage across the capacitor and the rated operating voltage of the main switch of the damped oscillation generator discharge circuit. Further increasing the amplitude of the damped oscillation voltage waveform can only increase the power supply charging voltage and the number of discharge switches connected in series, which also causes a sharp increase in equipment and device costs. Summary of the invention

[0005] The present invention provides a high-voltage damped oscillation waveform generating circuit based on cascade self-triggering, which solves the problem that the voltage level of a single-stage module is limited by power semiconductors and the DC power supply voltage level is reduced.

[0006] In order to solve the above technical problems, the technical solution of the present invention is: a high-voltage damped oscillation waveform generating circuit based on cascade self-triggering, including a single series IGBT discharge switch mode and a multiple series IGBT discharge switch mode based on a Marx structure;

[0007] The single series IGBT discharge switch mode includes a DC source DC, a charging resistor Rp, a main capacitor C, a first series IGBT discharge switch network, a resistor RL1 and a load inductor L1;

[0008] One end of the charging resistor Rp is connected to the positive electrode of the DC source DC; the other end of the charging resistor Rp is respectively connected to one end of the main capacitor C and the series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the other end of the main capacitor C and one end of the load inductor L1; the other end of the load inductor L1 is connected to one end of the resistor RL1; the other end of the resistor RL1 is connected to the series IGBT discharge switch network;

[0009] The multiple series IGBT discharge switch modes based on the Marx structure include a DC source DC, a charging resistor Rc, a second series IGBT discharge switch network, a resistor RL2 and a load inductor L2;

[0010] The positive electrode of the DC source DC is connected to one end of the charging resistor Rc; the other end of the charging resistor Rc is connected to the second series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the second series IGBT discharge switch network and one end of the resistor RL2; the other end of the resistor RL2 is connected to one end of the load inductor L2; the other end of the load inductor L2 is connected to the second series IGBT discharge switch network.

[0011] The beneficial effects of the present invention are as follows: in view of the problem that the voltage level of a single-stage module is limited by power semiconductors and the DC power supply voltage level is reduced, the present invention adopts a self-triggering series switch to increase the single-stage voltage level of the Marx circuit, realizes power superposition through the Marx circuit, and finally generates a high-voltage damped oscillation waveform on the resistance and inductance loads. While generating a high-voltage damped oscillation voltage waveform, the voltage level of the single-stage module of the Marx circuit is increased, the number of Marx stages and the number of external drivers are reduced, the overall structure is more compact, and the cost is saved.

[0012] Furthermore, the first series IGBT discharge switch network includes a drive capacitor C a-1 , buffer resistor R di , buffer capacitor C di 、Diode D i , static voltage balancing resistor R Di , pull-down resistor R si and transistor Q i , wherein a=2, 3, ..., n, i=1, 2, ..., n, n represents the number of switches in the first series IGBT discharge switch network; the transistor Q i Adopt insulated gate bipolar transistor IGBT;

[0013] The gate of the transistor Q1 is connected to one end of the external driver and the pull-down resistor R s1 One end of the connection;

[0014] The transistor Q aThe gate of a-1 One end and the pull-down resistor R sa One end of the transistor Q a The emitter of transistor Q a-1 The collector level, buffer resistor R d(a-1) One end of the diode D a-1 The positive electrode and the static voltage balancing resistor R D(a-1) One end of the connection;

[0015] The transistor Q n The collector level is respectively connected to the buffer resistor R dn One end of the diode D n The positive electrode and static voltage balancing resistor R Dn The emitter of the transistor Q1 is connected to the other end of the external driver, the driving capacitor C a-1 The other end of and the other end of resistor RL1 are connected;

[0016] The pull-down resistor R si The other end is connected to the buffer capacitor C di One end of the static voltage balancing resistor R Di The other end of the buffer capacitor C di The other end is connected to the buffer resistor R di The other end of the diode D i negative connection.

[0017] The beneficial effect of the above further solution is: by driving the capacitor C a-1 Charging and discharging the gate-emitter equivalent capacitance of the insulated gate bipolar transistor (IGBT) can turn the transistor on and off. Di is the static voltage balancing resistor, R di , C di The dynamic buffer voltage equalization circuit formed by the pull-down resistor R and Di can better handle the static voltage unevenness and dynamic voltage unevenness encountered by the IGBT during operation. sa Its function is to prevent interference pulses from causing false triggering of the IGBT.

[0018] Furthermore, the second series IGBT discharge switch network includes a drive capacitor C je , buffer resistor R djb , buffer capacitor C djb 、Diode D jb , static voltage balancing resistor R Djb , pull-down resistor R sjb , Isolation inductor L sj1 , Isolation inductor L sj2 , main capacitor C pj and transistor Qjb , where e=1, 2, 3, b=1, 2, 3, 4, j=1, 2, ..., m, where m represents the number of series switches in the second series IGBT discharge switch network, m≥2; the transistor Q jb Adopt insulated gate bipolar transistor IGBT;

[0019] The isolation inductor L s12 One end of is connected to the other end of the charging resistor Rc;

[0020] The transistor Q j1 The gate of the external driver and the pull-down resistor R sj1 One end of the connection;

[0021] The transistor Q jc The gate of j(c-1) One end and the pull-down resistor R sjc One end of the transistor Q jc The emitter of transistor Q j(c-1) The collector level, buffer resistor R dj(c-1) One end of the diode D j(c-1) The positive electrode and the static voltage balancing resistor R Dj(c-1) One end of is connected, where c=2, 3, 4;

[0022] The transistor Q h4 The collector level is respectively connected to the isolation inductor L s(h+1)2 One end of the buffer resistor R dh4 One end of the diode D h4 The positive electrode and static voltage balancing resistor R Dh4 One end of the isolation inductor L sh2 The other end and the main capacitor C ph One end of is connected, where h=1,2,…,m-1;

[0023] The transistor Q m4 The collector level is respectively connected to the buffer resistor R dm4 One end of the diode D m4 The positive electrode and static voltage balancing resistor R Dm4 One end of the isolation inductor L sm2 The other end and the main capacitor C pm One end of the connection;

[0024] The main capacitor C p1 The other end is connected to the isolation inductor L s11 One end of and the negative electrode of the direct current source DC are connected;

[0025] The transistor Q h1The emitter is connected to the other end of the external driver and the drive capacitor C he The other end of the isolation inductor L sh1 The other end of the isolation inductor L s(h+1)1 One end of the main capacitor C p(h+1) The other end is connected;

[0026] The transistor Q m1 The emitter is connected to the other end of the external driver and the drive capacitor C me The other end of the isolation inductor L sm1 The other end of the load inductor L2 is connected;

[0027] The pull-down resistor R sjb The other end is connected to the buffer capacitor C djb One end of the static voltage balancing resistor R Djb The other end of the buffer capacitor C djb The other end is connected to the buffer resistor R djb The other end of the tube D jb negative connection.

[0028] The beneficial effect of the above further solution is: by driving the capacitor C je Charging and discharging the gate-emitter equivalent capacitance of the insulated gate bipolar transistor (IGBT) can turn the transistor on and off. Djb is the static voltage balancing resistor, R djb , C djb and D jb The dynamic buffer voltage equalization circuit can better handle the static voltage unevenness and dynamic voltage unevenness encountered by the IGBT during operation. sjb The function of the isolation inductor L is to prevent the interference pulse from causing erroneous triggering of the IGBT. sj1 , Isolation inductor L sj2 The role of the inductor is to suppress transient large currents. Compared with resistors as current limiting devices, inductors can greatly reduce charging losses while improving charging efficiency. On the other hand, the main capacitor C pj It plays an isolation role when discharging in series. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a circuit diagram of a single series IGBT discharge switch mode of the circuit of the present invention.

[0030] Figure 2 The circuit diagram of the present invention is a circuit diagram of a discharge switch mode of multiple series-connected IGBTs based on a Marx structure.

[0031] Figure 3 Schematic diagram of the damped oscillation voltage waveform of Example 1 of the present invention.

[0032] Figure 4 Schematic diagram of the damped oscillation voltage waveform of Example 2 of the present invention. DETAILED DESCRIPTION

[0033] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

[0034] Example 1

[0035] This embodiment 1 provides a high-voltage damped oscillation waveform generating circuit based on cascade self-triggering, which adopts a single series IGBT discharge switch mode.

[0036] like Figure 1 As shown, the single series IGBT discharge switch mode includes a DC source DC, a charging resistor Rp, a main capacitor C, a first series IGBT discharge switch network, a resistor RL1 and a load inductor L1;

[0037] One end of the charging resistor Rp is connected to the positive electrode of the DC source DC; the other end of the charging resistor Rp is respectively connected to one end of the main capacitor C and the series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the other end of the main capacitor C and one end of the load inductor L1; the other end of the load inductor L1 is connected to one end of the resistor RL1; the other end of the resistor RL1 is connected to the series IGBT discharge switch network.

[0038] The first series IGBT discharge switch network includes a drive capacitor C a-1 , buffer resistor R di , buffer capacitor C di 、Diode D i , static voltage balancing resistor R Di , pull-down resistor R si and transistor Q i , wherein a=2, 3, ..., n, i=1, 2, ..., n, n represents the number of switches in the first series IGBT discharge switch network; the transistor Q i Adopt insulated gate bipolar transistor IGBT;

[0039] The gate of the transistor Q1 is connected to one end of the external driver and the pull-down resistor R s1 One end of the connection;

[0040] The transistor Qa The gate of a-1 One end and the pull-down resistor R sa One end of the transistor Q a The emitter of transistor Q a-1 The collector level, buffer resistor R d(a-1) One end of the diode D a-1 The positive electrode and the static voltage balancing resistor R D(a-1) One end of the connection;

[0041] The transistor Q n The collector level is respectively connected to the buffer resistor R dn One end of the diode D n The positive electrode and static voltage balancing resistor R Dn The emitter of the transistor Q1 is connected to the other end of the external driver, the driving capacitor C a-1 The other end of and the other end of resistor RL1 are connected;

[0042] The pull-down resistor R si The other end is connected to the buffer capacitor C di One end of the static voltage balancing resistor R Di The other end of the buffer capacitor C di The other end is connected to the buffer resistor R di The other end of the diode D i negative connection.

[0043] The circuit principle of this embodiment 1 is as follows: before being turned on, all IGBTs are in the off state, at which time the charging power source, i.e., the DC source DC, charges the main capacitor C through the charging resistor Rp. At the same time, the charging current also passes through the static voltage balancing resistor R Di and the pull-down resistor R si To each stage of the driving capacitor C a-1 to charge.

[0044] Capacitor C and each level of driver capacitance C a-1 After fully charged, the external driver of the first-stage switch Q1 inputs a high-level turn-on signal, transistor Q1 is turned on, and the collector potential of transistor Q1 decreases, forming C1-C ge -Q1 loop. That is, the gate capacitance C1 to the gate-emitter equivalent capacitance C of transistor Q2 ge The charge reaches the threshold voltage of transistor Q2, thereby turning it on. According to the above-mentioned turn-on principle of transistor Q2, the driving capacitors corresponding to each level of IGBT sequentially provide driving signals to the IGBT switch, and turn it into the on state.

[0045] When all IGBT switches are turned on, the gate-emitter voltage of the entire IGBT module is close to the sum of the conduction voltage drops of each IGBT. When the external gate driver continues to input a positive voltage, each IGBT will remain in the on state because the gate-emitter equivalent capacitance of each IGBT has been fully charged during the triggering phase. At this time, the main capacitor C, the series IGBT, the resistor RL1, and the load inductor L form a discharge loop, which in turn generates a damped oscillation waveform on the resistive and inductive loads, such as Figure 3 shown.

[0046] After the discharge is completed, the series switch receives a shutdown signal from the external driver. After switch Q1 receives the shutdown signal, transistor Q1 is turned off, causing the collector potential of transistor Q1 to rise rapidly. At this time, a negative pulse in the opposite direction is formed between the gate and emitter of transistor Q2, causing switch Q2 to be turned off. That is, the gate-emitter capacitance of transistor Q2 begins to discharge to its corresponding drive capacitance C1, and at this time, transistor Q2 enters the shutdown process.

[0047] Example 2

[0048] This embodiment 2 provides a high-voltage damped oscillation waveform generating circuit based on cascade self-triggering, which adopts a discharge switch mode of multiple series-connected IGBTs based on a Marx structure.

[0049] like Figure 2 As shown, the multiple series IGBT discharge switch modes based on the Marx structure include a DC source DC, a charging resistor Rc, a second series IGBT discharge switch network, a resistor RL2 and a load inductor L2;

[0050] The positive electrode of the DC source DC is connected to one end of the charging resistor Rc; the other end of the charging resistor Rc is connected to the second series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the second series IGBT discharge switch network and one end of the resistor RL2; the other end of the resistor RL2 is connected to one end of the load inductor L2; the other end of the load inductor L2 is connected to the second series IGBT discharge switch network.

[0051] The second series IGBT discharge switch network includes a drive capacitor C je , buffer resistor R djb , buffer capacitor C djb 、Diode D jb , static voltage balancing resistor R Djb , pull-down resistor R sjb , Isolation inductor L sj1 , Isolation inductor L sj2 , main capacitor C pj and transistor Q jb, where e=1, 2, 3, b=1, 2, 3, 4, j=1, 2, ..., m, where m represents the number of series switches in the second series IGBT discharge switch network, m≥2; the transistor Q jb Adopt insulated gate bipolar transistor IGBT;

[0052] The isolation inductor L s12 One end of is connected to the other end of the charging resistor Rc;

[0053] The transistor Q j1 The gate of the external driver and the pull-down resistor R sj1 One end of the connection;

[0054] The transistor Q jc The gate of j(c-1) One end and the pull-down resistor R sjc One end of the transistor Q jc The emitter of transistor Q j(c-1) The collector level, buffer resistor R dj(c-1) One end of the diode D j(c-1) The positive electrode and the static voltage balancing resistor R Dj(c-1) One end of is connected, where c=2, 3, 4;

[0055] The transistor Q h4 The collector level is respectively connected to the isolation inductor L s(h+1)2 One end of the buffer resistor R dh4 One end of the diode D h4 The positive electrode and static voltage balancing resistor R Dh4 One end of the isolation inductor L sh2 The other end and the main capacitor C ph One end of is connected, where h=1,2,…,m-1;

[0056] The transistor Q m4 The collector level is respectively connected to the buffer resistor R dm4 One end of the diode D m4 The positive electrode and static voltage balancing resistor R Dm4 One end of the isolation inductor L sm2 The other end and the main capacitor C pm One end of the connection;

[0057] The main capacitor C p1 The other end is connected to the isolation inductor L s11 One end of and the negative electrode of the direct current source DC are connected;

[0058] The transistor Q h1 The emitter is connected to the other end of the external driver and the drive capacitor Che The other end of the isolation inductor L sh1 The other end of the isolation inductor L s(h+1)1 One end of the main capacitor C p(h+1) The other end is connected;

[0059] The transistor Q m1 The emitter is connected to the other end of the external driver and the drive capacitor C me The other end of the isolation inductor L sm1 The other end of the load inductor L2 is connected;

[0060] The pull-down resistor R sjb The other end is connected to the buffer capacitor C djb One end of the static voltage balancing resistor R Djb The other end of the buffer capacitor C djb The other end is connected to the buffer resistor R djb The other end of the tube D jb negative connection.

[0061] The multiple series IGBT discharge switch mode of this embodiment 2 is a Marx circuit based on the Marx structure of the inter-stage self-triggered series IGBT, wherein the isolation inductor L sj1 , Isolation inductor L sj2 , main capacitor C pj The four-stage self-triggered series IGBT discharge switch is one stage of the entire Marx circuit.

[0062] The circuit principle of the second embodiment is as follows: before being turned on, all IGBTs are in the off state. At this time, all main capacitors are in parallel structure, and the DC source DC is connected through the charging resistor Rc and the isolation inductor L sj1 And the isolation inductor L sj2 The main capacitor C connected in parallel to each stage pj The main capacitor C pj After fully charged, the first-stage IGBT of the series IGBT in each Marx is controlled to be turned on, and the IGBTs of the subsequent stages are turned on successively through the corresponding driving capacitor self-triggering. pj p discharges in series, thereby generating a damped oscillation waveform on the load inductor L2, such as Figure 4 shown.

[0063] In summary, the damped oscillation waveform forming circuit of the present invention, while generating a high-voltage damped oscillation voltage waveform, increases the voltage level of a single-stage module of the Marx circuit, reduces the number of Marx stages and external drivers, makes the overall structure more compact, and saves costs.

Claims

1. A high voltage damped oscillation waveform generating circuit based on cascade self-triggering, characterized in that: Including a single series IGBT discharge switch mode and a multiple series IGBT discharge switch mode based on a Marx structure; The single series IGBT discharge switch mode includes a DC source DC, a charging resistor Rp, a main capacitor C, a first series IGBT discharge switch network, a resistor RL1 and a load inductor L1; One end of the charging resistor Rp is connected to the positive electrode of the DC source DC; the other end of the charging resistor Rp is respectively connected to one end of the main capacitor C and the series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the other end of the main capacitor C and one end of the load inductor L1; the other end of the load inductor L1 is connected to one end of the resistor RL1; the other end of the resistor RL1 is connected to the series IGBT discharge switch network; The multiple series IGBT discharge switch modes based on the Marx structure include a DC source DC, a charging resistor Rc, a second series IGBT discharge switch network, a resistor RL2 and a load inductor L2; The positive electrode of the DC source DC is connected to one end of the charging resistor Rc; the other end of the charging resistor Rc is connected to the second series IGBT discharge switch network; the negative electrode of the DC source DC is respectively connected to the second series IGBT discharge switch network and one end of the resistor RL2; the other end of the resistor RL2 is connected to one end of the load inductor L2; the other end of the load inductor L2 is connected to the second series IGBT discharge switch network.

2. The high-voltage damped oscillation waveform generating circuit based on cascade self-triggering according to claim 1 is characterized in that: The first series IGBT discharge switch network includes a drive capacitor C a-1 , buffer resistor R di , buffer capacitor C di 、Diode D i , static voltage balancing resistor R Di , pull-down resistor R si and transistor Q i , wherein a=2, 3, ..., n, i=1, 2, ..., n, n represents the number of switches in the first series IGBT discharge switch network; the transistor Q i Adopt insulated gate bipolar transistor IGBT; The gate of the transistor Q1 is connected to one end of the external driver and the pull-down resistor R s1 One end of the connection; The transistor Q a The gate of a-1 One end and the pull-down resistor R sa One end of the transistor Q a The emitter of transistor Q a-1 The collector level, buffer resistor R d(a-1) One end of the diode D a-1 The positive electrode and the static voltage balancing resistor R D(a-1) One end of the connection; The transistor Q n The collector level is respectively connected to the buffer resistor R dn One end of the diode D n The positive electrode and static voltage balancing resistor R Dn The emitter of the transistor Q1 is connected to the other end of the external driver, the driving capacitor C a-1 The other end of and the other end of resistor RL1 are connected; The pull-down resistor R si The other end is connected to the buffer capacitor C di One end of the static voltage balancing resistor R Di The other end of the buffer capacitor C di The other end is connected to the buffer resistor R di The other end of the diode D i negative connection.

3. The high-voltage damped oscillation waveform generating circuit based on cascade self-triggering according to claim 1, characterized in that: The second series IGBT discharge switch network includes a drive capacitor C je , buffer resistor R djb , buffer capacitor C djb 、Diode D jb , static voltage balancing resistor R Djb , pull-down resistor R sjb , Isolation inductor L sj1 , Isolation inductor L sj2 , main capacitor C pj and transistor Q jb , where e=1, 2, 3, b=1, 2, 3, 4, j=1, 2, ..., m, where m represents the number of series switches in the second series IGBT discharge switch network, m≥2; the transistor Q jb Adopt insulated gate bipolar transistor IGBT; The isolation inductor L s12 One end of is connected to the other end of the charging resistor Rc; The transistor Q j1 The gate of the external driver and the pull-down resistor R sj1 One end of the connection; The transistor Q jc The gate of j(c-1) One end and the pull-down resistor R sjc One end of the transistor Q jc The emitter of transistor Q j(c-1) The collector level, buffer resistor R dj(c-1) One end of the diode D j(c-1) The positive electrode and the static voltage balancing resistor R Dj(c-1) One end of is connected, where c=2, 3, 4; The transistor Q h4 The collector level is respectively connected to the isolation inductor L s(h+1)2 One end of the buffer resistor R dh4 One end of the diode D h4 The positive electrode and static voltage balancing resistor R Dh4 One end of the isolation inductor L sh2 The other end and the main capacitor C ph One end of is connected, where h=1,2,…,m-1; The transistor Q m4 The collector level is respectively connected to the buffer resistor R dm4 One end of the diode D m4 The positive electrode and static voltage balancing resistor R Dm4 One end of the isolation inductor L sm2 The other end and the main capacitor C pm One end of the connection; The main capacitor C p1 The other end is connected to the isolation inductor L s11 One end of and the negative electrode of the direct current source DC are connected; The transistor Q h1 The emitter is connected to the other end of the external driver and the drive capacitor C he The other end of the isolation inductor L sh1 The other end of the isolation inductor L s(h+1)1 One end and the main capacitor C p(h+1) The other end is connected; The transistor Q m1 The emitter is connected to the other end of the external driver and the drive capacitor C me The other end of the isolation inductor L sm1 The other end of the load inductor L2 is connected; The pull-down resistor R sjb The other end is connected to the buffer capacitor C djb One end of the static voltage balancing resistor R Djb The other end of the buffer capacitor C djb The other end is connected to the buffer resistor R djb The other end of the tube D jb negative connection.

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