A radiation-resistant reinforced triode device and a manufacturing method thereof

Abstract

The present invention proposes a radiation-resistant reinforced triode device and a manufacturing method thereof. The invention belongs to the field of semiconductor technology. The radiation-resistant reinforced triode device comprises a substrate, a buried oxide layer, a first N-type doping region, a second N-type doping region, a third N-type doping region, a first P-type doping region, a second P-type doping region, a first isolation shallow trench, a second isolation shallow trench, a third isolation shallow trench, a fourth isolation shallow trench, a linear oxide layer, polysilicon, a fourth N-type doping region, a fifth N-type doping region, and a third P-type doping region. The present invention improves the total dose radiation resistance of the triode device by filling polysilicon inside the isolation shallow trench and thinning the thickness of the isolation oxide layer. Without adding a mask, the sidewall and bottom of the base isolation shallow trench are injected to form a second P-type doping region, which prevents the increase of the base surface recombination current, suppresses the degradation of the device common emitter current amplification factor, effectively improves the total dose radiation resistance of the triode device, and reduces the process manufacturing cost.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to an anti-radiation reinforced triode device and a manufacturing method thereof. Background Art

[0002] Charged particles in the space radiation environment can cause abnormal operation of onboard electronic equipment and device failure, seriously affecting the reliability and life of the spacecraft. In the space radiation environment, the triode is affected by the total dose effect, and positively charged oxide trap charges will be generated in the oxide layer on the surface of the device. The positively charged oxide trap charges will cause the electron concentration on the surface of the triode base region to increase, increase surface recombination, thereby increasing the surface recombination current of the base region, and reducing the common emitter current amplification factor of the triode, thereby affecting the normal operation of the entire circuit. Therefore, in order to solve the problem of increased base surface recombination current in the triode due to total dose radiation, the influence of total dose radiation on the device is suppressed. The present invention proposes a radiation-hardened triode device and a manufacturing method thereof, which is of great significance to the radiation-hardening of the entire integrated circuit. Summary of the invention

[0003] The object of the present invention is to provide a radiation-hardened triode device and a manufacturing method thereof, so as to solve the technical problem that the current amplification factor of the triode device is reduced due to the total dose radiation effect.

[0004] In order to solve the above technical problems, the manufacturing method of the radiation hardened triode device of the present invention comprises the following steps:

[0005] Step S1: Select a silicon-on-insulator material, where the selected silicon-on-insulator has a substrate, a buried oxide layer and a top silicon layer stacked in sequence from bottom to top.

[0006] Step S2: using an ion implantation process to implant N-type impurities into the top silicon layer to form a first N-type doped region.

[0007] Step S3: epitaxially grow a second N-type doping region on the first N-type doping region using an epitaxial process.

[0008] Step S4: using photolithography and ion implantation processes, N-type impurities are implanted in the area outside the second N-type doping region to form a third N-type doping region, wherein the junction depth of the third N-type doping region is equal to the epitaxial depth of the second N-type doping region, and the third N-type doping region is connected to the first N-type doping region.

[0009] Step S5: using photolithography and ion implantation processes, exposing the center area of ​​the second N-type doping region with the first P-type doping region photomask to form a photolithography window, and implanting P-type impurities into the photolithography window to form a first P-type doping region.

[0010] Step S6: using oxidation and deposition processes to generate a sacrificial oxide layer on the surfaces of the second N-type doping region, the third N-type doping region, and the first P-type doping region, depositing a nitride mask layer on the surface of the sacrificial oxide layer, and then depositing a photoresist on the surface of the nitride mask layer.

[0011] Step S7: adopting photolithography and etching processes, by etching the photoresist, the nitride mask layer, the sacrificial oxide layer and the second N-type doping region, the third N-type doping region and the first P-type doping region, forming etching windows of the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench and the fourth isolation shallow trench which are spaced apart from each other; wherein the second isolation shallow trench and the third isolation shallow trench are located in the first P-type doping region, and the first isolation shallow trench and the fourth isolation shallow trench span the third N-type doping region, the second N-type doping region and the first P-type doping region.

[0012] Step S8: using a wet stripping process to remove the photoresist on the surface of the nitride mask layer.

[0013] Step S9: using an oxidation process to oxidize the surface of the isolation shallow trench to generate a linear oxide layer.

[0014] Step S10: Using photolithography and ion implantation processes, P-type impurities are injected into the sidewalls and bottom of the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench, and the fourth isolation shallow trench located in the first P-type doping region to form a second P-type doping region. The photolithography of the second P-type doping region uses the photolithography plate of the first P-type doping region. The second P-type doping region is located on the lower surface of the linear oxide layer and is located in the first P-type doping region.

[0015] Step S11: removing the photoresist by etching.

[0016] Step S12: using a deposition process to fill the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench, and the fourth isolation shallow trench with polysilicon.

[0017] Step S13: using a chemical mechanical polishing process to grind the polysilicon, the nitride mask layer, and the sacrificial oxide layer filled on the surfaces of the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench, and the fourth isolation shallow trench to form a flat silicon trench surface.

[0018] Step S14: using an ion implantation process, N-type impurities are implanted between the second isolation shallow trench and the third isolation shallow trench to generate a fourth N-type doping region, and N-type impurities are implanted on the surface of the third N-type doping region to generate a fifth N-type doping region.

[0019] Step S15: using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench and the second isolation shallow trench and between the third isolation shallow trench and the fourth isolation shallow trench to generate a third P-type doped region.

[0020] Furthermore, the implantation dose of the first N-type doping region in step S2 is 1E14 cm -2 ~1E16cm -2 .

[0021] Furthermore, the concentration of the epitaxial second N-type doping region in step S3 is 5E14cm -3 ~5E15cm -3 , the epitaxial depth is 4μm~7μm.

[0022] Furthermore, the implantation dose of the third N-type doping region in step S4 is 1E14 cm -2 ~1E15cm -2 .

[0023] Furthermore, in step S5, the implantation dose of the first P-type doping region is 5E12cm -2 ~5E13cm -2 , the injection junction depth is 2μm~3μm.

[0024] Furthermore, in step S10, the second P-type doping region is implanted with a dose of 1E13 cm -2 ~1E14cm -2 .

[0025] Furthermore, in step S14, the implantation dose of the fourth N-type doping region and the fifth N-type doping region is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0026] Furthermore, in step S15, the implantation dose of the third P-type doping region 63 is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0027] In addition, the present invention also proposes a radiation-hardened triode device prepared by a manufacturing method of a radiation-hardened triode device, wherein the radiation-hardened triode device includes a substrate, a buried oxide layer, a first N-type doping region, a second N-type doping region, a third N-type doping region, a first P-type doping region, a second P-type doping region, a first isolation shallow trench, a second isolation shallow trench, a third isolation shallow trench, a fourth isolation shallow trench, a linear oxide layer, polysilicon, a fourth N-type doping region, a fifth N-type doping region, and a third P-type doping region.

[0028] Furthermore, the buried oxide layer is located above the substrate, the first N-type doping region is arranged above the buried oxide layer, and the second N-type doping region is arranged above the first N-type doping region; the third N-type doping region is arranged at the edge of the second N-type doping region, the third N-type doping region has the same depth as the second N-type doping region, and the third N-type doping region is connected to the first N-type doping region; the first P-type doping region is arranged inside the second N-type doping region, and the depth of the first P-type doping region is less than the depth of the second N-type doping region; the second isolation shallow trench and the third isolation shallow trench are arranged inside the first P-type doping region, and the first isolation shallow trench and the fourth isolation shallow trench are arranged across the third N-type doping region, the second N-type doping region, and the first P-type doping region.

[0029] A linear oxide layer is arranged at the bottom and sidewall of the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench and the fourth isolation shallow trench, polysilicon is deposited on the upper surface of the linear oxide layer to fill the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench and the fourth isolation shallow trench, and the second P-type doping region is located at the lower surface of the linear oxide layer of the first isolation shallow trench, the second isolation shallow trench, the third isolation shallow trench and the fourth isolation shallow trench inside the first P-type doping region; a third P-type doping region is arranged between the first isolation shallow trench and the second isolation shallow trench, a fourth N-type doping region is arranged between the second isolation shallow trench and the third isolation shallow trench, a third P-type doping region is arranged between the third isolation shallow trench and the fourth isolation shallow trench, the third P-type doping region and the fourth N-type doping region are arranged on the upper surface of the first P-type doping region; a fifth N-type doping region is arranged on the upper surface of the third N-type doping region; the fifth N-type doping region, the third P-type doping region and the fourth N-type doping region are not connected to each other.

[0030] Compared with the prior art, the present invention has the following beneficial technical effects:

[0031] The present invention fills polysilicon inside the isolation shallow groove, reduces the thickness of the isolation oxide layer, reduces the influence of the total dose radiation effect on the base isolation oxide layer, reduces the charge and interface charge generated by the isolation oxide layer under radiation, and improves the total dose radiation resistance of the triode device. By injecting the second P-type doping region into the sidewall and bottom of the base isolation shallow groove, the increase of the base surface recombination current is prevented, the degradation of the device common emitter current amplification factor is suppressed, and the total dose radiation resistance of the triode device is effectively improved. The second P-type doping region uses the first P-type doping region mask, which reduces the process manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0033] Figure 1 It is a schematic diagram of the structural cross-section of the radiation-hardened triode device according to Example 1 of the present invention.

[0034] Figure 2 It is a schematic diagram of step S1 of the process implementation method of embodiment 1 of the present invention.

[0035] Figure 3 It is a schematic diagram of step S2 of the process implementation method of embodiment 1 of the present invention.

[0036] Figure 4 It is a schematic diagram of step S3 of the process implementation method of Example 1 of the present invention.

[0037] Figure 5 It is a schematic diagram of step S4 of the process implementation method of Example 1 of the present invention.

[0038] Figure 6 It is a schematic diagram of step S5 of the process implementation method of Example 1 of the present invention.

[0039] Figure 7 It is a schematic diagram of step S6 of the process implementation method of Example 1 of the present invention.

[0040] Figure 8 It is a schematic diagram of step S7 of the process implementation method of Example 1 of the present invention.

[0041] Fig. 9 It is a schematic diagram of step S8 of the process implementation method of Example 1 of the present invention.

[0042] Fig.10 It is a schematic diagram of step S9 of the process implementation method of Example 1 of the present invention.

[0043] Fig.11 It is a schematic diagram of step S10 of the process implementation method of embodiment 1 of the present invention.

[0044] Fig.12 It is a schematic diagram of step S11 of the process implementation method of embodiment 1 of the present invention.

[0045] Fig.13 It is a schematic diagram of step S12 of the process implementation method of embodiment 1 of the present invention.

[0046] Fig.14 It is a schematic diagram of step S13 of the process implementation method of Example 1 of the present invention.

[0047] Fig.15 It is a schematic diagram of step S14 of the process implementation method of Example 1 of the present invention.

[0048] Fig.16 It is a schematic diagram of the structural cross-section of the radiation-hardened triode device according to Example 2 of the present invention.

[0049] Fig.17 It is a schematic diagram of step S1 of the process implementation method of embodiment 2 of the present invention.

[0050] Fig.18 It is a schematic diagram of step S2 of the process implementation method of embodiment 2 of the present invention.

[0051] Fig.19 It is a schematic diagram of step S3 of the process implementation method of embodiment 2 of the present invention.

[0052] Fig. 20 It is a schematic diagram of the structural cross-section of the radiation-hardened triode device of Example 3 of the present invention.

[0053] Fig.21 It is a schematic diagram of step S1 of the process implementation method of embodiment 3 of the present invention.

[0054] Fig. 22 It is a schematic diagram of step S2 of the process implementation method of embodiment 3 of the present invention.

[0055] Fig.23 It is a schematic diagram of step S3 of the process implementation method of embodiment 3 of the present invention.

[0056] Fig.24 It is a schematic diagram of the structural cross-section of the radiation-hardened triode device of Example 4 of the present invention.

[0057] Marking instructions in the figure: 11-substrate, 12-top silicon, 21-buried oxide layer, 22-sacrificial oxide layer, 23-linear oxide layer, 31-first N-type doping region, 32-second N-type doping region, 33-third N-type doping region, 34-fourth N-type doping region, 35-fifth N-type doping region, 36-sixth N-type doping region, 61-first P-type doping region, 62-second P-type doping region, 63-third P-type doping region, 51-polysilicon, 41-nitride mask layer, 42-photoresist, 131-first isolation shallow trench, 132-second isolation shallow trench, 133-third isolation shallow trench, 134-fourth isolation shallow trench. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0059] Example 1

[0060] In order to reduce the base recombination current of the transistor device in the total dose radiation environment and improve the total dose radiation resistance, the present invention proposes a radiation hardened transistor device, such as Figure 1 As shown, the radiation hardened triode device comprises:

[0061] Substrate 11, buried oxide layer 21, first N-type doping region 31, second N-type doping region 32, third N-type doping region 33, first P-type doping region 61, second P-type doping region 62, first isolation shallow trench 131, second isolation shallow trench 132, third isolation shallow trench 133, fourth isolation shallow trench 134, linear oxide layer 23, polysilicon 51, fourth N-type doping region 34, fifth N-type doping region 35, third P-type doping region 63.

[0062] The buried oxide layer 21 is located above the substrate 11, the first N-type doping region 31 is arranged above the buried oxide layer 21, and the second N-type doping region 32 is arranged above the first N-type doping region 31. The third N-type doping region 33 is arranged at the edge of the second N-type doping region 32, the third N-type doping region 33 has the same depth as the second N-type doping region 32, and the third N-type doping region 33 is connected to the first N-type doping region 31. The first P-type doping region 61 is arranged inside the second N-type doping region 32, and the depth of the first P-type doping region 61 is less than the depth of the second N-type doping region 32. The second isolation shallow trench 132 and the third isolation shallow trench 133 are arranged inside the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 are arranged across the third N-type doping region 33, the second N-type doping region 32, and the first P-type doping region 61.

[0063] A linear oxide layer 23 is set at the bottom and sidewall of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134, and polysilicon 51 is deposited on the upper surface of the linear oxide layer 23 to fill the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134. The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 inside the first P-type doping region 61. A third P-type doping region 63 is provided between the first isolation shallow trench 131 and the second isolation shallow trench 132, a fourth N-type doping region 34 is provided between the second isolation shallow trench 132 and the third isolation shallow trench 133, a third P-type doping region 63 is provided between the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and the third P-type doping region 63 and the fourth N-type doping region 34 are provided on the upper surface of the first P-type doping region 61. A fifth N-type doping region 35 is provided on the upper surface of the third N-type doping region 33. The fifth N-type doping region 35, the third P-type doping region 63 and the fourth N-type doping region 34 are not connected to each other.

[0064] The present invention also provides a method for manufacturing a radiation-resistant reinforced triode device, such as Figures 2 to 15 As shown, the manufacturing method comprises the following steps:

[0065] Step S1: Figure 2 As shown, a silicon on insulator (SOI) material is selected, and the selected SOI has a substrate 11, a buried oxide layer 21 and a top silicon layer 12 stacked in sequence from bottom to top.

[0066] Step S2: Figure 3 As shown, an ion implantation process is used to implant N-type impurities into the top silicon 12 to form a first N-type doped region 31. The implantation dose of the N-type impurities is 1E14 cm -2 ~1E16cm -2 The first N-type doping region 31 has a very high concentration and a very shallow depth, and serves as a transistor collector to lead out a low resistance channel, thereby improving the collection efficiency of the collector.

[0067] Step S3: Figure 4 As shown, an epitaxial process is used to epitaxially generate a second N-type doping region 32 on the first N-type doping region 31. The second N-type doping region 32 has a low doping concentration, which improves the collection efficiency of the collector region of the triode. The epitaxial concentration is 5E14cm -3 ~5E15cm -3 , the epitaxial depth is 4μm~7μm.

[0068] Step S4: Figure 5 As shown, photolithography and ion implantation processes are used to implant N-type impurities in the outer region of the second N-type doping region 32 to form a third N-type doping region 33. The implantation dose of the N-type impurities is 1E14 cm -2 ~1E15cm -2 The junction depth of the third N-type doping region 33 is equal to the epitaxial depth of the second N-type doping region 32. The third N-type doping region 33 is connected to the first N-type doping region 31 and serves as a transistor collector lead-out region to reduce the on-resistance of the transistor and improve the transistor amplification gain.

[0069] Step S5: Figure 6 As shown, by using photolithography and ion implantation process, the first P-type doping region 61 is exposed with a photomask in the center area of ​​the second N-type doping region 32 to form a photolithography window, and P-type impurities are implanted in the photolithography window to form the first P-type doping region 61. The implantation dose is 5E12cm -2 ~5E13cm -2 The injection junction depth is 2 μm to 3 μm, and the formed first P-type doping region 61 is the base region of the transistor.

[0070] Step S6: Figure 7 As shown, an oxidation and deposition process is used to generate a sacrificial oxide layer 22 on the surface of the second N-type doping region 32 , the third N-type doping region 33 , and the first P-type doping region 61 , a nitride mask layer 41 is deposited on the surface of the sacrificial oxide layer 22 , and then a photoresist 42 is deposited on the surface of the nitride mask layer 41 .

[0071] Step S7: Figure 8 As shown, by using photolithography and etching processes, etching windows of mutually spaced first isolation shallow trench 131, second isolation shallow trench 132, third isolation shallow trench 133 and fourth isolation shallow trench 134 are formed by etching the photoresist 42, the nitride mask layer 41, the sacrificial oxide layer 22 and the second N-type doping region 32, the third N-type doping region 33 and the first P-type doping region 61; wherein the second isolation shallow trench 132 and the third isolation shallow trench 133 are located in the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 span the third N-type doping region 33, the second N-type doping region 32 and the first P-type doping region 61.

[0072] Step S8: Fig. 9 As shown, the photoresist 42 on the surface of the nitride mask layer 41 is removed by a wet stripping process.

[0073] Step S9: Fig.10 As shown, an oxidation process is adopted to oxidize the surfaces of the first isolation shallow trench 131 , the second isolation shallow trench 132 , the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to form a linear oxide layer 23 .

[0074] Step S10: Fig.11 As shown, by using photolithography and ion implantation processes, P-type impurities are implanted into the sidewalls and bottoms of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 located in the first P-type doping region 61 to form a second P-type doping region 62. The implantation dose of the second P-type doping region 62 is 1E13cm -2 ~1E14cm -2 The photolithography of the second P-type doping region 62 uses the photolithography plate of the first P-type doping region 61 . The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 and is located inside the first P-type doping region 61 .

[0075] By arranging the second P-type doping region 62 on the side walls and bottom of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 in the base region, the increase of the base region surface recombination current is prevented, the degradation of the device common emitter current amplification factor is suppressed, and the ability of the transistor device to resist total dose radiation is effectively improved.

[0076] The second P-type doping region 62 is implanted using the photomask of the first P-type doping region 61 , which can save the number of photomasks and reduce the process manufacturing cost.

[0077] Step S11: Fig.12 As shown, the photoresist 42 is removed by an etching process.

[0078] Step S12: Fig.13 As shown, polysilicon 51 is filled in the first isolation shallow trench 131 , the second isolation shallow trench 132 , the third isolation shallow trench 133 and the fourth isolation shallow trench 134 by a deposition process.

[0079] Step S13: Fig.14 As shown, a chemical mechanical polishing process is used to grind the polysilicon 51, the nitride mask layer 41, and the sacrificial oxide layer 22 filled on the surfaces of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 to form a flat silicon trench surface.

[0080] By filling polysilicon and reducing the thickness of the isolation oxide layer, the influence of the total dose radiation effect on the base isolation oxide layer is reduced, thereby improving the total dose radiation resistance of the triode device.

[0081] Step S14: Fig.15 As shown, an ion implantation process is used to implant N-type impurities between the second isolation shallow trench 132 and the third isolation shallow trench 133 to generate a fourth N-type doping region 34, and N-type impurities are implanted on the surface of the third N-type doping region 33 to generate a fifth N-type doping region 35. The implantation dose of the fourth N-type doping region 34 and the fifth N-type doping region 35 is 1E15cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0082] Step S15: Using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench 131 and the second isolation shallow trench 132 and between the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to generate a third P-type doped region 63. The implantation dose is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0083] Example 2

[0084] like Fig.16 : is a schematic cross-sectional view of a structure of a radiation-hardened triode device according to a second embodiment of the present invention. The triode device is arranged on a bulk silicon substrate. The radiation-hardened triode device comprises:

[0085] Substrate 11, first N-type doping region 31, second N-type doping region 32, third N-type doping region 33, first P-type doping region 61, second P-type doping region 62, first isolation shallow trench 131, second isolation shallow trench 132, third isolation shallow trench 133, fourth isolation shallow trench 134, linear oxide layer 23, polysilicon 51, fourth N-type doping region 34, fifth N-type doping region 35, third P-type doping region 63.

[0086] The first N-type doping region 31 is located above the substrate 11, and the second N-type doping region 32 is arranged above the first N-type doping region 31. The third N-type doping region 33 is arranged at the edge of the second N-type doping region 32, and the third N-type doping region 33 has the same depth as the second N-type doping region 32, and the third N-type doping region 33 is connected to the first N-type doping region 31. The first P-type doping region 61 is arranged inside the second N-type doping region 32, and the depth of the first P-type doping region 61 is less than the depth of the second N-type doping region 32. The second isolation shallow trench 132 and the third isolation shallow trench 133 are arranged inside the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 are arranged across the third N-type doping region 33, the second N-type doping region 32, and the first P-type doping region 61.

[0087] A linear oxide layer 23 is set at the bottom and sidewall of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and polysilicon 51 is deposited on the upper surface of the linear oxide layer 23 to fill the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134. The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 inside the first P-type doping region 61. A third P-type doping region 63 is provided between the first isolation shallow trench 131 and the second isolation shallow trench 132, a fourth N-type doping region 34 is provided between the second isolation shallow trench 132 and the third isolation shallow trench 133, a third P-type doping region 63 is provided between the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and the third P-type doping region 63 and the fourth N-type doping region 34 are provided on the upper surface of the first P-type doping region 61. A fifth N-type doping region 35 is provided on the upper surface of the third N-type doping region 33. The fifth N-type doping region 35, the third P-type doping region 63 and the fourth N-type doping region 34 are not connected to each other.

[0088] The method for manufacturing a radiation hardened triode device according to a second embodiment of the present invention comprises the following steps:

[0089] Step S1: Fig.17 As shown, a bulk silicon substrate material is selected as substrate 11 .

[0090] Step S2: Fig.18As shown, an oxidation and ion implantation process is used to oxidize the substrate 11 to form a sacrificial oxide layer 22, and an ion implantation process is used to implant the substrate 11 to form a first N-type doping region 31, and the implantation dose of the N-type impurity is 1E14cm -2 ~1E16cm -2 The injection depth is 0.5μm~2μm.

[0091] Step S3: Fig.19 As shown, an etching process is used to remove the sacrificial oxide layer 22 on the surface of the substrate, and then an epitaxial process is used to epitaxially generate a second N-type doping region 32 on the first N-type doping region 31. The second N-type doping region 32 has a low doping concentration, which improves the collection efficiency of the collector region of the triode. The epitaxial concentration is 5E14cm -3 ~5E15cm -3 , the epitaxial depth is 4μm~7μm.

[0092] Step S4: Using photolithography and ion implantation processes, N-type impurities are implanted into the area outside the second N-type doping region 32 to form a third N-type doping region 33. The implantation dose of the N-type impurities is 1E14 cm -2 ~1E15cm -2 The junction depth of the third N-type doping region 33 is equal to the epitaxial depth of the second N-type doping region 32. The third N-type doping region 33 is connected to the first N-type doping region 31 and serves as a transistor collector lead-out region to reduce the on-resistance of the transistor and improve the transistor amplification gain.

[0093] Step S5: Figure 6 As shown, by using photolithography and ion implantation process, the first P-type doping region 61 is exposed with a photomask in the center area of ​​the second N-type doping region 32 to form a photolithography window, and P-type impurities are implanted in the photolithography window to form the first P-type doping region 61. The implantation dose is 5E12cm -2 ~5E13cm -2 The injection junction depth is 2 μm to 3 μm, and the formed first P-type doping region 61 is the base region of the transistor.

[0094] Step S6: using oxidation and deposition processes, a sacrificial oxide layer 22 is generated on the surfaces of the second N-type doping region 32 , the third N-type doping region 33 , and the first P-type doping region 61 , a nitride mask layer 41 is deposited on the surface of the sacrificial oxide layer 22 , and then a photoresist 42 is deposited on the surface of the nitride mask layer 41 .

[0095] Step S7: adopting photolithography and etching process, by etching the photoresist 42, the nitride mask layer 41, the sacrificial oxide layer 22 and the second N-type doping region 32, the third N-type doping region 33, and the first P-type doping region 61, the etching windows of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 which are spaced apart from each other are formed; wherein the second isolation shallow trench 132 and the third isolation shallow trench 133 are located in the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 span the third N-type doping region 33, the second N-type doping region 32, and the first P-type doping region 61.

[0096] Step S8: using a wet stripping process to remove the photoresist 42 on the surface of the nitride mask layer 41 .

[0097] Step S9 : using an oxidation process to oxidize the surfaces of the first isolation shallow trench 131 , the second isolation shallow trench 132 , the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to form a linear oxide layer 23 .

[0098] Step S10: Using photolithography and ion implantation processes, P-type impurities are implanted into the sidewalls and bottom of the isolation shallow trenches 131-134 in the first P-type doping region 61 to form a second P-type doping region 62. The implantation dose of the second P-type doping region 62 is 1E13 cm -2 ~1E14cm -2 The photolithography of the second P-type doping region 62 uses the photolithography plate of the first P-type doping region 61 . The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 and is located inside the first P-type doping region 61 .

[0099] By arranging the second P-type doping region 62 on the side walls and bottom of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 in the base region, the increase of the base region surface recombination current is prevented, the degradation of the device common emitter current amplification factor is suppressed, and the ability of the transistor device to resist total dose radiation is effectively improved.

[0100] The second P-type doping region 62 is implanted using the photomask of the first P-type doping region 61 , which can save the number of photomasks and reduce the process manufacturing cost.

[0101] Step S11: removing the photoresist 42 by etching.

[0102] Step S12 : using a deposition process to fill the first shallow isolation trench 131 , the second shallow isolation trench 132 , the third shallow isolation trench 133 , and the fourth shallow isolation trench 134 with polysilicon 51 .

[0103] Step S13: using a chemical mechanical polishing process to grind the polysilicon 51, the nitride mask layer 41, and the sacrificial oxide layer 22 filled on the surfaces of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 to form a flat silicon trench surface.

[0104] By filling polysilicon and reducing the thickness of the isolation oxide layer, the influence of the total dose radiation effect on the base isolation oxide layer is reduced, thereby improving the total dose radiation resistance of the triode device.

[0105] Step S14: Using an ion implantation process, N-type impurities are implanted between the second isolation shallow trench 132 and the third isolation shallow trench 133 to generate a fourth N-type doping region 34, and N-type impurities are implanted on the surface of the third N-type doping region 33 to generate a fifth N-type doping region 35. The implantation dose of the fourth N-type doping region 34 and the fifth N-type doping region 35 is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0106] Step S15: Using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench 131 and the second isolation shallow trench 132 and between the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to generate a third P-type doped region 63. The implantation dose is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0107] Example 3

[0108] like Fig. 20 3 is a schematic diagram of a cross-sectional structure of a radiation-hardened triode device according to a third embodiment of the present invention. The device is directly disposed on an SOI material of an N-type top silicon, and the N-type top silicon material is a sixth N-type doped region 36. The radiation-hardened triode device includes:

[0109] Substrate 11, buried oxide layer 21, sixth N-type doping region 36, third N-type doping region 33, first P-type doping region 61, second P-type doping region 62, first isolation shallow trench 131, second isolation shallow trench 132, third isolation shallow trench 133, fourth isolation shallow trench 134, linear oxide layer 23, polysilicon 51, fourth N-type doping region 34, fifth N-type doping region 35, third P-type doping region 63.

[0110] The buried oxide layer 21 is located above the substrate 11, and the sixth N-type doping region 36 is arranged on the upper surface of the buried oxide layer 21. The third N-type doping region 33 is arranged at the edge of the sixth N-type doping region 36, and the depth of the third N-type doping region 33 is the same as that of the sixth N-type doping region 36. The first P-type doping region 61 is arranged inside the second N-type doping region 32, and the depth of the first P-type doping region 61 is less than the depth of the sixth N-type doping region 36. The second isolation shallow trench 132 and the third isolation shallow trench 133 are arranged inside the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 are arranged across the third N-type doping region 33, the sixth N-type doping region 36, and the first P-type doping region 61.

[0111] A linear oxide layer 23 is set at the bottom and sidewall of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and polysilicon 51 is deposited on the upper surface of the linear oxide layer 23 to fill the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134. The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 inside the first P-type doping region 61. A third P-type doping region 63 is provided between the first isolation shallow trench 131 and the second isolation shallow trench 132, a fourth N-type doping region 34 is provided between the second isolation shallow trench 132 and the third isolation shallow trench 133, a third P-type doping region 63 is provided between the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and the third P-type doping region 63 and the fourth N-type doping region 34 are provided on the upper surface of the first P-type doping region 61. A fifth N-type doping region 35 is provided on the upper surface of the third N-type doping region 33. The fifth N-type doping region 35, the third P-type doping region 63 and the fourth N-type doping region 34 are not connected to each other.

[0112] The sixth N-type doping region 36 is disposed on the upper surface of the buried oxide layer 21 and directly serves as the collector region of the transistor. No additional first N-type doping region 31 needs to be implanted, and no additional epitaxial process is required. The overall process manufacturing is relatively simple and easy to integrate.

[0113] The method for manufacturing a radiation hardened triode device according to a third embodiment of the present invention comprises the following steps:

[0114] Step S1: Fig.21 As shown, SOI substrate material is selected, and the device comprises a substrate 11, a buried oxide layer 21 and a sixth N-type doping region 36 from bottom to top, and the thickness of the sixth N-type doping region 36 is 4 μm-7 μm.

[0115] Step S2: Fig. 22As shown, an oxidation and ion implantation process is used to oxidize the upper surface of the sixth N-type doping region 36 to form a sacrificial oxide layer 22, and a photoresist 42 is provided in the middle of the surface of the sacrificial oxide layer 22 by photolithography and ion implantation processes, and N-type impurities are implanted in the area outside the sixth N-type doping region 36 that is not covered by the photoresist 42, and the implantation dose of the N-type impurities is 1E14cm -2 ~1E16cm -2 , the implantation depth is equal to the depth of the sixth N-type doping region 36 .

[0116] Step S3: Fig.23 As shown, the photoresist 42 on the surface of the sacrificial oxide layer 22 is removed by etching and annealing process, and then the third N-type doping region 33 is formed by annealing process.

[0117] Step S4: Using photolithography and ion implantation process, the center area of ​​the second N-type doping region 32 is exposed with the first P-type doping region 61 photomask to form a photolithography window, and P-type impurities are implanted in the photolithography window to form the first P-type doping region 61. The implantation dose is 5E12cm -2 ~5E13cm -2 The injection junction depth is 2 μm to 3 μm, and the formed first P-type doping region 61 is the base region of the transistor.

[0118] Step S5 : using a deposition process to deposit a nitride mask layer 41 on the surface of the sacrificial oxide layer 22 , and then depositing a photoresist 42 on the surface of the nitride mask layer 41 .

[0119] Step S6: adopting photolithography and etching process, by etching the photoresist 42, the nitride mask layer 41, the sacrificial oxide layer 22 and the sixth N-type doping region 36, the third N-type doping region 33, and the first P-type doping region 61, a first isolation shallow trench 131, a second isolation shallow trench 132, a third isolation shallow trench 133 and a fourth isolation shallow trench 134 etching windows which are spaced apart from each other are formed; wherein the second isolation shallow trench 132 and the third isolation shallow trench 133 are located in the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 span the third N-type doping region 33, the sixth N-type doping region 36, and the first P-type doping region 61.

[0120] Step S7: using a wet stripping process to remove the photoresist 42 on the surface of the nitride mask layer 41 .

[0121] Step S8 : using an oxidation process to oxidize the surfaces of the first isolation shallow trench 131 , the second isolation shallow trench 132 , the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to form a linear oxide layer 23 .

[0122] Step S9: Using photolithography and ion implantation processes, P-type impurities are implanted into the sidewalls and bottoms of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 in the first P-type doping region 61 to form a second P-type doping region 62. The implantation dose of the second P-type doping region 62 is 1E13 cm -2 ~1E14cm -2 The photolithography of the second P-type doping region 62 uses the photolithography plate of the first P-type doping region 61 . The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 and is located inside the first P-type doping region 61 .

[0123] Step S10: removing the photoresist 42 by etching.

[0124] Step S11 : using a deposition process to fill the first shallow isolation trench 131 , the second shallow isolation trench 132 , the third shallow isolation trench 133 , and the fourth shallow isolation trench 134 with polysilicon 51 .

[0125] Step S12: using a chemical mechanical polishing process to grind the polysilicon 51, the nitride mask layer 41, and the sacrificial oxide layer 22 filled on the surfaces of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 to form a flat silicon trench surface.

[0126] Step S13: Using an ion implantation process, N-type impurities are implanted between the second isolation shallow trench 132 and the third isolation shallow trench 133 to generate a fourth N-type doping region 34, and N-type impurities are implanted on the surface of the third N-type doping region 33 to generate a fifth N-type doping region 35. The implantation dose of the fourth N-type doping region 34 and the fifth N-type doping region 35 is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0127] Step S14: Using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench 131 and the second isolation shallow trench 132 and between the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to generate a third P-type doped region 63. The implantation dose is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

[0128] Example 4

[0129] like Fig.24 : is a schematic cross-sectional view of a radiation-hardened triode device according to a fourth embodiment of the present invention. The radiation-hardened triode device comprises:

[0130] Substrate 11, buried oxide layer 21, first N-type doping region 31, second N-type doping region 32, third N-type doping region 33, first P-type doping region 61, second P-type doping region 62, first isolation shallow trench 131, second isolation shallow trench 132, third isolation shallow trench 133, fourth isolation shallow trench 134, linear oxide layer 23, polysilicon 51, fourth N-type doping region 34, fifth N-type doping region 35, third P-type doping region 63.

[0131] The buried oxide layer 21 is located above the substrate 11, the first N-type doping region 31 is arranged above the buried oxide layer 21, and the second N-type doping region 32 is arranged above the first N-type doping region 31. The third N-type doping region 33 is arranged at the edge of the second N-type doping region 32, the third N-type doping region 33 has the same depth as the second N-type doping region 32, and the third N-type doping region 33 is connected to the first N-type doping region 31. The first P-type doping region 61 is arranged inside the second N-type doping region 32, and the depth of the first P-type doping region 61 is less than the depth of the second N-type doping region 32. The second isolation shallow trench 132 and the third isolation shallow trench 133 are arranged inside the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 are arranged across the third N-type doping region 33, the second N-type doping region 32, and the first P-type doping region 61.

[0132] A linear oxide layer 23 is provided at the bottom and sidewall of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134. Polysilicon 51 is deposited on the upper surface of the linear oxide layer 23 to fill the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134. The second P-type doping region 62 is located at the lower surface of the linear oxide layer 23 of the second isolation shallow trench 132 and the third isolation shallow trench 133 inside the first P-type doping region 61. A third P-type doping region 63 is provided between the first isolation shallow trench 131 and the second isolation shallow trench 132, a fourth N-type doping region 34 is provided between the second isolation shallow trench 132 and the third isolation shallow trench 133, a third P-type doping region 63 is provided between the third isolation shallow trench 133 and the fourth isolation shallow trench 134, and the third P-type doping region 63 and the fourth N-type doping region 34 are provided on the upper surface of the first P-type doping region 61. A fifth N-type doping region 35 is disposed on the upper surface of the third N-type doping region 33. The fifth N-type doping region 35, the third P-type doping region 63 and the fourth N-type doping region 34 are not connected to each other.

[0133] The difference between this embodiment and embodiment 1 is that the lower surface of the linear oxide layer 23 of the first isolation shallow trench 131 and the fourth isolation shallow trench 134 is not provided with the second P-type doping region 62, and a separate photolithography plate needs to be made in the process to realize the impurity injection of the sidewall and bottom of the second isolation shallow trench 132 and the third isolation shallow trench 133. This embodiment prevents the increase of the base surface recombination current, suppresses the degradation of the device common emitter current amplification factor, and effectively improves the ability of the triode device to resist total dose radiation. The lower surface of the first isolation shallow trench 131 and the fourth isolation shallow trench 134 is not provided with the second P-type doping region 62, which can avoid the influence of the process implementation process on the collector junction breakdown voltage, making the size and spacing parameter design between the first P-type doping region 61, the second N-type doping region 32, and the third N-type doping region 33 simpler.

[0134] The present invention provides a fourth embodiment of a method for manufacturing a radiation hardened triode device, comprising the following steps:

[0135] Step S1: Select a silicon-on-insulator material, where the selected silicon-on-insulator has a substrate 11, a buried oxide layer 21 and a top silicon layer 12 stacked in sequence from bottom to top.

[0136] Step S2: Using ion implantation technology, N-type impurities are implanted into the top silicon 12 to form a first N-type doped region 31. The implantation dose of the N-type impurities is 1E14 cm -2 ~1E16cm -2 The first N-type doping region 31 has a very high concentration and a very shallow depth, and serves as a transistor collector to lead out a low resistance channel, thereby improving the collection efficiency of the collector.

[0137] Step S3: epitaxially grow the second N-type doping region 32 on the first N-type doping region 31 by epitaxial growth process. The second N-type doping region 32 has a lower doping concentration, which improves the collector efficiency of the transistor. The epitaxial concentration is 5E14cm -3 ~5E15cm -3 , the epitaxial depth is 4μm~7μm.

[0138] Step S4: Using photolithography and ion implantation processes, N-type impurities are implanted into the area outside the second N-type doping region 32 to form a third N-type doping region 33. The implantation dose of the N-type impurities is 1E14 cm -2 ~1E15cm -2 The junction depth of the third N-type doping region 33 is equal to the epitaxial depth of the second N-type doping region 32. The third N-type doping region 33 is connected to the first N-type doping region 31 and serves as a transistor collector lead-out region to reduce the on-resistance of the transistor and improve the transistor amplification gain.

[0139] Step S5: Using photolithography and ion implantation process, the center area of ​​the second N-type doping region 32 is exposed with the first P-type doping region 61 photomask to form a photolithography window, and P-type impurities are implanted in the photolithography window to form the first P-type doping region 61. The implantation dose is 5E12cm -2 ~5E13cm -2 The injection junction depth is 2 μm to 3 μm, and the formed first P-type doping region 61 is the base region of the transistor.

[0140] Step S6: using oxidation and deposition processes, a sacrificial oxide layer 22 is generated on the surfaces of the second N-type doping region 32 , the third N-type doping region 33 , and the first P-type doping region 61 , a nitride mask layer 41 is deposited on the surface of the sacrificial oxide layer 22 , and then a photoresist 42 is deposited on the surface of the nitride mask layer 41 .

[0141] Step S7: adopting photolithography and etching process, by etching the photoresist 42, the nitride mask layer 41, the sacrificial oxide layer 22 and the second N-type doping region 32, the third N-type doping region 33, and the first P-type doping region 61, the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133 and the fourth isolation shallow trench 134 etching windows which are spaced apart from each other are formed; wherein the second isolation shallow trench 132 and the third isolation shallow trench 133 are located in the first P-type doping region 61, and the first isolation shallow trench 131 and the fourth isolation shallow trench 134 span the third N-type doping region 33, the second N-type doping region 32, and the first P-type doping region 61.

[0142] Step S8: using a wet stripping process to remove the photoresist 42 on the surface of the nitride mask layer 41 .

[0143] Step S9 : using an oxidation process to oxidize the surfaces of the first isolation shallow trench 131 , the second isolation shallow trench 132 , the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to form a linear oxide layer 23 .

[0144] Step S10: Using photolithography and ion implantation processes, P-type impurities are implanted into the sidewalls and bottom of the second isolation shallow trench 132 and the third isolation shallow trench 133 located in the first P-type doping region 61 to form a second P-type doping region 62. The implantation dose of the second P-type doping region 62 is 1E13 cm -2 ~1E14cm -2 The photolithography of the second P-type doping region 62 uses the photolithography plate of the first P-type doping region 61 . The second P-type doping region 62 is located on the lower surface of the linear oxide layer 23 and is located inside the first P-type doping region 61 .

[0145] By setting the second P-type doping region 62 on the side walls and bottom of the second isolation shallow trench 132 and the third isolation shallow trench 133 in the base region, the increase of the base surface recombination current is prevented, the degradation of the device common emitter current amplification factor is suppressed, and the ability of the transistor device to resist total dose radiation is effectively improved.

[0146] By using an independent photolithography plate and only injecting the second P-type doping region 62 on the lower surface of the second isolation shallow trench 132 and the third isolation shallow trench 133, the influence of the process implementation process on the collector junction breakdown voltage of the first P-type doping region 61 and the second N-type doping region 32 can be avoided, making the size and spacing parameter design of the first P-type doping region 61 and the second N-type doping region 32 simpler.

[0147] Step S11: removing the photoresist 42 by etching.

[0148] Step S12 : using a deposition process to fill the first shallow isolation trench 131 , the second shallow isolation trench 132 , the third shallow isolation trench 133 , and the fourth shallow isolation trench 134 with polysilicon 51 .

[0149] Step S13: using a chemical mechanical polishing process to grind the polysilicon 51, the nitride mask layer 41, and the sacrificial oxide layer 22 filled on the surfaces of the first isolation shallow trench 131, the second isolation shallow trench 132, the third isolation shallow trench 133, and the fourth isolation shallow trench 134 to form a flat silicon trench surface.

[0150] By filling polysilicon and reducing the thickness of the isolation oxide layer, the influence of the total dose radiation effect on the base isolation oxide layer is reduced, thereby improving the total dose radiation resistance of the triode device.

[0151] Step S14: Using an ion implantation process, N-type impurities are implanted between the second isolation shallow trench 132 and the third isolation shallow trench 133 to generate a fourth N-type doping region 34, and N-type impurities are implanted on the surface of the third N-type doping region 33 to generate a fifth N-type doping region 35. The implantation dose of the fourth N-type doping region 34 and the fifth N-type doping region 35 is 1E15 cm -2 ~1E16cm -2 , the injection junction depth is 0.3μm~0.4μm.

[0152] Step S15: Using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench 131 and the second isolation shallow trench 132 and between the third isolation shallow trench 133 and the fourth isolation shallow trench 134 to generate a third P-type doped region 63. The implantation dose is 1E15 cm -2 ~1E16cm -2 , the injection junction depth is 0.3μm~0.4μm.

[0153] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A method for manufacturing a radiation-hardened triode device, characterized in that: The steps include: Step S1: Selecting a silicon-on-insulator material, wherein the selected silicon-on-insulator has a substrate (11), a buried oxide layer (21) and a top silicon layer (12) stacked in sequence from bottom to top; Step S2: Using an ion implantation process, N-type impurities are implanted into the top silicon layer (12) to form a first N-type doping region (31); the implantation dose of the first N-type doping region (31) is 1E14 cm -2 ~1E16cm -2 , the first N-type doping region 31 has a high concentration and a shallow depth; Step S3: using an epitaxial process to epitaxially generate a second N-type doping region (32) on the first N-type doping region (31); the concentration of the epitaxial second N-type doping region (32) is 5E14cm -3 ~5E15cm -3 , the epitaxial depth is 4 μm to 7 μm; the second N-type doping region 32 has a low doping concentration; Step S4: Using photolithography and ion implantation processes, N-type impurities are implanted in the area outside the second N-type doping region (32) to form a third N-type doping region (33). The implantation dose of the N-type impurities is 1E14 cm -2 ~1E15cm -2 The junction depth of the third N-type doping region (33) is equal to the epitaxial depth of the second N-type doping region (32), and the third N-type doping region (33) is connected to the first N-type doping region (31); Step S5: using photolithography and ion implantation processes, exposing the center area of ​​the second N-type doping region (32) with a photolithography plate of the first P-type doping region (61) to form a photolithography window, and implanting P-type impurities into the photolithography window to form the first P-type doping region (61); Step S6: using oxidation and deposition processes to generate a sacrificial oxide layer (22) on the surfaces of the second N-type doping region (32), the third N-type doping region (33), and the first P-type doping region (61), depositing a nitride mask layer (41) on the surface of the sacrificial oxide layer (22), and then depositing a photoresist (42) on the surface of the nitride mask layer (41); Step S7: using photolithography and etching processes, etching the photoresist (42), the nitride mask layer (41), the sacrificial oxide layer (22), the second N-type doping region (32), the third N-type doping region (33), and the first P-type doping region (61) to form etching windows of a first isolation shallow groove (131), a second isolation shallow groove (132), a third isolation shallow groove (133), and a fourth isolation shallow groove (134) that are spaced apart from each other; wherein the second isolation shallow groove (132) and the third isolation shallow groove (133) are located in the first P-type doping region (61), and the first isolation shallow groove (131) and the fourth isolation shallow groove (134) span the third N-type doping region (33), the second N-type doping region (32), and the first P-type doping region (61); Step S8: using a wet stripping process to remove the photoresist (42) on the surface of the nitride mask layer (41); Step S9: using an oxidation process to oxidize the surfaces of the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134) to form a linear oxide layer (23); Step S10: using photolithography and ion implantation processes, P-type impurities are implanted into the sidewalls and bottom of the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134) located in the first P-type doping region (61) to form a second P-type doping region (62); the photolithography of the second P-type doping region (62) uses the photolithography plate of the first P-type doping region (61); the second P-type doping region (62) is located on the lower surface of the linear oxide layer (23) and is located in the first P-type doping region (61); Step S11: using an etching process to remove the photoresist (42); Step S12: using a deposition process to fill polysilicon (51) inside the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134); Step S13: using a chemical mechanical polishing process to grind the polysilicon (51), the nitride mask layer (41), and the sacrificial oxide layer (22) filled on the surfaces of the first isolation shallow groove (131), the second isolation shallow groove (132), the third isolation shallow groove (133), and the fourth isolation shallow groove (134) to form a flat silicon groove surface; Step S14: using an ion implantation process, N-type impurities are implanted between the second isolation shallow trench (132) and the third isolation shallow trench (133) to generate a fourth N-type doping region (34), and N-type impurities are implanted on the surface of the third N-type doping region (33) to generate a fifth N-type doping region (35); Step S15: using an ion implantation process, P-type impurities are implanted between the first isolation shallow trench (131) and the second isolation shallow trench (132) and between the third isolation shallow trench (133) and the fourth isolation shallow trench (134) to generate a third P-type doped region (63).

2. The method for manufacturing a radiation hardened triode device according to claim 1, characterized in that: The implantation dose of the first P-type doping region (61) in step S5 is 5E12cm -2 ~5E13cm -2 , the injection junction depth is 2μm~3μm.

3. The method for manufacturing a radiation hardened triode device according to claim 1, characterized in that: The implantation dose of the second P-type doping region (62) in step S10 is 1E13 cm -2 ~1E14cm -2 .

4. The method for manufacturing a radiation hardened triode device according to claim 1, characterized in that: The implantation dose of the fourth N-type doping region (34) and the fifth N-type doping region (35) in step S14 is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

5. The method for manufacturing a radiation hardened triode device according to claim 1, characterized in that: The implantation dose of the third P-type doping region (63) in step S15 is 1E15 cm -2 ~1E16cm -2 The injection junction depth is 0.3μm~0.4μm.

6. A radiation hardened triode device, characterized in that: The radiation-hardened triode device is prepared by the manufacturing method of the radiation-hardened triode device according to any one of claims 1 to 5, and the radiation-hardened triode device comprises a substrate (11), a buried oxide layer (21), a first N-type doping region (31), a second N-type doping region (32), a third N-type doping region (33), a first P-type doping region (61), a second P-type doping region (62), a first isolation shallow trench (131), a second isolation shallow trench (132), a third isolation shallow trench (133), a fourth isolation shallow trench (134), a linear oxide layer (23), polysilicon (51), a fourth N-type doping region (34), a fifth N-type doping region (35), and a third P-type doping region (63).

7. The radiation hardened triode device according to claim 6, characterized in that: The buried oxide layer (21) is located above the substrate (11); the first N-type doping region (31) is arranged above the buried oxide layer (21); the second N-type doping region (32) is arranged above the first N-type doping region (31); the third N-type doping region (33) is arranged at the edge of the second N-type doping region (32); the third N-type doping region (33) and the second N-type doping region (32) have the same depth; the third N-type doping region (33) is connected to the first N-type doping region (31); the first The P-type doping region (61) is arranged inside the second N-type doping region (32), and the depth of the first P-type doping region (61) is less than the depth of the second N-type doping region (32); a second isolation shallow groove (132) and a third isolation shallow groove (133) are arranged inside the first P-type doping region (61), and the first isolation shallow groove (131) and the fourth isolation shallow groove (134) are arranged across the third N-type doping region (33), the second N-type doping region (32), and the first P-type doping region (61); A linear oxide layer (23) is provided at the bottom and sidewall of the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134); polysilicon (51) is deposited on the upper surface of the linear oxide layer (23) to fill the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134); and the second P-type doping region (62) is located on the lower surface of the linear oxide layer (23) of the first isolation shallow trench (131), the second isolation shallow trench (132), the third isolation shallow trench (133), and the fourth isolation shallow trench (134) inside the first P-type doping region (61); A third P-type doping region (63) is arranged between the first isolation shallow groove (131) and the second isolation shallow groove (132), a fourth N-type doping region (34) is arranged between the second isolation shallow groove (132) and the third isolation shallow groove (133), a third P-type doping region (63) is arranged between the third isolation shallow groove (133) and the fourth isolation shallow groove (134), the third P-type doping region (63) and the fourth N-type doping region (34) are arranged on the upper surface of the first P-type doping region (61); a fifth N-type doping region (35) is arranged on the upper surface of the third N-type doping region (33); the fifth N-type doping region (35), the third P-type doping region (63) and the fourth N-type doping region (34) are not connected to each other.

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