Apparatus and jig for measuring capacitance of semiconductor device

Abstract

The invention relates to a measuring device and a measuring jig for capacitance of a semiconductor device. Measurement accuracy of feedback capacitance of a semiconductor device is improved. Between the gate terminal of a semiconductor device (100) to be measured and the Lc terminal (32) of an LCR meter (30): a first wiring (6A) that connects between the gate terminal and the source terminal of the semiconductor device (100) by passing the core of a transformer (10) once; and a second wiring (6B) which is wound N turns around the iron core of the transformer (10), one end of which is connected to the Lc terminal (32), and the other end of which is grounded. When the angular frequency of an AC signal applied to the drain terminal of the semiconductor device (100) is Omega, the inductance of the first wiring line (6A) is LS6A, the inductance of the second wiring line (6B) is LS6B, and the gate-source parasitic capacitance of the semiconductor device (100) is CGS, Omega LS6Alt is represented by Omega LS6Alt. 1 / ([omega] CGS) and [omega] LS6B / N2lt; 1 / (omega CGS).

Description

Technical Field

[0001] The present invention relates to a device for measuring parasitic capacitance of a semiconductor device. Background Art

[0002] The parasitic capacitance of a three-terminal semiconductor device such as a transistor (FET, MOSFET, IGBT, etc.) can be measured using an LCR meter, which is an impedance measuring instrument. Hereinafter, a semiconductor device to be measured for parasitic capacitance is referred to as a DUT (Device Under Test).

[0003] LCR meter has: H cur Terminal (hereinafter referred to as "Hc terminal"), which outputs AC (Alternating Current) signal; L cur Terminal (hereinafter referred to as "Lc terminal"), which monitors the current; H pot Terminal (hereinafter referred to as "Hp terminal") and L pot A terminal (hereinafter referred to as an “Lp terminal”) which monitors the voltage; and a GND terminal which is set to a ground potential (GND).

[0004] If an AC signal is input from the Hc terminal of the LCR meter to the drain terminal while a DC high voltage VCC is applied between the drain terminal and the source terminal of the DUT, a current corresponding to the AC signal will flow into the drain terminal of the DUT. The current flowing into the drain terminal is divided into the gate and the source in the DUT. The current flowing to the gate of the DUT is input to the Lc terminal of the LCR meter and measured. Since the source terminal of the DUT is connected to the GND terminal, the Lc terminal is set to the same potential as the GND terminal (virtual GND), so no current flows between the gate terminal and the source terminal. Therefore, the current input to the Lc terminal, that is, the current flowing through the gate terminal, is the current that has only passed through the parasitic capacitance (C GD ) current (I CGD In addition, the drain terminal and source terminal of the DUT are connected to the Hp terminal and Lp terminal of the LCR meter respectively, and the gate-drain voltage (V CD ) for determination.

[0005] According to the current I measured by the LCR meter CGD and voltage V CD The amplitude and phase of each of them affect the parasitic capacitance C between the gate and drain of the DUT. GD That is, the feedback capacitor (C RSS ) for calculation.

[0006] As the current I CGD and voltage V CDThere are two methods for measuring: a two-terminal measurement method in which the wiring for current monitoring and the wiring for voltage monitoring connected to the DUT are shared, and a four-terminal measurement method in which these are separated.

[0007] The 2-terminal measurement method has the advantage of being able to reduce the number of components such as wiring and connectors constituting the measurement circuit and simplify the measurement circuit, but has the disadvantage of reducing the measurement accuracy due to the influence of the connector contact resistance and wiring inductance on the measurement value. On the contrary, the 4-terminal measurement method can eliminate the influence of the connector contact resistance and wiring inductance, but the measurement circuit is complicated.

[0008] For example, Patent Document 1 listed below proposes a technique for eliminating the influence of the contact resistance of the connector and the inductance of the wiring in the two-terminal measurement method.

[0009] Patent Document 1: Japanese Patent Application Publication No. 2015-210120

[0010] In both the 2-terminal and 4-terminal measurement methods, when the wiring of the measurement circuit is long or when high-frequency measurement is performed, the measurement error becomes larger. The cause of this is the wiring inductance (L S ), the wiring inductance (L) between the source terminal and the GND terminal (and the guard) S ).

[0011] The above feedback capacitor C RSS The measurement method is based on the premise that the gate terminal and source terminal of the DUT are at the same potential (GND potential). In other words, it is based on the premise that the voltage (wiring voltage drop) generated by the wiring inductance between the gate terminal and the Lc terminal and the voltage (wiring voltage drop) generated by the wiring inductance between the source terminal and the GND terminal are small enough to be ignored. Therefore, if these wiring voltage drops are too large to be ignored, accurate measurement cannot be performed.

[0012] Therefore, in the current C RSS In the measurement technology, it is impossible to set the wiring between the gate terminal and the Lc terminal, and the wiring between the source terminal and the GND terminal to be long. For example, when the DUT is installed on a heating plate or a cooling plate for setting the temperature for measurement, when the DUT is connected to other measuring instruments (such as DC measuring instruments) for measurement, or when the distance between the LCR meter and the DUT needs to be increased in order to ensure the working space, etc., there is a need to set the wiring of the measurement circuit to be long, but the above-mentioned wiring voltage drop problem becomes a bottleneck. In addition, when the frequency of the AC signal applied to the DUT is set high, the displacement current caused by the parasitic capacitance of the DUT becomes large and the wiring impedance also becomes large, so the wiring voltage drop problem becomes significant. Summary of the invention

[0013] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to improve the measurement accuracy of the feedback capacitance of a semiconductor device (DUT).

[0014] The semiconductor device capacitance measuring device according to the present invention comprises an LCR meter, and the measuring device measures the capacitance of a three-terminal semiconductor device. The LCR meter comprises a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage. In the semiconductor device capacitance measuring device, the drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal, the gate terminal of the semiconductor device is connected to the Lp terminal, and the source terminal of the semiconductor device is connected to the GND terminal. The measuring device further comprises: a first transformer; a first wiring, which passes through the iron core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; and a second wiring, which is wound around the iron core of the first transformer by N turns, one end of which is connected to the Lc terminal, and the other end is grounded during measurement. If the angular frequency of the AC signal is ω, the inductance of the first wiring is L S_6A , the inductance of the second wiring is set to L S_6B , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied: ωL S_6A <1 / (ωC GS ) and ωL S_6B / N 2 <1 / (ωC GS ).

[0015] Effects of the Invention

[0016] According to the present invention, it is possible to improve the measurement accuracy of the feedback capacitance of a semiconductor device (DUT). BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 1 is a diagram showing a circuit configuration of a capacitance measuring device according to Embodiment 1.

[0018] Figure 2 This is an enlarged view of the DUT and the first transformer.

[0019] Figure 3 This is a diagram showing a circuit configuration of a capacitance measuring device according to a second embodiment.

[0020] Figure 4 This is a diagram showing the measurement terminals of a general LCR meter.

[0021] Figure 5 This is an enlarged view of the female side of the BNC connector.

[0022] Figure 6 This is a diagram showing a circuit configuration of a capacitance measuring device according to a third embodiment.

[0023] Figure 7 1 is a diagram showing a circuit configuration of a capacitance measuring device according to a fourth embodiment.

[0024] Figure 8 1 is a diagram showing a circuit configuration of a capacitance measuring device according to a fourth embodiment.

[0025] Fig. 9 This is an appearance diagram of a measurement jig according to the fifth embodiment.

[0026] Fig.10 This is a perspective view of a measurement jig according to the fifth embodiment.

[0027] Fig.11 This is an appearance diagram of a measuring jig according to the fifth embodiment.

[0028] Fig.12 This is a perspective view of a measurement jig according to the fifth embodiment.

[0029] Fig.13 This is an equivalent circuit diagram of a measurement jig according to the fifth embodiment. DETAILED DESCRIPTION

[0030] <Implementation Method 1>

[0031] Figure 1 This is a diagram showing a circuit configuration of a device for measuring the capacitance of a semiconductor device according to the first embodiment (hereinafter referred to as a “capacitance measuring device”).

[0032] like Figure 1 As shown, the capacitance measuring device according to the first embodiment includes a current transformer, namely, a first transformer 10, two choke coils 1 and 2 for cutting off AC signals, two DC blocking capacitors 3 and 4, an LCR meter 30, and a plurality of wirings 5, 6A, 6B, 7, 8, and 9 for connecting them. Figure 2 2 shows an enlarged view of a portion of a semiconductor device DUT 100 and a first transformer 10 that are measurement targets.

[0033] The drain terminal of the DUT 100 is connected to the Vcc power supply via the choke coil 1, and is connected to the Hc terminal 31 of the LCR meter 30 via the DC blocking capacitor 3, and is connected to the Hp terminal 33 of the LCR meter 30 via the DC blocking capacitor 4. The source terminal of the DUT 100 is connected to the GND terminal via the choke coil 2, and is connected to the GND terminal 35 of the LCR meter 30 via the wiring 7. In the following, in order to distinguish the GND terminal connected to the choke coil 2 from the GND terminal 35 of the LCR meter 30, the GND terminal connected to the choke coil 2 is referred to as a "power GND terminal".

[0034] The gate terminal and the source terminal of the DUT 100 are short-circuited by the wiring 6A. The wiring 6A passes through the hole of the iron core of the first transformer 10 and becomes the primary side wiring of the first transformer 10. At this time, the impedance of the wiring 6A is higher than the parasitic capacitance (C GS ) is sufficiently small, that is, in a manner that satisfies the following equation (1), the length of wiring 6A is shortened.

[0035] ωL S_6A <1 / (ωC GS ) … (1)

[0036] In formula (1), ω is the angular frequency of the AC signal, L S_6A The inductance of the wiring 6A, C GS is the parasitic capacitance between the gate and the source of the DUT 100.

[0037] In addition, N turns of wiring 6B are wound around the core of the first transformer 10 as the secondary side wiring. One end of the wiring 6B is connected to the protection member, and the other end is connected to the Lc terminal 32 of the LCR meter 30. At this time, the number of turns N of the wiring 6A is increased so as to satisfy the following formula (2).

[0038] ωL S_6B / N 2 <1 / (ωC GS )…(2)

[0039] In equation (2), ω is the angular frequency of the AC signal, L S_6B is the inductance of wiring 6B, C GS is the parasitic capacitance between gate and source.

[0040] When an AC signal is applied to the drain terminal of the DUT 100 from the Hc terminal 31 of the LCR meter 30, a current corresponding to the AC signal flows into the drain terminal, flows to the source terminal through the primary-side wiring 6A via the gate terminal, and flows from the source terminal to the GND terminal 35 through the wiring 7. The current (primary-side current) flowing through the primary-side wiring 6A attempts to generate magnetic flux inside the core of the first transformer 10, but a current (secondary-side current) that is one-Nth of the primary-side current is generated in the secondary-side wiring 6B in order to cancel the magnetic flux. The current (secondary-side current) flowing through the wiring 6B flows into the Lc terminal 32 of the LCR meter 30.

[0041] Since the current flowing into the Lc terminal 32 is 1 / N of the current flowing between the drain and gate of the DUT 100, that is, the current flowing through the wiring 6A, the value of the parasitic capacitance between the gate and drain of the LCR meter 30 measured by the LCR meter 30 (the display value of the LCR meter 30) is 1 / N of the actual value. Therefore, by amplifying the measured value (display value) of the LCR meter 30 by N times, the actual parasitic capacitance C between the gate and drain of the DUT 100 can be obtained. GD , that is, the feedback capacitor C RSS .

[0042] The wiring 6B on the secondary side also generates an inductor L S_6B However, the inductance L of the secondary side wiring 6B viewed from the primary side wiring 6A is S_6B Due to the effect of the first transformer 10, it is reduced to 1 / N of the actual 2 That is, if the number of turns N of the secondary-side wiring 6B is 10, it is reduced to 1 / 100, if it is 20, it is reduced to 1 / 400, and if it is 30, it is reduced to 1 / 900.

[0043] Therefore, in the capacitance measuring device involved in embodiment 1, for example, if the number of turns N of the wiring 6B on the secondary side is greater than or equal to 10, even if the length of the wiring 6B is set to 100 times that of the previous wiring (the wiring between the gate terminal and the Lc terminal in the previous measuring method), the same or higher precision and accuracy as the previous measuring method can be obtained.

[0044] In addition, for example, when a relay is connected to the wiring 6B in order to realize the circuit automatic switching function, the increase in wiring impedance caused by the contact resistance of the relay can also be reduced to a negligible level by the effect of the first transformer 10. Furthermore, when the measurement frequency (frequency of the AC signal) is set high, the impedance (ωL) caused by the inductance of the wiring 6B S_6B ) becomes larger, but this effect can also be reduced to a negligible level.

[0045] Here, the current flowing between the gate and the source of the DUT 100 is considered to bypass the parasitic capacitance C between the gate and the source in addition to the wiring 6A. GS However, the impedance (ωL) of the secondary-side wiring 6B viewed from the gate terminal and the source terminal is S_6B / N 2 ) and the impedance of the primary-side wiring 6A (ωL S_6A ) and the parasitic capacitance C between the gate and source GS Impedance caused by (1 / (ωC GS )) is so small that it can be ignored, so the parasitic capacitance C GS That is, if the above equations (1) and (2) are satisfied, it can be considered that the current flowing from the drain to the gate of the DUT 100 does not flow through the parasitic capacitor C with large impedance. GS , flows only through the primary-side wiring 6A.

[0046] Specifically, if “ωL S_6A +ωL S_6B / N 2 " is less than "1 / (ωC GS )”, the measurement error is also less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device is obtained. If it is less than 3%, the measurement error is also less than 3%, which is more preferred. In addition, if it is less than 1% or less than 0.1%, the measurement error also obtains an accuracy of less than 1% or less than 0.1%.

[0047] Furthermore, in the case of the conventional measurement method, if the measurement is performed with long wiring or at a high frequency, the measurement error may exceed 100% due to the potential difference generated between the gate terminal and the source terminal.

[0048] <Implementation Method 2>

[0049] Figure 3 This is a diagram showing a circuit configuration of a capacitance measuring device according to a second embodiment. Figure 3 The structure of the capacitance measuring device is relatively Figure 1 The structure is as follows, with an additional current transformer.

[0050] Will Figure 1 The side of the wiring 6B connected to the Lc terminal 32 is removed from the Lc terminal 32, and is wound N turns around the core of the additional current transformer, that is, the second transformer 11, and connected to the protection member (or GND). Thus, the wiring 6B is set as the primary side wiring of the second transformer 11. That is, one end of the wiring 6B is the secondary side wiring of the first transformer 10, and the other end of the wiring 6B is the primary side wiring of the second transformer 11.

[0051] The Lc terminal 32 of the LCR meter 30 is short-circuited with the protection element (or GND) using the wiring 6C, and the wiring 6C is passed through the core of the second transformer 11 to be used as the secondary side wiring of the second transformer 11. At this time, the impedance of the wiring 6C is higher than the parasitic capacitance (C GS ) is sufficiently small, that is, in a manner satisfying the following equation (3), the length of wiring 6C is set short.

[0052] ωL S_6C <1 / (ωC GS )…(3)

[0053] In equation (3), ω is the angular frequency of the AC signal, L S_6C is the inductance of the wiring 6C, C GS is the parasitic capacitance between gate and source.

[0054] In the capacitance measuring device according to the second embodiment, the current attenuated to one-Nth by the first transformer 10 is amplified N times (i.e., restored to the original magnification) by the second transformer 11, and flows into the Lc terminal 32 of the LCR meter 30. Therefore, the conversion of the measured value (conversion by amplifying the displayed value to N times) required in the capacitance measuring device according to the first embodiment is not required.

[0055] Here, the Lc terminal 32 of the LCR meter 30 and the protection element (or GND) can be short-circuited by a short wiring, so that the inductance L of the wiring 6C can be S_6C The influence caused is reduced to a negligible level. That is, the above formula (3) can be satisfied.

[0056] For example, Figure 4 : This is a diagram showing the measurement terminals of a general LCR meter 30. The four terminals, Hc terminal 31, Lc terminal 32, Hp terminal 33, and Lp terminal 34, are all female terminals (socket terminals) of a BNC (Bayonet Neill-Concelman) connector. Figure 5 1 shows an enlarged view of the female side of the BNC connector (an enlarged view of the Lc terminal 32 portion). The distance between the inner conductor, i.e., the center contact 16, and the main body 17 connected to the protection member (or GND) is about 5 mm to 7 mm. The center contact 16 and the main body 17 of the BNC connector of the Lc terminal 32 can be short-circuited by the wiring 6C, and the wiring 6C is passed through the core of the second transformer 11 to be set as the secondary side wiring of the second transformer 11.

[0057] In the capacitance measuring device according to the second embodiment, if “ωL S_6A +ωL S_6B / N 2 +ωL S_6C " is less than "1 / (ωCGS )”, the measurement error is also less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device is obtained. If it is less than 3%, the measurement error is also less than 3%, which is more preferred. In addition, if it is less than 1% or less than 0.1%, the measurement error also obtains an accuracy of less than 1% or less than 0.1%.

[0058] <Implementation Method 3>

[0059] Figure 6 This is a diagram showing a circuit configuration of a capacitance measuring device according to a third embodiment. Figure 6 The structure of the capacitance measuring device is relatively Figure 3 The structure is further supplemented with a current transformer. Specifically, it is as follows.

[0060] like Figure 6 As shown, the capacitance measuring device according to the third embodiment has a third transformer 12 connected between the first transformer 10 and the second transformer 11. The core of the first transformer 10 is smaller than that of the first and second embodiments. The wiring 6B on the secondary side of the first transformer 10 passes through the core of the first transformer 10 only once. In addition, the wiring 6B passes through the core of the third transformer 12 only once, becoming the primary side wiring of the third transformer 12. Specifically, the wiring 6B is a ring-shaped wiring that passes through the cores of the first transformer 10 and the third transformer 12 once respectively. At this time, the impedance of the wiring 6B is greater than the parasitic capacitance (C) between the gate and the source of the DUT 100. GS ) is sufficiently small, that is, in a manner satisfying the following equation (4), the length of wiring 6B is shortened.

[0061] ωL S_6B <<1 / (ωC GS )…(4)

[0062] In equation (4), ω is the angular frequency of the AC signal, L S_6B is the inductance of wiring 6B, C GS is the parasitic capacitance between the gate and the source of the DUT 100.

[0063] The wiring 6D is wound N turns around the core of the third transformer 12 and connected to the protection member (or GND). Thus, one end of the wiring 6D becomes the secondary side wiring of the third transformer 12. In addition, the other end of the wiring 6D is wound N turns around the core of the second transformer 11 and connected to the protection member (or GND), becoming the primary side wiring of the second transformer 11.

[0064] The number of turns of the wiring 6D for the core of the third transformer 12 and the number of turns of the wiring 6D for the core of the second transformer 11, that is, N, are increased so as to satisfy the following formula (5).

[0065] ωL S_6D / N 2 <1 / (ωC GS )…(5)

[0066] In equation (5), ω is the angular frequency of the AC signal, L S_6D is the inductance of wiring 6D, C GS is the parasitic capacitance between gate and source.

[0067] When an AC signal is applied to the drain terminal of the DUT 100, a current corresponding to the AC signal flows into the drain terminal, flows to the source terminal through the primary-side wiring 6A of the first transformer 10 via the gate terminal, and flows from the source terminal to the GND terminal 35 through the wiring 7. The current (primary-side current) flowing through the primary-side wiring 6A of the first transformer 10 attempts to generate a magnetic flux inside the iron core of the first transformer 10, but a current (secondary-side current) of the same magnitude as the primary-side current is generated in the secondary-side wiring 6B in order to cancel out the magnetic flux, and this current is the primary-side current of the third transformer 12. Furthermore, the primary-side current flowing through the primary-side wiring 6B of the third transformer 12 attempts to generate a magnetic flux inside the iron core of the third transformer 12, but a secondary-side current of one-Nth of the primary-side current is generated in the secondary-side wiring 6D in order to cancel out the magnetic flux, and this current is the primary-side current of the second transformer 11.

[0068] Furthermore, the current attenuated to one-Nth by the third transformer 12 is amplified N times (i.e., restored to the original magnification) by the second transformer 11, and flows into the Lc terminal 32 of the LCR meter 30. Therefore, in the third embodiment, the conversion of the measured value (conversion by amplifying the displayed value to N times) required in the capacitance measuring device of the first embodiment is also unnecessary.

[0069] In the first and second embodiments, as the number of turns N of the wiring 6B on the secondary side of the first transformer 10 increases, the inductance L of the wiring 6B increases. S_6B The smaller the influence of the secondary side wiring, the longer the wiring 6B can be extended. However, in order to increase the number of turns of the secondary side wiring of the first transformer 10, the size of the iron core of the first transformer 10 needs to be set larger. On the other hand, in order to reduce the inductance L of the wiring 6A connecting the gate terminal and the source terminal of the DUT 100 S_6A In order to shorten the wiring 6A, it is preferable to shorten the wiring 6A as much as possible. In order to shorten the wiring 6A, it is necessary to reduce the size of the core of the first transformer 10 to a certain extent. That is, in the first and second embodiments, the number of turns N of the first transformer 10 is increased for the purpose of extending the wiring 6B, and the inductance L of the wiring 6A between the gate terminal and the source terminal of the DUT 100 is increased. S_6A Setting it small is the opposite.

[0070] In contrast, in the third embodiment, the wiring 6B on the secondary side of the first transformer 10 passes only once through the core of the first transformer 10. Therefore, the size of the core of the first transformer 10 can be reduced, and the influence of the above-mentioned adverse factors can be reduced.

[0071] In the capacitance measuring device according to the third embodiment, if “ωL S_6A +ωL S_6B +ωL S_6D / N 2 +ωL S_6C " is less than "1 / (ωC GS )”, the measurement error is also less than 5%, and the required accuracy for measuring the capacitance of the semiconductor device is obtained. If it is less than 3%, the measurement error is also less than 3%, which is more preferred. In addition, if it is less than 1% or less than 0.1%, the measurement error also obtains an accuracy of less than 1% or less than 0.1%.

[0072] <Implementation Method 4>

[0073] Figure 7 1 is a diagram showing a circuit configuration of a capacitance measuring device according to a fourth embodiment.

[0074] like Figure 7 As shown, the capacitance measuring device according to the fourth embodiment includes two choke coils 1 and 2 for cutting off AC signals, two DC blocking capacitors 3 and 4, an LCR meter 30, an operational amplifier 18, and a plurality of wirings 5 ​​to 9 and 19 to 21 for connecting them.

[0075] The drain terminal of the DUT 100 is connected to the Vcc power supply via the choke coil 1, and is connected to the Hc terminal 31 of the LCR meter 30 via the blocking capacitor 3, and is connected to the Hp terminal 33 of the LCR meter 30 via the blocking capacitor 4. The gate terminal of the DUT 100 is connected to the Lc terminal 32 of the LCR meter 30 via the wiring 6, and is connected to the - side input terminal (inverting input terminal) of the operational amplifier 18 via the wiring 19. The source terminal of the DUT 100 is connected to the power GND terminal via the choke coil 2, and is connected to the GND terminal 35 of the LCR meter 30 via the wiring 7. In addition, the source terminal of the DUT 100 is connected to the + (positive) side input terminal (non-inverting input terminal) of the operational amplifier 18 via the wiring 20, and the output terminal of the operational amplifier 18 is connected to the - (negative) side input terminal via the wiring 21.

[0076] Or, if Figure 8As shown in FIG. 1 , the gate terminal of the DUT 100 may be connected to the +-side input terminal of the operational amplifier 18 via the wiring 20, the source terminal of the DUT 100 may be connected to the --side input terminal of the operational amplifier 18 via the wiring 19, and the output terminal of the operational amplifier 18 may be connected to the --side input terminal via the wiring 21. That is, the +-side input terminal of the operational amplifier 18 may be connected to one of the source terminal or the gate terminal of the DUT 100, the --side input terminal of the operational amplifier 18 may be connected to the other of the source terminal or the gate terminal of the DUT 100, and the output terminal of the operational amplifier 18 may be connected to the --side input terminal.

[0077] When an AC signal is applied to the drain terminal of the DUT 100 from the Hc terminal 31 of the LCR meter 30, a current corresponding to the AC signal flows into the drain terminal and is divided into the gate and the source in the DUT 100. The current flowing into the gate of the DUT flows to the Lc terminal 32 through the wiring 6, and the current flowing into the source flows to the GND terminal 35 through the wiring 7.

[0078] In wiring 6, an inductor L is passed through S_6 A voltage is generated, and a voltage is also generated in the wiring 7 through the inductor L S_7 The voltage is used to generate a potential difference between the gate terminal and the source terminal of the DUT 100. However, since the +-side input terminal and the --side input terminal of the operational amplifier 18 are at the same potential (virtual short circuit), the gate terminal and the source terminal of the DUT 100 are at the same potential. Therefore, no current flows between the gate terminal and the source terminal, and only the parasitic capacitance (C) between the gate and the drain of the DUT 100 flows into the Lc terminal 32 of the LCR meter 30. GD ) after the current (I CGD ).

[0079] Therefore, regardless of the inductance L of the wiring 6 S_6 and the inductance L of wiring 7 S_7 Regardless of the magnitude of the generated voltage, the LCR meter 30 can accurately measure the current I through the Lc terminal 32. CGD By monitoring, the parasitic capacitance C between the gate and drain of the DUT 100 can be accurately GD That is, the feedback capacitor C RSS Carry out determination.

[0080] It is preferable that the operational amplifier 18 be an operational amplifier whose open-loop gain does not attenuate even at 10 MHz so as to be able to cope with high frequencies.

[0081] Here, the potential difference between the +-side input terminal and the --side input terminal of the operational amplifier 18, that is, the potential difference between the source terminal and the gate terminal of the DUT 100, is directly related to the feedback capacitance CRSS The ratio of the +-side input voltage (the voltage between the +-side input terminal and the signal GND) to the --side input voltage (the voltage between the --side input terminal and the signal GND) of the operational amplifier 18 is expressed by the following equation (6).

[0082] V + / V - =(1+1 / A V )…(6)

[0083] In formula (6), V + is the + side input voltage of the operational amplifier 18, V - is the - side input voltage of the operational amplifier 18, A V is the open-loop gain of the operational amplifier 18.

[0084] In the capacitance measuring device according to the fourth embodiment, the open loop gain A of the operational amplifier 18 is V When the potential difference between the +-side input terminal and the --side input terminal is greater than or equal to 20 times, the measurement accuracy is less than or equal to 5%, and the required accuracy for measuring the capacitance of the semiconductor device is obtained. If it is 100 times, the accuracy is 1%, when it is 1000 times, it is 0.1%, and when it is 10000 times, it is 0.01%.

[0085] The operational amplifier 18 is preferably at 10 MHz. V Also 100 times.

[0086] <Implementation method 5>

[0087] Embodiment 5 shows a measurement jig for constituting the measurement circuit of the capacitance measurement device of Embodiment 2 and Embodiment 3. Fig. 9 is an external view of a measuring jig 50 according to Embodiment 5. Fig.10 This is its perspective view.

[0088] like Fig.10 As shown, a measurement jig 50 according to the fifth embodiment includes a BNC connector receptacle 51 , a BNC connector plug 52 , a transformer 53 having an iron core, and wirings 54 and 55 .

[0089] The wiring 54 is wound N turns around the core of the transformer 53, one end of which is connected to the center contact 51a, which is the signal terminal of the socket 51, and the other end of which is connected to the main body 51b, which is the protection part of the socket 51. The wiring 55 passes through the core of the primary transformer 53, one end of which is connected to the center contact 52a, which is the signal terminal of the plug 52, and the other end of which is connected to the main body 52b, which is the protection part of the plug 52.

[0090] When current (primary current) flows into the center contact 51 a of the socket 51 , a magnetic flux is generated inside the core of the transformer 53 . However, a secondary current N times as large flows into the center contact 16 on the plug 52 side through the wiring 55 to cancel out the magnetic flux.

[0091] The measuring jig 50 according to the fifth embodiment can be used as the measuring jig 50 according to the second embodiment ( Figure 3 ) and implementation method 3 ( Figure 6 ) and the secondary side wiring (wiring 6C) of the second transformer 11. Specifically, the plug 52 is connected to the Lp terminal 34 of the LCR meter 30, and the main body 51b on the socket 51 side is connected to the protection member or GND. In the case of the second embodiment, the center contact 51a on the socket 51 side is connected to the wiring 6B, and in the case of the third embodiment, the center contact 51a on the socket 51 side is connected to the wiring 6D. By using this measurement jig 50, the wiring work is simplified.

[0092] <Implementation Method 6>

[0093] In the sixth embodiment, a measurement jig is shown, which is used to constitute the measurement circuit of the capacitance measurement device of the second embodiment. Fig.11 is an external view of a measuring jig 60 according to Embodiment 6. Fig.12 is its perspective view. In addition, Fig.13 This is an equivalent circuit diagram of the measurement jig 60 according to the sixth embodiment.

[0094] The measuring jig 60 according to the sixth embodiment electrically connects the sockets 51 of the two measuring jigs 50 according to the fifth embodiment to each other via a coaxial cable 56. If the measuring jig 60 is represented by an equivalent circuit, Fig.13 As shown in FIG. 1 , a transformer is connected to both ends of the cable. The effect of the transformer reduces the influence of the impedance of the coaxial cable 56 between the two measuring jigs 50 to 1 / N. 2 .

[0095] The measuring jig 60 according to the sixth embodiment can be used as the first transformer 10 and the second transformer 11 and the wiring 6B therebetween in the second embodiment. Specifically, the plug 52 of one of the two measuring jigs 50 constituting the measuring jig 60 according to the sixth embodiment is connected to the Lc terminal 32 of the LCR meter 30, and the center contact and the body of the plug 52 of the other measuring jig 50 are electrically connected to the gate terminal and the source terminal of the DUT 100, respectively.

[0096] <Implementation Method 7>

[0097] In the seventh embodiment, the primary side wiring ( Figure 1 The wiring 6A of the primary side of the first transformer 10 and the secondary side of the second transformer 11 in the second embodiment ( Figure 3 The wiring 6A and the wiring 6C of the first transformer 10 in Embodiment 3, the primary wiring of the second transformer 11, and the secondary wiring of the third transformer 12 ( Figure 6 At least one of the wiring 6A, wiring 6B, and wiring 6C is set as a Litz wire. These wirings pass through the iron core of the entire transformer only once, so even if the wiring is made thicker by using the Litz wire, there is almost no effect.

[0098] Litz wire can suppress the increase in resistance value caused by skin effect and proximity effect in high-frequency measurement. In normal wiring, the resistance value of the wiring increases due to skin effect and proximity effect in high-frequency measurement, and the impedance of the wiring increases, which may increase the measurement error. By using Litz wire as the wiring, the increase in resistance value can be suppressed, and stable measurement accuracy can be obtained even at high frequencies.

[0099] Regarding the secondary side wiring ( Figure 1 The wiring 6B of the first transformer 10 and the primary wiring of the second transformer 11 in the second embodiment ( Figure 3 The wiring 6B of the second transformer 11 and the primary wiring of the third transformer 12 in the third embodiment ( Figure 6 Even if the resistance of the wiring increases due to the skin effect and proximity effect caused by high frequency, the resistance can be suppressed to 1 / N by the effect of the transformer. 2 , so even normal wiring will not affect the measurement.

[0100] Furthermore, the various embodiments may be freely combined, and the various embodiments may be appropriately modified or omitted.

[0101] <Notes>

[0102] The aspects of the present invention are summarized below as supplementary notes.

[0103] (Note 1)

[0104] A device for measuring the capacitance of a semiconductor device, the device having an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter having a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage.

[0105] In the device for measuring the capacitance of the semiconductor device,

[0106] The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal.

[0107] The gate terminal of the semiconductor device is connected to the Lp terminal,

[0108] The source terminal of the semiconductor device is connected to the GND terminal,

[0109] The measuring device further comprises:

[0110] No. 1 transformer;

[0111] a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; and

[0112] A second wiring is wound N turns around the iron core of the first transformer, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement.

[0113] If the angular frequency of the AC signal is ω, and the inductance of the first wiring is L S_6A , the inductance of the second wiring is set to L S_6B , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied:

[0114] ωL S_6A <1 / (ωC GS ),and

[0115] ωL S_6B / N 2 <1 / (ωC GS ).

[0116] (Note 2)

[0117] The device for measuring the capacitance of a semiconductor device according to Supplementary Note 1, wherein:

[0118] ωL S_6A +ωL S_6B / N 2 Less than 1 / (ωC GS ) of 5%.

[0119] (Note 3)

[0120] A device for measuring the capacitance of a semiconductor device, the device having an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter having a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage.

[0121] In the device for measuring the capacitance of the semiconductor device,

[0122] The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal.

[0123] The gate terminal of the semiconductor device is connected to the Lp terminal,

[0124] The source terminal of the semiconductor device is connected to the GND terminal,

[0125] The measuring device further comprises:

[0126] No. 1 transformer;

[0127] The second transformer;

[0128] a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; and

[0129] a second wiring which is wound N turns around the iron core of the first transformer and the iron core of the second transformer, and both ends of which are grounded during measurement; and

[0130] A third wiring line passes through the iron core of the second transformer once, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement.

[0131] If the angular frequency of the AC signal is ω, and the inductance of the third wiring is L S_6C , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied:

[0132] ωL S_6C <1 / (ωC GS ).

[0133] (Note 4)

[0134] The device for measuring the capacitance of a semiconductor device according to Supplementary Note 3, wherein:

[0135] If the inductance of the first wiring is L S_6A , the inductance of the second wiring is set to L S_6B , then ωL S_6A +ωL S_6B / N 2 +ωL S_6C Less than 1 / (ωC GS ) of 5%.

[0136] (Note 5)

[0137] A device for measuring the capacitance of a semiconductor device, the device having an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter having a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage.

[0138] In the device for measuring the capacitance of the semiconductor device,

[0139] The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal.

[0140] The gate terminal of the semiconductor device is connected to the Lp terminal,

[0141] The source terminal of the semiconductor device is connected to the GND terminal,

[0142] The measuring device further comprises:

[0143] No. 1 transformer;

[0144] The second transformer;

[0145] Transformer No. 3;

[0146] a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device;

[0147] a second ring-shaped wiring that passes through the iron core of the first transformer and the iron core of the second transformer once respectively;

[0148] a third wiring which is wound N turns around the iron core of the second transformer and the iron core of the third transformer, and whose both ends are grounded during measurement; and

[0149] A fourth wiring line passes through the core of the third transformer once, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement.

[0150] If the angular frequency of the AC signal is ω, and the inductance of the second wiring is L S_6B , the inductance of the third wiring is set to L S_6D , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied:

[0151] ωL S_6B <<1 / (ωC GS ),

[0152] ωL S_6D / N 2 <1 / (ωCGS ).

[0153] (Note 6)

[0154] The device for measuring the capacitance of a semiconductor device according to Supplementary Note 5, wherein:

[0155] If the inductance of the first wiring is L S_6A , the inductance of the fourth wiring is set to L S_6C , then ωL S_6A +ωL S_6B +ωL S_6D / N 2 +ωL S_6C Less than 1 / (ωC GS ) of 5%.

[0156] (Note 7)

[0157] The device for measuring the capacitance of a semiconductor device according to any one of Supplementary Notes 1 to 6, wherein:

[0158] At least one of the wires passing through the core of the transformer only once is a Litz wire.

[0159] (Note 8)

[0160] A device for measuring the capacitance of a semiconductor device, the device having an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter having a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage.

[0161] In the device for measuring the capacitance of the semiconductor device,

[0162] The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal.

[0163] The gate terminal of the semiconductor device is connected to the Lc terminal and the Lp terminal.

[0164] The source terminal of the semiconductor device is connected to the GND terminal,

[0165] The measuring device further has an operational amplifier having a non-inverting input terminal connected to one of the source terminal or the gate terminal of the semiconductor device, an inverting input terminal connected to the other of the source terminal or the gate terminal of the semiconductor device, and an output terminal connected to the inverting input terminal.

[0166] (Note 9)

[0167] The device for measuring the capacitance of a semiconductor device according to Supplementary Note 8, wherein:

[0168] An open-loop gain of the operational amplifier is greater than or equal to 20 times a potential difference between the non-inverting input terminal and the inverting input terminal.

[0169] (Note 10)

[0170] The device for measuring the capacitance of a semiconductor device according to any one of Supplementary Notes 1 to 9, wherein:

[0171] The drain terminal of the semiconductor device is connected to a power supply via a first choke coil, connected to the Hc terminal via a first DC blocking capacitor, and connected to the Hp terminal via a second DC blocking capacitor.

[0172] The source terminal of the semiconductor device is grounded via a second choke coil.

[0173] (Note 11)

[0174] A measuring fixture, comprising:

[0175] BNC connector plugs and sockets;

[0176] transformer;

[0177] a first wiring, which is wound N turns around the iron core of the transformer, one end of which is connected to the first center contact, which is the signal terminal of the socket, and the other end of which is connected to the first body, which is the protection member of the socket; and

[0178] The second wiring passes through the core of the transformer only once, has one end connected to the second center contact which is the signal terminal of the plug, and the other end connected to the second body which is the protection member of the plug.

[0179] (Note 12)

[0180] A measuring fixture, comprising:

[0181] Two measuring jigs as described in Appendix 11; and

[0182] A coaxial cable connects the sockets of the two measurement fixtures to each other.

[0183] Description of the label

[0184] 1, 2 choke coils, 3, 4 DC blocking capacitors, 5-9 wiring, 10 first transformer, 11 second transformer, 12 third transformer, 16 center contact, 17 main body, 18 operational amplifier, 19-21 wiring, 30 LCR meter, 31 Hc terminal, 32 Lc terminal, 33 Hp terminal, 34 Lp terminal, 35 GND terminal, 50 measurement fixture, 51 socket, 51a, 52a center contacts, 51b, 52b main body, 52 plug, 53 transformer, 54, 55 wiring, 56 coaxial cable, 60 measurement fixture, 100 semiconductor device (DUT).

Claims

1. A device for measuring the capacitance of a semiconductor device, the device comprising an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter comprising a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage, In the device for measuring the capacitance of the semiconductor device, The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal. The gate terminal of the semiconductor device is connected to the Lp terminal, The source terminal of the semiconductor device is connected to the GND terminal, The measuring device further comprises: No. 1 transformer; a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; and A second wiring is wound N turns around the iron core of the first transformer, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement. If the angular frequency of the AC signal is ω, and the inductance of the first wiring is L S_6A , the inductance of the second wiring is set to L S_6B , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied: ωL S_6A <1 / (ωC GS ),and ωL S_6B / N 2 <1 / (ωC GS )。 2. The device for measuring the capacitance of a semiconductor device according to claim 1, wherein: ωL S_6A +ωL S_6B / N 2 Less than 1 / (ωC GS ) of 5%.

3. A device for measuring the capacitance of a semiconductor device, the device comprising an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter comprising a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage, In the device for measuring the capacitance of the semiconductor device, The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal. The gate terminal of the semiconductor device is connected to the Lp terminal, The source terminal of the semiconductor device is connected to the GND terminal, The measuring device further comprises: No. 1 transformer; The second transformer; a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; and a second wiring which is wound N turns around the iron core of the first transformer and the iron core of the second transformer, and both ends of which are grounded during measurement; and A third wiring line passes through the iron core of the second transformer once, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement. If the angular frequency of the AC signal is ω, and the inductance of the third wiring is L S_6C , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied: ωL S_6C <1 / (ωC GS )。 4. The device for measuring the capacitance of a semiconductor device according to claim 3, wherein: If the inductance of the first wiring is L S_6A , the inductance of the second wiring is set to L S_6B , then ωL S_6A +ωL S_6B / N 2 +ωL S_6C Less than 1 / (ωC GS ) of 5%.

5. A device for measuring the capacitance of a semiconductor device, the device comprising an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter comprising a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage, In the device for measuring the capacitance of the semiconductor device, The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal. The gate terminal of the semiconductor device is connected to the Lp terminal, The source terminal of the semiconductor device is connected to the GND terminal, The measuring device further comprises: No. 1 transformer; The second transformer; Transformer No. 3; a first wiring that passes through the core of the first transformer only once and is connected between the gate terminal and the source terminal of the semiconductor device; a second ring-shaped wiring that passes through the iron core of the first transformer and the iron core of the second transformer once respectively; a third wiring which is wound N turns around the iron core of the second transformer and the iron core of the third transformer, and whose both ends are grounded during measurement; and A fourth wiring line passes through the core of the third transformer once, one end of which is connected to the Lc terminal and the other end of which is grounded during measurement. If the angular frequency of the AC signal is ω, and the inductance of the second wiring is L S_6B , the inductance of the third wiring is set to L S_6D , the gate-source parasitic capacitance of the semiconductor device is set to C GS , then the following relationship is satisfied: ωL S_6B <<1 / (ωC GS ),and ωL S_6D / N 2 <1 / (ωC GS )。 6. The device for measuring the capacitance of a semiconductor device according to claim 5, wherein: If the inductance of the first wiring is L S_6A , the inductance of the fourth wiring is set to L S_6C , then ωL S_6A +ωL S_6B +ωL S_6D / N 2 +ωL S_6C Less than 1 / (ωC GS ) of 5%.

7. The device for measuring the capacitance of a semiconductor device according to any one of claims 1 to 6, wherein: At least one of the wires passing through the core of the transformer only once is a Litz wire.

8. A device for measuring the capacitance of a semiconductor device, the device comprising an LCR meter, the device measuring the capacitance of a three-terminal semiconductor device, the LCR meter comprising a GND terminal, an Hc terminal for outputting an AC signal, an Lc terminal for monitoring current, and an Hp terminal and an Lp terminal for monitoring voltage, In the device for measuring the capacitance of the semiconductor device, The drain terminal of the semiconductor device to be measured is connected to the Hc terminal and the Hp terminal. The gate terminal of the semiconductor device is connected to the Lc terminal and the Lp terminal. The source terminal of the semiconductor device is connected to the GND terminal, The measuring device further has an operational amplifier having a non-inverting input terminal connected to one of the source terminal or the gate terminal of the semiconductor device, an inverting input terminal connected to the other of the source terminal or the gate terminal of the semiconductor device, and an output terminal connected to the inverting input terminal.

9. The device for measuring the capacitance of a semiconductor device according to claim 8, wherein: An open-loop gain of the operational amplifier is greater than or equal to 20 times a potential difference between the non-inverting input terminal and the inverting input terminal.

10. The device for measuring the capacitance of a semiconductor device according to any one of claims 1 to 9, wherein: The drain terminal of the semiconductor device is connected to a power supply via a first choke coil, connected to the Hc terminal via a first DC blocking capacitor, and connected to the Hp terminal via a second DC blocking capacitor. The source terminal of the semiconductor device is grounded via a second choke coil.

11. A measuring fixture, comprising: BNC connector plugs and sockets; transformer; a first wiring, which is wound N turns around the iron core of the transformer, one end of which is connected to the first center contact, which is the signal terminal of the socket, and the other end of which is connected to the first body, which is the protection member of the socket; and The second wiring passes through the core of the transformer only once, has one end connected to the second center contact which is the signal terminal of the plug, and the other end connected to the second body which is the protection member of the plug.

12. A measuring fixture, comprising: The measuring fixture of claim 11; and A coaxial cable connects the sockets of the two measurement fixtures to each other.

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