Semiconductor packaging structure and forming method thereof

By forming an isolation ring on the substrate, the filling layer and the substrate surface of the isolation bottom, the problem of extending the bottom filling layer extends to the reinforcement ring position, and improves the reliability of strengthening the ring or heat dissipation cover.

CN119381348APending Publication Date: 2025-01-28SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Application Number
CN202310936441.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-07-27
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

In the existing 2.5D on-chip chip package, the bottom fill layer easily extends to the position on the substrate for forming the reinforcement ring, resulting in uneven substrates and affecting the adhesion and reliability of the heat dissipation cover or reinforcement ring.

Method used

Form an isolation ring on the substrate, the filling layer and the substrate surface of the isolation bottom to avoid extending the bottom filling layer to the enhanced ring position, so as to form an enhanced ring at the position of the isolation ring, so that it is fully contacting the substrate.

Benefits of technology

Effectively avoid the influence of the influence of the bottom filling layer, and improve the yield and reliability of strengthening the ring or heat dissipation cover.

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Abstract

The invention provides a semiconductor packaging structure and a forming method thereof, and the method comprises the steps: providing a substrate which comprises a chip region for packaging a chip; forming an isolating ring surrounding the chip area on the substrate around the chip area; a chip is provided, the packaging surface of the chip comprises a plurality of solder balls, and the chip is packaged in the chip area through the solder balls; a bottom filling layer is formed between the substrate and the packaging surface of the chip, and the isolating ring isolates the bottom filling layer from the surface of the substrate below the isolating ring; the isolating ring is removed, a reinforcing ring is formed at the position of the isolating ring, and the reinforcing ring is in complete contact with the substrate. According to the semiconductor packaging structure and the forming method thereof, the isolation ring is used for preventing the bottom filling layer from extending to the position, used for forming the reinforcing ring, on the substrate, and therefore the yield and reliability of the reinforcing ring or a heat dissipation cover are improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor packaging structure and a method for forming the same. Background Art

[0002] The existing 2.5D chip on wafer (COW) is huge in size (greater than 39X39mm). When the chip ratio requirement is close to 50% (substrate size 55X55mm) and the coplanarity that meets the specification needs to be maintained (less than 200um), the width of the reinforcement ring has certain requirements (greater than 3mm), and the distance left for glue dispensing is very small (less than 3mm). The bottom filling layer formed by glue dispensing may flow to the position of the reinforcement ring on the substrate, resulting in an uneven substrate and inability to stick the heat sink cover or reinforcement ring.

[0003] Therefore, it is necessary to provide a more effective and reliable technical solution to prevent the bottom filling layer from extending to the position on the substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or heat dissipation cover. Summary of the invention

[0004] The present application provides a semiconductor packaging structure and a method for forming the same, which can prevent a bottom filling layer from extending to a position on a substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or the heat dissipation cover.

[0005] One aspect of the present application provides a method for forming a semiconductor packaging structure, comprising: providing a substrate, the substrate comprising a chip area for packaging a chip; forming an isolation ring surrounding the chip area on the substrate around the chip area; providing a chip, the packaging surface of the chip comprising a plurality of solder balls, and the chip is packaged in the chip area through the plurality of solder balls; forming a bottom filling layer between the substrate and the packaging surface of the chip, the isolation ring isolating the bottom filling layer from the substrate surface below the isolation ring; removing the isolation ring, and forming a reinforcement ring at the position of the isolation ring, the reinforcement ring being in full contact with the substrate.

[0006] In some embodiments of the present application, a method for forming an isolation ring surrounding the chip area on a substrate around the chip area includes: forming a patterned photoresist layer on the surface of the substrate, the patterned photoresist layer including an opening that defines the position of the isolation ring; forming the isolation ring in the opening; and removing the patterned photoresist layer.

[0007] In some embodiments of the present application, the method of forming the isolation ring in the opening includes: applying an isolation ring material to a surface of a substrate in the opening; and curing the isolation ring material to form the isolation ring.

[0008] In some embodiments of the present application, the material of the isolation ring includes azole compounds, organic acids, water and additives.

[0009] In some embodiments of the present application, the distance between the isolation ring and the chip area is greater than 2 mm.

[0010] In some embodiments of the present application, the height of the isolation ring is 8 to 12 microns.

[0011] In some embodiments of the present application, the width of the isolation ring is greater than the width of the reinforcement ring.

[0012] In some embodiments of the present application, the width of the isolation ring is equal to the width of the reinforcement ring plus 0.2 to 0.5 mm.

[0013] In some embodiments of the present application, the method for removing the isolation ring is: heating the isolation ring to 150 to 200 degrees Celsius, so that the isolation ring melts and evaporates.

[0014] Another aspect of the present application also provides a semiconductor packaging structure formed by the method for forming a semiconductor packaging structure as described above, comprising: a substrate, the substrate comprising a chip area for packaging a chip; a chip, the packaging surface of the chip comprising a plurality of solder balls, and the chip is packaged in the chip area through the plurality of solder balls; a bottom filling layer, located between the substrate and the packaging surface of the chip; a reinforcement ring, located on the substrate around the chip area and surrounding the chip area, the reinforcement ring being in full contact with the substrate.

[0015] The present application provides a semiconductor packaging structure and a method for forming the same, which utilizes an isolation ring to prevent a bottom filling layer from extending to a position on a substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or heat dissipation cover. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The following figures describe in detail the exemplary embodiments disclosed in this application. The same reference numerals represent similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting, exemplary embodiments, and the drawings are only for the purpose of illustration and description, and are not intended to limit the scope of this application. Other embodiments may also accomplish the inventive intent in this application. It should be understood that the drawings are not drawn to scale.

[0017] in:

[0018] Figures 1 to 3 A schematic diagram of the structure of each step in a method for forming a semiconductor packaging structure;

[0019] Figure 4A flowchart of a method for forming a semiconductor package structure according to an embodiment of the present application;

[0020] Figures 5 to 14 It is a structural schematic diagram of each step in the method for forming a semiconductor packaging structure described in an embodiment of the present application. DETAILED DESCRIPTION

[0021] The following description provides specific application scenarios and requirements of the present application, with the purpose of enabling those skilled in the art to make and use the content in the present application. It will be apparent to those skilled in the art that various local modifications to the disclosed embodiments are apparent, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present application. Therefore, the present application is not limited to the embodiments shown, but to the widest scope consistent with the claims.

[0022] The technical solution of the present invention is described in detail below in conjunction with the embodiments and drawings.

[0023] Figures 1 to 3 The present invention is a structural schematic diagram of each step in a method for forming a semiconductor packaging structure.

[0024] refer to Figure 1 As shown, a substrate 100 is provided, on which a chip 110 is packaged. The chip 110 is packaged on the substrate 100 through a plurality of solder balls 111 .

[0025] refer to Figure 2 As shown, a dispensing process is used to form a bottom filling layer 120 between the substrate 100 and the chip 110. In terms of process design, the bottom filling layer 120 only needs to be located between the substrate 100 and the chip 110. However, in the actual process, when dispensing glue on the substrate surface on both sides of the chip 110, the bottom filling layer material will flow in all directions at the same time under the action of the substrate surface tension. Therefore, the bottom filling layer material will not only flow to the position below the chip 110, but also flow to the position of the edge of the substrate. The bottom filling layer 120 finally formed will exceed the position below the chip 110 by a large amount, and even cover the edge of the substrate 100.

[0026] refer to Figure 3As shown, a reinforcement ring 130 is formed on the substrate 100 around the chip 110. In the process design, the reinforcement ring 130 is directly formed on the surface of the substrate 100. However, in the actual process, since the bottom filling layer 120 flows to the position for forming the reinforcement ring, the reinforcement ring 130 is formed on the surface of the bottom filling layer 120. Since the material properties of the bottom filling layer 120 are different from those of the substrate 100 and the surface of the bottom filling layer 120 is generally very uneven, the reinforcement ring 130 is unstable on the bottom filling layer 120, and the adhesion between the reinforcement ring 130 and the bottom filling layer 120 is low, and it is easy to fall off. Even the reinforcement ring 130 cannot be formed on the bottom filling layer 120 at all. In addition, in addition to the reinforcement ring 130, other structures that need to be formed directly on the substrate 100 (such as a heat dissipation cover) also face the same problem.

[0027] Based on the above problems, the present application provides a semiconductor packaging structure and a method for forming the same, which utilizes an isolation ring to prevent the bottom filling layer from extending to the position on the substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or heat dissipation cover.

[0028] Figure 4 The present invention is a flowchart of a method for forming a semiconductor packaging structure according to an embodiment of the present application.

[0029] The embodiment of the present application provides a method for forming a semiconductor package structure, referring to Figure 4 As shown, including:

[0030] Step S1: providing a substrate, wherein the substrate includes a chip area for packaging a chip;

[0031] Step S2: forming an isolation ring surrounding the chip area on the substrate around the chip area;

[0032] Step S3: providing a chip, wherein the packaging surface of the chip includes a plurality of solder balls, and the chip is packaged in the chip area through the plurality of solder balls;

[0033] Step S4: forming a bottom filling layer between the substrate and the packaging surface of the chip, wherein the isolation ring isolates the bottom filling layer from the surface of the substrate below the isolation ring;

[0034] Step S5: removing the isolation ring and forming a reinforcement ring at the position of the isolation ring, wherein the reinforcement ring is in full contact with the substrate.

[0035] The method for forming a semiconductor packaging structure described in the present application utilizes an isolation ring to prevent the bottom filling layer from extending to a position on the substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or the heat dissipation cover.

[0036] Figures 5 to 14The following is a structural schematic diagram of each step in the method for forming a semiconductor package structure according to an embodiment of the present application. The method for forming a semiconductor package structure according to an embodiment of the present application is described in detail below in conjunction with the accompanying drawings.

[0037] refer to Figure 5 and Figure 6 As shown, Figure 5 is a top view, Figure 6 For along Figure 5 A longitudinal cross-sectional view at the dotted line XX. Step S1, providing a substrate 200, wherein the substrate 200 comprises a chip region 201 for packaging a chip.

[0038] In some embodiments of the present application, the substrate 200 is an ABF substrate. The material of the substrate 200 includes organic composite materials, circuit copper, green paint, etc.

[0039] refer to Figure 7 and Figure 8 As shown, Figure 7 is a top view, Figure 8 For along Figure 7 A longitudinal cross-sectional view at the dotted line XX. Step S2 , forming an isolation ring 210 surrounding the chip region 201 on the substrate 200 around the chip region 201 .

[0040] In some embodiments of the present application, a method for forming an isolation ring 210 surrounding the chip area 201 on a substrate 200 around the chip area 201 includes: forming a patterned photoresist layer on the surface of the substrate 200, wherein the patterned photoresist layer includes an opening defining a position of the isolation ring 210; forming the isolation ring 210 in the opening; and removing the patterned photoresist layer.

[0041] In some embodiments of the present application, the method for forming the isolation ring 210 in the opening includes: applying an isolation ring material to the surface of the substrate 200 in the opening; and curing the isolation ring material to form the isolation ring 210 .

[0042] In some embodiments of the present application, the material of the isolation ring 210 includes a material that is easily volatilized at high temperatures (100 to 200 degrees Celsius). The material of the isolation ring 210 is, for example, an organic solvent-ability preservative (OSP). The material of the isolation ring 210 includes, for example, a main film-forming substance azole compound, an organic acid, water, and an additive.

[0043] In some embodiments of the present application, the distance between the isolation ring 210 and the chip area 201 is greater than 2 mm. Sufficient space needs to be reserved between the isolation ring 210 and the chip area 201 for subsequent glue dispensing process.

[0044] In some embodiments of the present application, the height of the isolation ring 210 is 8 to 12 microns, such as 9 microns, 10 microns or 11 microns, etc. The height of the isolation ring 210 needs to be sufficient to block the flow of subsequent bottom filling layer materials.

[0045] In some embodiments of the present application, before forming an isolation ring 210 surrounding the chip area 201 on the substrate 200 around the chip area 201, the substrate 200 generally undergoes but is not limited to the following process steps: solder mask coating (SR Coating), exposure (Exposure), development (Developing), post-bake (Post Cure), and surface treatment (Surface Finishing).

[0046] refer to Fig. 9 and Fig.10 As shown, Fig. 9 is a top view, Fig.10 For along Fig. 9 The longitudinal cross-section view is at the dotted line XX. Step S3 , providing a chip 220 , wherein the packaging surface of the chip 220 includes a plurality of solder balls 221 , and the chip 220 is packaged in the chip region 201 through the plurality of solder balls 221 .

[0047] In some embodiments of the present application, after an isolation ring 210 surrounding the chip area 201 is formed on the substrate 200 around the chip area 201, before the chip 220 is packaged in the chip area 201 by the plurality of solder balls 221, the substrate 200 generally also undergoes but is not limited to the following process steps: solder paste printing, reflow, single chip cutting (Singulation, Diamond Saw), and flattening.

[0048] refer to Fig.11 and Fig.12 As shown, Fig.11 is a top view, Fig.12 For along Fig.11 The longitudinal cross-section view is at the dotted line XX. Step S4 , forming an underfill layer 230 between the substrate 200 and the packaging surface of the chip 220 , and the isolation ring 210 isolates the underfill layer 230 from the surface of the substrate 200 below the isolation ring 210 .

[0049] In some embodiments of the present application, the method for forming the bottom filling layer 230 between the substrate 200 and the packaging surface of the chip 220 is a dispensing process. Specifically, dispensing is performed on the surface of the substrate 200 through the gap between the isolation ring 210 and the chip 220, so that the bottom filling layer material drips on the surface of the substrate 200, and then the bottom filling layer material flows to the bottom of the chip 220 under the surface tension of the substrate, and then the bottom filling layer material is cured to form the bottom filling layer 230.

[0050] In the technical solution of the present application, due to the obstruction of the isolation ring 210, when the bottom filling layer 230 is formed by using the dispensing process, on the one hand, the obstruction of the isolation ring 210 can give a reverse force to the bottom filling layer material, accelerate the bottom filling layer material to flow to the bottom of the chip 220, and improve the process efficiency; on the other hand, the obstruction of the isolation ring 210 prevents the bottom filling layer material from flowing to the edge of the substrate 200, especially the position used to form the reinforcement ring later, so as to avoid affecting the formation of subsequent structures such as the reinforcement ring and the heat dissipation cover.

[0051] refer to Fig.13 and Fig.14 As shown, Fig.13 is a top view, Fig.14 For along Fig.13 The longitudinal section at the dotted line XX. Step S5, removing the isolation ring 210, forming a reinforcement ring 240 at the position of the isolation ring 210, and the reinforcement ring 240 is in full contact with the substrate 200. The full contact means that the contact surface of the reinforcement ring 240 and the substrate 200 are in direct contact without other structures.

[0052] In the technical solution of the present application, after removing the isolation ring 210, a reinforcement ring 240 can be directly formed on the surface of the substrate 200. The reinforcement ring 240 has good adhesion to the substrate 200, which can improve the reliability and yield of the reinforcement ring 240.

[0053] In some embodiments of the present application, the width of the isolation ring 210 is greater than the width of the reinforcement ring 240 .

[0054] In some embodiments of the present application, the width of the isolation ring 210 is equal to the width of the reinforcement ring 240 plus 0.2 to 0.5 mm.

[0055] In some embodiments of the present application, the width of the isolation ring 210 is 3 to 3.5 mm; the width of the reinforcement ring 240 is 2.8 to 3.2 mm.

[0056] In some embodiments of the present application, the method for removing the isolation ring 210 is: heating the isolation ring 210 to 150 to 200 degrees Celsius, the isolation ring 210 melts and evaporates, or the isolation ring 210 directly volatilizes. In some embodiments of the present application, even if a small amount of bottom filling layer material extends onto the isolation ring 210, this part of the bottom filling layer material will be removed together with the isolation ring 210.

[0057] In some embodiments of the present application, after removing the isolation ring 210 , other structures similar to the reinforcement ring, such as a heat dissipation cover, may be directly formed on the surface of the substrate 200 .

[0058] The technical solution of the present application changes the original production process of the substrate and adds a layer of OSP protective agent (isolation ring 210) that is volatile at high temperature. The surface morphology and surface tension of the substrate are changed, which is beneficial to the suppression of the bottom filling layer, greatly improves the ease of dispensing and attaching the heat dissipation cover and reinforcement ring, improves the packaging yield, and improves the process accuracy.

[0059] The technical solution of this application is a comprehensive solution to the existing 2.5D large chip mounting reinforcement ring and heat dissipation cover when the glue dispensing distance is insufficient and the current difficulties are encountered, as well as improving packaging testing and reliability. The technical solution of this application solves the difficulty of insufficient glue dispensing distance when the 2.5D large chip is mounted on the reinforcement ring and heat dissipation cover, increases the application of the product and the limitations of the 2.5D large chip packaging size, and is suitable for all glue dispensing packaging products in the industry.

[0060] The technical solution of this application maintains the original substrate and chip packaging process sequence, and no special training is required. The technical solution of this application uses existing models, fixtures and materials, without any additions, and low cost.

[0061] The present application provides a method for forming a semiconductor packaging structure, which utilizes an isolation ring to prevent a bottom filling layer from extending to a position on a substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or heat dissipation cover.

[0062] The embodiment of the present application also provides a semiconductor package structure formed by the method for forming the semiconductor package structure as described above, referring to Fig.13 and Fig.14As shown, it includes: a substrate 200, the substrate 200 includes a chip area 201 for packaging a chip 220; a chip 220, the packaging surface of the chip 220 includes a plurality of solder balls 221, and the chip 220 is packaged in the chip area 201 through the plurality of solder balls 221; a bottom filling layer 230, located between the substrate 200 and the packaging surface of the chip 220; a reinforcement ring 240, located on the substrate 200 around the chip area 201 and surrounding the chip area 201, and the reinforcement ring 240 is in full contact with the substrate 200. The full contact means that the reinforcement ring 240 is in direct contact with the contact surface of the substrate 200 without other structures.

[0063] In some embodiments of the present application, the substrate 200 is an ABF substrate. The material of the substrate 200 includes organic composite materials, circuit copper, green paint, etc.

[0064] In the technical solution of the present application, the reinforcement ring 240 is directly formed on the surface of the substrate 200. The reinforcement ring 240 has good adhesion to the substrate 200, which can improve the reliability and yield of the reinforcement ring 240.

[0065] In some embodiments of the present application, other structures similar to reinforcement rings, such as a heat dissipation cover, may be directly formed on the surface of the substrate 200 .

[0066] The technical solution of this application is a comprehensive solution to the existing 2.5D large chip mounting reinforcement ring and heat dissipation cover when the glue dispensing distance is insufficient and the current difficulties are encountered, as well as improving packaging testing and reliability. The technical solution of this application solves the difficulty of insufficient glue dispensing distance when the 2.5D large chip is mounted on the reinforcement ring and heat dissipation cover, increases the application of the product and the limitations of the 2.5D large chip packaging size, and is suitable for all glue dispensing packaging products in the industry.

[0067] The present application provides a semiconductor packaging structure and a method for forming the same, which utilizes an isolation ring to prevent a bottom filling layer from extending to a position on a substrate for forming a reinforcement ring, thereby improving the yield and reliability of the reinforcement ring or heat dissipation cover.

[0068] In summary, after reading the contents of this application, those skilled in the art will appreciate that the aforementioned application contents may be presented only in an exemplary manner and may not be restrictive. Although not explicitly stated herein, those skilled in the art will appreciate that this application is intended to encompass various reasonable changes, improvements and modifications to the embodiments. These changes, improvements and modifications are within the spirit and scope of the exemplary embodiments of this application.

[0069] Similarly, it should be understood that when an element such as a layer, region, or substrate is referred to as being "on" another element, it can be directly on the other element or there can be intervening elements. In contrast, the term "directly" means that there are no intervening elements. It should also be understood that the terms "comprising," "containing," "including," or "comprising," when used in this application document, indicate the presence of the recited features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof.

[0070] It should also be understood that although the terms first, second, third, etc. can be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Therefore, without departing from the teachings of the present application, the first element in some embodiments can be referred to as the second element in other embodiments. The same reference numerals or the same reference signs represent the same elements throughout the specification.

[0071] In addition, the present specification describes exemplary embodiments by reference to idealized exemplary cross-sectional views and / or plan views and / or stereograms. Therefore, differences from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are foreseeable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but should include deviations in shapes caused by, for example, manufacturing. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device nor to limit the scope of the exemplary embodiments.

Claims

1. A method for forming a semiconductor packaging structure, characterized in that: include: Providing a substrate, the substrate comprising a chip area for packaging a chip; forming an isolation ring surrounding the chip area on the substrate around the chip area; Providing a chip, wherein a packaging surface of the chip includes a plurality of solder balls, and the chip is packaged in the chip area through the plurality of solder balls; A bottom filling layer is formed between the substrate and the packaging surface of the chip, and the isolation ring isolates the bottom filling layer from the surface of the substrate below the isolation ring; The isolation ring is removed, and a reinforcement ring is formed in the position of the isolation ring, wherein the reinforcement ring is in full contact with the substrate.

2. The method for forming a semiconductor package structure according to claim 1, wherein: The method of forming an isolation ring surrounding the chip area on a substrate around the chip area includes: forming a patterned photoresist layer on the surface of the substrate, wherein the patterned photoresist layer includes an opening defining the position of the isolation ring; forming the isolation ring in the opening; The patterned photoresist layer is removed.

3. The method for forming a semiconductor package structure according to claim 2, wherein: The method of forming the isolation ring in the opening comprises: applying a spacer ring material to the substrate surface in the opening; The isolation ring material is cured to form the isolation ring.

4. The method for forming a semiconductor package structure according to claim 1, wherein: The materials of the isolation ring include azole compounds, organic acid, water and additives.

5. The method for forming a semiconductor package structure according to claim 1, wherein: The distance between the isolation ring and the chip area is greater than 2 mm.

6. The method for forming a semiconductor package structure according to claim 1, wherein: The height of the isolation ring is 8 to 12 microns.

7. The method for forming a semiconductor package structure according to claim 1, wherein: The width of the isolation ring is greater than the width of the reinforcement ring.

8. The method for forming a semiconductor package structure according to claim 7, wherein: The width of the isolation ring is equal to the width of the reinforcement ring plus 0.2 to 0.5 mm.

9. The method for forming a semiconductor package structure according to claim 1, wherein: The method for removing the isolation ring is: heating the isolation ring to 150 to 200 degrees Celsius, so that the isolation ring melts and evaporates.

10. A semiconductor package structure formed by the method for forming a semiconductor package structure according to any one of claims 1 to 9, characterized in that: include: A substrate, the substrate comprising a chip area for packaging a chip; A chip, wherein the packaging surface of the chip includes a plurality of solder balls, and the chip is packaged in the chip area through the plurality of solder balls; A bottom filling layer, located between the substrate and the packaging surface of the chip; A reinforcement ring is located on the substrate around the chip area and surrounds the chip area, and the reinforcement ring is in full contact with the substrate.