DDR frequency adjustment method and device, electronic equipment and readable storage medium

Abstract

The invention discloses a DDR frequency adjustment method and device, electronic equipment and a readable storage medium, and belongs to the technical field of electronics. The DDR frequency adjustment method comprises the steps that M working frequencies are obtained, each working frequency is the average working frequency of one CPU in M CPUs of the electronic equipment in a first time period, and M is a positive integer; determining a first DDR frequency according to the M working frequencies; adjusting the DDR frequency of the electronic equipment in the second time period according to the first DDR frequency; wherein the first time period and the second time period are time periods for drawing the same frame of image, and the first time period is earlier than the second time period.

Description

Technical Field

[0001] The present application belongs to the field of electronic technology, and specifically relates to a DDR frequency adjustment method, device, electronic device and readable storage medium. Background Art

[0002] Typically, an electronic device can adjust the Double Data Rate (DDR) frequency of the electronic device according to the DDR frequency required by the core components in the electronic device to ensure that the electronic device can meet the bandwidth requirements of these core components.

[0003] In the related art, taking the central processing unit (CPU) as an example, the electronic device can adjust the DDR frequency of the electronic device based on the DDR frequency required by the CPU. When determining the DDR frequency required by the CPU, the electronic device usually adopts two methods: bandwidth mechanism and delay mechanism. The bandwidth mechanism is that the electronic device periodically obtains the DDR bandwidth and calculates the DDR frequency required by the CPU based on the DDR bandwidth; the delay mechanism is that the electronic device periodically obtains the operating frequency of the CPU and determines the DDR frequency required by the CPU from the frequency mapping table based on the operating frequency of the CPU.

[0004] However, since the acquisition cycles of the above two methods are fixed, and both predict the DDR frequency required by the CPU in the next cycle based on the relevant information obtained in the previous cycle, and the CPU's requirements for DDR frequency may be different in the previous cycle and the next cycle, the DDR frequency required by the CPU determined by the electronic device is inaccurate, resulting in poor accuracy in adjusting the DDR frequency of the electronic device. Summary of the invention

[0005] The purpose of the embodiments of the present application is to provide a DDR frequency adjustment method, device, electronic device and readable storage medium, which can improve the accuracy of the DDR frequency required by the CPU determined by the electronic device, thereby improving the accuracy of adjusting the DDR frequency of the electronic device.

[0006] In a first aspect, an embodiment of the present application provides a DDR frequency adjustment method, the method comprising: obtaining M operating frequencies, each operating frequency being an average operating frequency of one of M CPUs of an electronic device in a first time period, and M being a positive integer; determining a first DDR frequency based on the M operating frequencies; adjusting the DDR frequency of the electronic device in a second time period based on the first DDR frequency; wherein the first time period and the second time period are time periods in drawing the same frame image, and the first time period is earlier than the second time period.

[0007] In a second aspect, an embodiment of the present application provides a DDR frequency adjustment device, which includes an acquisition module, a determination module and an adjustment module. The acquisition module is used to acquire M operating frequencies, each operating frequency is the average operating frequency of one of the M CPUs of the electronic device in a first time period, and M is a positive integer. The determination module is used to determine a first DDR frequency based on the M operating frequencies. The adjustment module is used to adjust the DDR frequency of the electronic device in a second time period based on the first DDR frequency. The first time period and the second time period are time periods in drawing the same frame image, and the first time period is earlier than the second time period.

[0008] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the program or instructions are executed by the processor, the steps of the DDR frequency adjustment method described in the first aspect are implemented.

[0009] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the DDR frequency adjustment method described in the first aspect are implemented.

[0010] In a fifth aspect, an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the DDR frequency adjustment method as described in the first aspect.

[0011] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the DDR frequency adjustment method as described in the first aspect.

[0012] In the embodiment of the present application, M operating frequencies are first obtained, each operating frequency is the average operating frequency of one of the M CPUs of the electronic device in the first time period; then, according to the M operating frequencies, a first DDR frequency is determined, and then, according to the first DDR frequency, the DDR frequency of the electronic device in the second time period is adjusted; wherein, the first time period and the second time period are time periods in which the same frame of image is drawn, and the first time period is earlier than the second time period. In this way, since the first time period and the second time period are time periods for executing the same frame drawing task (i.e., drawing the same frame of image), the requirements of the CPU in the electronic device for the DDR frequency in the first time period and the second time period are basically the same, therefore, according to the operating frequency of the CPU in the first time period, the DDR frequency required by the CPU in the electronic device in the second time period is determined to be accurate, thereby adjusting the DDR frequency of the electronic device according to the DDR frequency, which can improve the accuracy of the DDR frequency adjustment. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic diagram of a thread executing a drawing task provided by an embodiment of the present application;

[0014] Figure 2 This is one of the flow charts of the DDR frequency adjustment method provided in the embodiment of the present application;

[0015] Figure 3 This is the second flow chart of the DDR frequency adjustment method provided in the embodiment of the present application;

[0016] Figure 4 This is the third flow chart of the DDR frequency adjustment method provided in the embodiment of the present application;

[0017] Figure 5 This is a fourth flow chart of the DDR frequency adjustment method provided in an embodiment of the present application;

[0018] Figure 6 This is the fifth flow chart of the DDR frequency adjustment method provided in the embodiment of the present application;

[0019] Figure 7 is a structural schematic diagram of a DDR frequency adjustment device provided in an embodiment of the present application;

[0020] Figure 8 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0021] Fig. 9 It is a schematic diagram of the hardware structure of the electronic device provided in the embodiment of the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0023] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0024] The terms "at least one (item)", "at least one of" and the like in the specification and claims of the present application refer to any one, any two or a combination of more than two of the objects included therein. For example, at least one (item) of a, b, and c can be represented by: "a", "b", "c", "a and b", "a and c", "b and c" and "a, b and c", where a, b, and c can be single or multiple. Similarly, "at least two (items)" refers to two or more, and its meaning is similar to that of "at least one (item)".

[0025] The DDR frequency adjustment method, device, electronic device and readable storage medium provided in the embodiments of the present application are described in detail below with reference to the accompanying drawings through specific embodiments and their application scenarios.

[0026] First, the technical terms involved in the embodiments of the present application are explained.

[0027] DDR bandwidth: DDR bandwidth is a metric used to describe the data transfer speed of a computer memory or bus system. It indicates the amount of data that can be transferred per unit time, usually measured in bits per second (bps). Higher DDR bandwidth usually means faster data transfer speeds.

[0028] DDR frequency: DDR frequency refers to the operating frequency of the DDR memory module, usually in megahertz (MHz). DDR frequency affects the data transfer rate, because the higher the DDR frequency, the more data transfers are performed per unit time.

[0029] Activity Monitoring Unit (AMU): The purpose of AMU is system management and monitoring, especially power consumption and performance management.

[0030] QueueBuf: The QueueBuf in the game's drawing thread indicates that the current frame drawing is completed and the Buffer is submitted to downstream consumers. According to the game rendering pipeline mechanism, the time between two QueueBufs is usually defined as the drawing time of a frame drawing task, that is, the single frame drawing time.

[0031] Next, the application scenarios of the DDR frequency provided in the embodiments of the present application are introduced.

[0032] The DDR frequency adjustment method provided in the embodiment of the present application can be applied to gaming scenarios.

[0033] In the game scene, taking the Unity engine as an example, UnityMain is the main thread (logical thread), responsible for drawing the game interface, and sends the content to be drawn to the UnityGfxDeviceW thread for drawing. UnityGfxDeviceW receives the drawing task submitted by the main thread, and after completing the drawing, it submits it to the GPU for rendering. The whole process relationship diagram is as follows Figure 1 shown.

[0034] from Figure 1 It can be seen that the time between the two queuebufs can be understood as the time it takes to execute a frame of drawing task, that is, to draw a frame of interface. During this period of time, the UnityGfxDeviceW thread executes the drawing task of the current frame, and the UnityMain thread can execute the drawing task of the next frame, that is, determine the content to be drawn for the drawing task of the next frame, and then send the content to be drawn for the drawing task of the next frame to the UnityGfxDeviceW thread.

[0035] In the related art, in the process of executing a drawing task in an electronic device, taking the determination of the DDR frequency required by the CPU as an example, the electronic device usually adopts two methods, namely, a bandwidth mechanism and a delay mechanism, to determine the DDR frequency required by the CPU.

[0036] For the bandwidth mechanism, the DDR bandwidth is currently obtained through the kernel's workqueue at a fixed period, and the DDR frequency is calculated based on the DDR bandwidth. For example, assuming the fixed period is 40ms, for a game with a frame rate of 60 frames per second, it is equivalent to calculating the DDR frequency once every 2.5 frames. For the delay mechanism, key events (events) in the AMU on the CPU are currently read periodically at 16ms, such as the number of instructions and the number of Cache Misses on the previous level of DDR. The ratio between the two is used to determine whether DDR adjustment is required. For example, when the number of instructions (Instruction) / Cache Miss is lower than the set threshold, the DDR frequency needs to be adjusted, and the CPU's operating frequency at the moment is obtained, and the DDR frequency required by the CPU is determined based on the CPU's operating frequency.

[0037] However, both of the above two methods predict the DDR frequency required by the CPU in the next cycle based on the relevant information obtained in the previous cycle, and the CPU's requirements for DDR frequency may be different in the previous cycle and the next cycle. Therefore, the DDR frequency required by the CPU determined by the electronic device is inaccurate, resulting in poor accuracy in adjusting the DDR frequency of the electronic device.

[0038] To this end, an embodiment of the present application provides a DDR frequency adjustment method, wherein the electronic device first obtains M operating frequencies, each operating frequency being the average operating frequency of one of the M CPUs of the electronic device in a first time period; then, based on the M operating frequencies, a first DDR frequency is determined, and then, based on the first DDR frequency, the DDR frequency of the electronic device in a second time period is adjusted; wherein the first time period and the second time period are time periods for drawing the same frame of image, and the first time period is earlier than the second time period. In this way, since the first time period and the second time period are time periods for executing the same frame drawing task, the requirements of the CPU in the electronic device for the DDR frequency in the first time period and the second time period are basically the same, and therefore, based on the M operating frequencies in the first time period, the DDR frequency required by the CPU in the electronic device in the second time period is determined to be accurate, thereby adjusting the DDR frequency of the electronic device according to the DDR frequency, and the accuracy of the DDR frequency adjustment can be improved.

[0039] The execution subject of the DDR frequency adjustment method provided in the embodiment of the present application may be a DDR frequency adjustment device. Exemplarily, the DDR frequency adjustment device may be an electronic device, or a functional component or functional entity in the electronic device. The following will take the execution subject as an electronic device as an example to exemplify the DDR frequency adjustment method provided in the embodiment of the present application.

[0040] Figure 2is a flow chart of the DDR frequency adjustment method provided in the embodiment of the present application, such as Figure 2 As shown, the DDR frequency adjustment method provided in the embodiment of the present application may include the following steps 101 to 103.

[0041] Step 101: An electronic device obtains M operating frequencies.

[0042] In the embodiment of the present application, each of the above-mentioned M operating frequencies may be an average operating frequency of one CPU among the M CPUs of the electronic device in the first time period, and M is a positive integer.

[0043] It should be noted that the value of M can be determined according to the number of CPUs in the electronic device. For example, the value of M can be the number of CPUs in the electronic device, or the number of large CPUs with more integrated cores in the electronic device.

[0044] For example, assuming that the electronic device includes 6 CPUs, the value of M may be 6. Alternatively, assuming that the electronic device includes 10 CPUs, 2 of which are small cores, the value of M may be 10-2=8.

[0045] Optionally, in the embodiment of the present application, the M CPUs of the electronic device may be M CPUs of the same type. Exemplarily, one CPU may be a single-core CPU or a multi-core CPU or a core in a multi-core CPU.

[0046] Optionally, in the embodiment of the present application, the above step 101 can be specifically implemented through the following steps 1011 and 1012.

[0047] Step 1011: The electronic device obtains M first working cycle numbers and M second working cycle numbers.

[0048] In the embodiment of the present application, the above-mentioned working cycle number is the number of working cycles, which can be expressed by a cycle value.

[0049] In the embodiment of the present application, the M first working cycle numbers may be the working cycle numbers that the M CPUs have run at the first moment. That is to say, one first working cycle number may be the working cycle number that one CPU has run at the first moment, and the working cycle number that one CPU has run at the first moment may be understood as the number of working cycles that one CPU has run before the first moment.

[0050] In the embodiment of the present application, the M second working cycle numbers may be the working cycle numbers that the M CPUs have run at the second moment. That is to say, one first working cycle number may be the working cycle number that one CPU has run at the first moment, and the working cycle number that one CPU has run at the second moment may be understood as the number of working cycles that one CPU has run before the second moment.

[0051] In the embodiment of the present application, the first moment may be the start moment of the first time period, and the second moment may be the end moment of the first time period.

[0052] Optionally, in the embodiment of the present application, the first time period may be a time period in the target time period, and the target time period may be a time period for drawing a frame of image, that is, a time period for executing a frame drawing task. Moreover, the duration of the first time period is shorter than the duration of the target time period.

[0053] Exemplarily, the above-mentioned one frame of image may be one frame of application interface or one frame of application page. For example, the above-mentioned one frame of image may be one frame of game interface.

[0054] Optionally, in an embodiment of the present application, the duration of the above-mentioned first time period can be determined based on the application running frame rate and the average drawing time of the previously drawn image, or the duration of the first time period can also be set by default, which is not limited in the embodiment of the present application.

[0055] Optionally, in the embodiment of the present application, the first moment may be the start moment of the target time period, or the middle moment of the target time period. In other words, the first time period may be the first part of the target time period, or the middle part of the target time period.

[0056] Exemplarily, assuming that the target time period is from 10 o'clock to 10:016 milliseconds, the first time may be 10 o'clock, or the first time may be 10:02 milliseconds.

[0057] It should be noted that the specific implementation of determining the duration of the first time period and determining the first time period in the target time period can refer to the relevant descriptions of the following steps 201 to 203.

[0058] Optionally, in an embodiment of the present application, the electronic device can, during the process of executing the drawing task of the current frame, i.e., drawing the current frame image, obtain, at a first moment, the cycle value recorded by the AMU on the M CPUs at this moment, i.e., the M first working cycle numbers; and, at a second moment, obtain the cycle value recorded by the AMU on the M CPUs at this moment, i.e., the M second working cycle numbers.

[0059] Exemplarily, taking M CPUs as 2 CPUs, the first moment being the start moment of drawing the current frame image, and the second moment being the 6ms of drawing the current frame image as an example, the electronic device can obtain the cycle value recorded by the AMU on each of the 2 CPUs at the start moment of drawing the current frame image, and obtain 2 first working cycle numbers; and, at the 6ms of the electronic device drawing the current frame image, the electronic device can obtain the cycle value recorded by the AMU on each of the 2 CPUs at the moment, and obtain 2 second working cycle numbers.

[0060] It should be noted that the electronic device can also start a timer while obtaining M first working cycles at the first moment, and set the timing duration of the timer to the duration of the first time period, and obtain the above-mentioned M second working cycles when the timer times out.

[0061] Optionally, in the embodiment of the present application, the above step 1011 can be specifically implemented through the following step 10111.

[0062] Step 10111: The electronic device calls an asynchronous message processing (handler) thread or triggers a work queue (workqueue) to obtain M first working cycle numbers and M second working cycle numbers.

[0063] Optionally, in an embodiment of the present application, the electronic device may call a handler thread to obtain M first working cycle numbers and M second working cycle numbers. Alternatively, the electronic device may trigger a work queue workqueue to obtain M first working cycle numbers and M second working cycle numbers. Alternatively, the electronic device may call a handler thread to obtain M first working cycle numbers, and trigger the workqueue to obtain M second working cycle numbers. Alternatively, the electronic device may trigger the work queue workqueue to obtain M first working cycle numbers, and call a handler thread to obtain M second working cycle numbers.

[0064] Optionally, in the embodiment of the present application, in the process of the electronic device calling the Render thread to execute the drawing task of the current frame, when the first moment is reached, the electronic device calls the handler thread to read the cycle value recorded by the AMU on each of the M CPUs at this moment, and obtains M first working cycle numbers. Then the electronic device continues to call the Render thread to continue to execute the drawing task of the current frame, and when the second moment is reached, the electronic device calls the handler thread again to read the cycle value recorded by the AMU on each of the M CPUs at this moment, and obtains M second working cycle numbers.

[0065] Optionally, in an embodiment of the present application, in the process of the electronic device calling the Render thread to execute the drawing task of the current frame, when the first moment is reached, the electronic device calls the interface function queue_work, and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at this moment to the workqueue through queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each CPU at this moment to obtain M first working cycle numbers. Then, the electronic device continues to call the Render thread to execute the drawing task of the current frame. When the second moment is reached, the electronic device calls the interface function queue_work again, and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at this moment to the workqueue through queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each CPU at this moment to obtain M second working cycle numbers.

[0066] Optionally, in an embodiment of the present application, in the process of the electronic device calling the Render thread to execute the drawing task of the current frame, when the first moment is reached, the electronic device calls the handler thread to read the cycle value recorded by the AMU on each of the M CPUs at this moment, and obtains M first working cycle numbers. Then, the electronic device continues to call the Render thread to execute the drawing task of the current frame. When the second moment is reached, the electronic device calls the interface function queue_work again, and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at this moment to the workqueue through queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each CPU at this moment, and obtains M second working cycle numbers.

[0067] Exemplarily, the number of M first working cycles acquired by the electronic device can be recorded as {CPU0 t1 , CPU1 t1 , CPU2 t1 , …, CPUm t1}, where CPUm represents CPU No. m, and t1 represents the first moment, i.e., the moment when the first working cycle number is obtained. Similarly, the M second working cycle numbers obtained by the electronic device can be recorded as {CPU0 t2 , CPU1 t2 , CPU2 t2 , …, CPUm t2}, wherein t2 represents the second moment, i.e., the moment of obtaining the second working cycle number.

[0068] It should be noted that, taking the game scenario as an example, the above handler thread can be a kernel thread newly created by the electronic device, not a game thread. Using the handler thread to obtain the number of working cycles instead of the game thread can reduce interference with the game thread.

[0069] Step 1012: The electronic device determines the i-th operating frequency based on the i-th first operating cycle number, the i-th second operating cycle number, and the length of the first time period, to obtain M operating frequencies.

[0070] In the embodiment of the present application, the above i∈[1,M], that is, the maximum value of i is 1 and the minimum value is M.

[0071] It should be noted that each of the above M operating frequencies can be understood as an average operating frequency of each CPU in the first time period.

[0072] Optionally, in an embodiment of the present application, the electronic device may calculate the difference between the i-th first working cycle number and the i-th second working cycle number, and determine the ratio of the difference to the length of the first time period as the i-th working frequency.

[0073] Optionally, in an embodiment of the present application, when calculating the difference between the i-th first working cycle number and the i-th second working cycle number, the electronic device can subtract the i-th second working cycle number from the i-th first working cycle number, or subtract the i-th first working cycle number from the i-th second working cycle number; then take the absolute value of the difference, and then divide the absolute value of the difference by the length of the first time period, and determine the ratio as the i-th working frequency.

[0074] Exemplarily, the first operating frequency may be CPUiFreq avg Assume that the length of the first time period is ΔT, and the first working cycle number of CPU i is CPUi t1 , the second working cycle number of CPU i is CPUi t2 , and CPUi t1 Greater than CPUi t2 , then the i-th operating frequency can be calculated by the formula: CPUiFreq avg =(CPUi t2 –CPUi t1 ) / ΔT is determined.

[0075] Optionally, in an embodiment of the present application, the electronic device may continue to call the handler thread or trigger the workqueue to calculate the above-mentioned M working frequencies after obtaining the M second working cycle numbers.

[0076] In the embodiment of the present application, the electronic device obtains the first working cycle number of each CPU at the first moment and the second working cycle number of each CPU at the second moment, and then calculates the average operating frequency of each CPU in the first time period (i.e., the above-mentioned first operating frequency). Since the average operating frequency can reflect the load of the electronic device when drawing the current frame image in the first time period, and the load of the electronic device remains basically unchanged during the process of drawing a frame image, the DDR frequency required by the electronic device when drawing the subsequent time period of the current frame image can be predicted based on the first operating frequency, thereby improving the accuracy of the electronic device in determining the DDR frequency required by the CPU.

[0077] Step 102: The electronic device determines a first DDR frequency according to the M operating frequencies.

[0078] In the embodiment of the present application, the first DDR frequency is an ideal DDR frequency when the electronic device works in the first time period. It is understandable that the first DDR frequency is a DDR frequency that makes the electronic device have a smaller load and better performance when the electronic device works at the first working frequency.

[0079] Optionally, in an embodiment of the present application, the above step 102 can be specifically implemented by the following steps 1021 and 1022.

[0080] Step 1021: The electronic device determines a first operating frequency according to the M operating frequencies.

[0081] Optionally, in an embodiment of the present application, the electronic device may remove a small CPU from the M CPUs according to the sizes of the M CPUs, that is, remove the operating frequency of the small CPU from the M operating frequencies, and then determine the first operating frequency from the remaining operating frequencies.

[0082] Optionally, in the embodiment of the present application, the above step 1021 can be specifically implemented through the following step 10211.

[0083] Step 10211: The electronic device determines the maximum operating frequency among the M operating frequencies as the first operating frequency.

[0084] Optionally, in the embodiment of the present application, the electronic device may select a maximum operating frequency from the M operating frequencies, and determine the maximum operating frequency as the first operating frequency. Alternatively, the electronic device may remove the operating frequency of the small CPU from the M operating frequencies, and then select the maximum operating frequency from the remaining operating frequencies, and determine the maximum operating frequency as the first operating frequency.

[0085] Exemplarily, assuming that the value of M is 3, and the three operating frequencies are 3.0 GHz, 3.5 GHz, and 3.2 GHz, respectively, the first operating frequency determined by the electronic device is 3.5 GHz.

[0086] In this way, the maximum operating frequency is selected as the first operating frequency, and the DDR frequency determined based on the maximum operating frequency can be compatible with all CPUs, that is, the DDR frequency in the electronic device finally determined meets the requirements of each CPU, thereby improving the performance of the electronic device.

[0087] Furthermore, after selecting the maximum operating frequency, the electronic device may also add a preset value to the maximum operating frequency to obtain the first operating frequency. The preset value may be set based on experience or by default, and this embodiment of the application does not limit this.

[0088] Step 1022: The electronic device determines a first DDR frequency corresponding to the first operating frequency according to the first operating frequency and the first mapping relationship.

[0089] Optionally, in the embodiment of the present application, the first mapping relationship may be a mapping relationship between the first operating frequency range and the first DDR frequency, and the first operating frequency may be an operating frequency within the first operating frequency range. Alternatively, the first mapping relationship may be a mapping relationship between the first operating frequency and the first DDR frequency.

[0090] It should be noted that the first mapping relationship reflects the relationship between the CPU operating frequency and the DDR frequency, which can also be understood as the relationship between the DDR frequency and the performance of the electronic device. The first mapping relationship can be set by default by the electronic device, or can be pre-set or adjusted based on experience, which is not limited in the embodiments of the present application.

[0091] Exemplarily, assuming that the first operating frequency is 0.8 GHz, the operating frequency range included in the first mapping relationship is 0 GHz-1 GHz, and the included DDR frequency is 2 GHz, it can be determined that the first DDR frequency corresponding to the first operating frequency is 2 GHz.

[0092] In this way, the first DDR frequency determined by the electronic device can be understood as a DDR frequency that makes the load of the electronic device smaller and the performance better when the electronic device operates at the first operating frequency, thereby improving the performance of the electronic device.

[0093] Optionally, in an embodiment of the present application, the first mapping relationship may be one of a plurality of mapping relationships, each of which may be a mapping relationship between an operating frequency range and a DDR frequency, and the plurality of mapping relationships may be understood as a relationship between a DDR frequency and the performance of an electronic device under different loads. In this case, the electronic device may search the operating frequency range in which the first operating frequency is located from the plurality of mapping relationships, and determine the DDR frequency corresponding to the operating frequency range as the first DDR frequency.

[0094] Optionally, in the embodiment of the present application, the above-mentioned multiple mapping relationships can also be expressed in the form of a mapping table, in which one column is the operating frequency range and the other column is the DDR frequency, and the operating frequency range and the DDR frequency in the same row correspond to each other, forming a mapping relationship. Alternatively, in the mapping table, one column is the operating frequency, and the operating frequency represents the operating frequency range.

[0095] Exemplarily, it is assumed that the mapping table includes two groups of mapping relationships. The first row is the first group of mapping relationships, the left column of the first row is 0-0.5 GHz, or 0.5 GHz, indicating that the operating frequency range is 0-0.5 GHz, and the right column of the first row is DDR frequency of 2 GHz. The second row is the second group of mapping relationships, the left column of the second row is 0.5-1 GHz, or 1 GHz, indicating that the operating frequency range is 0.5-1 GHz, and the right column of the first row is DDR frequency of 3 GHz.

[0096] Step 103: The electronic device adjusts the DDR frequency of the electronic device in the second time period according to the first DDR frequency.

[0097] In the embodiment of the present application, the first time period and the second time period are time periods in which the same frame image is drawn, and the first time period is earlier than the second time period.

[0098] Optionally, in the embodiment of the present application, the length of the first time period may be less than or equal to the length of the second time period. In this way, when executing the same frame drawing task (i.e. drawing the same frame image), the DDR frequency required for the drawing task in the longer time period is adjusted by using the situation of the drawing task in the shorter time period, which can shorten the drawing time and improve the image drawing efficiency.

[0099] Optionally, in the embodiment of the present application, the electronic device may adjust the first DDR frequency to the DDR frequency of the electronic device in the second time period.

[0100] In the embodiment of the present application, the above step 103 can be understood as the electronic device adjusting the DDR frequency in the second time period for drawing a frame of image according to the DDR frequency determined in the first time period for drawing a frame of image, thereby realizing the DDR frequency adjustment within the frame, so that during the drawing process of each frame of image, the DDR frequency of the electronic device is the optimal DDR frequency, thereby improving the accuracy of DDR frequency adjustment, and using the optimal DDR frequency can also reduce frame rate fluctuations.

[0101] Optionally, in an embodiment of the present application, the above step 103 can be specifically implemented through the following steps 1031 to 1033.

[0102] Step 1031: The electronic device obtains a second DDR frequency.

[0103] In the embodiment of the present application, the second DDR frequency may be a DDR frequency determined based on the operating frequencies of other components in the electronic device. The second DDR frequency may be understood as a DDR frequency required by other components of the electronic device.

[0104] Optionally, in an embodiment of the present application, the above-mentioned electronic device may be configured with a system on a chip (SOC), and the above-mentioned other components may be core components in the SOC such as a graphics processing unit (GPU) or a neural network processor (NPU).

[0105] Step 1032: The electronic device determines a maximum DDR frequency between the first DDR frequency and the second DDR frequency.

[0106] Step 1033: The electronic device adjusts the DDR frequency of the electronic device to the maximum DDR frequency.

[0107] It should be noted that when the electronic device adjusts the DDR frequency, the DDR frequency may be increased. When the DDR frequency is higher, the efficiency of the electronic device in executing drawing tasks will be faster, and the components of the electronic device (such as the CPU) will not require a very high operating frequency. Therefore, the electronic device can reduce the operating frequency of the components, thereby reducing the power consumption of the electronic device.

[0108] In this way, the electronic device adjusts the DDR frequency of the electronic device to the determined maximum DDR frequency, and the maximum DDR frequency can meet the DDR frequency requirements of various components in the electronic device, thereby improving the performance of the electronic device.

[0109] Optionally, in the embodiment of the present application, combined with Figure 2 ,like Figure 3 As shown, before the above step 101, the DDR frequency adjustment method provided in the embodiment of the present application may further include the following steps 201 to 203.

[0110] Step 201: The electronic device obtains an application running frame rate and a first drawing duration of N frames of images.

[0111] Optionally, in an embodiment of the present application, the application running frame rate may be the number of frames per second during the running of the application. For example, in a game scenario, the application running frame rate may be the game running frame rate. For example, if the game running frame rate is 60, it means that 60 frames of game screen are running per second during the running of the game.

[0112] Exemplarily, the electronic device may monitor the application running frame rate in real time, and obtain the application running frame rate at the time when starting to execute the drawing task of the current frame, or when obtaining the M first working cycle numbers.

[0113] In the embodiment of the present application, the first drawing duration may be an average drawing duration of N frames of images before the current frame, where N is a positive integer.

[0114] It should be noted that the value of N can be set by default by the electronic device or by the user based on experience, and this embodiment of the present application does not limit this. For example, the value of N is 10 or 8.

[0115] Optionally, in an embodiment of the present application, the electronic device may obtain the drawing time of each frame of the first N images before drawing the current frame image, then calculate the total drawing time of the N frames of images, and then calculate the average drawing time based on the total drawing time.

[0116] Exemplarily, the electronic device may record the drawing time required to complete each drawing task when completing a frame of drawing task. Then, when the electronic device starts to execute the drawing task of the current frame, or when obtaining M first working cycles, it calculates the above-mentioned first drawing time based on the recorded drawing time of each frame of the N frames of images.

[0117] Step 202: The electronic device determines a target duration based on the application running frame rate and the first drawing duration.

[0118] Optionally, in the embodiment of the present application, combined with Figure 3 ,like Figure 4 As shown, the above step 202 can be specifically implemented through the following steps 2021 to 2023.

[0119] Step 2021: The electronic device determines a single-frame drawing duration of a single-frame image based on the application running frame rate.

[0120] Optionally, in an embodiment of the present application, the electronic device may determine the quotient of 1 second and the application running frame rate as the single-frame drawing time of a single-frame image, that is, the time required to complete a single-frame drawing task.

[0121] For example, assuming that the application runs at a frame rate of 60 frames per second, the drawing time of a single frame is 1000ms÷60≈16ms.

[0122] Step 2022: The electronic device determines a minimum drawing duration between the single-frame drawing duration and the first drawing duration.

[0123] Exemplarily, the electronic device determines the smaller duration between the single-frame drawing duration and the first drawing duration as the minimum drawing duration.

[0124] Step 2023: The electronic device determines a target drawing duration based on the minimum drawing duration.

[0125] In the embodiment of the present application, the target duration is less than the minimum drawing duration.

[0126] Optionally, in the embodiment of the present application, the electronic device may determine a portion of the minimum drawing duration as the target duration, which may be 1 / 2, 1 / 3, 1 / 4, 2 / 5, etc., which is not limited in the embodiment of the present application.

[0127] Optionally, in the embodiment of the present application, the target duration may be less than or equal to half of the minimum drawing duration.

[0128] For example, taking the single-frame drawing time of 16ms as an example, assuming that the first drawing time is 17ms, which is greater than the single-frame drawing time, the electronic device can determine the single-frame drawing time as the minimum drawing time, and then determine half of the minimum drawing time, that is, 8ms, as the target time. Alternatively, assuming that the first drawing time is 14ms, which is less than the single-frame drawing time, the electronic device can determine the first drawing time as the minimum drawing time, and then determine half of the minimum drawing time, that is, 7ms, as the target time.

[0129] Optionally, in the embodiment of the present application, the electronic device may also set the target duration to a fixed duration parameter, where the fixed duration parameter is smaller than the single-frame drawing duration and the first drawing duration.

[0130] In the embodiment of the present application, the electronic device selects the minimum drawing time between the single-frame drawing time and the average drawing time of the previous N frames of images, and determines the target time based on the minimum drawing time. The determined target time is relatively short, and the image drawing situation in a shorter time period can be used to quickly predict the DDR frequency required for drawing images in subsequent time periods within the current frame. The DDR frame rate of the electronic device can be adjusted to a suitable DDR frame rate as early as possible, thereby improving the efficiency of image drawing and shortening the drawing time of the current frame.

[0131] Step 203: The electronic device determines a first time period in the time period for drawing the current frame image according to the target time length.

[0132] Optionally, in an embodiment of the present application, the electronic device may randomly determine a moment in the first half of the time period for drawing the current frame image as the starting moment of the first time period, and then determine a time period corresponding to the target duration from the starting moment as the first time period.

[0133] Optionally, in an embodiment of the present application, the electronic device can determine a first time period with a target duration from the first half of the time period for drawing the current frame image, that is, the start time and end time of the first time period are both in the first half of the time period for drawing the current frame image.

[0134] Optionally, in the embodiment of the present application, the above step 203 can be specifically implemented by the following step 2031:

[0135] Step 2031: The electronic device determines a time period corresponding to a target duration starting from the start time of the time period for drawing the current frame image as a first time period.

[0136] Exemplarily, assuming that the target duration is 7 ms, and the time period for drawing the current frame image is from 10 o'clock to 10:017 milliseconds, then the first time period is from 10 o'clock to 10:07 ms.

[0137] In this way, the electronic device determines a period of time from the start time of drawing the current frame image as the first time period, and determines the average operating frequency of each CPU in the first time period, then determines the maximum operating frequency from the average operating frequency, and then determines the DDR frequency corresponding to the maximum operating frequency, and uses the DDR frequency to adjust the DDR frequency in a subsequent period of time for drawing the current frame image, so that the performance of the electronic device is best when the current frame image is subsequently drawn, which not only improves the accuracy of adjusting the DDR frequency, but also improves the drawing efficiency.

[0138] In the DDR frequency adjustment method provided in the embodiment of the present application, since the first time period and the second time period are time periods for executing the same frame drawing task (i.e. drawing the same frame image), the CPU in the electronic device has substantially the same requirements for the DDR frequency in the first time period and the second time period. Therefore, the DDR frequency required by the CPU in the electronic device in the second time period determined based on the CPU operating frequency in the first time period is accurate, and the DDR frequency of the electronic device is adjusted based on the DDR frequency, which can improve the accuracy of the DDR frequency adjustment. In addition, the present solution can also reduce the power consumption of the electronic device while keeping the frame rate unchanged.

[0139] Next, combine Figure 5 and Figure 6 The DDR frequency adjustment method provided in the embodiment of the present application is described. Figure 5 4 is a flow chart of the DDR frequency adjustment method provided in an embodiment of the present application. Taking the application of the method in a gaming scenario as an example, the method may include the following steps 501 to 508.

[0140] Step 501, the electronic device calls the main thread UnityMain to execute the drawing task, and the main thread submits the drawing task to the drawing thread UnityGfxDeviceW, and the drawing thread starts drawing the game interface after receiving the drawing task.

[0141] Exemplarily, the UnityGfxDeviceW mentioned above can be replaced by the game Render thread.

[0142] Step 502: When the UnityGfxDevicwW thread completes queuebuf, the electronic device calls the handler thread to read the cycle value recorded by the AMU on each CPU at the first moment, and starts the timer.

[0143] Optionally, in an embodiment of the present application, the completion of queuebuf by the UnityGfxDevicwW thread can be understood as the completion of the drawing task of the previous frame by the UnityGfxDevicwW thread, that is, the drawing of the game interface of the previous frame has been completed. In this case, the UnityGfxDevicwW thread will continue to execute the drawing task of the current frame sent by the UnityMain thread, and draw the game interface of the current frame, then the first moment can be the start moment of the UnityGfxDevicwW thread executing the drawing task of the current frame. In other words, the above-mentioned electronic device calling the handler thread to read the cycle value recorded by the AMU on each CPU at the first moment can be understood as the electronic device calling the handler thread to read the cycle value recorded by the AMU on each CPU at the start moment of executing the drawing task of the current frame.

[0144] Optionally, the embodiment of the present application may use CPUm t1 It represents the cycle value of CPU m at time t1, where time t1 is the first time mentioned above.

[0145] For example, with CPU0 t1 Indicates the cycle value of CPU 0 at time t1, and so on, CPU7 t1 It can represent the cycle value of CPU No. 7 at time t1. Then, taking the electronic device including 7 CPUs as an example, the electronic device calls the handler thread to read the cycle value recorded by the AMU on each CPU at time t1, which can be recorded as {CPU0 t1 , CPU1 t1 , CPU2 t1 ,…,CPU7 t1}.

[0146] Step 503: The electronic device calculates a target duration according to the game running frame rate and the average rendering duration of the first N frames of rendering tasks.

[0147] Optionally, in an embodiment of the present application, the electronic device can calculate the single-frame drawing time according to the game running frame rate, and calculate the average drawing time of the first N frame drawing tasks according to the drawing time of each frame drawing task in the first N frame drawing tasks. Then determine the minimum drawing time between the average drawing time and the single-frame drawing time, and then calculate the target time according to the minimum drawing time. Exemplarily, the electronic device can determine half of the minimum drawing time as the target time.

[0148] It should be noted that the above step 503 can be performed after step 502 or before step 502, and this embodiment of the present application does not limit this. Figure 5 Only step 503 being executed after step 502 is taken as an example for illustrative description.

[0149] Step 504: When the timer times out, the electronic device triggers the workqueue to read the cycle value recorded by the AMU on each CPU corresponding to the second moment.

[0150] It should be noted that the above timer timeout means that the timer timing duration is greater than or equal to the above target duration. The above second moment can be understood as the moment when the timer times out, that is, the moment when the duration of executing the drawing task of the current frame reaches the target duration. For example, assuming that the target duration is 8ms and the start time of executing the drawing task of the current frame is 10 o'clock, then the above second moment is 10:08ms.

[0151] Optionally, in an embodiment of the present application, when the timer times out, the electronic device may call the interface function queuework, and send a task for reading the cycle value recorded at the second moment of the AMU on each CPU to the work queue workqueue through the interface function queuework. After receiving the task, the work queue workqueue reads the cycle value recorded at the second moment of the AMU on each CPU.

[0152] Optionally, in the embodiment of the present application, CPUm may be used t2 It represents the cycle value of CPU m at time t2, where time t2 is the second moment mentioned above.

[0153] For example, taking an electronic device including 7 CPUs as an example, the electronic device triggers the work queue to read the cycle value recorded by the AMU at the second moment on each CPU, which can be recorded as {CPU0 t2 , CPU1 t2 , CPU2 t2 ,…,CPU7t2}.

[0154] Step 505: The electronic device calls the work queue, calculates the average operating frequency of each CPU during the two readings of the cycle value according to the cycle value recorded by the AMU on each CPU read at the first moment and the second moment respectively, and selects the maximum average operating frequency.

[0155] Optionally, in the embodiment of the present application, taking a CPU as an example, the electronic device can determine the average operating frequency of the CPU according to the cycle value of the CPU at the first moment, the cycle value of the CPU at the second moment, and the target duration. Similarly, the electronic device can calculate the average operating frequency of each CPU, and then select the maximum average operating frequency from the average operating frequencies of the multiple CPUs.

[0156] For example, CPUmFreq avg It represents the average operating frequency of CPU m during the two readings of cycle value. And the average operating frequency of CPU m during the two readings of cycle value can be calculated by the formula CPUmFreq avg =(CPUm t2 –CPUm t1 ) / ΔT. Where ΔT is the above target duration, CPUm t2 Indicates the cycle value of CPU m at time t2, CPUm t1 In this case, taking the electronic device including 7 CPUs as an example, the average frequency of the 7 CPUs can be recorded as {CPU0Freq avg ,CPU1Freq avg ,…,CPU7Freq avg}.

[0157] Optionally, in an embodiment of the present application, when determining the maximum average operating frequency, the electronic device may ignore the average operating frequency of a CPU with a smaller core among multiple CPUs, and determine the maximum average operating frequency from other CPUs.

[0158] It should be noted that the maximum average operating frequency is the first operating frequency in the above embodiment.

[0159] Step 506: The electronic device calls the work queue to search the cpu-ddr mapping table, and searches the cpu-ddr mapping table for a first DDR frequency corresponding to the maximum average operating frequency.

[0160] Exemplarily, the electronic device calls the working queue, first searches for the working frequency range where the maximum average working frequency is located in the mapping table, and then determines the DDR frequency corresponding to the found working frequency range as the first DDR frequency.

[0161] It should be noted that the above-mentioned cpu-ddr mapping table can be a plurality of mapping relationships in the above-mentioned embodiment expressed in the form of a mapping table.

[0162] Step 507: The electronic device obtains the second DDR frequency required by the GPU side, and sets the first DDR frequency and the second DDR frequency through the voting interface.

[0163] Step 508: The electronic device adjusts the DDR frequency of the electronic device to the largest DDR frequency between the first DDR frequency and the second DDR frequency.

[0164] The DDR adjustment method provided in the embodiment of the present application can realize the game to adjust the DDR frequency according to the frame drawing time, and adjust the DDR frequency of the electronic device in the frame according to the average operating frequency of the CPU in the previous period of time before drawing a frame of image, so that the method of adjusting the DDR frequency is aligned with the frame drawing time, and the accuracy of the DDR frequency required by the determined CPU is improved, thereby improving the accuracy of the DDR frequency adjustment. In addition, the above method is applied to the game scene, combined with the drawing time of drawing a single frame image, to trigger the DDR frequency adjustment in the frame, and adjust the DDR frame rate of the electronic device to a DDR frequency that makes the electronic device have better performance, which can improve the performance of the electronic device, reduce the power consumption of the electronic device, reduce the fluctuation of the game running frame rate, and optimize the game experience.

[0165] Next, combine Figure 6 The thread calling situation of the electronic device when implementing the DDR frequency adjustment method is described. The electronic device first calls the game Render thread to draw the game interface of the current frame. When the queuebuf is completed, the electronic device calls the handler thread to read the AMU to obtain the first working cycle number, and the electronic device starts the timer (timer). Then, the electronic device detects that the timer has timed out, that is, the timer callback, and triggers the work queue workqueue to read the AMU through the interface function queuework to obtain the second working cycle number. Then, the electronic device continues to trigger the work queue workqueue to calculate the first working frequency, and determines the first DDR frequency corresponding to the first working frequency, and then sets the first DDR frequency through the voting interface. Finally, the DDR frequency of the electronic device is adjusted according to the first DDR frequency and the second DDR frequency.

[0166] It should be noted that the specific implementation process of the above steps 501 to 508 can refer to the relevant description of the above embodiment. To avoid repetition, this embodiment will not be repeated here.

[0167] It should be noted that the above-mentioned method embodiments, or various possible implementation methods in each method embodiment, can be executed separately, or any two or more can be executed in combination with each other. The specific implementation method can be determined according to actual usage requirements, and the embodiments of the present application do not impose any restrictions on this.

[0168] The DDR frequency adjustment method provided in the embodiment of the present application can be executed by a DDR frequency adjustment device. In the embodiment of the present application, the DDR frequency adjustment method executed by the DDR frequency adjustment device is taken as an example to illustrate the DDR frequency adjustment device provided in the embodiment of the present application.

[0169] Figure 7 70 is a schematic diagram of the structure of a DDR frequency adjustment device provided in an embodiment of the present application. The DDR frequency adjustment device may include: an acquisition module 701, a determination module 702 and an adjustment module 703.

[0170] The acquisition module 701 is used to acquire M operating frequencies, each operating frequency is an average operating frequency of one of the M CPUs of the electronic device in a first time period, and M is a positive integer.

[0171] The determination module 702 is configured to determine a first DDR frequency according to the M operating frequencies.

[0172] The adjustment module 703 is configured to adjust the DDR frequency of the electronic device in the second time period according to the first DDR frequency.

[0173] In the embodiment of the present application, the first time period and the second time period are time periods for drawing the same frame image, and the first time period is earlier than the second time period.

[0174] Optionally, in an embodiment of the present application, the acquisition module 701 is specifically used to obtain M first working cycle numbers and M second working cycle numbers, where the M first working cycle numbers are the number of working cycles that the M CPUs have run at the first moment, and the M second working cycle numbers are the number of working cycles that the M CPUs have run at the second moment, the first moment is the start moment of the first time period, and the second moment is the end moment of the first time period; and, based on the i-th first working cycle number, the i-th second working cycle number and the length of the first time period, determine the i-th working frequency to obtain M working frequencies, i∈[1, M].

[0175] Optionally, in an embodiment of the present application, the acquisition module 701 is specifically used to call a handler thread or trigger a workqueue to obtain M first working cycle numbers and M second working cycle numbers.

[0176] Optionally, in the embodiment of the present application, the acquisition module 701 is further used to acquire the application running frame rate and the first drawing time of N frames of images before acquiring the M working frequencies, where the first drawing time is the average drawing time of N frames of images before the current frame, and N is a positive integer;

[0177] The determination module 702 is further configured to determine a target duration based on the application running frame rate and the first drawing duration; and determine a first time period in the time period for drawing the current frame image according to the target time period.

[0178] Optionally, in the embodiment of the present application, the determination module 702 is specifically configured to determine a time period corresponding to a target duration starting from a start moment of a time period for drawing a current frame image as a first time period.

[0179] Optionally, in an embodiment of the present application, the determination module 702 is specifically used to determine a single-frame drawing time of a single-frame image based on the application running frame rate; and, between the single-frame drawing time and the first drawing time, determine a minimum drawing time; and, based on the minimum drawing time, determine a target time, the target time being less than the minimum drawing time.

[0180] Optionally, in the embodiment of the present application, the determination module 702 is specifically configured to determine the maximum operating frequency among the M operating frequencies as the first operating frequency.

[0181] In the DDR frequency adjustment device provided in the embodiment of the present application, since the first time period and the second time period are time periods for executing the same frame drawing task (i.e., drawing the same frame image), the CPU in the electronic device has substantially the same requirements for the DDR frequency in the first time period and the second time period. Therefore, the DDR frequency required by the CPU in the DDR frequency adjustment device in the second time period determined based on the operating frequency of the CPU in the first time period is accurate, thereby adjusting the DDR frequency of the DDR frequency adjustment device based on the DDR frequency, thereby improving the accuracy of the DDR frequency adjustment.

[0182] The DDR frequency adjustment device in the embodiment of the present application can be an electronic device, or a component in the electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal, or other devices other than a terminal. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device, an augmented reality / virtual reality device, a robot, a wearable device, a super mobile personal computer, a netbook or a personal digital assistant, etc., and can also be a server, a network attached storage (Network Attached Storage, NAS), a personal computer (personal computer, PC), a television (television, TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiment of the present application.

[0183] The DDR frequency adjustment device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0184] The DDR frequency adjustment device provided in the embodiment of the present application can implement each process implemented by each embodiment of the above-mentioned DDR frequency adjustment method, and will not be described again here to avoid repetition.

[0185] Alternatively, if Figure 8 As shown, an embodiment of the present application further provides an electronic device 900, including a processor 901 and a memory 902, wherein the memory 902 stores a program or instruction that can be executed on the processor 901, and when the program or instruction is executed by the processor 901, each step of the above-mentioned DDR frequency adjustment method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0186] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0187] Fig. 9 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present application.

[0188] The electronic device 1000 includes but is not limited to: a radio frequency unit 1001, a network module 1002, an audio output unit 1003, an input unit 1004, a sensor 1005, a display unit 1006, a user input unit 1007, an interface unit 1008, a memory 1009, and a processor 1010 and other components.

[0189] Those skilled in the art will appreciate that the electronic device 1000 may also include a power source (such as a battery) for supplying power to each component, and the power source may be logically connected to the processor 1010 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Fig. 9 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here.

[0190] Among them, the processor 1010 is used to obtain M operating frequencies, each operating frequency is the average operating frequency of one CPU among the M CPUs of the electronic device in the first time period, and M is a positive integer; and determine a first DDR frequency based on the M operating frequencies; and adjust the DDR frequency of the electronic device in the second time period based on the first DDR frequency.

[0191] In the embodiment of the present application, the first time period and the second time period are time periods for drawing the same frame image, and the first time period is earlier than the second time period.

[0192] Optionally, in an embodiment of the present application, the processor 1010 is specifically used to obtain M first working cycle numbers and M second working cycle numbers, where the M first working cycle numbers are the number of working cycles that the M CPUs have run at a first moment, and the M second working cycle numbers are the number of working cycles that the M CPUs have run at a second moment, the first moment is the start moment of the first time period, and the second moment is the end moment of the first time period; and, based on the i-th first working cycle number, the i-th second working cycle number and the length of the first time period, determine the i-th working frequency to obtain M working frequencies, i∈[1, M].

[0193] Optionally, in an embodiment of the present application, the processor 1010 is specifically used to call a handler thread or trigger a workqueue to obtain M first working cycle numbers and M second working cycle numbers.

[0194] Optionally, in an embodiment of the present application, the processor 1010 is further used to obtain the application running frame rate and the first drawing time of N frames of images before obtaining M operating frequencies, where the first drawing time is the average drawing time of the first N frames of images of the current frame, and N is a positive integer; and determine a target time based on the application running frame rate and the first drawing time; and, based on the target time, determine a first time period in the time period of drawing the current frame image.

[0195] Optionally, in the embodiment of the present application, the processor 1010 is specifically configured to determine a time period corresponding to a target duration starting from a start moment of a time period for drawing a current frame image as a first time period.

[0196] Optionally, in an embodiment of the present application, the processor 1010 is specifically used to determine a single-frame drawing time of a single-frame image based on an application running frame rate; and, between the single-frame drawing time and the first drawing time, determine a minimum drawing time; and, based on the minimum drawing time, determine a target time, the target time being less than the minimum drawing time.

[0197] Optionally, in the embodiment of the present application, the processor 1010 is specifically configured to determine a maximum operating frequency among the M operating frequencies as the first operating frequency.

[0198] In the electronic device provided by the embodiment of the present application, since the first time period and the second time period are time periods for executing the same frame drawing task (i.e., drawing the same frame image), the CPU in the electronic device has substantially the same requirements for DDR frequency in the first time period and the second time period. Therefore, the DDR frequency required by the CPU in the electronic device in the second time period determined based on the first operating frequency in the first time period is accurate, thereby adjusting the DDR frequency of the electronic device based on the DDR frequency, which can improve the accuracy of DDR frequency adjustment.

[0199] It should be understood that in the embodiment of the present application, the input unit 1004 may include a graphics processor (Graphics Processing Unit, GPU) 10041 and a microphone 10042, and the graphics processor 10041 processes the image data of the static picture or video obtained by the image capture device (such as a camera) in the video capture mode or the image capture mode. The display unit 1006 may include a display panel 10061, and the display panel 10061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 1007 includes a touch panel 10071 and at least one of other input devices 10072. The touch panel 10071 is also called a touch screen. The touch panel 10071 may include two parts: a touch detection device and a touch controller. Other input devices 10072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0200] The memory 1009 can be used to store software programs and various data. The memory 1009 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 1009 may include a volatile memory or a non-volatile memory, or the memory 1009 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM). The memory 109 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0201] The processor 1010 may include one or more processing units; optionally, the processor 1010 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 1010.

[0202] The embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, each process of the above-mentioned DDR frequency adjustment method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0203] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0204] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned DDR frequency adjustment method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0205] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0206] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned DDR frequency adjustment method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0207] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0208] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0209] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A DDR frequency adjustment method, characterized in that: The method comprises: Obtain M operating frequencies, each operating frequency being an average operating frequency of one of the M central processing units (CPUs) of the electronic device in a first time period, and M is a positive integer; Determining a first double data rate DDR frequency according to the M operating frequencies; adjusting the DDR frequency of the electronic device in a second time period according to the first DDR frequency; The first time period and the second time period are time periods in which the same frame of image is drawn, and the first time period is earlier than the second time period.

2. The method according to claim 1, characterized in that The obtaining of M operating frequencies comprises: Obtain M first working cycle numbers and M second working cycle numbers, wherein the M first working cycle numbers are the number of working cycles that the M CPUs have run at a first moment, and the M second working cycle numbers are the number of working cycles that the M CPUs have run at a second moment, the first moment is the start moment of the first time period, and the second moment is the end moment of the first time period; Based on the i-th first working cycle number, the i-th second working cycle number and the duration of the first time period, the i-th working frequency is determined to obtain the M working frequencies, i∈[1,M].

3. The method according to claim 1 or 2, characterized in that: Before acquiring the M operating frequencies, the method further includes: Obtaining the application running frame rate and the first drawing duration of N frames of images, where the first drawing duration is the average drawing duration of N frames of images before the current frame, and N is a positive integer; Determining a target duration based on the application running frame rate and the first drawing duration; The first time period is determined in a time period for drawing the current frame image according to the target time length.

4. The method according to claim 3, characterized in that The determining the first time period in the time period of drawing the current frame image according to the target time length includes: The time period corresponding to the target duration starting from the start time of the time period for drawing the current frame image is determined as the first time period.

5. The method according to claim 3, characterized in that: The determining the target duration based on the application running frame rate and the first drawing duration includes: Determining a single-frame drawing duration of a single-frame image based on the application running frame rate; Determine a minimum drawing duration between the single-frame drawing duration and the first drawing duration; Based on the minimum rendering time, the target time is determined, and the target time is smaller than the minimum rendering time.

6. A DDR frequency adjustment device, characterized in that: The device comprises an acquisition module, a determination module and an adjustment module; The acquisition module is used to acquire M operating frequencies, each operating frequency is an average operating frequency of one of the M CPUs of the electronic device in a first time period, and M is a positive integer; The determining module is used to determine a first DDR frequency according to the M operating frequencies; The adjustment module is used to adjust the DDR frequency of the electronic device in a second time period according to the first DDR frequency; The first time period and the second time period are time periods in which the same frame of image is drawn, and the first time period is earlier than the second time period.

7. The device according to claim 6, characterized in that The acquisition module is specifically used for: Obtain M first working cycle numbers and M second working cycle numbers, wherein the M first working cycle numbers are the number of working cycles that the M CPUs have run at a first moment, and the M second working cycle numbers are the number of working cycles that the M CPUs have run at a second moment, the first moment is the start moment of the first time period, and the second moment is the end moment of the first time period; Based on the i-th first working cycle number, the i-th second working cycle number and the duration of the first time period, the i-th working frequency is determined to obtain the M working frequencies, i∈[1,M].

8. The device according to claim 6 or 7, characterized in that The acquisition module is further used to acquire the application running frame rate and the first drawing time of N frames of images before acquiring the M working frequencies, wherein the first drawing time is the average drawing time of N frames of images before the current frame, and N is a positive integer; The determination module is further used to determine a target duration based on the application running frame rate and the first drawing duration; and, according to the target duration, determine the first time period in a time period for drawing the current frame image.

9. The device according to claim 8, characterized in that The determining module is specifically used for: The time period corresponding to the target duration starting from the start time of the time period for drawing the current frame image is determined as the first time period.

10. The device according to claim 8, characterized in that The determining module is specifically used for: Determining a single-frame drawing duration of a single-frame image based on the application running frame rate; Determine a minimum drawing duration between the single-frame drawing duration and the first drawing duration; Based on the minimum rendering time, the target time is determined, and the target time is smaller than the minimum rendering time.

11. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the DDR frequency adjustment method according to any one of claims 1 to 5 are implemented.

12. A readable storage medium, characterized in that: The readable storage medium stores a program or an instruction, and when the program or the instruction is executed by the processor, the steps of the DDR frequency adjustment method according to any one of claims 1 to 5 are implemented.

Images