Data processing method and device, storage medium and electronic equipment

Abstract

The invention discloses a data processing method and device, a storage medium and electronic equipment. The method relates to the technical field of computers, and comprises the steps that when it is detected that a target task is executed, synchronization abnormity is triggered, and the target task is a task corresponding to the consumed uncorrectable error memory; responding to the synchronization exception, and obtaining an initial exception context of the target task through trusted firmware; modifying the initial abnormal context through trusted firmware to obtain a target abnormal context, and injecting the target abnormal context into a kernel; exception handling is performed by the kernel based on the target exception context. According to the method and the device, the technical problem that the accuracy of exception handling is relatively low when exception triggered by UCE memory consumption is handled through a kernel in related technologies is solved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a data processing method and device, a storage medium, and an electronic device. Background Art

[0002] In hyperscale cloud computing data centers, server downtime rate has always been a key indicator for measuring RAS (Reliability, Availability and Serviceability), and is also the primary issue in meeting the SLA (Service Level Agreement) of cloud computing end users.

[0003] Unexpected system downtime not only affects the normal operation of tasks, but also damages the reputation of the enterprise. In computing clusters and data centers, the hardware and software density deployed on a single physical machine is getting higher and higher. Each physical machine can deploy hundreds of VMs (Virtual Machines) and 2,500 container instances. Although hardware failures rarely occur, any server downtime can result in huge cost losses. Memory failure is the main cause of server failures.

[0004] In the existing technology Firmware First (an error handling mode), the hardware memory error interrupt is first responded to by the firmware (Firmware), the firmware collects the hardware error information, and notifies the kernel (Kernel) of the hardware error information in the error record of the APEI (ACPI Platform Error Interfaces, an industry standard interface defined by the ACPI (Advance Configuration and Power Interface) specification. Then the kernel parses the error information according to the APEI specification and handles different error types separately. However, when the kernel handles the exception, it lacks the cause of the exception, the state of the PE (Processing Element, an entity that can execute the program) at the time of the exception, etc., and lacks the basis for judging whether the exception handling can be restored. Therefore, there is a problem of low accuracy in handling exceptions.

[0005] With respect to the problem in the above-mentioned related technologies that the accuracy of exception handling is relatively low when the kernel handles the exception triggered by the consumption of UCE memory, no effective solution has been proposed yet. Summary of the invention

[0006] The embodiments of the present application provide a data processing method and device, a storage medium, and an electronic device to at least solve the technical problem in the related art that when the kernel processes the exception triggered by the consumption of UCE memory, the accuracy of exception processing is relatively low.

[0007] According to one aspect of an embodiment of the present application, a data processing method is provided, comprising: triggering a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to consumption of uncorrectable error memory; in response to the synchronization exception, obtaining an initial exception context of the target task through a trusted firmware; modifying the initial exception context through the trusted firmware to obtain a target exception context, and injecting the target exception context into a kernel; and performing exception handling based on the target exception context through the kernel.

[0008] Further, modifying the initial exception context by the trusted firmware to obtain a target exception context includes: modifying the exception type in the initial exception context to obtain a modified initial exception context; and determining the modified initial exception context as the target exception context.

[0009] Furthermore, before executing exception handling based on the target exception context through the kernel, the method also includes: determining the target offset corresponding to the interrupt vector table in the kernel based on the exception level and stack pointer corresponding to the synchronization exception, and writing the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; modifying the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; switching from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jumping to the interrupt vector table of the kernel, so as to execute exception handling based on the target exception context through the kernel.

[0010] Furthermore, the method also includes: restoring the data information of the target task in the stack corresponding to the trusted firmware to the general register, wherein, after injecting the target exception context into the kernel, the kernel writes the data information of the target task in the general register into the stack corresponding to the kernel, so as to perform exception handling based on the target exception context through the kernel.

[0011] Furthermore, performing exception handling based on the target exception context by the kernel includes: judging whether the synchronization exception is a repairable exception based on the target exception context; if the synchronization exception is a repairable exception, determining the exception level of the trigger source corresponding to the synchronization exception based on the target exception context; and performing exception handling according to the exception level.

[0012] Furthermore, after detecting that a synchronization exception is triggered when the target task is executed, the method further includes: performing interrupt processing on the target task; performing exception processing according to the exception level, including: if the exception level is the level corresponding to when the target task is a host user-state task, then sending a bus error signal to the host user-state task through the exception processing function in the kernel; when the interrupt of the host user-state task is restored and the host user-state task has not set a signal processing function for processing the bus error signal, terminating the host user-state task based on the bus error signal.

[0013] Further, based on the exception level, executing exception handling includes: if the exception level is the level corresponding to when the target task is a kernel-mode task in the host machine, determining the target instruction address of the target task from the target exception context; based on the target instruction address, determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table; if the exception repair instruction address does not exist, executing downtime handling.

[0014] Furthermore, after determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table, the method also includes: if the exception repair instruction address exists, determining the exception repair instruction address as the target instruction address of the target task in the target exception context, and obtaining a repaired target exception context; based on the repaired target exception context, restoring the kernel-mode task of the host machine.

[0015] Furthermore, according to the exception level, executing exception handling includes: if the exception level is the level corresponding to when the target task is a virtual machine task, sending a bus error signal to the virtual machine simulator process through the exception handling function in the kernel, and the virtual machine task is implemented based on the virtual machine simulator process; when the interruption of the virtual machine task is restored, judging whether the virtual machine simulator process has a target function for processing the bus error signal; if the target function does not exist, terminating the virtual machine simulator process based on the bus error signal.

[0016] Furthermore, after determining whether the virtual machine simulator process has a target function for processing the bus error signal, the method also includes: if the target function exists, constructing a target exception type through the target function; injecting a virtual synchronization exception into the virtual machine kernel based on the target exception type; and performing exception handling through the virtual machine kernel.

[0017] According to another aspect of an embodiment of the present application, a data processing device is also provided, including: a trigger unit, used to trigger a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to the consumption of uncorrectable error memory; a first acquisition unit, used to respond to the synchronization exception and obtain an initial exception context of the target task through a trusted firmware; a first modification unit, used to modify the initial exception context through the trusted firmware to obtain a target exception context, and inject the target exception context into a kernel; and a first execution unit, used to perform exception handling based on the target exception context through the kernel.

[0018] Furthermore, the first modification unit includes: a modification subunit, used to modify the exception type in the initial exception context to obtain a modified initial exception context; an acquisition subunit, used to obtain the exception level and stack pointer corresponding to the synchronous exception; and a processing subunit, used to modify the modified initial exception context according to the exception level and stack pointer corresponding to the synchronous exception to obtain the target exception context.

[0019] Furthermore, the device also includes: a first determination unit, which is used to determine the target offset corresponding to the interrupt vector table in the kernel according to the exception level and stack pointer corresponding to the synchronization exception before performing exception handling through the kernel based on the target exception context, and write the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; a second modification unit, which is used to modify the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; a jump unit, which is used to switch from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jump to the interrupt vector table of the kernel, so as to perform exception handling based on the target exception context through the kernel.

[0020] Furthermore, the device also includes: a second acquisition unit, used to restore the data information of the target task in the stack corresponding to the trusted firmware to the general register, wherein, after injecting the target exception context into the kernel, the kernel writes the data information of the target task in the general register into the stack corresponding to the kernel, so as to perform exception processing based on the target exception context through the kernel.

[0021] Furthermore, the first execution unit includes: a judgment subunit, used to judge whether the synchronization exception is a repairable exception based on the target exception context; a determination subunit, used to determine the exception level of the trigger source corresponding to the synchronization exception based on the target exception context if the synchronization exception is a repairable exception; and an execution subunit, used to perform exception handling according to the exception level.

[0022] Furthermore, the device also includes: an interrupt unit, which is used to interrupt the target task after triggering a synchronization exception when detecting that the target task is executed; the execution sub-unit includes: a first sending module, which is used to send a bus error signal to the host user-state task through the exception handling function in the kernel if the exception level is the level corresponding to the target task being a host user-state task; and a first ending module, which is used to end the host user-state task based on the bus error signal when the interrupt of the host user-state task is restored.

[0023] Furthermore, the execution sub-unit includes: a determination module, which is used to determine the target instruction address of the target task from the target exception context if the exception level is the level corresponding to the target task being a kernel-mode task in the host machine; a first judgment module, which is used to judge whether there is an exception repair instruction address corresponding to the target instruction address in a preset exception table based on the target instruction address; and an execution module, which is used to perform downtime processing if the exception repair instruction address does not exist.

[0024] Furthermore, the device also includes: a second determination unit, which is used to determine whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table, and if the exception repair instruction address exists, determine the exception repair instruction address as the target instruction address of the target task in the target exception context to obtain a repaired target exception context; and a recovery unit, which is used to recover the kernel-mode task in the host machine based on the repaired target exception context.

[0025] Furthermore, the execution sub-unit includes: a second sending module, which is used to send a bus error signal to the virtual machine simulator process through the exception handling function in the kernel if the exception level is the level corresponding to the target task being a virtual machine task, and the virtual machine task is implemented based on the virtual machine simulator process; a second judgment module, which is used to judge whether the virtual machine simulator process has a target function for processing the bus error signal when the interruption of the virtual machine task is restored and the host user-mode task is not set with a signal processing function for processing the bus error signal; and a second ending module, which is used to end the virtual machine simulator process based on the bus error signal if the target function does not exist.

[0026] Furthermore, the device also includes: a construction unit, which is used to, after determining whether the virtual machine simulator process has a target function for processing the bus error signal, construct a target exception type through the target function if the target function exists; an injection unit, which is used to inject a virtual synchronization exception into the virtual machine kernel according to the target exception type; and a second execution unit, which is used to perform exception handling through the virtual machine kernel.

[0027] According to another aspect of an embodiment of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the storage medium is located is controlled to execute any one of the above-mentioned data processing methods.

[0028] According to another aspect of an embodiment of the present invention, there is further provided an electronic device, comprising a memory storing an executable program; and a processor for running the program, wherein the program executes any one of the above-mentioned data processing methods when running.

[0029] According to another aspect of an embodiment of the present invention, a computer program product is further provided. The computer program product includes a stored computer program. When the computer program is executed by a processor, any one of the above-mentioned data processing methods is implemented.

[0030] In an embodiment of the present application, the following steps are adopted: when detecting that a target task is executed, a synchronization exception is triggered, wherein the target task is a task corresponding to the consumption of uncorrectable error memory; in response to the synchronization exception, an initial exception context of the target task is obtained through a trusted firmware; the initial exception context is modified through the trusted firmware to obtain a target exception context, and the target exception context is injected into the kernel; exception processing is performed based on the target exception context by the kernel, thereby solving the technical problem in the related art that when the kernel processes the exception triggered by the consumption of UCE memory, there is a lack of exception context, which leads to relatively low accuracy of exception processing. In this solution, by modifying the initial exception context to obtain the target exception context, and injecting the target exception context into the kernel, the purpose of the kernel being able to perform exception processing in combination with the target exception context is achieved, thereby achieving the technical effect of improving the accuracy of exception processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0032] Figure 1 This is the process of the data processing method provided in Example 1 of this application Figure 1 ;

[0033] Figure 2 is a schematic diagram of abnormal levels provided according to Embodiment 1 of the present application;

[0034] Figure 3 It is a flow chart of exception handling in the prior art;

[0035] Figure 4 This is the process of the data processing method provided in Example 1 of this application Figure 2 ;

[0036] Figure 5 This is the process of the data processing method provided in Example 1 of this application Figure 3 ;

[0037] Figure 6 is a schematic diagram of a data processing device provided according to Embodiment 2 of the present application;

[0038] Figure 7 It is a structural block diagram of an electronic device provided according to Embodiment 3 of the present application. DETAILED DESCRIPTION

[0039] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0040] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0041] First, some nouns or terms that appear in the description of the embodiments of the present application are subject to the following explanations:

[0042] RAS: Reliability, Availability and Serviceability, computer system reliability, availability and serviceability;

[0043] SLA: Service Level Agreement, service level agreement;

[0044] UCE: Uncorrected Correctable Error, uncorrectable error;

[0045] SEA: Synchronous External Abort, a synchronous exception in the ARM architecture, refers to an exception triggered by an error when the processor tries to access an external memory location. This exception is related to the instruction currently executed by the processor;

[0046] ELx: Exception levels are referred to as EL <x>, with x as a number between 0 and 3, is a term used in the ARM architecture to define different privilege levels. These exception levels define the logical separation of software permissions. X is 0, 1, 2, 3;

[0047] TF-A: Trusted Firmware-A, a set of secure and trusted software components.

[0048] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards in the relevant regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0049] Example 1

[0050] According to an embodiment of the present application, a data processing method is also provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0051] This application provides Figure 1 The data processing method shown. Figure 1 The process of the data processing method according to the first embodiment of the present application Figure 1 The method comprises:

[0052] Step S101, triggering a synchronization exception when detecting that a target task is being executed, wherein the target task is a task corresponding to consumption of uncorrectable error memory.

[0053] Optionally, the concept of privilege level in ARMv8-A is called exception level (EL), which is a logical division of the privilege level at which the program runs. The exception level is divided into the following four types. Note that the larger the number, the higher the privilege. In order to optimize the virtualization context switching overhead caused by multiple exception levels, ARMv8.1 introduced the virtual host extension feature (VHE). Both the Linux kernel and KVM are executed in EL2, which can reduce the number of mode switches between EL1 and EL2 and achieve higher performance.

[0054] like Figure 2 As shown, for the host user state, that is, Host App(s) and the client user state, that is, Guest App(s), they run at EL0, which is a non-privileged level with the lowest execution privileges. For the client kernel state, that is, Guest OS runs at EL1, which is usually used to run the operating system kernel, has privileges, can access more system resources and perform privileged operations. For the host kernel state, that is, Host OS runs at EL2, EL2 provides support for virtualization and can be used to run management programs (virtual machine monitors, Hypervisors). For Secure Monitor / Firmware, it runs at EL3, EL3 provides a secure state switching function, which is usually used to run security monitoring programs. The above-mentioned TF-A (trusted firmware) runs at EL3.

[0055] The prior art implements a solution for SDEI (Software Delegated Exception Interface, a software delegate exception handling interface used by the non-secure world to register the processor with the firmware to receive system event notifications) notifications to handle SEA. After the UCE error memory (i.e. the uncorrectable error memory mentioned above) is accessed, a synchronous exception is triggered. The kernel first marks the memory page as "poisoned", terminates the process that maps the page, and avoids using the page in the future, thereby isolating the UCE error. The process is as follows: Figure 3 As shown, the specific steps include:

[0056] Step 1, Task: The user-mode EL0 task initiates a read request to access the UCE error memory, i.e., the user-mode task consumes poison;

[0057] Step 2, Hardware: Generates a synchronization exception (SEA);

[0058] Step 3: The task is preempted and falls into EL3 where TF-A (trusted firmware) handles the exception.

[0059] Step 4, TF-A: Save the interrupted task context, recorded as Secure Context;

[0060] Step 5, TF-A: respond to synchronization exceptions, collect the physical address of the error, etc., and record the error information in APEI format;

[0061] Step 6, TF-A: Notify the kernel of the error through the SDEI event;

[0062] Step 7, Kernel: SDEI processing function, parses the physical address of the UCE error from the APEI record, marks the corresponding memory page as poisoned and isolates it, and releases the address mapping of the user-mode task;

[0063] Step 8, kernel: complete SDEI event and return to EL3;

[0064] Step 9, TF-A: After restoring the interrupted task context using Secure Context, return to the preempted task;

[0065] Step 10: After the exception returns, the PC (Program Counter, pointing to the address of the instruction that caused the exception) is the current instruction, and the user-mode task re-accesses the unmapped page;

[0066] Step 11, triggering a page fault or page missing, and the kernel handles the page fault or page missing;

[0067] Step 12, kernel: The kernel sends a SIGBUS signal to the user-mode process to terminate the user-mode program.

[0068] The existing technology mainly has the following defects: The exception context lacks valid information: In the Firmware First mode, the task falls into EL3 after triggering SEA, so the preempted exception context scene is saved in the Firmware. The current SDEI implementation only provides a general register of the exception context scene. The kernel lacks the cause of the exception, the state of the PE at the time of the exception, etc., and lacks the basis for judging whether the exception handling can be restored. In addition, the above process can only use the technique of re-triggering page fault after the above exception to isolate and kill the user-mode task, and cannot handle the exception triggered by the kernel-mode task.

[0069] Lack of handling measures in the exception context: For the exception triggered when consuming poison, the current kernel lacks measures to handle kernel-mode consumption UCE errors. If the kernel-mode consumption UCE is simply treated as a recoverable error, that is, the mapping of the poison page is unmapped, then after the exception returns, the PC is the current instruction and the exception will be re-triggered. This cycle of triggering exceptions will eventually cause the system to become unavailable and crash.

[0070] In order to solve the above problems, the present application proposes a data processing method. When there is a process consumption poison, that is, when the uncorrectable error memory is accessed by the read request of the above target task, the hardware will trigger SEA (that is, the above-mentioned synchronization exception).

[0071] Step S102, in response to the synchronization exception, obtaining the initial exception context of the target task through the trusted firmware.

[0072] Optionally, when SCR_EL3.EA=1 (SCR_EL3 is a control register used to configure the security state and exception handling behavior. SCR_EL3.EA=1 means that external interrupts and error interrupts will be routed to EL3), after the software triggers SEA, the task is preempted and falls into EL3. The exception context is saved by TF-A. After error handling, TF-A restores the exception context of the task, and the task continues to run. This is the so-called Firmware First mode. When SCR_EL3.EA=0, after the software triggers SEA, the task is preempted and falls into EL2. The exception context is saved by the kernel. After error handling, the exception context of the task is restored by the kernel, and the task continues to run. This is the Kernel First mode. Normally, the hardware error register information is set to the Secure attribute, and the kernel runs in non-secure, and the kernel cannot obtain error information. Therefore, the Firmware First mode is adopted in this application.

[0073] Therefore, when SEA is triggered, the task is preempted and falls into EL3, which is processed by TF-A (the above-mentioned trusted firmware). That is, the trusted firmware responds to SEA and obtains the initial exception context of the interrupted task (the above-mentioned target task). It should be noted that the initial exception context will be saved in the EL3 system register. The initial exception context includes the exception type, the virtual address of the instruction when the exception occurs, and the PC when the exception occurs. The relevant EL3 system registers include:

[0074] ESR_EL3 (Exception Syndrome Register_EL3): Exception type (EC, Exception Class, used to indicate the cause of the exception trigger), synchronous error type (SET, Synchronous Error Type, describing the state of PE when the synchronous exception occurs), exception status code (DFSC, Data Fault Status Code, indicating the stage of the exception occurrence), etc.

[0075] FAR_EL3 (Fault Address Register_EL3): The virtual address of the instruction when the exception occurs;

[0076] ELR_EL3 (Exception Link Register_EL3): PC (Program Counter, program counter, pointing to the address of the instruction that caused the exception) when an exception occurs;

[0077] SPSR_EL3 (Save Run Status Register_EL3): The state PSTATE of PE when an exception occurs (meaning that when an exception occurs, the processor state (PSTATE) will be saved in SPSR_EL3).

[0078] It should be noted that when TF-A responds to SEA, it will also collect error record information, such as the physical address of the above-mentioned UCE error, so as to subsequently perform cause analysis on the above-mentioned exception based on the error record information.

[0079] Step S103, modifying the initial exception context through the trusted firmware to obtain a target exception context, and injecting the target exception context into the kernel.

[0080] Optionally, since the exception interrupt is routed to EL3, the corresponding initial exception context complies with EL3. In order to be able to inject the exception context into EL2 for processing, the initial exception context needs to be modified through TF-A to obtain the target exception context. It should be noted that the exception type of the initial exception context can be modified to obtain the target exception context. Finally, the target exception context is injected into EL2. By modifying the initial exception context and injecting the target exception context into EL2, the kernel of EL2 can process the exception context normally.

[0081] Step S104: Execute exception processing based on the target exception context through the kernel.

[0082] Optionally, the Kernel in EL2 (i.e., the kernel mentioned above) performs exception handling according to the injected target exception context. It should be noted that after the kernel performs exception handling based on the target exception context, it directly restores the interrupted task context in EL2, that is, returns to the preempted task through the ERET instruction, and there is no need to jump to EL3 to restore the interrupted task context.

[0083] For example, the exception level is determined according to the injected target exception context, and then different exception levels are processed accordingly. For example, if the exception level is EL0, the user-mode poisoned page is unmapped, and then the interrupted task is restored at EL2 according to the target exception context. The user-mode program reaccesses the unmapped page, triggering a page fault, which is handled by the kernel. The kernel sends a SIGBUS signal to the user-mode process to kill the user-mode program.

[0084] In summary, the following steps are adopted: when detecting that the target task is executed, a synchronization exception is triggered, wherein the target task is the task corresponding to the consumption of uncorrectable error memory; in response to the synchronization exception, the initial exception context of the target task is obtained through the trusted firmware; the initial exception context is modified through the trusted firmware to obtain the target exception context, and the target exception context is injected into the kernel; the kernel performs exception processing based on the target exception context, which solves the technical problem in the related technology that when the kernel processes the exception triggered by the consumption of UCE memory, there is a lack of exception context, which leads to relatively low accuracy of exception processing. In this scheme, by modifying the initial exception context, obtaining the target exception context, and injecting the target exception context into the kernel, the purpose of the kernel being able to perform exception processing in combination with the target exception context is achieved, thereby achieving the technical effect of improving the accuracy of exception processing.

[0085] In order to enable the Kernel in EL2 to process the exception context, in the data processing method provided in the first embodiment of the present application, the initial exception context is modified by the trusted firmware to obtain the target exception context, including: modifying the exception type in the initial exception context to obtain a modified initial exception context; and determining the modified initial exception context as the target exception context.

[0086] Optionally, ESR_EL3 is one of the most important registers for abnormal cause analysis under the ARM64 architecture. For example, after EL0 consumes poison, SEA will be triggered, and ESR_EL3 is 0x92000410. The important fields of ESR_EL3 are analyzed as follows:

[0087] Exception Class [31:26]: 0x24 0b100100 Data Abort from a lowerException level

[0088] Synchronous Error Type [12:11]: 0x0 0b00 Recoverable state

[0089] Data Fault Status Code [5:0]: 0x10 0b010000 Synchronous External abort, not on translation table walk or hardware update of translation table.

[0090] Since TF-A is in EL3, the software in Guest user mode, Guest kernel, Host kernel, and Host user mode all come from low-level exceptions from the perspective of TF-A after consuming poison to trigger SEA. Therefore, after triggering SEA from EL0, EL1, and EL2, the Exception Class of ESR_EL3 will indicate that the exception comes from a low-level exception, for example:

[0091] EC == 0b100000: Instruction Abort from a lower Exception level

[0092] EC == 0b100100: Data Abort exception from a lower Exception level.

[0093] Exceptions from EL0 and EL1 are still from low-level exceptions for EL2 and do not need to be modified. However, exceptions from EL2 are from current exceptions for EL2, so EC needs to be modified, that is, the exception type (EC) in the initial exception context is modified as mentioned above to obtain the modified initial exception context.

[0094] For example, the two ECs above are modified to:

[0095] EC == 0b100001: Instruction Abort taken without a change in Exceptionlevel

[0096] EC == 0b100101: Data Abort exception taken without a change inException level

[0097] That is, ESR_EL2 = ESR_EL3 | (1 << ESR_EC_SHIFT).

[0098] By modifying the exception type in the initial exception context, the target exception context that needs to be injected into the EL2 kernel can be obtained.

[0099] It should be noted that the modification of the initial exception context can be understood as that in TF-A of EL3, after the poison is constructed and consumed, the SEA exception triggers the target exception context that falls into EL2. Specifically, the EC in ESR_EL3 (Exception Syndrome Register_EL3) is modified to obtain the modified information, and written into ESR_EL2 (Exception Syndrome Register_EL2), and FAR_EL3 (Fault Address Register_EL3), ELR_EL3 (Exception Link Register_EL3) and SPSR_EL3 (Program State Controller_EL3) are copied and written into FAR_EL2 (Fault Address Register_EL2), ELR_EL2 (Exception Link Register_EL2) and SPSR_EL2 (Program State Controller_EL2).

[0100] Through the above modification of the exception context, from the kernel's perspective, TF-A's exception handling is transparent. After the software triggers SEA, the task exception context obtained by the kernel is exactly the same as the task exception context after triggering SEA in Kernel First mode. Therefore, the kernel can obtain complete exception context information and improve the accuracy of subsequent exception handling.

[0101] After constructing the target exception context, in order to be able to jump from EL3 to the exception handling function of EL2, before executing exception handling based on the target exception context through the kernel, the method also includes: obtaining the exception level and stack pointer corresponding to the synchronization exception; determining the target offset corresponding to the interrupt vector table in the kernel according to the exception level and stack pointer corresponding to the synchronization exception, and writing the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores the exception handling function, and the exception handling function is used to execute exception handling; modifying the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; switching from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jumping to the interrupt vector table of the kernel, so as to execute exception handling based on the target exception context through the kernel.

[0102] Optionally, ELR_EL3 needs to be modified so that the PC jumps to the kernel's interrupt vector table, specifically including: determining the offset of the exception vector table based on the exception level of the SEA source and the stack pointer used, i.e. using SPSR_EL3.M[3:0], and writing it into ELR_EL3 (i.e. the exception link register corresponding to the above-mentioned trusted firmware). It should be noted that the interrupt vector table stores the exception handling function, which is used to perform exception handling.

[0103] After triggering a synchronous exception and falling into EL3, the corresponding level information of triggering the synchronous exception is stored in SPSR_EL3 (i.e., the saved running status register), which is usually reflected in SPSR_EL3.M[3:2] and SPSR_EL3.M[0]. In this solution, in order to switch from EL3 to EL2 when executing the exception return instruction (ERET instruction), it is also necessary to modify the exception level (i.e., SPSR_EL3.M[3:2]) and stack pointer (i.e., SPSR_EL3.M[0]) in SPSR_EL3 (i.e., the saved running status register) to obtain the modified saved running status register, that is, it is necessary to modify SPSR_EL3.M[3:2] to EL2, and modify SPSR_EL3.M[0] to SP_ELX (the value of SP_ELX is 1).

[0104] Finally, the exception return instruction (ERET instruction) switches from EL3 to EL2 based on the target offset in the exception link register and the modified save run status register, and the PC jumps to the kernel's interrupt vector table so that subsequent exception handling can be performed by the kernel based on the target exception context.

[0105] It should be noted that the target offset corresponding to the interrupt vector table to be written in ELR_EL3 is determined according to SPSR_EL3.M[3:0], as shown in Table 1:

[0106] Table 1

[0107] Data processing method and device, storage medium and electronic device

[0108] The above-mentioned VBAR_EL2 (Vector Base Address Resister_EL3) is a system register used to store the base address of the interrupt vector table of the EL2 core, which includes the exception handling function (or exception handler) for handling exceptions.

[0109] By modifying ELR_EL3 and SPSR_EL3, it is ensured that EL3 switches to EL2, PC jumps to the kernel's interrupt vector table, and the SEA exception can be processed in EL2_Kernel later.

[0110] In order to make the task scene of the exception context equivalent to directly falling into EL2_Kernel after the task interruption after the exception injection, in the data processing method provided in the first embodiment of the present application, the method also includes: restoring the data information of the target task in the stack corresponding to the trusted firmware to the general register, so that after the target exception context is injected into the kernel, the kernel writes the data information of the target task in the general register into the stack corresponding to the kernel.

[0111] Optionally, when a synchronous exception is triggered and falls into EL3, the data information of the target task in the general register (i.e., 32 64-bit registers X0-X31 under the ARM64 platform) will be written into the stack of EL3 (i.e., the stack corresponding to the above-mentioned trusted firmware). In order to make the task scene of the exception context equivalent to directly falling into EL2_Kernel after the task interruption after the exception injection, the data information of the target task in the stack of EL3 needs to be restored to the general register first. After the target exception context is injected into the kernel and jumped to the kernel processing through ERET, the kernel will write the data information of the target task in the general register into the stack of EL2 (i.e., the stack corresponding to the above-mentioned kernel), so that the kernel performs exception processing based on the target exception context. Through the above processing process, the kernel can obtain the complete exception context when the target task triggers the exception, ensuring the normal processing process of subsequent exceptions.

[0112] How to perform exception handling is crucial. Therefore, in the data processing method provided in Example 1 of the present application, exception handling is performed by the kernel based on the target exception context, including: judging whether the synchronization exception is a repairable exception based on the target exception context; if the synchronization exception is a repairable exception, determining the exception level of the trigger source corresponding to the synchronization exception based on the target exception context; and performing exception handling according to the exception level.

[0113] Optionally, TF-A injects the complete exception context of the interrupted task into the kernel, the exception is switched from EL3 to EL2, and the PC jumps to the corresponding exception handling function in the kernel's exception vector table, such as el0t_64_sync_handler, which is responsible for handling synchronization exceptions from EL0, and el1h_64_sync_handler, which is responsible for handling synchronization exceptions from EL2. Note that el10_64_sync_handler has no practical significance and will end the operation immediately.

[0114] Furthermore, the kernel can directly obtain the exception context of the task by accessing the system registers, just like in kernel first mode. For example:

[0115] ESR_EL2: exception type (EC), PE error status (SET), exception status code (DFSC), etc.

[0116] FAR_EL2: The virtual address of the instruction when the exception occurs;

[0117] ELR_EL2: PC when an exception occurs;

[0118] SPSR_EL2: The state PSTATE of PE when the exception occurs.

[0119] First, the kernel determines whether SEA is recoverable based on ESR_EL2. In an optional embodiment, if the following three conditions are all met, it is recoverable:

[0120] Exception Class is Data abort or Instruction abort

[0121] SET is UER (i.e. Synchronous Error Type [12:11] is 0x0 0b00 Recoverablestate)

[0122] DFSC is SEA (that is, Data Fault Status Code [5:0] is 0x10 0b010000 SynchronousExternal abort, not on translation table walk or hardware update of translation table.

[0123] If the SEA does not meet the above three conditions, it is determined to be an unrecoverable error and needs to be immediately shut down for processing.

[0124] If the synchronization exception is a repairable exception, the exception level of the SEA error trigger source is determined according to SPSR_EL2.M[3:2]:

[0125] SPSR_EL2.M[3:2] == 0b10, the exception level of the SEA error trigger source is EL2

[0126] SPSR_EL2.M[3:2] == 0b01, the exception level of the SEA error trigger source is EL1

[0127] SPSR_EL2.M[3:2] == 0b00, the exception level of the SEA error trigger source is EL0

[0128] Process them separately.

[0129] The kernel can more accurately determine whether exception handling can be restored based on the injected target exception information, and can more accurately handle SEAs of different exception levels.

[0130] In order to improve the accuracy of SEA processing of different exception levels, in the data processing method provided in Example 1 of the present application, after detecting that the target task is executed and triggering a synchronization exception, the method also includes: interrupting the target task; based on the exception level, performing exception processing including: if the exception level is the level corresponding to when the target task is a host user-mode task, sending a bus error signal to the host user-mode task through the exception handling function in the kernel; when the interrupt of the host user-mode task is restored, terminating the host user-mode task based on the bus error signal.

[0131] Optionally, when a synchronous exception is triggered, the currently executing target task will be interrupted, and then, according to the exception level, exception handling is performed including the following steps: if the exception level is the level corresponding to when the target task is a host user-mode task (Host user-mode task), the exception handling function can be used to clearly identify it as a synchronous exception error. In memory_failure, the parameter is specified as MF_ACTION_REQUIRED, and a SIGBUS signal (the above-mentioned bus error signal) is sent directly to the host user-mode task, with an error code of BUS_MCEERR_AR 4. When the task exception context is restored to continue running (that is, when the interruption of the host user-mode task is restored), if the user-mode task has registered a SIGBUS signal processing function, the corresponding signal processing function is executed. It should be noted that how the signal processing function is processed can be set according to user needs.

[0132] If there is no signal processing function for processing SIGBUS, the host user mode task is terminated according to the SIGBUS signal. It should be noted that the level corresponding to the Host user mode is EL0.

[0133] By directly sending the SIGBUS signal to the host user-mode task, it is avoided that the page fault is triggered again to end the exception when the task exception context is restored and continues to run. Therefore, the processing efficiency of the host user-mode task can be effectively improved.

[0134] In order to improve the accuracy of SEA processing of different exception levels, in the data processing method provided in Example 1 of the present application, executing exception processing according to the exception level also includes: if the exception level is the level corresponding to when the target task is a kernel-mode task in the host machine, determining the target instruction address of the target task from the target exception context; based on the target instruction address, determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table; if the exception repair instruction address does not exist, executing downtime processing.

[0135] If there is an exception repair instruction address, the exception repair instruction address is determined as the target instruction address of the target task in the target exception context to obtain a repaired target exception context; based on the repaired target exception context, the kernel-mode task of the host machine is restored.

[0136] Optionally, if the exception level is the level corresponding to when the target task is a host kernel task (Host kernel task), it cannot be isolated by directly sending a SIGBUS signal. However, when the kernel implements memory copy, it can add a repair jump for memory access instructions such as LDTR / LDTRB / LDTRH, STTR / STTRB / STTRH, and record it in extable (i.e., the preset exception table mentioned above).

[0137] In an optional embodiment, the format of the exception table entry of extable is a four-tuple (insn, fixup, type, data): insn: PC of the current instruction (i.e., the target instruction address mentioned above); fixup: PC of the exception repair instruction (i.e., the exception repair instruction address mentioned above); type: type of exception repair; data: data of the exception repair (referring to the data returned when executing the exception repair instruction address). It should be noted that the level corresponding to the host kernel state task (Host kernel state task) is EL2.

[0138] Therefore, when the kernel processes the SEA triggered by the host kernel-mode task (Host kernel-mode task), it uses the interrupted task PC saved in ELR_EL2 to search for an exception table entry in extable, that is, it uses the target instruction address to determine whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table. If there is no corresponding fixup, the kernel directly crashes the system.

[0139] If there is an exception repair instruction address corresponding to the target instruction address in the exception table, the PC in the target exception context is modified to the fixup specified in the entry, that is, the exception repair instruction address is determined as the target instruction address of the target task in the target exception context to obtain the repaired target exception context. Finally, the kernel-mode task in the host machine is restored based on the repaired target exception context, and the re-executed task will jump to the modified new PC, thereby skipping the exception.

[0140] Compared with the SDEI solution in the prior art, for kernel-mode tasks, the exception context of the task cannot be effectively modified. After the exception is returned, the system returns to the current instruction, triggers the exception cyclically, and causes the system to be unavailable and finally crash. Through the above steps, when processing the SEA of kernel-mode tasks, the kernel can effectively modify the exception context of the task, realize error recovery of the task, and improve the accuracy of exception handling.

[0141] In order to improve the accuracy of SEA processing of different exception levels, in the data processing method provided in Example 1 of the present application, according to the exception level, performing exception processing includes: if the exception level is the level corresponding to the target task being a virtual machine task, sending a bus error signal to the virtual machine simulator process through the exception handling function in the kernel, and the virtual machine task is implemented based on the virtual machine simulator process; when the interruption of the virtual machine task is restored, determining whether the virtual machine simulator process has a target function for processing the bus error signal; if the target function does not exist, terminating the virtual machine simulator process based on the bus error signal.

[0142] Optionally, the virtual machine VM is a QEMU user state process (i.e., the above-mentioned virtual machine simulator process) for the Host. Therefore, if the exception level is the level corresponding to the target task being a virtual machine task (Guest task), firstly, the current processing method for the Host user state is used to send a SIGBUS signal (i.e., the above-mentioned bus error signal) to the QEMU process through the exception handling function in the kernel, and the error code is BUS_MCEERR_AR_4. When the exception of the virtual machine task is recovered, QEMU checks whether there is a target function for the user to handle the SIGBUS signal (for example, the target function is kvm_arch_on_sigbus_vcpu). If there is no corresponding target function, the virtual machine simulator process is terminated based on the bus error signal.

[0143] By sending the SIGBUS signal, page faults can be avoided from being triggered again, thus improving the efficiency of exception handling.

[0144] If a target function exists, in the data processing method provided in Example 1 of the present application, after determining whether a target function for processing a bus error signal exists in the virtual machine simulator process, the method further includes: constructing a target exception type through the target function; injecting a virtual synchronization exception into the virtual machine kernel based on the target exception type; and performing exception handling through the virtual machine kernel.

[0145] Optionally, if kvm_arch_on_sigbus_vcpu exists, kvm_arch_on_sigbus_vcpu constructs an ESR value (that is, the above-mentioned target exception type) when it is determined that the error code of SIGBUS is BUS_MCEERR_AR_4, and then injects a virtual synchronization exception (vSEA) into the virtual machine kernel according to the target exception type, and performs exception handling through the virtual machine kernel.

[0146] For the Guest Kernel (i.e. the virtual machine kernel mentioned above), the exception handling process is performed, just like receiving a hardware-triggered SEA, and the errors of user-mode tasks and kernel-mode tasks are handled separately. If it is a user-mode SEA error, a SIGBUS signal is sent to the user-mode process, and the user-mode process in the Guest is killed. If it is a kernel-mode SEA error, the interrupted task PC saved in ELR_EL1 is used to check whether there is an exception table entry in extable. If not, the system will crash immediately; if so, the PC of the exception context is modified to the fixp specified in the exception table entry. After the kernel restores the task's exception context, it will jump to the modified new PC.

[0147] In the data processing method provided in the first embodiment of the present application, the kernel can directly obtain the exception context of the task, such as the triggering cause of the SEA exception, the instruction PC that triggers the SEA, the running task, etc., by accessing the system register, just like the kernel first mode. When the kernel processes the SEA of a user-mode task, the kernel can directly obtain the exception cause of the task as a synchronous exception, and directly send a SIGBUS signal to avoid triggering a page fault again. When the kernel processes the SEA of a kernel-mode task, the kernel can effectively modify the exception context of the task and realize error recovery of the task. However, the SDEI solution in the prior art cannot effectively modify the exception context of the task for kernel-mode tasks, and in this solution, the advantages of the Firmware First mode can also be used to obtain hardware error record information so that operation and maintenance personnel can accurately locate the error unit of the hardware.

[0148] In an optional embodiment, the Figure 4 The flowchart shown implements exception handling, which specifically includes: step 1, software task: consume poison, (that is, the uncorrectable error is consumed); step 2, hardware: generate synchronization exception SEA; step 3, the task is preempted, falls into EL3 and TF-A handles the exception; step 4, TF-A: save the interrupted task context, recorded as EL3_STATE context; step 5, TF-A: respond to SEA, collect the physical address of the error, etc., and record the error information in APEI format so that the operation and maintenance personnel can accurately locate the error unit of the hardware; step 6, TF-A: modify the EL3_STATE context; step 7, TF-A: inject the modified EL3_STATE context into the kernel; step 8, kernel: exception handling function, repair the recoverable exception context, and complete the error handling process; step 9, kernel: after restoring the interrupted task context, return to the preempted task through the ERET instruction.

[0149] It should be noted that the EL3_STATE context includes exception-related system registers (i.e., the target exception context mentioned above) and general registers used by the interrupted task. Injecting the modified EL3_STATE context into the kernel includes: using the data of the system registers in the modified EL3_STATE to write to ESR_EL2, FAR_EL2, ELR_EL2, and SPSR_EL2, and then restoring the general registers of the interrupted task from the EL3 stack according to the Procedure Call Standard of the ARM64 architecture; using SPSR_EL3.M[3:0] to determine the offset of the exception vector table, writing it to ELR_EL3, modifying SPSR_EL3.M[3:2] to EL2, and modifying SPSR_EL3.M[0] to SP_ELX (the value of SP_ELX is 1). Finally, based on the modified ELR_EL3 and SPSR_EL3, the ERET instruction will complete the switch from EL3 to EL2, and jump the PC to the kernel's exception handling function.

[0150] In an optional embodiment, the Figure 5 The flowchart shown implements exception injection: Step 1, trigger SEA; Step 2, fall into EL3; Step 2.1, according to the Procedure Call Standard of the ARM64 architecture, write the general register value used by the target task into the stack of EL3; Step 2.2, modify the initial exception context, obtain the modified target exception context, and write the modified target exception context into EL2; Step 2.3, respond to SEA, collect the wrong physical address, etc., and record the error information in APEI format; Step 2.4, modify ELR_EL3 and SPSR_EL3 to jump to the interrupt vector table of the EL2_core, that is, ELR_EL3=VBAR_EL2+offset, SPSR_EL3.M[3:2]=EL2, SPSR_EL3.M[0]=SP_ELX (the value of SP_ELX is 1); Step 2.5, restore the task general register value saved in the stack of EL3 to the general register; Step 3, complete the exception switching and PC jump through the ERET instruction; Step 3.1, according to the Procedure Call Standard of the ARM64 architecture Standard, write the general register value used by the target task to the EL3 stack, step 3.3, perform exception handling in the EL2-core, step 3.4, restore the task general register value saved in the EL3 stack to the general register; step 4, resume the task from EL2 through the ERET instruction to continue running.

[0151] In the data processing method provided in the first embodiment of the present application, the following steps are adopted: when detecting that a target task is executed, a synchronization exception is triggered, wherein the target task is a task corresponding to the consumption of uncorrectable error memory; in response to the synchronization exception, the initial exception context of the target task is obtained through the trusted firmware; the initial exception context is modified through the trusted firmware to obtain the target exception context, and the target exception context is injected into the kernel; the kernel performs exception processing based on the target exception context, thereby solving the technical problem in the related art that when the kernel processes the exception triggered by the consumption of UCE memory, there is a lack of exception context, which leads to a relatively low accuracy of exception processing. In this solution, by modifying the initial exception context, obtaining the target exception context, and injecting the target exception context into the kernel, the purpose of the kernel being able to perform exception processing in combination with the target exception context is achieved, thereby achieving the technical effect of improving the accuracy of exception processing.

[0152] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0153] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.

[0154] Example 2

[0155] According to an embodiment of the present application, a data processing device for implementing the above data processing method is also provided. Figure 6 As shown, the device includes: a trigger unit 601, a first acquisition unit 602, a first modification unit 603 and a first execution unit 604.

[0156] A trigger unit 601 is used to trigger a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to consumption of an uncorrectable error memory;

[0157] A first acquisition unit 602 is used to respond to the synchronization exception and acquire the initial exception context of the target task through the trusted firmware;

[0158] A first modifying unit 603 is used to modify the initial exception context through the trusted firmware to obtain a target exception context, and inject the target exception context into the kernel;

[0159] The first execution unit 604 is configured to execute exception processing based on a target exception context through the kernel.

[0160] In the data processing device provided in the second embodiment of the present application, a trigger unit 601 triggers a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to consumption of uncorrectable error memory; a first acquisition unit 602 responds to the synchronization exception and obtains an initial exception context of the target task through a trusted firmware; a first modification unit 603 modifies the initial exception context through the trusted firmware to obtain a target exception context, and injects the target exception context into the kernel; a first execution unit 604 performs exception processing based on the target exception context through the kernel, thereby solving the technical problem in the related art that when the exception triggered by the consumption of UCE memory is processed through the kernel, there is a lack of exception context, which leads to relatively low accuracy of exception processing.

[0161] In this solution, by modifying the initial exception context to obtain the target exception context, and injecting the target exception context into the kernel, the kernel can perform exception handling in combination with the target exception context, thereby achieving the technical effect of improving the accuracy of exception handling.

[0162] Optionally, in the data processing device provided in Embodiment 2 of the present application, the first modification unit includes: a modification subunit, used to modify the exception type in the initial exception context to obtain a modified initial exception context; and a processing subunit, used to determine the modified initial exception context as the target exception context.

[0163] Optionally, in the data processing device provided in Example 2 of the present application, the device also includes: a first determination unit, used to determine the target offset corresponding to the interrupt vector table in the kernel according to the exception level and stack pointer corresponding to the synchronization exception before performing exception handling through the kernel based on the target exception context, and write the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; a second modification unit, used to modify the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; a jump unit, used to switch from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jump to the exception vector table of the kernel, so as to perform exception handling based on the target exception context through the kernel.

[0164] Optionally, in the data processing device provided in Example 2 of the present application, the device also includes: a second acquisition unit, used to restore the data information of the target task in the stack corresponding to the trusted firmware to the general register, wherein, after the target exception context is injected into the kernel, the data information of the target task in the general register is written into the stack corresponding to the kernel, so as to perform exception handling based on the target exception context through the kernel.

[0165] Optionally, in the data processing device provided in Example 2 of the present application, the first execution unit includes: a judgment subunit, used to judge whether the synchronization exception is a repairable exception based on the target exception context; a determination subunit, used to determine the exception level of the trigger source corresponding to the synchronization exception based on the target exception context if the synchronization exception is a repairable exception; and an execution subunit, used to perform exception handling according to the exception level.

[0166] Optionally, in the data processing device provided in Example 2 of the present application, the device also includes: an interrupt unit, which is used to interrupt the target task after triggering a synchronization exception when detecting that the target task is executed; the execution sub-unit includes: a first sending module, which is used to send a bus error signal to the host user-state task through an exception handling function in the kernel if the exception level is the level corresponding to the target task being a host user-state task; and a first ending module, which is used to end the host user-state task based on the bus error signal when the interrupt of the host user-state task is restored and the host user-state task is not set with a signal processing function for processing the bus error signal.

[0167] Optionally, in the data processing device provided in Example 2 of the present application, the execution sub-unit includes: a determination module, which is used to determine the target instruction address of the target task from the target exception context if the exception level is the level corresponding to the target task being a kernel-mode task in the host machine; a first judgment module, which is used to judge whether there is an exception repair instruction address corresponding to the target instruction address in a preset exception table based on the target instruction address; and an execution module, which is used to perform downtime processing if the exception repair instruction address does not exist.

[0168] Optionally, in the data processing device provided in Example 2 of the present application, the device also includes: a second determination unit, which is used to determine whether there is an exception repair instruction address corresponding to the target instruction address in a preset exception table, and if there is an exception repair instruction address, determine the exception repair instruction address as the target instruction address of the target task in the target exception context, so as to obtain a repaired target exception context; and a recovery unit, which is used to restore the kernel-mode task in the host machine based on the repaired target exception context.

[0169] Optionally, in the data processing device provided in Example 2 of the present application, the execution sub-unit includes: a second sending module, which is used to send a bus error signal to the virtual machine simulator process through the exception handling function in the kernel if the exception level is the level corresponding to the target task being a virtual machine task, and the virtual machine task is implemented based on the virtual machine simulator process; a second judgment module, which is used to judge whether the virtual machine simulator process has a target function for processing the bus error signal when the interruption of the virtual machine task is restored; and a second ending module, which is used to end the virtual machine simulator process based on the bus error signal if the target function does not exist.

[0170] Optionally, in the data processing device provided in Example 2 of the present application, the device also includes: a construction unit, which is used to construct a target exception type through the target function after determining whether there is a target function for processing a bus error signal in the virtual machine simulator process, if the target function exists; an injection unit, which is used to inject a virtual synchronization exception into the virtual machine kernel according to the target exception type; and a second execution unit, which is used to perform exception handling through the virtual machine kernel.

[0171] It should be noted here that the above-mentioned trigger unit 601, first acquisition unit 602, first modification unit 603 and first execution unit 604 correspond to steps S101 to S104 in Example 1, and the four units and the corresponding steps have the same instances and application scenarios, but are not limited to the contents disclosed in the above-mentioned Example 1.

[0172] It should be noted that the preferred implementation scheme involved in the above embodiments of the present application is the same as the scheme provided in Example 1, as well as the application scenario and implementation process, but is not limited to the scheme provided in Example 1.

[0173] Example 3

[0174] The embodiment of the present application may provide an electronic device, which may be any electronic device in an electronic device terminal group. Optionally, in this embodiment, the electronic device may also be replaced by a terminal device such as a mobile terminal.

[0175] Optionally, in this embodiment, the electronic device may be located in at least one network device among a plurality of network devices of a computer network.

[0176] In this embodiment, the above-mentioned electronic device can execute the program code of the following steps in the data processing method: when detecting that the target task is executed, triggering a synchronization exception, wherein the target task is the task corresponding to the consumption of uncorrectable error memory; in response to the synchronization exception, obtaining the initial exception context of the target task through the trusted firmware; modifying the initial exception context through the trusted firmware to obtain the target exception context, and injecting the target exception context into the kernel; performing exception handling based on the target exception context through the kernel.

[0177] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: modifying the initial exception context through the trusted firmware to obtain the target exception context includes: modifying the exception type in the initial exception context to obtain a modified initial exception context; obtaining the exception level and stack pointer corresponding to the synchronization exception; and determining the modified initial exception context as the target exception context.

[0178] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: before executing exception handling based on the target exception context through the kernel, the method also includes: determining the target offset corresponding to the interrupt vector table in the kernel based on the exception level and stack pointer corresponding to the synchronization exception, and writing the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; modifying the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; switching from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jumping to the exception vector table of the kernel, so as to execute exception handling based on the target exception context through the kernel.

[0179] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: restoring the data information of the target task in the stack corresponding to the trusted firmware to the general register, wherein, after injecting the target exception context into the kernel, the data information of the target task in the general register is written into the stack corresponding to the kernel, so as to perform exception processing based on the target exception context through the kernel.

[0180] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: performing exception handling based on the target exception context through the kernel includes: judging whether the synchronization exception is a repairable exception based on the target exception context; if the synchronization exception is a repairable exception, determining the exception level of the trigger source corresponding to the synchronization exception based on the target exception context; and performing exception handling according to the exception level.

[0181] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: when detecting that the target task is executed, after triggering a synchronization exception, the method also includes: interrupting the target task; executing exception processing according to the exception level, including: if the exception level is the level corresponding to when the target task is a host user-state task, then sending a bus error signal to the host user-state task through the exception handling function in the kernel; when the interrupt of the host user-state task is restored and the host user-state task has not set a signal processing function for processing the bus error signal, terminating the host user-state task based on the bus error signal.

[0182] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: according to the exception level, executing exception handling includes: if the exception level is the level corresponding to the target task being a kernel-mode task in the host machine, then determining the target instruction address of the target task from the target exception context; according to the target instruction address, judging whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table; if the exception repair instruction address does not exist, executing downtime handling.

[0183] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: after determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table, the method also includes: if the exception repair instruction address exists, the exception repair instruction address is determined as the target instruction address of the target task in the target exception context, and the repaired target exception context is obtained; based on the repaired target exception context, the kernel mode task of the host machine is restored.

[0184] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: according to the exception level, executing exception handling includes: if the exception level is the level corresponding to when the target task is a virtual machine task, then sending a bus error signal to the virtual machine simulator process through the exception handling function in the kernel, and the virtual machine task is implemented based on the virtual machine simulator process; when the interruption of the virtual machine task is restored, it is determined whether the virtual machine simulator process has a target function for processing the bus error signal; if the target function does not exist, then terminating the virtual machine simulator process based on the bus error signal.

[0185] The above-mentioned electronic device can execute the program code of the following steps in the data processing method: after determining whether the virtual machine simulator process has a target function for processing a bus error signal, the method also includes: if the target function exists, constructing a target exception type through the target function; injecting a virtual synchronization exception into the virtual machine kernel according to the target exception type; and performing exception handling through the virtual machine kernel.

[0186] Optionally, Figure 7 is a structural block diagram of an electronic device according to an embodiment of the present application. Figure 7 As shown, the electronic device 70 may include: one or more ( Figure 7 Only one is shown in the figure) processor 702, memory 704. The electronic device 70 may also include a storage controller, through which the memory 704 is controlled and managed; the electronic device 70 may also include a peripheral interface, through which the radio frequency module, audio module and display screen are connected.

[0187] Among them, the memory can be used to store software programs and modules, such as program instructions / modules corresponding to the data processing method and device in the embodiment of the present application. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, that is, realizing the above-mentioned data processing method. The memory may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely arranged relative to the processor, and these remote memories may be connected to the electronic device 70 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0188] The processor can call the information and application stored in the memory through the transmission device to perform the following steps: trigger a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to the consumption of uncorrectable error memory; respond to the synchronization exception, obtain the initial exception context of the target task through the trusted firmware; modify the initial exception context through the trusted firmware to obtain the target exception context, and inject the target exception context into the kernel; perform exception handling based on the target exception context through the kernel.

[0189] Optionally, the processor may also execute program code of the following steps: modifying the initial exception context through the trusted firmware to obtain the target exception context, including: modifying the exception type in the initial exception context to obtain a modified initial exception context; and determining the modified initial exception context as the target exception context.

[0190] Optionally, the processor may also execute the program code of the following steps: before executing exception handling based on the target exception context through the kernel, the method also includes: determining the target offset corresponding to the interrupt vector table in the kernel based on the exception level and stack pointer corresponding to the synchronization exception, and writing the target offset into the exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; modifying the exception level and stack pointer in the save running status register corresponding to the trusted firmware to obtain a modified save running status register; switching from the level where the trusted firmware is located to the level where the kernel is located based on the target offset in the exception link register and the modified save running status register through an exception return instruction, and jumping to the interrupt vector table of the kernel, so as to execute exception handling based on the target exception context through the kernel.

[0191] Optionally, the processor may also execute the following program code steps: restoring the data information of the target task in the stack corresponding to the trusted firmware to the general register, wherein, after injecting the target exception context into the kernel, the data information of the target task in the general register is written into the stack corresponding to the kernel, so as to perform exception handling based on the target exception context through the kernel.

[0192] Optionally, the processor may also execute program code of the following steps: performing exception handling based on the target exception context through the kernel, including: judging whether the synchronization exception is a repairable exception based on the target exception context; if the synchronization exception is a repairable exception, determining the exception level of the trigger source corresponding to the synchronization exception based on the target exception context; and performing exception handling according to the exception level.

[0193] Optionally, the processor may also execute program code for the following steps: when detecting that the target task is being executed and a synchronization exception is triggered, the method further includes: interrupting the target task; performing exception processing based on the exception level, including: if the exception level is the level corresponding to when the target task is a host user-state task, then sending a bus error signal to the host user-state task through the exception handling function in the kernel; when the interrupt of the host user-state task is restored and the host user-state task has not set a signal processing function for processing the bus error signal, terminating the host user-state task based on the bus error signal.

[0194] Optionally, the processor may also execute the following program code steps: based on the exception level, executing exception handling includes: if the exception level is the level corresponding to when the target task is a kernel-mode task in the host machine, determining the target instruction address of the target task from the target exception context; based on the target instruction address, determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table; if the exception repair instruction address does not exist, executing downtime handling.

[0195] Optionally, the processor may also execute the program code of the following steps: after determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table, the method further includes: if there is an exception repair instruction address, determining the exception repair instruction address as the target instruction address of the target task in the target exception context, and obtaining a repaired target exception context; based on the repaired target exception context, restoring the kernel-mode task on the host machine.

[0196] Optionally, the processor may also execute the following program code steps: based on the exception level, performing exception handling includes: if the exception level is the level corresponding to when the target task is a virtual machine task, sending a bus error signal to the virtual machine simulator process through the exception handling function in the kernel, and the virtual machine task is implemented based on the virtual machine simulator process; when the interruption of the virtual machine task is restored, determining whether the virtual machine simulator process has a target function for processing the bus error signal; if the target function does not exist, terminating the virtual machine simulator process based on the bus error signal.

[0197] Optionally, the processor may also execute the program code of the following steps: after determining whether the virtual machine simulator process has a target function for processing a bus error signal, the method further includes: if the target function exists, constructing a target exception type through the target function; injecting a virtual synchronization exception into the virtual machine kernel based on the target exception type; and performing exception handling through the virtual machine kernel.

[0198] It can be understood by those skilled in the art that Figure 7 The structure shown is for illustration only, and the electronic device 70 may also be a smart phone (such as an Android phone, an iOS phone, etc.), a tablet computer, a PDA, a mobile Internet device (Mobile Internet Devices, MID), a PAD, or other terminal devices. Figure 7 The structure of the electronic device is not limited. Figure 7 More or fewer components (such as network interfaces, display devices, etc.) shown in, or with Figure 7 Different configurations are shown.

[0199] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing the hardware related to the terminal device through a program, and the program can be stored in a computer-readable storage medium, and the storage medium may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0200] Example 4

[0201] An embodiment of the present application further provides a computer-readable storage medium. Optionally, in this embodiment, the above-mentioned computer program product can be used to store the program code executed by the data processing method provided in the above-mentioned embodiment 1.

[0202] Example 5

[0203] The embodiment of the present application further provides a computer program product. Optionally, in this embodiment, the computer program product can be used to store the program code executed by the data processing method provided in the first embodiment.

[0204] Optionally, in this embodiment, the computer program product may be located in any computer terminal in a computer terminal group in a computer network, or in any mobile terminal in a mobile terminal group.

[0205] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0206] In the above embodiments of the present application, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0207] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0208] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0209] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0210] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk, etc., which can store program code.

[0211] The above is only a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.< / x>

Claims

1. A data processing method, characterized in that: include: When detecting that a target task is executed, triggering a synchronization exception, wherein the target task is a task corresponding to consumption of uncorrectable error memory; In response to the synchronization exception, obtaining an initial exception context of the target task through the trusted firmware; Modifying the initial exception context by the trusted firmware to obtain a target exception context, and injecting the target exception context into the kernel; Exception handling is performed by the kernel based on the target exception context.

2. The method according to claim 1, characterized in that Modifying the initial exception context by the trusted firmware to obtain a target exception context includes: Modifying the exception type in the initial exception context to obtain a modified initial exception context; The modified initial exception context is determined as the target exception context.

3. The method according to claim 1, characterized in that Before performing, by the kernel, exception handling based on the target exception context, the method further includes: Determine a target offset corresponding to an interrupt vector table in the kernel according to an exception level and a stack pointer corresponding to the synchronization exception, and write the target offset into an exception link register corresponding to the trusted firmware, wherein the interrupt vector table stores an exception handling function, and the exception handling function is used to perform exception handling; Modify the exception level and stack pointer in the saved running status register corresponding to the trusted firmware to obtain a modified saved running status register; Through an exception return instruction, based on the target offset in the exception link register and the modified save run status register, the layer where the trusted firmware is located is switched to the layer where the kernel is located, and jumps to the interrupt vector table of the kernel, so as to perform exception handling based on the target exception context through the kernel.

4. The method according to claim 1, characterized in that: The method further comprises: The data information of the target task in the stack corresponding to the trusted firmware is restored to the general register, wherein, after the target exception context is injected into the kernel, the kernel writes the data information of the target task in the general register into the stack corresponding to the kernel, so as to perform exception handling based on the target exception context through the kernel.

5. The method according to any one of claims 1 to 4, characterized in that Performing exception handling based on the target exception context by the kernel includes: Determining whether the synchronization exception is a repairable exception based on the target exception context; If the synchronization exception is a repairable exception, determining the exception level of the trigger source corresponding to the synchronization exception based on the target exception context; Exception handling is performed according to the exception level.

6. The method according to claim 5, characterized in that After a synchronization exception is triggered when detecting that the target task is executed, the method further includes: Performing interrupt processing on the target task; According to the exception level, performing exception handling includes: If the exception level is the level corresponding to when the target task is a host machine user-mode task, sending a bus error signal to the host machine user-mode task through the exception handling function in the kernel; When the interruption of the host user-mode task is restored and no signal processing function for processing the bus error signal is set in the host user-mode task, the host user-mode task is terminated based on the bus error signal.

7. The method according to claim 5, characterized in that According to the exception level, performing exception handling includes: If the exception level is a level corresponding to when the target task is a kernel-mode task in the host machine, determining a target instruction address of the target task from the target exception context; According to the target instruction address, determining whether there is an exception repair instruction address corresponding to the target instruction address in a preset exception table; If the abnormal repair instruction address does not exist, the downtime processing is executed.

8. The method according to claim 7, characterized in that After determining whether there is an exception repair instruction address corresponding to the target instruction address in the preset exception table, the method further includes: If the exception repair instruction address exists, determining the exception repair instruction address as the target instruction address of the target task in the target exception context to obtain a repaired target exception context; Based on the repaired target exception context, the kernel-mode task in the host machine is restored.

9. The method according to claim 5, characterized in that According to the exception level, performing exception handling includes: If the exception level is the level corresponding to when the target task is a virtual machine task, a bus error signal is sent to a virtual machine simulator process through an exception handling function in the kernel, and the virtual machine task is implemented based on the virtual machine simulator process; When the interruption of the virtual machine task is restored, determining whether the virtual machine simulator process has a target function for processing the bus error signal; If the target function does not exist, the virtual machine simulator process is terminated based on the bus error signal.

10. The method according to claim 9, characterized in that After determining that the virtual machine simulator process has a target function for processing the bus error signal, the method further includes: If the target function exists, constructing the target exception type through the target function; Injecting a virtual synchronization exception into the virtual machine kernel according to the target exception type; Exception handling is performed through the virtual machine kernel.

11. A data processing device, characterized in that: include: A trigger unit, configured to trigger a synchronization exception when detecting that a target task is executed, wherein the target task is a task corresponding to consumption of an uncorrectable error memory; A first acquisition unit, configured to respond to the synchronization exception and acquire an initial exception context of the target task through a trusted firmware; A first modification unit, configured to modify the initial exception context through the trusted firmware to obtain a target exception context, and inject the target exception context into a kernel; A first execution unit is configured to execute exception processing based on the target exception context through the kernel.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the storage medium is located is controlled to execute the data processing method according to any one of claims 1 to 10.

13. An electronic device, characterized in that: include: A memory storing an executable program; A processor, used to run the program, wherein the program executes the data processing method according to any one of claims 1 to 10 when running.

14. A computer program product, characterized in that The computer program product comprises a stored computer program, and when the computer program is executed by a processor, the data processing method according to any one of claims 1 to 10 is implemented.

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