Performance prediction method and device, electronic equipment and readable storage medium

Abstract

The invention discloses a performance prediction method and device, electronic equipment and a readable storage medium, relates to the technical field of processors, is applied to the electronic equipment, and the electronic equipment comprises at least one processing core. Obtaining current target frequency information of at least one processing core, a first frequency of occurrence of at least one specified event and execution time information in a unit processing cycle; on the basis of the target frequency information, the first times and the execution time information, basic cycle information of each processing core under at least one to-be-operated frequency is predicted through a pre-trained performance prediction model, and the basic cycle information is used for representing the number of cycles spent for executing each instruction; basic time information is obtained, and the basic time information is used for representing time spent by the access operation; based on the base cycle information of the processing core, performance information of the processing core is determined. And the predicted performance information of the processing core has relatively high accuracy.

Description

Technical Field

[0001] The present application relates to the field of processor technology, and more specifically, to a performance prediction method, device, electronic device, and readable storage medium. Background Art

[0002] At present, with the development of electronic information technology, electronic devices can perform various load tasks through configured processing cores. Although the performance information of the processing core can be predicted and then the processing core can be controlled based on the predicted performance information, the accuracy of predicting the performance information of the processing core is currently low. Summary of the invention

[0003] The present application proposes a performance prediction method, device, electronic device and readable storage medium.

[0004] In a first aspect, an embodiment of the present application provides a performance prediction method, which is applied to an electronic device, wherein the electronic device includes at least one processing core, and the method includes: in response to a performance prediction request, obtaining current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing the performance state of the processing core, and the execution time information is used to characterize the time that the processing core is in a non-idle state; based on the target frequency information, the first occurrence number, and the execution time information, predicting the basic cycle information of each of the processing cores at at least one to-be-running frequency through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent to execute each instruction, and the basic time information is used to characterize the time spent on access operations; based on the basic cycle information of the processing core, determining the performance information of the processing core.

[0005] In a second aspect, an embodiment of the present application further provides a performance prediction device, which is applied to an electronic device, wherein the electronic device includes at least one processing core, and the device includes: an acquisition unit, a prediction unit, and a performance information determination unit. The acquisition unit is used to obtain the current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and the execution time information within a unit processing cycle in response to a performance prediction request, wherein the specified event includes an event used to characterize the performance state of the processing core, and the execution time information is used to characterize the time when the processing core is in a non-idle state; the prediction unit is used to predict the basic cycle information of each of the processing cores at at least one to-be-run frequency through a pre-trained performance prediction model based on the target frequency information, the first occurrence number, and the execution time information, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction, and the basic time information is used to characterize the time spent on access operations; the performance information determination unit is used to determine the performance information of the processing core based on the basic cycle information of the processing core.

[0006] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: one or more processors; a memory; and one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are configured to execute the method described in the first aspect.

[0007] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, in which a program code is stored. The program code can be called by a processor to execute the method described in the first aspect above.

[0008] The performance prediction method, device, electronic device and readable storage medium provided by the embodiment of the present application first respond to the performance prediction request, obtain the current target frequency information of at least one processing core, the first number of occurrences of at least one specified event and the execution time information within the unit processing cycle; then based on the target frequency information, the first number and the execution time information, predict the basic cycle information of each processing core at at least one frequency to be run through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction; obtain basic time information, wherein the basic time information is used to characterize the time spent on access operations; and then determine the performance information of the processing core based on the basic cycle information and basic time information of the processing core. Wherein, the specified event includes an event used to characterize the performance state of the processing core, and the execution time information is used to characterize the time when the processing core is in a non-idle state. In the present application, the frequency information, the execution time information and the first number of occurrences of the specified event are combined to comprehensively predict the basic cycle information at the frequency to be run, and then the performance information at the frequency to be run is calculated in combination with the basic time information, which has a high accuracy.

[0009] Other features and advantages of the embodiments of the present application will be described in the subsequent description, and partly become apparent from the description, or can be understood by practicing the embodiments of the present application. The purposes and other advantages of the embodiments of the present application can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0011] Figure 1 An application scenario diagram of the performance prediction method provided in an embodiment of the present application is shown;

[0012] Figure 2 A method flow chart of a performance prediction method provided by an embodiment of the present application is shown;

[0013] Figure 3 A method flow chart of a performance prediction method provided by another embodiment of the present application is shown;

[0014] Figure 4 A schematic diagram of determining a prediction model to be trained provided in an embodiment of the present application is shown;

[0015] Figure 5 A schematic diagram showing the acquisition target frequency information, the first number of times and the execution time information provided by an embodiment of the present application is shown;

[0016] Figure 6 A schematic diagram showing the relationship between the number of instructions per second IPS and the frequency provided in an embodiment of the present application is shown;

[0017] Figure 7 A method flow chart of a performance prediction method provided by another embodiment of the present application is shown;

[0018] Figure 8 A method flow chart of a performance prediction method provided by another embodiment of the present application is shown;

[0019] Fig. 9 A graph showing the relationship between the goodness of fit of the alternative prediction model provided by the embodiment of the present application and the number of specified events as input;

[0020] Fig.10 An analysis diagram showing the error rate of performance information of an embodiment of the present application;

[0021] Fig.11 The structure block diagram of the performance prediction device provided by the embodiment of the present application is shown;

[0022] Fig.12 A structural block diagram of an electronic device provided in an embodiment of the present application is shown;

[0023] Fig.13 A structural block diagram of a computer-readable storage medium provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0024] In order to make those skilled in the art better understand the present application scheme, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. The components of the embodiment of the present application usually described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiment of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiment of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0025] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0026] At present, with the development of electronic information technology, electronic devices can perform various load tasks through configured processing cores. Although the performance information of the processing core can be predicted, and then the processing core can be controlled based on the predicted performance information, the accuracy of the performance information of the processing core is currently low. How to improve the accuracy of the performance information of the processing core is an urgent problem to be solved.

[0027] It is understandable that the processing core of an electronic device can run at different frequencies to execute task loads. The processing core has different performance information at different frequencies. The performance information of the processing core can be characterized by the number of instructions per second (IPS) of the processing core. The number of instructions per second IPS has a certain relationship with the number of cycles per instruction (CPI), so the number of instructions per second IPS can be predicted by obtaining the number of cycles per instruction CPI at different frequencies. For example, the number of instructions per second IPS can be the frequency divided by the number of cycles per instruction CPI. Among them, the number of cycles per instruction CPI can be used to characterize the number of cycles required for the processing core to execute and access each instruction, and the number of instructions per second IPS can be used to characterize the number of instructions that the processing core can process per second.

[0028] At present, the number of cycles per instruction CPI can be directly regarded as an unchanging fixed value, thereby realizing the prediction of the number of cycles per instruction CPI. The number of cycles per instruction CPI can also be fitted, for example, by fitting the basic time information, and then obtaining the number of cycles per instruction CPI through the basic time information. Among them, the basic time information is used to characterize the time spent on access operations. For another example, the number of cycles per instruction CPI can also be predicted by a classifier.

[0029] However, the inventors found in their research that the number of cycles per instruction CPI will change with the frequency, so the above method of treating the number of cycles per instruction CPI as an unchanging fixed value to predict the performance information of the processing core has a low accuracy of the performance information obtained. In addition, the method of fitting the basic time information and then obtaining the number of cycles per instruction CPI through the basic time information, because the number of cycles per instruction CPI is not only affected by the frequency of the processing core, but also the cache frequency and memory frequency of the electronic device will affect the number of cycles per instruction CPI. Therefore, if various frequencies are not included as parameters during fitting, the accuracy of the number of cycles per instruction CPI obtained is still low. Furthermore, the method of predicting the number of cycles per instruction CPI based on the classifier is prone to the risk of overfitting, resulting in the accuracy of the prediction results being affected.

[0030] Therefore, in order to solve or partially solve the above problems, the present application provides a performance prediction method, device, electronic device and readable storage medium.

[0031] See also Figure 1 , Figure 1 The application scenario diagram of the performance prediction method provided in the embodiment of the present application is shown, namely, the performance prediction scenario 100, which may include an electronic device 110 and a user 120, wherein: Figure 1 The electronic device 110 shown in the figure is a smart phone. It can be understood that the electronic device can also be a smart home device, such as a smart speaker, a smart refrigerator, etc.

[0032] The user 120 holds the electronic device 110 and runs an application through the electronic device 110. The application generates a task load during operation, so that the processing core of the electronic device can execute the task load. The electronic device can determine the performance information of the processing core, and then control the processing core to execute the task load based on the performance information. For a detailed introduction to determining the performance information, please refer to the subsequent embodiments.

[0033] See also Figure 2 , Figure 2 A method flow chart of a performance prediction method provided by an embodiment of the present application is shown. The performance prediction method can be applied to Figure 1 The electronic device in the performance prediction scenario shown may specifically use the processing core of the electronic device as the execution subject of the performance prediction method. The performance prediction method may include steps S110 to S140.

[0034] Step S110: In response to a performance prediction request, obtain current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing the performance state of the processing core, and the execution time information is used to characterize the time that the processing core is in a non-idle state.

[0035] The performance prediction method may be applied to an electronic device, which may be configured with at least one processing core, so that the processing core may execute a task load to enable the electronic device to run an application.

[0036] The performance prediction request may be a detection that the current time is at a specified time, for example, the specified time may be a scheduling time determined based on a scheduling cycle of a processing core; for another example, the specified time may be a scheduling time determined based on a vertical synchronization signal (Vertical Synchronize Signa l, VSYNC) of a display screen. Thus, when the electronic device detects the performance prediction request, it may respond to the performance prediction request to obtain information related to the processing core.

[0037] For some implementations, the electronic device can obtain the current target frequency information of the processing core, the first occurrence number of at least one specified event, and the execution time information within the unit processing cycle, so as to determine the performance information of the processing core through the above-mentioned related information of the obtained processing core. As can be seen from the above introduction, the electronic device can include at least one processing core, so that the electronic device can obtain the above-mentioned related information of a processing core, and then determine the performance information of the processing core through the above-mentioned related information of the obtained processing core; the electronic device can also obtain the above-mentioned related information of multiple processing cores, so as to determine the performance information of each processing core through the above-mentioned related information of each processing core.

[0038] It should be noted that the above-mentioned related information includes the current target frequency information of the processing core, the first occurrence number of at least one specified event, and the execution time information within a unit processing cycle.

[0039] Among them, the specified events include events used to characterize the performance status of the processing core. Exemplarily, the specified events may include a translation lookaside buffer (TLB) miss, a branch prediction error, a front-end or back-end stall, a cache access count or a cache miss count, etc.

[0040] In addition, in a unit processing cycle, the processing core may be in an idle state (IDLE) for a part of the time and in a non-idle state for another part of the time. Therefore, the time when the processing core is in the non-idle state can also be represented by the execution time information.

[0041] The target frequency information may represent the current operating frequency of the processing core, such as 1 GHz, 2 GHz, etc.

[0042] In some embodiments, the electronic device may provide a performance monitoring unit (PMU) for the processing core, so that the number of times a specified event of the processing core occurs can be obtained through the performance monitoring unit. Among them, the performance monitoring unit may be of different types, so that the first number of occurrences of different specified events can be obtained through different types of performance monitoring units. Therefore, some types of performance monitoring units can be bound to the processing core in advance, so that the first number of occurrences of the specified event of the corresponding processing core can be directly obtained through the bound performance monitoring unit. Exemplarily, the performance monitoring unit can be used to obtain the first number of occurrences of the specified event shown in the above example; it can also be used to obtain the first number of occurrences of events such as the effective execution count (Inst_retired), the number of cycles (Cycles), the number of times data is read from the outside of the L2 cache to fill the L2 cache (L2d_cache_refill) or the number of times data is read from the outside of the L3 cache to fill the L3 cache (L3d_cache_refill).

[0043] Optionally, the electronic device may also provide an activity monitoring unit (AMU) for the processing core. Similar to the performance monitoring unit, the activity monitoring unit may also have different types, so that the first occurrence counts of different specified events can be obtained through different types of activity monitoring units. Exemplarily, the activity monitoring unit may be used to obtain the first occurrence counts of instruction counts, cycle counts, constant counts, or backend memory stall cycle events.

[0044] Exemplarily, the first number may be obtained in combination with an assembly language, and a detailed description may be found in subsequent embodiments.

[0045] In addition, the processing core can also read its own frequency as target frequency information, and can also read the time it is in a non-idle state within a unit cycle as execution time information within a unit processing cycle. Exemplarily, a software node can be set in the operating system running on the electronic device to collect the frequency of the processing core and the time of the non-idle state.

[0046] It should be noted that, in the case of multiple processing cores, each processing core obtains its own target frequency information, the first occurrence number of at least one specified event, and the execution time information within a unit processing cycle.

[0047] Step S120: Based on the target frequency information, the first number and the execution time information, the basic cycle information of each processing core at at least one running frequency is predicted through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction.

[0048] Then, the basic cycle information of the processing core at the frequency to be run can be predicted by a pre-trained performance prediction model.

[0049] Among them, the basic cycle information is used to characterize the number of cycles spent on executing each instruction. It is understandable that the task load will correspond to multiple instructions, so that the processing core can execute instructions to implement the execution task load. In some embodiments, the basic cycle information can be characterized by base_CPI. It is understandable that instructions can have different types, and therefore, different task loads can correspond to different types of instructions, so that under different task loads, the basic cycle information may be different.

[0050] In some embodiments, the basic cycle information of each of the processing cores at at least one frequency to be run can be predicted based on the target frequency information, the first number, and the execution time information through a pre-trained performance prediction model. Exemplarily, the target frequency information, the first number, and the execution time information can be input into the performance prediction model as input quantities of the performance prediction model, so as to obtain the basic cycle information at at least one frequency to be run. Among them, the frequency to be run can be the frequency at which the processing core can run. Exemplarily, if the frequency to be run is one, the performance prediction model will output the basic cycle information at the frequency to be run. In another exemplary embodiment, if the frequency to be run is multiple, that is, the performance prediction model will output the basic cycle information at each frequency to be run.

[0051] Among them, the frequency to be run can be automatically generated by the performance prediction model based on the parameters that have been trained in the training phase; or in the process of taking the target frequency information, the first number and the execution time information as input, the electronic device further generates at least one frequency to be run as an input, and inputs it into the performance prediction model together. The embodiments of the present application do not make specific limitations.

[0052] Step S130: Obtain basic time information, wherein the basic time information is used to represent the time taken for the access operation.

[0053] The basic time information is used to represent the time taken for the access operation.

[0054] From the above introduction, it can be known that the number of cycles per instruction CPI can be used to characterize the number of cycles required for the processing core to execute and access each instruction. Therefore, in some embodiments, the number of cycles per instruction CPI can be characterized as the product of the basic cycle information and the frequency of the processing core, and then the sum of the basic time information, and the basic time information can be characterized as the product of the remote request rate and the remote access cost. It can be seen that the basic time information will not be affected by the frequency of the processing core, however, the basic time information will be associated with the cache frequency, memory frequency, etc. of the electronic device. In some embodiments, the basic time information can be characterized by stall_SPI.

[0055] The basic time information can be regarded as an ideal value, which can generally be obtained by offline calculation. For example, the processing core can be controlled to be in a sample task load, so as to calculate the time spent by the processing core in the access operation under the sample task load, and use the basic time information as the basic time information.

[0056] Exemplarily, sample time information of executing instructions at multiple frequencies under a sample task load may be collected, and basic time information may be calculated by a difference method based on the sample time information.

[0057] For example, the basic time information can be obtained by respectively collecting the sample time information of the instructions corresponding to the sample task load at two frequencies under the sample task load, and then calculating by the difference method. Specifically, the basic time information can be calculated by the difference method based on the sample time information. The difference method is a method of calculating the slope through two frequency points. That is, the product of the sample time information corresponding to the first frequency and the first frequency can be subtracted from the product of the sample time information corresponding to the second frequency and the second frequency, and the difference obtained can be divided by the difference between the first frequency and the second frequency to obtain the basic time information.

[0058] Optionally, after the basic time information is predicted, the basic time information may be used to determine adjustments to the cache frequency and memory frequency.

[0059] Step S140: Determine the performance information of the processing core based on the basic cycle information and basic time information of the processing core.

[0060] Furthermore, after the basic cycle information and basic time information of the processing core are acquired, the performance information of the processing core may be determined based on the basic cycle information and basic time information of the processing core.

[0061] In some implementations, the performance information of the processing core can be characterized by the number of instructions per second (IPS) of the processing core. The number of instructions per second (IPS) is related to the frequency at which the processing core runs, the basic cycle information of the processing core, and the basic time information. Thus, for each frequency to be processed, the basic cycle information and basic time information corresponding to the frequency to be processed can be obtained through the above steps, and then the performance information of the processing core at the frequency to be processed can be determined by combining the frequency to be processed, the basic cycle information corresponding to the frequency to be processed, and the basic time information.

[0062] For example, see Figure 6 , Figure 6 A schematic diagram showing the relationship between instructions per second IPS and frequency provided in an embodiment of the present application is shown. Figure 6 A two-dimensional coordinate system 600 is shown in FIG. 6 , wherein the horizontal axis is frequency, in MHz, and the vertical axis is instructions per second IPS, in bars. Curve 610 is a curve showing the relationship between instructions per second IPS and frequency.

[0063] It is understandable that each processing core may correspond to multiple frequencies to be processed, so that the performance information of each processing core under multiple frequencies to be processed can be obtained. Therefore, the obtained performance information is related to the frequency to be processed, and the performance information is determined by determining the basic cycle information and basic time information corresponding to the frequency to be processed, which can improve the accuracy of the performance information.

[0064] For detailed methods of obtaining performance information, please refer to the introduction of subsequent embodiments.

[0065] The performance prediction method provided by the embodiment of the present application first responds to the performance prediction request, obtains the current target frequency information of at least one processing core, the first number of occurrences of at least one specified event, and the execution time information within the unit processing cycle; then, based on the target frequency information, the first number, and the execution time information, predicts the basic cycle information of each processing core at at least one frequency to be run through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction; obtains basic time information, wherein the basic time information is used to characterize the time spent on access operations; and then determines the performance information of the processing core based on the basic cycle information and basic time information of the processing core. Wherein, the specified event includes an event used to characterize the performance state of the processing core, and the execution time information is used to characterize the time when the processing core is in a non-idle state. In the present application, the frequency information, the execution time information, and the first number of occurrences of the specified event are combined to comprehensively predict the basic cycle information at the frequency to be run, and then the performance information at the frequency to be run is calculated in combination with the basic time information, which has a high accuracy.

[0066] See also Figure 3 , Figure 3 A method flow chart of a performance prediction method provided by an embodiment of the present application is shown. The performance prediction method can be applied to Figure 1 The electronic device in the performance prediction scenario shown may specifically use the processing core of the electronic device as the execution subject of the performance prediction method. The performance prediction method may include steps S210 to S280.

[0067] Step S210: In response to a performance prediction request, obtain current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing the performance state of the processing core, and the execution time information is used to characterize the time that the processing core is in a non-idle state.

[0068] Among them, step S210 has been introduced in detail in the above embodiment and will not be repeated here.

[0069] See also Figure 5 , Figure 5 A schematic diagram of collecting target frequency information, first number and execution time information in an embodiment of the present application is shown. Figure 5 Includes steps S211 to S215.

[0070] Step S211: The performance monitoring unit is bound to the processing core.

[0071] Step S212: Record the target frequency information, the first number and the execution time information.

[0072] Step S213: Whether a performance prediction request is detected.

[0073] Step S214: Detect a performance prediction request and output target frequency information, first count, and execution time information.

[0074] Step S215: If no performance prediction request is detected, the execution record target frequency information, the first number, and the execution time information are returned.

[0075] It should be noted that the recording of the target frequency information, the first number and the execution time information is a real-time recording inside the electronic device and is not affected by the performance prediction request. When a performance prediction request is detected, the execution can jump to step S214 to output the target frequency information, the first number and the execution time information.

[0076] If no performance prediction request is detected, the process returns to step S213.

[0077] Step S220: Obtain sample data and standard information corresponding to the sample data, wherein the sample data includes sample frequency information of each processing core under the sample task load, the sample number of occurrences of each specified event, and sample execution time information within a unit processing cycle, and the standard information includes standard basic cycle information, and the standard basic cycle information is used to characterize the number of cycles spent on executing each instruction under the sample task load.

[0078] In order to train the model to be trained to obtain a performance prediction model, the sample data used for training and the standard information corresponding to the sample data can be first obtained. The standard information can be used to characterize the standard basic cycle information corresponding to the processing core when the sample data corresponds. The standard basic cycle information is used to characterize the number of cycles spent executing each instruction under the sample task load. It can be understood that the standard basic cycle information can be regarded as the accurate value of the processing core obtained under the sample data.

[0079] Among them, the sample data includes the sample frequency information of each processing core under the sample task load, the sample number of occurrences of each specified event, and the sample execution time information within the unit processing cycle, which is similar to the target frequency information, first number and execution time information introduced in the previous embodiment, and will not be repeated here.

[0080] For some implementations, in order to obtain sample data and standard information, step S220 may further include steps S221 to S225.

[0081] Step S221: Obtain a sample task load, and control each of the processing cores to execute the sample task load.

[0082] Step S222: collecting the second frequency information of each processing core when executing the sample task load as the sample frequency information.

[0083] Step S223: Collect the second number of occurrences of each specified event when each processing core executes the sample task load as the sample number.

[0084] In some implementations, the application can be set so that the application can generate different sample task loads, so that each sample task load is executed by the processing core, and then the frequency information of the processing core under the sample task load is collected as the sample frequency information; the number of occurrences of each specified event of the processing core under the sample task load is collected as the sample number; the execution time information of the processing core within a unit processing cycle under the sample task load is collected as the sample execution time. Exemplarily, the above-mentioned application can include mibench, Lmbench or SPEC2006. Specifically, for example, the basic item Benchmark in mibench, Lmbench or SPEC2006 can be set to obtain different sample task loads.

[0085] Optionally, among the sample data obtained above, a part of the sample data can be used for subsequent model training, that is, a part of the sample data is used as a training set, and then another part of the sample data is used to test the trained model, that is, the other part of the sample data is used as a test set. Exemplarily, the corresponding sample data generated by the mibench and Lmbench applications can be used as a training set, and the corresponding sample data generated by the SPEC2006 application can be used as a test set. Thus, overfitting of the model can be avoided to a certain extent.

[0086] After the sample task load is acquired, each processing core may be controlled to execute the sample task load. Specifically, each processing core may be controlled to execute each sample task load.

[0087] Thus, the second frequency information of each processing core when executing the sample task load can be collected as the sample frequency information. That is, each processing core can have corresponding second frequency information when executing each sample task load, and the second frequency information is the sample frequency information.

[0088] Furthermore, the second number of occurrences of each designated event when each processing core executes the sample task load can be collected as the sample number of times. In other words, the number of occurrences of the designated event when each processing core executes the sample task load is the second number of times.

[0089] For some implementations, step S223 may include step S2231 and step S2232.

[0090] Step S2231: Search for the registers used to store the second occurrence number of each specified event.

[0091] Step S2232: Access each register through assembly language to obtain the second number of occurrences of each specified event when each processing core executes the sample task load.

[0092] The electronic device may be configured with a register, and the register may be used to store the second number of occurrences of each specified event. For example, the electronic device may be configured with a register for each specified event, so that the register may store the second number of occurrences of each specified event when each processing core executes the sample task load.

[0093] For some implementations, each register may be accessed through assembly language to obtain the second occurrence number of each specified event when each processing core executes the sample task load, thereby reducing the time cost of obtaining the second occurrence number.

[0094] Step S224: collecting the second execution time information of each processing core in a unit processing cycle when executing the sample task load as the sample execution time information, and the sample frequency information, sample number and sample execution time information as the sample data.

[0095] Step S225: Collect sample cycle information of instructions executed at multiple frequencies under the sample task load, and calculate the standard basic cycle information based on the sample cycle information by using the difference method.

[0096] Furthermore, second execution time information of each processing core executing the sample task load within a unit processing cycle may be collected as the sample execution time information, wherein the second execution time information may be directly read by each processing core.

[0097] Therefore, the sample frequency information, sample times and sample execution time information can be used as the sample data. It should be noted that the sample frequency information, sample times and sample execution time information obtained when a processing core is under the same sample load can be used as the sample data of the processing core under the sample load.

[0098] In addition, standard basic cycle information can also be calculated. The standard basic cycle information can be regarded as an ideal value, which can generally be obtained by offline calculation. Exemplarily, sample cycle information of executing instructions at multiple frequencies under a sample task load can be collected, and the standard basic cycle information can be calculated by difference method based on the sample cycle information.

[0099] For example, the sample cycle information of the instructions corresponding to the sample task load can be collected at two frequencies under the sample task load, and then the standard basic cycle information can be calculated by the difference method. Specifically, the standard basic cycle information can be calculated by the difference method based on the sample cycle information. The difference method is a method of calculating the slope through two frequency points. That is, the product of the sample cycle information corresponding to the first frequency and the first frequency can be subtracted from the product of the sample cycle information corresponding to the second frequency and the second frequency, and the difference obtained can be divided by the difference between the first frequency and the second frequency to obtain the standard basic cycle information.

[0100] It should be noted that the standard basic cycle information obtained when a processing core is under the same sample load may be used as the standard information corresponding to the processing core under the sample load.

[0101] Optionally, the standard information may be obtained by modifying the operating system kernel of the electronic device.

[0102] In some implementations, the sample data to be detected and the standard information to be detected corresponding to the sample data to be detected may be first obtained; and then the standard information to be detected may be cleaned to obtain the sample data and the standard information. Specifically, step S220 may also include steps S227 to S229.

[0103] Step S227: Acquire the sample data to be detected and the standard information to be detected corresponding to the sample data to be detected.

[0104] Step S228: performing data cleaning on the standard information to be detected, and determining abnormal information in the standard information to be detected.

[0105] Step S229: remove the abnormal information in the standard information to be detected, and obtain the remaining standard information to be detected as the standard information, and use the sample data to be detected corresponding to the standard information as the sample data.

[0106] The method of obtaining the sample data to be detected and the standard information to be detected corresponding to the sample data to be detected is similar to the method of obtaining the sample data and the standard information corresponding to the sample data in the aforementioned steps S221 to S226, and will not be repeated here.

[0107] Furthermore, the standard information to be detected can be cleaned to determine abnormal information in the standard information to be detected. The standard information to be detected that is determined to be abnormal information generally has abnormal characteristics, such as a significant jump between the standard information to be detected and other standard information to be detected. Therefore, the standard information to be detected can be cleaned based on the abnormal characteristics.

[0108] Then, the abnormal information in the standard information to be detected can be removed to obtain the remaining standard information to be detected as the standard information, and the sample data to be detected corresponding to the standard information is used as the sample data.

[0109] Step S230: input the sample frequency information, sample times and sample execution time information into the prediction model to be trained to obtain the initial basic cycle information output by the prediction model to be trained.

[0110] After the sample data is obtained, the prediction model to be trained can be trained by the sample data. Specifically, the sample frequency information, the number of samples and the sample execution time information can be first input into the prediction model to be trained to obtain the initial basic cycle information output by the prediction model to be trained.

[0111] The initial basic cycle information is the number of cycles that the processing core takes to execute each instruction, which is predicted by the prediction model to be trained combined with the input amount.

[0112] The prediction model to be trained may be pre-acquired, and the prediction model to be trained may be used to output the initial basic cycle information. For a detailed introduction to acquiring the prediction model to be trained, please refer to the subsequent steps.

[0113] Optionally, for some implementations, different designated events may be adjusted as inputs of the initial prediction model to construct a model to obtain multiple candidate prediction models, and then the prediction model to be trained may be determined from the multiple candidate prediction models. Specifically, before step S230, steps S2301 to S2305 may also be included.

[0114] Step S2301: Obtain the first quantity of the specified event.

[0115] Step S2302: Select a second number of the specified events from the multiple specified events respectively to construct multiple candidate event sets, wherein the second number includes all positive integers from 1 to the first number.

[0116] Step S2303: construct a model using the first occurrence number of the specified event in each candidate event set, the sample frequency information and the sample execution time information as input quantities of the initial prediction model to obtain an alternative prediction model corresponding to each candidate event set.

[0117] Step S2304: Obtain the goodness of fit of each of the candidate prediction models.

[0118] Step S2305: Determine the prediction model to be trained based on the goodness of fit of each candidate prediction model.

[0119] It is understandable that if the first number of occurrences of a large number of specified events is used as the input of the initial prediction model to construct the model, the basic cycle information output by the model after training can be more accurate. However, the model constructed by using the first number of occurrences of a large number of specified events as the input of the initial prediction model has a large performance overhead for the electronic device, and the amount of data required to be obtained as input in each stage such as training, verification, and reasoning is also large. If only the first number of occurrences of a small number of specified events is used as the input of the initial prediction model to construct the model, the basic cycle information output by the model after training will be less accurate.

[0120] Therefore, in the embodiment provided in the present application, the first number of specified events can be first obtained. The first number is used to characterize the number of specified events that can be collected by the processing core of the electronic device. Exemplarily, if the processing core of the electronic device is ARM-cortexA710 or A510, the number of specified events that the processing core can support collection is 8, so that for the case where the processing core is ARM-cortexA710 or A510, the first number is 8.

[0121] Furthermore, a second number of the specified events can be selected from the multiple specified events to construct multiple candidate event sets, wherein the second number includes all positive integers from 1 to the first number. For example, continuing to use the first number of 8 as an example, the second number includes 1, 2, 3, 4, 5, 6, 7 and 8.

[0122] When the second number is 1, one candidate event set may include one designated event; when the second number is 2, one candidate event set may include any two designated events; when the second number is 3, 4, or even 8, one candidate event set may include any second number of designated events. Thus, multiple candidate event sets may be obtained, and each candidate event set includes at least one designated event.

[0123] Then, the model is constructed by taking the first number of occurrences of the specified event in each candidate event set, the sample frequency information, and the sample execution time information as the input of the initial prediction model, and obtaining the candidate prediction model corresponding to each candidate event set. Among them, the input of each candidate prediction model includes the sample frequency information and the sample execution time information. In addition, the input of the candidate prediction model corresponding to each candidate event set also includes the first number of occurrences of the specified event in the candidate event set. Thus, the candidate prediction model including a variety of different inputs can be constructed.

[0124] Exemplarily, if the specified events included in the alternative event set are conversion lookaside buffer misses and branch prediction errors, the input quantities of the alternative prediction model corresponding to the alternative events may include the first number of occurrences of the conversion lookaside buffer misses and branch prediction error events, the first number of occurrences of the branch prediction error events, sample frequency information, and sample execution time information.

[0125] The alternative prediction model is obtained by adjusting the input of the initial prediction model on the basis of the initial prediction model. The initial prediction model can be constructed by combining the fitting formula of the number of instructions per second IPS, and the initial prediction model can be used to predict the basic cycle information. The above fitting formula can refer to the following formula (1).

[0126]

[0127] Among them, Ei can be used to represent the first number, βi is used to represent the fitting coefficient corresponding to the specified event, and instruction is used to represent the instruction.

[0128] Furthermore, after obtaining multiple candidate prediction models, in order to select a prediction model to be trained from the candidate prediction models, the goodness of fit of each candidate prediction model can be obtained. 2 To evaluate the goodness of fit of the alternative prediction model, R 2 is the goodness of fit coefficient (Coefficient of Determination). In some embodiments, R 2 The value of is usually between 0 and 1. 2 The closer the value is to 1, the better the fitting effect of the alternative prediction model is.

[0129] That is to say, after obtaining multiple candidate prediction models, the R of each candidate prediction model can be generated. 2 Then, the prediction model to be trained is determined based on the goodness of fit of each candidate prediction model.

[0130] For some implementations, step S2305 may further include step S23051.

[0131] Step S23051: taking the candidate prediction model with the highest goodness of fit as the prediction model to be trained.

[0132] That is, the highest goodness of fit among the candidate goodness of fit can be found, and then the candidate prediction model corresponding to the highest goodness of fit is used as the prediction model to be trained. Thus, the accuracy and stability of the subsequent fitting of the obtained model to be trained can be ensured.

[0133] For some other implementations, step S2305 may also include steps S23052 to S23056.

[0134] Step S23052: respectively determine the highest goodness of fit among the goodness of fit of the candidate prediction models corresponding to each positive integer in the second quantity as the candidate goodness of fit corresponding to the positive integer.

[0135] Step S23053: Obtain a second difference between the alternative goodness of fit corresponding to each positive integer plus 1 in the second number and the alternative goodness of fit corresponding to the positive integer.

[0136] Step S23054: Determine the smallest positive integer that meets the target condition from the second quantity as the target positive integer, and the alternative goodness of fit corresponding to the target positive integer is the target goodness of fit, wherein the target condition includes that the corresponding second difference is less than or equal to a specified threshold.

[0137] Step S23055: taking the candidate prediction model corresponding to the target goodness of fit as the prediction model to be trained.

[0138] From the above introduction, it can be known that the second number includes multiple positive integers, specifically including all positive integers from 1 to the first number. Each positive integer can correspond to multiple candidate event sets, and each candidate event set can correspond to an alternative prediction model, so it can be known that each positive integer can correspond to multiple alternative prediction models.

[0139] Therefore, the highest goodness of fit among the goodness of fit of the alternative prediction models corresponding to each positive integer in the second quantity can be determined as the alternative goodness of fit corresponding to the positive integer. Exemplarily, if the goodness of fit of the alternative prediction model corresponding to the positive integer 1 includes 0.1, 0.2, 0.3, 0.24, 0.5, 0.34, 0.55 and 0.6 respectively, then it can be determined that the highest goodness of fit among the goodness of fit of the alternative prediction model corresponding to the positive integer 1 is 0.6, so that 0.6 can be used as the alternative goodness of fit corresponding to the positive integer 1. Similarly, the alternative goodness of fit corresponding to each positive integer can be determined. It should be noted that the second difference between the alternative goodness of fit corresponding to the positive integer plus 1 and the alternative goodness of fit corresponding to the positive integer can be regarded as the second difference corresponding to the positive integer.

[0140] Further, a second difference between the alternative goodness of fit corresponding to each positive integer plus 1 in the second quantity and the alternative goodness of fit corresponding to the positive integer can be obtained. Exemplarily, if the alternative goodness of fit corresponding to the positive integer 1 is 0.5, the positive integer 1+1 is the positive integer 2, and the alternative goodness of fit corresponding to the positive integer 2 is 0.54, then the second difference corresponding to the positive integer 1 can be determined based on 0.54 and 0.5.

[0141] For example, the quotient of the difference between the alternative goodness of fit corresponding to the positive integer plus 1 and the alternative goodness of fit corresponding to the positive integer and the alternative goodness of fit corresponding to the positive integer can be used as the second difference. Continuing with the above example, for example, (0.54-0.5) / 0.5=8% can be used as the second difference.

[0142] It should be noted that, when the number of specified events in the input of the initial prediction model is the positive integer, the number of specified events is added as the input of the initial prediction model so that the obtained alternative prediction model has the maximum goodness of fit, and the difference between the maximum goodness of fit corresponding to the alternative prediction model after adding the specified events and the maximum goodness of fit corresponding to the alternative prediction model before adding the specified events is the second difference.

[0143] As can be seen from the above introduction, although increasing the number of specified events as input can improve the accuracy of subsequent model output to a certain extent, it will lead to an increase in the amount of calculation of the electronic device. Therefore, the smallest positive integer that meets the target condition can be determined from the second number as the target positive integer, wherein the target condition includes that the corresponding second difference is less than or equal to a specified threshold. The specified threshold can be pre-set, for example, 1%.

[0144] For example, if the second difference corresponding to the positive integer 1 is 1.5%, the second difference corresponding to the positive integer 2 is 0.5%, and the second difference corresponding to the positive integer 3 is 0.7%, it can be known that the second difference corresponding to the positive integer 2 and the second difference corresponding to the positive integer 3 are both less than or equal to the specified threshold, that is, the positive integer 2 and the positive integer 3 both meet the target condition. Therefore, the smallest positive integer in the second quantity that meets the target condition is 2, that is, the positive integer 2 is used as the target positive integer.

[0145] The candidate goodness of fit corresponding to the target positive integer is the target goodness of fit. Then, the candidate prediction model corresponding to the target goodness of fit can be used as the prediction model to be trained.

[0146] Therefore, while ensuring the prediction accuracy of the prediction model to be trained, the number of specified events as input can be reduced as much as possible, so that the computing demand of the electronic device is reduced.

[0147] See also Figure 4 , Figure 4 A schematic diagram of determining a prediction model to be trained provided in an embodiment of the present application is shown. Figure 4401, a second number of the specified events are selected from the specified events 401, and the second number may include multiple positive integers, for example, from 1 to the first number. Multiple candidate event sets are constructed, and then the candidate prediction model 403 corresponding to each positive integer in the second number can be determined. The candidate event set corresponding to each candidate prediction model 403 is the final event set corresponding to the positive integer.

[0148] Further, the goodness of fit of each candidate prediction model 403 is the candidate goodness of fit corresponding to each positive integer. Thus, the target positive integer 406 is determined by the candidate goodness of fit 405. The candidate goodness of fit corresponding to the target positive integer is the target goodness of fit, and the candidate prediction model corresponding to the target goodness of fit is used as the prediction model to be trained 407.

[0149] Optionally, after determining the target positive integer 406, the candidate prediction models corresponding to the target goodness of fit may be subjected to rationality filtering 408. For example, the candidate prediction models corresponding to the target goodness of fit may be subjected to rationality filtering 408 through hypothesis testing or collinearity rules, etc., so that the candidate prediction models corresponding to the target goodness of fit that have passed the rationality filtering 408 are used as the prediction models to be trained 407. The collinearity rule is used to test the relationship between the model independent variables, and the hypothesis test is used to test the validity of the model assumptions.

[0150] in, Figure 4 For detailed description of each step involved, please refer to the aforementioned embodiment and will not be repeated here.

[0151] Step S240: Obtain a first difference between the standard basic cycle information and the initial basic cycle information.

[0152] Step S250: training the prediction model to be trained to reduce the first difference, and using the trained prediction model to be trained as the performance prediction model.

[0153] After obtaining the initial basic cycle information and the initial time information output by the prediction model to be trained, the first difference between the standard basic cycle information and the initial basic cycle information can be obtained.

[0154] It can be understood that the first difference can be used to characterize the difference between the initial basic cycle information output by the prediction model to be trained and the standard basic cycle information, so that the smaller the first difference is, the more accurate the initial basic cycle information output by the prediction model to be trained is.

[0155] Therefore, the model to be trained can be trained based on the first difference. Specifically, the prediction model to be trained can be trained to reduce the first difference, and the trained prediction model to be trained is used as the performance prediction model.

[0156] Optionally, after the training batch reaches a preset number of times, the trained prediction model to be trained is used as the performance prediction model.

[0157] Optionally, when the first difference is less than or equal to the first threshold, the trained prediction model to be trained is used as the performance prediction model.

[0158] Among them, training the prediction model to be trained may include adjusting parameters, weights, etc. in the prediction model to be trained, which is not specifically limited in the embodiments of the present application.

[0159] Step S260: Based on the target frequency information, the first number and the execution time information, the basic cycle information of each processing core at at least one running frequency is predicted through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction.

[0160] Step S270: Obtain basic time information, wherein the basic time information is used to represent the time taken for the access operation.

[0161] Step S280: Determine the performance information of the processing core based on the basic cycle information and basic time information of the processing core.

[0162] Among them, steps S260 to S280 have been introduced in detail in the above embodiments and will not be repeated here.

[0163] In the embodiment provided by the present application, a part of the sample data is used as a training set, and then another part of the sample data is used as a test set, which can avoid overfitting of the model to a certain extent. In addition, each register can be accessed through assembly language to obtain the second number of each specified event when each processing core executes the sample task load. Thereby, the time cost of obtaining the second number can be reduced. Furthermore, the highest goodness of fit among the various alternative goodness of fit can be found, and then the alternative prediction model corresponding to the highest goodness of fit is used as the prediction model to be trained. Thereby, the accuracy and stability of the subsequent fitting of the obtained model to be trained can be ensured. Furthermore, while ensuring the accuracy of the prediction of the obtained prediction model to be trained, the number of specified events as input can be minimized, so that the demand for the calculation amount of the electronic device is less.

[0164] See also Figure 7 , Figure 7A method flow chart of a performance prediction method provided by an embodiment of the present application is shown. The performance prediction method can be applied to Figure 1 The electronic device in the performance prediction scenario shown may specifically use the processing core of the electronic device as the execution subject of the performance prediction method. The performance prediction method may include steps S310 to S380.

[0165] Step S310: In response to a performance prediction request, obtain current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing the performance state of the processing core, and the execution time information is used to characterize the time that the processing core is in a non-idle state.

[0166] Step S320: Based on the target frequency information, the first number and the execution time information, the basic cycle information of each processing core at at least one running frequency is predicted through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction.

[0167] Step S330: Obtain basic time information, wherein the basic time information is used to represent the time taken for the access operation.

[0168] Among them, step S310 to step S330 have been introduced in detail in the above embodiments and will not be repeated here.

[0169] Step S340: taking the product of the basic time information and the frequency to be run as the first value.

[0170] Step S350: taking the sum of the first value and the basic period information as the second value.

[0171] Step S360: taking the quotient of the frequency to be run and the second value as the performance information of the processing core at the frequency to be run.

[0172] From the above introduction, it can be known that the performance information of the processing core can be characterized by the number of instructions per second IPS of the processing core. Therefore, after obtaining the basic cycle information and the basic time information, the performance information of the processing core at the frequency to be run can be determined based on the basic cycle information and the basic time information.

[0173] Specifically, the product of the basic time information and the frequency to be run is used as the first value. For some implementations, the first value can be represented by stall_SPI*Freq, where Freq can represent the frequency to be run.

[0174] Then, the sum of the first value and the basic cycle information can be used as the second value. That is, the second value can be represented by stall_SPI*Freq+base_CPI.

[0175] Therefore, the quotient of the frequency to be run and the second value can be used as the performance information of the processing core at the frequency to be run. That is, the performance information can be represented as Freq / (stall_SPI*Freq+base_CPI).

[0176] Therefore, the performance information can be represented by the following formula (2).

[0177] IPS=Freq / (stall_SPI*Freq+base_CPI) (2)

[0178] Among them, IPS stands for instructions per second, which is used to characterize the performance information of the processing core.

[0179] The method for obtaining the performance information can be regarded as a fitting method of a nonlinear mapping model.

[0180] Step S370: Determine the minimum standby frequency for which the performance information meets the task requirements as the target standby frequency.

[0181] Step S380: Control the processing core to execute the task load at the target running frequency.

[0182] For some implementations, there may be multiple frequencies to be run, so that the performance information of the processing core at each frequency to be run can be determined through the aforementioned steps. It is understandable that the task load may correspond to a task requirement. Exemplarily, the task requirement may be represented in the form of instructions per second, such as the task requirement corresponding to the required instructions per second. Thus, the instructions per second IPS corresponding to each frequency to be run can be compared with the required instructions per second, and then the minimum frequency to be run at which the performance information meets the task requirement can be determined as the target frequency to be run.

[0183] Furthermore, the processing core may be controlled to execute the task load at the target running frequency.

[0184] Optionally, after obtaining the performance information corresponding to multiple frequencies to be run, a performance information curve chart of the processing core can be constructed based on the performance information corresponding to multiple frequencies to be run, so as to more intuitively display the performance information corresponding to different frequencies to be run of the processing core when processing the task load, which is convenient for subsequent further analysis or scheduling.

[0185] In the embodiments provided in the present application, it is possible to ensure that the execution task load is not negatively impacted due to the performance information corresponding to the standby operating frequency being too low, and the processing core can be controlled to operate at the minimum standby operating frequency that meets the task requirements as much as possible, thereby reducing energy consumption.

[0186] See also Figure 8 , Figure 8 A method flow chart of a performance prediction method provided by an embodiment of the present application is shown. The performance prediction method can be applied to Figure 1 The electronic device in the performance prediction scenario shown can specifically use the processing core of the electronic device as the execution subject of the performance prediction method. The performance prediction method can be divided into three parts: data collection 410, performance fitting 420 and online prediction 430.

[0187] The data collection 410 may include step S411: collecting current target frequency information, first number, and execution time information of each processing core.

[0188] The performance fitting 420 may include step S421: training and verifying the prediction model to be trained to obtain a performance prediction model.

[0189] The online prediction 430 may include step S431 and step S432.

[0190] Step S431: predicting basic cycle information of each processing core at at least one to-be-running frequency by using a performance prediction model.

[0191] Step S432: Obtain basic time information.

[0192] Step S433: Determine the performance information of the processing core based on the performance information prediction formula.

[0193] The basic cycle information and basic time information may be obtained, and then the performance information of the processing core may be determined based on the performance information prediction formula. The performance information prediction formula may be the formula shown in formula (2) in the above embodiment, which will not be described in detail here.

[0194] It should be noted that for a detailed description of each of the above steps, please refer to the description in the aforementioned method embodiment, which will not be repeated here.

[0195] Through experimental verification on real electronic devices, relevant data in the following Table 1 are obtained. Table 1 shows the parameters of the performance prediction model obtained by the performance prediction method provided in the embodiment of the present application for two types of processing cores in the electronic device.

[0196] Table 1

[0197]

[0198] Among them, the processing cores shown in Table 1 include ARM Cortex-A710 and ARM Cortex-A510. R^2 characterizes the goodness of fit of the performance prediction model corresponding to the processing core. It can be seen that the goodness of fit of the performance prediction model corresponding to the processing core exceeds 0.98, which indicates that the regression analysis explains 98.0% and above changes. In addition, Adjust R^2 is used to characterize the corresponding adjusted goodness of fit after adjusting (for example, adding a specified event as an input) the performance prediction model. It can be seen that the adjusted goodness of fit will not increase due to the addition of the specified event as an input, thereby characterizing that the specified event as an input in the performance prediction model obtained by the performance prediction method provided in the embodiment of the present application can bring higher value. In addition, Prob (F-statistic) is used to characterize the F statistic, so that it can be seen from the F statistic in Table 1 that the independent variable in the performance prediction model has statistical significance in explaining the dependent variable.

[0199] In addition, the inventors also analyzed the goodness of fit of the alternative prediction models constructed by taking different numbers of specified events as input. Fig. 9 , Fig. 9 A graph showing the relationship between the goodness of fit of the alternative prediction model provided by an embodiment of the present application and the number of specified events as input quantities is shown. Fig. 9 In the coordinate system 900 shown, the horizontal axis is used to characterize the number of specified events as input, in units; the vertical axis is used to characterize the goodness of fit of the alternative prediction model. Among them, curve 910 is used to characterize the relationship curve between the goodness of fit of the alternative prediction model corresponding to the processing core ARM Cortex-A710 and the number of specified events as input; curve 920 is used to characterize the relationship curve between the goodness of fit of the alternative prediction model corresponding to the ARM Cortex-A510 and the number of specified events as input. It can be seen that when the number of specified events as input is four, the goodness of fit of the alternative prediction model tends to be stable. Therefore, in some embodiments, in order to obtain a performance prediction model in a lower overhead manner and prevent the model from overfitting, the number of specified events as input can be selected as 4 to construct an alternative performance prediction model.

[0200] In addition, the inventors also analyzed the error rate of the performance information obtained by the performance prediction method provided by the above embodiment of the present application. Fig.10 , Fig.10 The error rate analysis diagram of the performance information of the embodiment of the present application is shown. Fig.10In the coordinate graph 1000 shown, the vertical axis is used to represent the error rate, and the horizontal axis is used to represent different task loads. There are two bar graphs of error rates corresponding to each task load. The bar graph with dotted lines on the left is the error rate corresponding to the ARM Cortex-A510 processing core, and the bar graph with solid lines on the right is the error rate corresponding to the ARM Cortex-A710 processing core. Fig.10 As can be seen, the average error rate of ARM Cortex-A710 is 4.53%, while the average error rate of ARM Cortex-A510 is 6.81%, which shows that the error rate is smaller.

[0201] Optionally, after obtaining each to-be-running frequency, the processing core can also be dynamically adjusted in voltage and frequency (Dynamic Voltage and Frequency Scaling, DVFS) based on each to-be-running frequency. Thus, compared with the default scheduling method of the electronic device, the dynamic voltage and frequency adjustment combined with the performance prediction method provided in the embodiment of the present application can provide more accurate performance prediction for the processing core scheduling without spending too much cost.

[0202] See also Fig.11 , Fig.11 A structural block diagram of a performance prediction device provided in an embodiment of the present application is shown. The performance prediction device 1100 includes: a first acquisition unit 1110 , a prediction unit 1120 , a second acquisition unit 1130 , and a performance information determination unit 1140 .

[0203] The first acquisition unit 1110 is used to obtain, in response to a performance prediction request, current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing the performance state of the processing core, and the execution time information is used to characterize the time that the processing core is in a non-idle state.

[0204] The prediction unit 1120 is used to predict the basic cycle information of each processing core at at least one running frequency based on the target frequency information, the first number and the execution time information through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction.

[0205] Optionally, the prediction unit 1120 can also obtain sample data and standard information corresponding to the sample data, wherein the sample data includes sample frequency information of each processing core under the sample task load, the sample number of occurrences of each specified event, and sample execution time information within a unit processing cycle, and the standard information includes standard basic cycle information, and the standard basic cycle information is used to characterize the number of cycles spent executing each instruction under the sample task load; the sample frequency information, sample number, and sample execution time information are input into the prediction model to be trained to obtain the initial basic cycle information output by the prediction model to be trained; the difference between the standard basic cycle information and the initial basic cycle information is obtained; the prediction model to be trained is trained to reduce the difference, and the trained prediction model to be trained is used as the performance prediction model.

[0206] Optionally, the prediction unit 1120 can also be used to obtain a first number of the specified events; select a second number of the specified events from the multiple specified events respectively, and construct multiple alternative event sets, wherein the second number includes all positive integers from 1 to the first number; respectively use the first number of occurrences of the specified events in each alternative event set, the sample frequency information, and the sample execution time information as input quantities of the initial prediction model to construct a model to obtain an alternative prediction model corresponding to each alternative event set; obtain the goodness of fit of each of the alternative prediction models; and determine the prediction model to be trained based on the goodness of fit of each alternative prediction model.

[0207] Optionally, the prediction unit 1120 may also be configured to use the candidate prediction model with the highest goodness of fit as the prediction model to be trained.

[0208] Optionally, the prediction unit 1120 can also be used to respectively determine the highest goodness of fit among the goodness of fit of the alternative prediction models corresponding to each positive integer in the second number, as the alternative goodness of fit corresponding to the positive integer; obtain the second difference between the alternative goodness of fit corresponding to each positive integer plus 1 in the second number and the alternative goodness of fit corresponding to the positive integer; determine the smallest positive integer that meets the target condition from the second number, as the target positive integer, and the alternative goodness of fit corresponding to the target positive integer is the target goodness of fit, wherein the target condition includes that the corresponding second difference is less than or equal to a specified threshold; and use the alternative prediction model corresponding to the target goodness of fit as the prediction model to be trained.

[0209] Optionally, the prediction unit 1120 can also be used to obtain a sample task load and control each of the processing cores to execute the sample task load; collect the second frequency information when each of the processing cores executes the sample task load as the sample frequency information; collect the second number of occurrences of each specified event when each of the processing cores executes the sample task load as the sample number of times; collect the second execution time information within a unit processing cycle when each of the processing cores executes the sample task load as the sample execution time information, and the sample frequency information, sample number of times and sample execution time information serve as the sample data; collect the sample cycle information of the time taken to execute instructions at multiple frequencies under the sample task load, and calculate the standard basic cycle information based on the sample cycle information by the difference method.

[0210] Optionally, the prediction unit 1120 can also be used to respectively search for registers for storing the second occurrence number of each specified event; access each register through assembly language to obtain the second occurrence number of each specified event when each processing core executes the sample task load.

[0211] Optionally, the prediction unit 1120 can also be used to obtain the sample data to be detected and the standard information to be detected corresponding to the sample data to be detected; perform data cleaning on the standard information to be detected, and determine the abnormal information in the standard information to be detected; remove the abnormal information in the standard information to be detected, and obtain the remaining standard information to be detected as the standard information, and the sample data to be detected corresponding to the standard information is used as the sample data.

[0212] The second acquiring unit 1130 is configured to acquire basic time information, wherein the basic time information is used to represent the time taken for the access operation.

[0213] The performance information determining unit 1140 is configured to determine the performance information of the processing core based on the basic cycle information and basic time information of the processing core.

[0214] Optionally, the performance information determination unit 1140 can also be used to take the product of the basic time information and the frequency to be operated as the first value; take the sum of the first value and the basic cycle information as the second value; and take the quotient of the frequency to be operated and the second value as the performance information of the processing core at the frequency to be operated.

[0215] Optionally, the performance information determination unit 1140 may also be used to determine a minimum standby operating frequency at which the performance information meets the task requirements as a target standby operating frequency; and control the processing core to execute the task load at the target standby operating frequency.

[0216] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0217] In several embodiments provided in the present application, the coupling between the units may be electrical, mechanical or other forms of coupling. In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0218] See also Fig.12 , Fig.12 The block diagram of a structure of an electronic device provided in an embodiment of the present application is shown. The electronic device 110 may be a smart phone, a desktop computer, a vehicle-mounted computer, a server or a tablet computer, etc. The electronic device 110 in the present application may include one or more of the following components: a processor 111, a memory 112 and one or more application programs, wherein the processor 111 is electrically connected to the memory 112, and the one or more program configurations are used to execute the methods described in the aforementioned embodiments.

[0219] The processor 111 may include one or more processing cores. The processor 111 uses various interfaces and lines to connect various parts of the entire electronic device 110, and executes various functions and processes data of the electronic device 110 by running or executing instructions, programs, code sets or instruction sets stored in the memory 112, and calling data stored in the memory 112. Optionally, the processor 111 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 111 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU) and a modem. Among them, the CPU mainly processes the operating system, user interface and computer programs; the GPU is responsible for rendering and drawing display content; the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 111, and it can be implemented separately through a communication chip. Specifically, the method described in the above embodiment can be executed by one or more processors 111.

[0220] For some embodiments, the memory 112 may include a random access memory (RAM) or a read-only memory (ROM). The memory 112 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 112 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function, instructions for implementing the following various method embodiments, etc. The data storage area may also store data created by the electronic device 110 during use, etc.

[0221] See also Fig.13 , which shows a structural block diagram of a computer-readable storage medium provided in an embodiment of the present application. The computer-readable medium 1300 stores program codes, which can be called by a processor to execute the method described in the above method embodiment.

[0222] The computer readable storage medium 1300 may be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read-only memory), an EPROM, a hard disk, or a ROM. Optionally, the computer readable storage medium 1300 includes a non-transitory computer-readable storage medium. The computer readable storage medium 1300 has storage space for program code 1310 that performs any method steps in the above method. These program codes can be read from or written to one or more computer program products. The program code 1310 can be compressed, for example, in an appropriate form.

[0223] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A performance prediction method, characterized in that: Applied to an electronic device, the electronic device includes at least one processing core, and the method includes: In response to the performance prediction request, obtaining current target frequency information of at least one of the processing cores, the first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing a performance state of the processing core, and the execution time information is used to characterize a time when the processing core is in a non-idle state; Based on the target frequency information, the first number and the execution time information, predicting the basic cycle information of each processing core at at least one to-be-run frequency through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction; Acquire basic time information, wherein the basic time information is used to represent the time taken for the access operation; Based on the basic cycle information and the basic time information of the processing core, performance information of the processing core is determined.

2. The method according to claim 1, characterized in that Before predicting the basic cycle information of each processing core at at least one to-be-run frequency by a pre-trained performance prediction model based on the target frequency information, the first number and the execution time information, the method further includes: Acquire sample data and standard information corresponding to the sample data, wherein the sample data includes sample frequency information of each processing core under a sample task load, the sample number of occurrences of each specified event, and sample execution time information within a unit processing cycle, and the standard information includes standard basic cycle information, which is used to characterize the number of cycles spent on executing each instruction under the sample task load; Inputting the sample frequency information, sample times and sample execution time information into the prediction model to be trained to obtain the initial basic cycle information output by the prediction model to be trained; Acquire a first difference between the standard basic cycle information and the initial basic cycle information; The prediction model to be trained is trained to reduce the first difference, and the trained prediction model to be trained is used as the performance prediction model.

3. The method according to claim 2, characterized in that Before inputting the sample frequency information, the sample number of times and the sample execution time information into the prediction model to be trained to obtain the initial basic cycle information output by the prediction model to be trained, the method further includes: Obtaining a first quantity of the specified event; Selecting a second number of the specified events from the plurality of the specified events respectively to construct a plurality of candidate event sets, wherein the second number includes all positive integers from 1 to the first number; The model is constructed by using the first occurrence number of the specified event in each candidate event set, the sample frequency information and the sample execution time information as input quantities of the initial prediction model to obtain the candidate prediction model corresponding to each candidate event set; Obtaining the goodness of fit of each of the candidate prediction models; The prediction model to be trained is determined based on the goodness of fit of each candidate prediction model.

4. The method according to claim 3, characterized in that: The step of determining the prediction model to be trained based on the goodness of fit of each candidate prediction model comprises: The candidate prediction model with the highest goodness of fit is used as the prediction model to be trained.

5. The method according to claim 3, characterized in that: The step of determining the prediction model to be trained based on the goodness of fit of each candidate prediction model comprises: Respectively determine the highest goodness of fit among the goodness of fit of the candidate prediction models corresponding to each positive integer in the second quantity as the candidate goodness of fit corresponding to the positive integer; Obtain a second difference between the alternative goodness of fit corresponding to each positive integer plus 1 in the second number and the alternative goodness of fit corresponding to the positive integer; Determine a minimum positive integer satisfying a target condition from the second number as a target positive integer, the candidate goodness of fit corresponding to the target positive integer being a target goodness of fit, wherein the target condition includes that the corresponding second difference is less than or equal to a specified threshold; The candidate prediction model corresponding to the target goodness of fit is used as the prediction model to be trained.

6. The method according to claim 2, characterized in that The acquiring of sample data and standard information corresponding to the sample data includes: Acquire a sample task load, and control each of the processing cores to execute the sample task load; collecting second frequency information when each of the processing cores executes the sample task load as the sample frequency information; Collecting the second number of occurrences of each specified event when each processing core executes the sample task load as the sample number of times; collecting second execution time information within a unit processing cycle when each processing core executes the sample task load as the sample execution time information, and the sample frequency information, the sample number of times and the sample execution time information as the sample data; Sample cycle information of instructions executed at multiple frequencies under a sample task load is collected, and the standard basic cycle information is calculated based on the sample cycle information by a difference method.

7. The method according to claim 6, characterized in that The collecting, as the sample number, the number of second occurrences of each specified event when each of the processing cores executes the sample task load includes: Find the registers for storing the second occurrence number of each specified event respectively; Each register is accessed through assembly language to obtain the second number of occurrences of each specified event when each processing core executes the sample task load.

8. The method according to claim 2, characterized in that: The acquiring of sample data and standard information corresponding to the sample data includes: Acquire the sample data to be detected and the standard information to be detected corresponding to the sample data to be detected; Performing data cleaning on the standard information to be detected to determine abnormal information in the standard information to be detected; The abnormal information in the standard information to be detected is removed to obtain the remaining standard information to be detected as the standard information, and the sample data to be detected corresponding to the standard information is used as the sample data.

9. The method according to claim 1, characterized in that: The determining the performance information of the processing core based on the basic cycle information and the basic time information of the processing core includes: Taking the product of the basic time information and the frequency to be run as the first value; Taking the sum of the first value and the basic period information as the second value; The quotient of the frequency to be run and the second value is used as the performance information of the processing core at the frequency to be run.

10. The method according to claim 1, characterized in that The frequency to be run is multiple, and after determining the performance information of the processing core at the frequency to be run based on the basic cycle information and basic time information of the processing core, the method further includes: Determine the minimum standby frequency at which the performance information meets the task requirements as the target standby frequency; The processing core is controlled to execute the task load at the target running frequency.

11. A performance prediction device, characterized in that: Applied to an electronic device, the electronic device includes at least one processing core, and the device includes: A first acquisition unit, configured to acquire, in response to a performance prediction request, current target frequency information of at least one of the processing cores, a first occurrence number of at least one specified event, and execution time information within a unit processing cycle, wherein the specified event includes an event for characterizing a performance state of the processing core, and the execution time information is used to characterize a time when the processing core is in a non-idle state; A prediction unit, configured to predict basic cycle information of each of the processing cores at at least one to-be-run frequency based on the target frequency information, the first number, and the execution time information through a pre-trained performance prediction model, wherein the basic cycle information is used to characterize the number of cycles spent on executing each instruction; A second acquisition unit, configured to acquire basic time information, wherein the basic time information is used to represent the time taken for the access operation; The performance information determining unit is used to determine the performance information of the processing core based on the basic cycle information and basic time information of the processing core.

12. An electronic device, characterized in that: The electronic device comprises a processor, a vibration motor, a speaker and a microphone, wherein the processor is connected to the vibration motor, the microphone and the speaker respectively; The processor is configured to execute the method according to any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: The readable storage medium stores program code, and the program code can be called by a processor to execute the method according to any one of claims 1 to 10.

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