Signal processing method and device supporting bipolar signal reading, equipment and storage medium

Abstract

The invention discloses a signal processing method and device supporting bipolar signal reading, equipment and a storage medium, and the method comprises the steps: obtaining an original output current which is a dot product result containing positive and negative values and output in the back propagation process of a neural network; in the simulation domain, mapping the original output current to obtain a positive output voltage; performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal; and in the digital domain, carrying out recovery processing on the digital signal to obtain a target signal sequence corresponding to the original output current. According to the invention, in an analog domain, a dot product result containing positive and negative values and output in a back propagation process of a neural network is mapped into an output voltage of a positive value, and then analog-to-digital conversion is carried out on the output voltage in a digital domain to obtain a digital signal for recovery processing. The technical problem that in the prior art, in the back propagation process, a bipolar signal containing positive and negative values is read out from the output end of a memory cross array, and expenditure and energy consumption are large is solved.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to a signal processing method, device, equipment and storage medium supporting bipolar signal readout. Background Art

[0002] Compared with the traditional von Neumann computing architecture, In-Memory Computing (IMC), as an innovative computing paradigm, significantly reduces energy consumption and improves processing speed by directly processing data in the storage medium. In-Memory Computing also supports highly parallel data processing and stronger data bandwidth, providing significant performance advantages for processing big data applications and complex computing tasks. In the in-memory computing architecture, computing tasks are executed more efficiently due to the reduction of data transmission, which provides an effective technical solution for energy-constrained devices and scenarios requiring real-time data analysis.

[0003] In the prior art, the input and output of the digital-to-analog converter (DAC) and the analog-to-digital converter (ADC) can be connected to different directions of the cross array through a CAM circuit with configurable data flow direction, so as to realize two acceleration modes: forward propagation acceleration calculation and reverse propagation acceleration calculation. However, since the ADC that measures the dot product calculation result usually only works in the positive voltage range, it does not have the native function of realizing negative input. To handle the negative input in reverse propagation, specific circuit design and system configuration are required. When performing forward propagation calculation of a neural network, the output is the net input of the neuron, or the value after the activation of the previous layer of the network. These inputs are all positive values. At this time, the general input circuit can be used to implement accelerated calculation. However, when performing reverse propagation calculation with the help of a memory array, the input of the cross array is the error of the previous layer, and the error is a signal with extremely small values ​​and contains positive and negative values. These input voltages and the conductance on the cross array are dot-producted, and the result after the dot product is an output current distributed in the positive and negative range. Due to hardware limitations, the traditional ADC cannot read extremely small currents containing negative values, which is necessary for performing subsequent calculations. The traditional method of reading bipolar signals is differential design, which can handle positive and negative signals by using two sets of ADCs, each set is responsible for reading positive or negative current. Since the ADC overhead in the in-memory computing system dominates, that is, the area occupied exceeds 40% and the energy consumption exceeds 50%, this differential design method leads to a doubling of the number of ADCs used, significantly increasing the energy consumption and area overhead of the system.

[0004] Therefore, there is an urgent need for a signal processing method that supports bipolar signal readout, which can read out the bipolar signal containing positive and negative values ​​from the output end of the memory crossbar array during the reverse propagation process and effectively reduce overhead and energy consumption. Summary of the invention

[0005] The main purpose of the present invention is to provide a signal processing method, device, equipment and storage medium that supports bipolar signal reading, aiming to solve the technical problems in the prior art of high overhead and energy consumption in reading bipolar signals containing positive and negative values ​​from the output end of a memory cross array during reverse propagation.

[0006] To achieve the above object, the present invention provides a signal processing method supporting bipolar signal readout, the method comprising the following steps:

[0007] Obtaining an original output current, where the original output current is a dot product result including positive and negative values ​​output during the back propagation process of the neural network;

[0008] In the analog domain, the original output current is mapped to a positive output voltage;

[0009] Performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal;

[0010] In the digital domain, the digital signal is restored to obtain a target signal sequence corresponding to the original output current.

[0011] Optionally, the step of mapping the original output current to a positive output voltage in the analog domain includes:

[0012] In the analog domain, converting the raw output current into a first output voltage;

[0013] Acquire a first offset voltage to be applied, and adjust a resistance value of a target resistor based on the first offset voltage to obtain a scaling factor;

[0014] The first offset voltage is applied to the first output voltage, and the first output voltage is scaled based on the scaling factor, so that the first output voltage is mapped to a positive interval to obtain an output voltage.

[0015] Optionally, after the step of converting the original output current into the first output voltage in the analog domain, the method further includes:

[0016] Performing characteristic analysis on the original output current to obtain an analysis result;

[0017] When the analysis result indicates that the original output current is a vector composed of the same positive value, scaling the first output voltage by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range;

[0018] When the analysis result indicates that the original output current is a vector including positive and negative values, the step of obtaining the first offset voltage to be applied and adjusting the resistance value of the target resistor based on the first offset voltage to obtain the scaling factor is performed.

[0019] Optionally, after the step of performing characteristic analysis on the original output current to obtain the analysis result, the step further includes:

[0020] When the analysis result indicates that the original output current is a vector composed of the same negative value, a second offset voltage is applied to the first output voltage, and the first output voltage is scaled by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range.

[0021] Optionally, the step of performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal includes:

[0022] Performing analog-to-digital conversion on the output voltage by an analog-to-digital converter to obtain a corresponding digital signal;

[0023] Accordingly, the step of performing recovery processing on the digital signal in the digital domain to obtain a target signal sequence corresponding to the original output current includes:

[0024] In the digital domain, obtaining an output offset of an offset circuit corresponding to an output end of the analog-to-digital converter;

[0025] Connecting the digital signal and the output offset to a subtraction circuit, and performing recovery processing on the digital signal through the subtraction circuit to obtain a target signal sequence corresponding to the original output current;

[0026] The subtraction circuit is used to calculate the complement code corresponding to the output offset and add the digital signal to the complement code.

[0027] Optionally, the step of performing recovery processing on the digital signal by the subtraction circuit to obtain a target signal sequence corresponding to the original output current includes:

[0028] Based on the output offset, removing the offset of the digital signal by the subtraction circuit to obtain a digital signal after the offset is removed;

[0029] Performing digital signal processing on the digital signal after the offset is removed based on the scaling factor to obtain a digital signal after the scaling factor is removed;

[0030] The digital signal after the scaling factor is removed is used as a target signal sequence corresponding to the original output current.

[0031] Optionally, the neural network is a multilayer perceptron, a deep neural network, a convolutional neural network, a long short-term memory neural network, a feedback neural network or a reinforcement learning network.

[0032] In addition, to achieve the above object, the present invention also provides a signal processing device supporting bipolar signal readout, the device comprising:

[0033] A data acquisition module, used to acquire an original output current, where the original output current is a dot product result including positive and negative values ​​output during the back propagation process of the neural network;

[0034] A mapping processing module, used for mapping the original output current into a positive output voltage in an analog domain;

[0035] A signal conversion module, used for performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal;

[0036] The result output module is used to restore the digital signal in the digital domain to obtain a target signal sequence corresponding to the original output current.

[0037] In addition, to achieve the above-mentioned purpose, the present invention also proposes a signal processing device that supports bipolar signal readout, the device comprising: a memory, a processor, and a signal processing program that supports bipolar signal readout that is stored in the memory and can be run on the processor, the signal processing program that supports bipolar signal readout is configured to implement the steps of the signal processing method that supports bipolar signal readout as described above.

[0038] In addition, to achieve the above-mentioned purpose, the present invention also proposes a storage medium, on which is stored a signal processing program supporting bipolar signal reading, and when the signal processing program supporting bipolar signal reading is executed by a processor, the steps of the signal processing method supporting bipolar signal reading as described above are implemented.

[0039] The present invention obtains the original output current, which is the dot product result containing positive and negative values ​​output during the back propagation of the neural network; in the analog domain, the original output current is mapped to a positive output voltage; the output voltage is converted to a corresponding digital signal; in the digital domain, the digital signal is restored to obtain a target signal sequence corresponding to the original output current. Since the present invention maps the dot product result containing positive and negative values ​​output during the back propagation of the neural network to a positive output voltage in the analog domain, and then the digital signal obtained by converting the output voltage to a digital domain is restored in the digital domain, and finally the target signal sequence corresponding to the original output current is obtained, compared with the prior art, the present invention can output the dot product result in the back propagation of the neural network with high precision to support in-situ online learning, thereby solving the technical problem of high overhead and energy consumption in the prior art of reading the bipolar signal containing positive and negative values ​​from the output end of the memory cross array during the back propagation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic flow chart of a first embodiment of a signal processing method supporting bipolar signal readout according to the present invention;

[0041] Figure 2 A schematic diagram of a neural network in a signal processing method supporting bipolar signal readout of the present invention;

[0042] Figure 3 A schematic diagram of the data flow direction of neural network acceleration calculation in the storage and computing integrated system of the present invention;

[0043] Figure 4 A schematic flow chart of a second embodiment of a signal processing method supporting bipolar signal readout according to the present invention;

[0044] Figure 5 A schematic flow chart of a third embodiment of a signal processing method supporting bipolar signal readout according to the present invention;

[0045] Figure 6 A schematic diagram of a first readout circuit design supporting negative input according to the present invention;

[0046] Figure 7 A schematic diagram of the design of the second readout circuit supporting negative input of the present invention;

[0047] Figure 8 A structural block diagram of a first embodiment of a signal processing device supporting bipolar signal readout according to the present invention;

[0048] Fig. 9 It is a structural schematic diagram of a signal processing device supporting bipolar signal readout in a hardware operating environment involved in an embodiment of the present invention.

[0049] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0050] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0051] The embodiment of the present invention provides a signal processing method supporting bipolar signal readout, referring to Figure 1 , Figure 1 FIG. 1 is a flow chart of a first embodiment of a signal processing method supporting bipolar signal readout according to the present invention.

[0052] In this embodiment, the signal processing method supporting bipolar signal readout includes the following steps:

[0053] Step S10: obtaining the original output current, where the original output current is the dot product result containing positive and negative values ​​output during the back propagation process of the neural network.

[0054] It should be noted that the execution subject of this embodiment can be a computer server device with data processing, network communication and program running functions, such as a server, a tablet computer, a personal computer, etc., or an electronic device capable of realizing the above functions, a signal processing device supporting bipolar signal reading, etc. The following takes a storage and computing integrated system (hereinafter referred to as the system) including a signal processing device supporting bipolar signal reading as an example to illustrate this embodiment and the following embodiments.

[0055] It should be explained that this embodiment can be used to design a signal processing method that supports bipolar signal readout for the problem that the AI ​​accelerator built with new memories such as resistive random access memory (RRAM) cannot efficiently read out the dot product results containing negative values ​​from the output end of the cross array during in-situ online learning. In addition, this embodiment can not only be used in the back propagation of neural networks, but also in the forward propagation process of networks such as recurrent neural networks (RNNs) and long short-term memory networks (LSTMs). The data after activation by functions such as tanh() is also a value distributed in the positive and negative range, and the dot product result output after inputting the cross array can also be read out through this example method.

[0056] It should be understood that the neural network is a variety of neural networks such as multilayer perceptron, deep neural network, convolutional neural network, long short-term memory neural network, feedback neural network or reinforcement learning network, which can be used in a variety of different application scenarios, such as image recognition, speech recognition, natural language processing, automatic driving and other application scenarios. The memory unit in the accelerator proposed in this embodiment is not limited to resistive random access memory (RRAM), but can also be a cross array composed of storage media such as magnetic random access memory (MRAM), phase change random access memory (PCRAM) or ferroelectric RAM (FeFET). This embodiment and the following embodiments are described by taking the AI ​​accelerator constructed for resistive random access memory as an example for in-situ online learning.

[0057] For example, refer to Figure 2 , Figure 2 The neural network diagram in the signal processing method supporting bipolar signal readout of the present invention includes an input layer, a hidden layer and an output layer. Here, it is represented in the form of vector operation. Assume that the input sample is x, and the activation value of the first layer is a. (1) , weighted input of layer l: z (l) , the weight matrix from layer l to layer l+1: W (l) , the bias vector of the lth layer: b (1) , the loss function can be the mean squared error: J, the error term of the lth layer: δ (l) .

[0058] It should be noted that the calculation process of the neural network includes the following steps:

[0059] 1. Forward Propagation

[0060] First, calculate the forward propagation process of the network to get the activation value of each layer:

[0061] a (0) = x;

[0062] For each layer l from 1 to L, perform the following steps:

[0063] Compute weighted input:

[0064] z (l) =W (l-1) a (l-1) +b(l-1) ;

[0065] Calculate activation value:

[0066] a (l) =g(z (l) );

[0067] Among them, gz (l) ) is the activation function, usually using nonlinear functions such as Sigmoid and ReLU.

[0068] 2. Error at Output Layer

[0069] Calculate the error of the output layer (the gradient of the loss function with respect to the output activation value):

[0070]

[0071] in, is the loss function J relative to the output activation value a (L) The gradient of ⊙ represents element-wise multiplication, g′(z (L) ) is the derivative of the activation function of the output layer.

[0072] 3. Backpropagation of Error

[0073] Starting from the output layer L, propagate the error forward layer by layer:

[0074] For each hidden layer l=L-1 to 2:

[0075] Calculate the error term δ (l) :

[0076] δ (l) =W (l) ) T δ (1+1) ⊙g′(z (l) );

[0077] 4. Gradient Calculation:

[0078]

[0079] 5. Weight and Bias Updates:

[0080] Use gradient descent or other optimization algorithms to update weights and biases:

[0081]

[0082] Here, α is the learning rate, which controls the step size of weight and bias updates.

[0083] It should be understood that the calculation process of the above neural network will be repeated until the loss function J converges or reaches a predetermined training round. Through the back propagation algorithm, the deep neural network can learn how to adjust the weights and biases to minimize the loss function, thereby achieving better prediction and classification performance.

[0084] From the above derivation and calculation, we can know that the calculation of neural network is mainly parameter-intensive operation dominated by matrix-vector product, in which matrix-vector product operation runs through the forward propagation, back propagation and weight update stages. Figure 3 , Figure 3 This is a schematic diagram of the data flow direction of neural network acceleration calculation in the storage and computing integrated system of the present invention. Figure 3 The figure shows the training process of a neural network on an AI accelerator built with resistive random access memory (RRAM). During the forward propagation process, the weight (W ij ) is encoded in the conductance (G ij ), enter (x i ) is mapped into a voltage vector, and the RRAM array completes ∑ i W ij x i Calculation is performed to accelerate the forward propagation. In the backward propagation process, the error of the next layer (δ j ) is mapped into a voltage vector and completed by the RRAM array∑ j (W ij ) T δ j The accelerator uses a CMOS logic circuit to calculate the gradient of the previous layer, and repeats the iteration to accelerate the back propagation. Finally, the gradient obtained by back propagation can be used to calculate the weight change (ΔW) of each layer, and then the required number of pulses (p) is calculated according to the size of ΔW. Finally, the write circuit outside the accelerator applies pulses to the RRAM array to complete the conductivity update of the RRAM. The entire process uses the physical principles of Ohm's law and Kirchhoff's law to efficiently complete the matrix-vector product operation (MVM) that dominates the neural network training process.

[0085] From the calculation process of the above neural network, we can know that the input of the forward calculation is the data set or the output of the previous layer, so the output dot product result is a positive vector. However, the input of the reverse calculation is the error of the previous layer, which is a vector containing positive and negative values. The result after the dot product calculation is a sequence containing positive and negative values. Since the standard ADC cannot directly read negative values, processing such signals requires specific system configuration and circuit design. Therefore, how to digitally output a dot product result containing positive and negative values ​​has become a bottleneck for in-situ online learning of neural networks on RRAM accelerators.

[0086] Step S20: in the analog domain, mapping the original output current to a positive output voltage.

[0087] It should be understood that the analog domain involves continuously changing signals and circuits, which are signals that change continuously in time and amplitude.

[0088] In a specific implementation, the original output current may be converted into a corresponding output voltage, and then the output voltage corresponding to the original output current may be offset and scaled to obtain a positive output voltage.

[0089] Step S30: performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal.

[0090] It should be noted that the output voltage can be converted into a digital signal by an analog-to-digital converter.

[0091] It should be understood that a digital signal is a discrete signal whose values ​​are discrete in time and amplitude. A digital signal is usually represented by a binary code, that is, it contains only a finite number of states or values, which usually correspond to binary numbers (0 and 1).

[0092] It should be explained that an analog-to-digital converter is an electronic device that can convert a continuous analog signal into a discrete digital signal. In electronic systems, analog signals (such as sound, temperature, pressure, light intensity, voltage, etc.) usually need to be converted into digital signals for further processing, storage or transmission by computers, microprocessors or digital signal processing systems.

[0093] Step S40: in the digital domain, performing restoration processing on the digital signal to obtain a target signal sequence corresponding to the original output current.

[0094] It should be explained that the digital domain involves discrete signals and circuits. These signals are discrete in time and amplitude and are usually represented by binary codes.

[0095] It should be noted that the recovery process of the digital signal may be to remove the offset and scaling process previously applied, thereby restoring the error signal within the original range and obtaining the target signal sequence corresponding to the original output current.

[0096] This embodiment obtains the original output current, which is the dot product result containing positive and negative values ​​output during the back propagation of the neural network; in the analog domain, maps the original output current to a positive output voltage; performs analog-to-digital conversion on the output voltage to obtain a corresponding digital signal; and in the digital domain, performs recovery processing on the digital signal to obtain a target signal sequence corresponding to the original output current. Since this embodiment maps the dot product result containing positive and negative values ​​output during the back propagation of the neural network to a positive output voltage in the analog domain, and then performs analog-to-digital conversion on the output voltage in the digital domain to obtain a digital signal, and finally obtains a target signal sequence corresponding to the original output current, compared to the prior art, this embodiment can output the dot product result in the back propagation of the neural network with high precision to support in-situ online learning, thereby solving the technical problem of high overhead and energy consumption in the prior art of reading bipolar signals containing positive and negative values ​​from the output end of the memory cross array during the back propagation process.

[0097] refer to Figure 4 , Figure 4 FIG. 4 is a flow chart of a second embodiment of a signal processing method supporting bipolar signal readout according to the present invention.

[0098] Based on the above first embodiment, in this embodiment, step S20 includes:

[0099] Step S201: in the analog domain, converting the original output current into a first output voltage.

[0100] Step S202: obtaining a first offset voltage to be applied, and adjusting the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor.

[0101] Step S203: applying the first offset voltage to the first output voltage, and scaling the first output voltage based on the scaling factor, so that the first output voltage is mapped to a positive interval to obtain an output voltage.

[0102] It should be noted that, after the step of converting the original output current into the first output voltage in the analog domain, it also includes: performing characteristic analysis on the original output current to obtain an analysis result; when the analysis result indicates that the original output current is a vector composed of the same positive values, scaling the first output voltage by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range; when the analysis result indicates that the original output current is a vector containing positive and negative values, executing the step of obtaining the first offset voltage to be applied, and adjusting the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor.

[0103] Further, when the analysis result indicates that the original output current is a vector composed of the same negative value, a second offset voltage is applied to the first output voltage, and the first output voltage is scaled by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range.

[0104] It is understandable that the above target range may be a positive interval within a certain range, and the target range may be customized by a system user, which is not limited in this embodiment.

[0105] This embodiment obtains the original output current, which is the dot product result containing positive and negative values ​​output during the back propagation of the neural network; in the analog domain, converts the original output current into a first output voltage; obtains the first offset voltage to be applied, and adjusts the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor; applies the first offset voltage to the first output voltage, and scales the first output voltage based on the scaling factor so that the first output voltage is mapped to a positive interval to obtain an output voltage; in the digital domain, restores the digital signal to obtain a target signal sequence corresponding to the original output current. Compared with the prior art, this embodiment realizes accurate digital output of the dot product result containing positive and negative values ​​during the back propagation of the neural network through the coordinated processing of the original output current from the analog domain to the digital domain.

[0106] refer to Figure 5 , Figure 5 FIG. 4 is a flow chart of a third embodiment of a signal processing method supporting bipolar signal readout according to the present invention.

[0107] Based on the above embodiments, in this embodiment, step S40 includes:

[0108] Step S401: in the digital domain, obtaining an output offset corresponding to an output end of the analog-to-digital converter of an offset circuit.

[0109] Step S402: connecting the digital signal and the output offset to a subtraction circuit, and performing recovery processing on the digital signal through the subtraction circuit to obtain a target signal sequence corresponding to the original output current.

[0110] It should be noted that the subtraction circuit is used to calculate the complement code corresponding to the output offset and add the digital signal to the complement code.

[0111] In a specific implementation, the step of restoring the digital signal through the subtraction circuit to obtain the target signal sequence corresponding to the original output current includes: based on the output offset, removing the offset of the digital signal through the subtraction circuit to obtain the digital signal after the offset is removed; performing digital signal processing on the digital signal after the offset is removed based on the scaling factor to obtain the digital signal after the scaling factor is removed; and using the digital signal after the scaling factor is removed as the target signal sequence corresponding to the original output current.

[0112] For example, refer to Figure 6 , Figure 6 Schematic diagram of the first readout circuit design supporting negative input of the present invention, R x is the resistance, A x is an operational amplifier, used to implement addition operations in the analog domain; FA (Full Adder) is a full adder, used to implement subtraction operations in the recovery circuit (subtraction circuit) (implemented in binary complement). Register is a register, used to temporarily store the readout results of the crossbar array for other calculation needs of the system; I1, ..., I j is the original output current including positive and negative values, and U0 is the offset value of the offset voltage. j Convert it into output voltage, apply offset voltage u0 to move it to the positive range, and adjust R 4j and R 3j The resistance is appropriately scaled, and the signal is recorded as Then, the corresponding data is output to the ADC for analog-to-digital conversion, and the output signal is recorded as Finally, the output of the offset circuit at the ADC The output signal is connected to the corresponding subtraction circuit together with other output signals. After removing the offset, the output signal is a sequence distributed in the positive and negative range, that is, the target signal sequence, denoted as U1, ..., U i ; previously by adjusting R 4j and R 3j The scaling factor added by the resistor value can be removed in the system's digital signal processing to restore the input to the original range. The formula corresponding to the whole process is derived as follows:

[0113]

[0114] Among them, I j is the dot product result including positive and negative values, that is, the original output current, and U0 is the offset voltage that raises the original output current to the positive range. is a sequence of positive intervals scaled to the ADC input range, is the output of the ADC, is the output of the offset circuit at the ADC end, #D0 is The complement of j is the output of the cross array that is finally restored to the original signal range, and m is the number of bits of the ADC.

[0115] It should be noted that when the original output current has the following extreme conditions, the above offset scaling only requires specific processing in the analog domain to be correctly input.

[0116] When the original output current is a vector of the same positive value, the offset is set to 0. 4j and R 3j The resistor value scales the signal to the target range.

[0117] When the original output current is a vector composed of the same negative value, the offset setting needs to raise the original output current to the positive target range. is a positive value that is not 0 and is distributed within the target range.

[0118] It should be explained that the method of removing offset is not limited to the digital domain, and similar effects can also be achieved in software. Figure 7 , Figure 7 This is a schematic diagram of the second readout circuit design that supports negative input in the present invention. This method removes the offset in the software layer, that is, after returning all ADC output results to the software, each output result A similar effect can be achieved by subtracting φ0 in the software.

[0119] It should be noted that the use of collaborative processing from the analog domain to the digital domain to support the readout of bipolar signals has many advantages. First, by applying processing methods such as offset scaling, the problem of reading out extremely large or extremely small positive and negative signals during the backpropagation process is solved. Second, by optimizing the number of ADCs used, the energy consumption and area overhead of the peripheral circuits are greatly reduced. These two advantages eliminate the bottleneck of data readout when using new memories for in-situ online learning.

[0120] This embodiment obtains the original output current, which is the dot product result containing positive and negative values ​​output during the back propagation of the neural network; in the analog domain, converts the original output current into a first output voltage; obtains the first offset voltage to be applied, and adjusts the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor; applies the first offset voltage to the first output voltage, and scales the first output voltage based on the scaling factor so that the first output voltage is mapped to a positive interval to obtain an output voltage; in the digital domain, obtains the output offset corresponding to the offset circuit at the output end of the analog-to-digital converter; connects the digital signal and the output offset to a subtraction circuit, and restores the digital signal through the subtraction circuit to obtain a target signal sequence corresponding to the original output current. Compared with the prior art, this embodiment realizes the recovery of digital signals through binary complement in the subtraction circuit, thereby improving the efficiency of digital signal recovery.

[0121] In addition, an embodiment of the present invention further proposes a storage medium, on which a signal processing program supporting bipolar signal reading is stored, and when the signal processing program supporting bipolar signal reading is executed by a processor, the steps of the signal processing method supporting bipolar signal reading as described above are implemented.

[0122] Reference Figure 8 , Figure 8 It is a structural block diagram of the first embodiment of the signal processing device supporting bipolar signal readout of the present invention.

[0123] like Figure 8 As shown, the signal processing device supporting bipolar signal readout proposed in the embodiment of the present invention includes: a data acquisition module 501 , a mapping processing module 502 , a signal conversion module 503 and a result output module 504 .

[0124] The data acquisition module 501 is used to acquire the original output current, where the original output current is a dot product result containing positive and negative values ​​output during the back propagation process of the neural network.

[0125] The mapping processing module 502 is used to map the original output current into a positive output voltage in the analog domain.

[0126] The signal conversion module 503 is used to perform analog-to-digital conversion on the output voltage to obtain a corresponding digital signal.

[0127] The result output module 504 is used to restore the digital signal in the digital domain to obtain a target signal sequence corresponding to the original output current.

[0128] This embodiment obtains the original output current, which is the dot product result containing positive and negative values ​​output during the back propagation of the neural network; in the analog domain, maps the original output current to a positive output voltage; performs analog-to-digital conversion on the output voltage to obtain a corresponding digital signal; and in the digital domain, performs recovery processing on the digital signal to obtain a target signal sequence corresponding to the original output current. Since this embodiment maps the dot product result containing positive and negative values ​​output during the back propagation of the neural network to a positive output voltage in the analog domain, and then performs analog-to-digital conversion on the output voltage in the digital domain to obtain a digital signal, and finally obtains a target signal sequence corresponding to the original output current, compared to the prior art, this embodiment can output the dot product result in the back propagation of the neural network with high precision to support in-situ online learning, thereby solving the technical problem of high overhead and energy consumption in the prior art of reading bipolar signals containing positive and negative values ​​from the output end of the memory cross array during the back propagation process.

[0129] Based on the first embodiment of the signal processing device supporting bipolar signal readout of the present invention, a second embodiment of the signal processing device supporting bipolar signal readout of the present invention is proposed.

[0130] In this embodiment, the mapping processing module 502 is further used to convert the original output current into a first output voltage in the analog domain; obtain a first offset voltage to be applied, and adjust the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor; apply the first offset voltage to the first output voltage, and scale the first output voltage based on the scaling factor so that the first output voltage is mapped to a positive interval to obtain an output voltage;

[0131] The mapping processing module 502 is also used to perform characteristic analysis on the original output current to obtain an analysis result; when the analysis result indicates that the original output current is a vector composed of the same positive values, the first output voltage is scaled by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range; when the analysis result indicates that the original output current is a vector containing positive and negative values, the steps of obtaining the first offset voltage to be applied and adjusting the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor are executed.

[0132] The mapping processing module 502 is also used to apply a second offset voltage to the first output voltage when the analysis result indicates that the original output current is a vector composed of the same negative value, and scale the first output voltage by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range.

[0133] Other embodiments or specific implementations of the signal processing device supporting bipolar signal readout of the present invention may refer to the above-mentioned method embodiments, which will not be described in detail here.

[0134] The present application provides a signal processing device supporting bipolar signal reading, and the signal processing device supporting bipolar signal reading includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the signal processing method supporting bipolar signal reading in the above-mentioned embodiment one.

[0135] Reference below Fig. 9 , which shows a schematic diagram of the structure of a signal processing device supporting bipolar signal readout suitable for implementing an embodiment of the present application. The signal processing device supporting bipolar signal readout in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Fig. 9 The signal processing device supporting bipolar signal readout shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0136] like Fig. 9As shown, the signal processing device supporting bipolar signal readout may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. Various programs and data required for the operation of the signal processing device supporting bipolar signal readout are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems may be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009. The communication device 1009 may allow the signal processing device supporting bipolar signal readout to communicate wirelessly or wired with other devices to exchange data. Although the figure shows a signal processing device supporting bipolar signal readout with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0137] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0138] The signal processing device supporting bipolar signal reading provided by the present application adopts the signal processing method supporting bipolar signal reading in the above embodiment, which can solve the technical problem of high overhead and energy consumption in the prior art of reading bipolar signals containing positive and negative values ​​from the output end of the memory cross array during the reverse propagation process. Compared with the prior art, the beneficial effects of the signal processing device supporting bipolar signal reading provided by the present application are the same as the beneficial effects of the signal processing method supporting bipolar signal reading provided by the above embodiment, and the other technical features in the signal processing device supporting bipolar signal reading are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0139] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0140] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0141] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.

[0142] The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0143] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as a read-only memory / random access memory, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0144] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A signal processing method supporting bipolar signal readout, characterized in that: The method includes: Obtaining an original output current, where the original output current is a dot product result including positive and negative values ​​output during the back propagation process of the neural network; In the analog domain, the original output current is mapped to a positive output voltage; Performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal; In the digital domain, the digital signal is restored to obtain a target signal sequence corresponding to the original output current.

2. The signal processing method supporting bipolar signal readout according to claim 1, characterized in that: The step of mapping the original output current to a positive output voltage in the analog domain includes: In the analog domain, converting the raw output current into a first output voltage; Acquire a first offset voltage to be applied, and adjust the resistance value of the target resistor based on the first offset voltage to obtain a scaling factor; The first offset voltage is applied to the first output voltage, and the first output voltage is scaled based on the scaling factor, so that the first output voltage is mapped to a positive interval to obtain an output voltage.

3. The signal processing method supporting bipolar signal readout according to claim 2, characterized in that: After the step of converting the original output current into the first output voltage in the analog domain, the method further includes: Performing characteristic analysis on the original output current to obtain an analysis result; When the analysis result indicates that the original output current is a vector composed of the same positive value, scaling the first output voltage by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range; When the analysis result indicates that the original output current is a vector including positive and negative values, the step of obtaining the first offset voltage to be applied and adjusting the resistance value of the target resistor based on the first offset voltage to obtain the scaling factor is performed.

4. The signal processing method supporting bipolar signal readout according to claim 3, characterized in that: After the step of performing characteristic analysis on the original output current to obtain the analysis result, the method further includes: When the analysis result indicates that the original output current is a vector composed of the same negative value, a second offset voltage is applied to the first output voltage, and the first output voltage is scaled by adjusting the resistance value of the target resistor so that the first output voltage is mapped to a target range.

5. The signal processing method supporting bipolar signal readout according to claim 1, characterized in that: The step of performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal comprises: Performing analog-to-digital conversion on the output voltage by an analog-to-digital converter to obtain a corresponding digital signal; Accordingly, the step of performing recovery processing on the digital signal in the digital domain to obtain a target signal sequence corresponding to the original output current includes: In the digital domain, obtaining an output offset of an offset circuit corresponding to an output end of the analog-to-digital converter; Connecting the digital signal and the output offset to a subtraction circuit, and performing recovery processing on the digital signal through the subtraction circuit to obtain a target signal sequence corresponding to the original output current; The subtraction circuit is used to calculate the complement code corresponding to the output offset and add the digital signal to the complement code.

6. The signal processing method supporting bipolar signal readout according to claim 5, characterized in that: The step of performing restoration processing on the digital signal by the subtraction circuit to obtain a target signal sequence corresponding to the original output current includes: Based on the output offset, removing the offset of the digital signal by the subtraction circuit to obtain a digital signal after the offset is removed; Performing digital signal processing on the digital signal after the offset is removed based on the scaling factor to obtain a digital signal after the scaling factor is removed; The digital signal after the scaling factor is removed is used as a target signal sequence corresponding to the original output current.

7. The signal processing method supporting bipolar signal readout according to any one of claims 1 to 6, characterized in that: The neural network is a multi-layer perceptron, a deep neural network, a convolutional neural network, a long short-term memory neural network, a feedback neural network or a reinforcement learning network.

8. A signal processing device supporting bipolar signal readout, characterized in that: The device comprises: A data acquisition module, used to acquire an original output current, where the original output current is a dot product result including positive and negative values ​​output during the back propagation process of the neural network; A mapping processing module, used for mapping the original output current into a positive output voltage in an analog domain; A signal conversion module, used for performing analog-to-digital conversion on the output voltage to obtain a corresponding digital signal; The result output module is used to restore the digital signal in the digital domain to obtain a target signal sequence corresponding to the original output current.

9. A signal processing device supporting bipolar signal readout, characterized in that: The device includes: a memory, a processor, and a signal processing program supporting bipolar signal readout that is stored in the memory and can be run on the processor, wherein the signal processing program supporting bipolar signal readout is configured to implement the steps of the signal processing method supporting bipolar signal readout as described in any one of claims 1 to 7.

10. A storage medium, characterized in that: The storage medium stores a signal processing program supporting bipolar signal readout, and when the signal processing program supporting bipolar signal readout is executed by a processor, the steps of the signal processing method supporting bipolar signal readout as claimed in any one of claims 1 to 7 are implemented.

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