Interface heat dissipation material preform and preparation method thereof

Abstract

The present application provides an interface heat dissipation material preform and a preparation method thereof. The interface heat dissipation material preform provided by the present application includes multiple functional areas; each functional area includes a first texture pattern layer, a second texture pattern layer, and an intermediate layer; the first texture pattern layer has a first pattern; the second texture pattern layer has a second pattern; at least one of the following parameters of different functional areas is different, so that different functional areas have different heat dissipation effects: the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer; when the interface heat dissipation material preform is used to encapsulate a chip packaging structure, temperature and pressure are applied to the chip packaging structure by hot pressing; the interface heat dissipation material preform undergoes micro-deformation without melting and maintaining the morphology, so that the heat sink and the chip are adhered together.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to an interface heat dissipation material preform and a preparation method thereof. Background Art

[0002] With the rapid development of semiconductor technology, the integration of integrated circuits has been continuously improved. In the chip packaging structure, the chip has gradually shifted from a single chip to multi-chip integration or large-scale monolithic integration. This shift has brought higher performance and functional density, but it has also posed a more severe challenge to the heat dissipation performance of the chip.

[0003] The existing chip heat dissipation solution is to use a unified heat dissipation material or structure to meet the heat dissipation requirements of the entire chip packaging structure. However, when the heat dissipation requirements within the chip packaging structure are uneven, the heat generated in some areas will be much higher than in other areas. The unified heat dissipation material or structure often cannot provide sufficient heat dissipation capacity, resulting in the heat in the high-heat area cannot be dissipated in time, which may cause chip overheating, performance degradation or even damage. At the same time, this "one-size-fits-all" heat dissipation solution may also lead to excessive heat dissipation in low-heat areas, resulting in unnecessary energy waste and increased heat dissipation costs. Summary of the invention

[0004] In view of this, the present application provides an interface heat dissipation material preform to meet the heat dissipation requirements of a chip packaging structure and improve the heat dissipation effect of the chip packaging structure.

[0005] Specifically, the present application is implemented through the following technical solutions:

[0006] In a first aspect, the present application provides an interface heat dissipation material preform, the interface heat dissipation material preform comprising a plurality of functional regions; each functional region comprises a first texture pattern layer facing the heat sink, a second texture pattern layer facing the chip, and an intermediate layer disposed between the first texture pattern layer and the second texture pattern layer; wherein the first texture pattern layer has a first pattern of a first specified morphology; the second texture pattern layer has a second pattern of a second specified morphology;

[0007] At least one of the following parameters of different functional areas is different, so that the different functional areas have different heat dissipation effects: the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer;

[0008] When the interface heat dissipation material preform is applied to a chip packaging structure, temperature and pressure are applied to the chip packaging structure where the interface heat dissipation material preform is located by a hot pressing method; wherein, under the synergistic effect of the temperature and the pressure, the interface heat dissipation material preform undergoes micro-deformation without melting and maintaining its morphology, so as to adhere the heat sink and the chip of the chip packaging structure together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

[0009] The second aspect of the present application provides a method for preparing an interface heat dissipation material preform, the method being used to prepare any one of the interface heat dissipation material preforms provided in the first aspect of the present application; the method comprising:

[0010] Obtaining an initial piece; wherein the initial piece is a plate-like object having a single thickness region or a plate-like object having multiple thickness regions;

[0011] The initial part is stamped with a micro-stamping model to form the interface heat dissipation material preform; wherein the micro-stamping model has pattern areas matching multiple functional areas; when the initial part is a plate-like object with multiple thickness areas, each thickness area is used to form a functional area.

[0012] A third aspect of the present application provides a chip packaging method, the method comprising:

[0013] Fixing at least one chip on the substrate, and placing an interface heat dissipation material preform on the at least one chip; wherein the interface heat dissipation material preform is any one of the interface heat dissipation material preforms provided in the first aspect of the present application;

[0014] placing a heat sink on the interface heat dissipation material preform to form an intermediate part;

[0015] Temperature and pressure are applied to the intermediate member so that the interface heat dissipation material preform is micro-deformed under the synergistic effect of the temperature and the pressure without melting and maintaining the morphology, so as to adhere the heat sink and the chip together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

[0016] The interface heat dissipation material preform provided in the present application is provided with a plurality of functional regions, and each functional region includes a first texture pattern layer facing the heat sink, a second texture pattern layer facing the chip, and an intermediate layer provided between the first texture pattern layer and the second texture pattern layer, and the first texture pattern layer has a first pattern with a first specified morphology, and the second texture pattern layer has a second pattern with a second specified morphology, and at least one parameter of the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer in different functional regions is different, so that different functional regions have different heat dissipation effects. In this way, when the interface heat dissipation material preform is applied to a chip packaging structure, temperature and pressure can be applied to the chip packaging structure by a hot pressing method, so that the interface heat dissipation material preform is slightly deformed under the synergistic effect of temperature and pressure without melting and maintaining the morphology, so as to adhere the heat sink and the chip together through the slightly deformed first texture pattern layer and the slightly deformed second texture pattern layer. In this way, on the first hand, by setting up multiple functional areas and making the multiple functional areas have different heat dissipation effects, when the interface heat dissipation material preform is applied to the chip packaging structure, the heat dissipation requirements of different heating areas inside the chip packaging structure can be met. On the second hand, since multiple different functional areas are integrated, the heat dissipation effect can be coordinated and adjusted in a variety of different ways such as thickness or pattern morphology. For different heat dissipation requirements, the lowest cost solution can be selected for heat dissipation while ensuring heat dissipation. On the third hand, by setting up different functional areas, multiple chips with different heat dissipation requirements can be packaged at one time, thereby improving the efficiency of chip packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of an interface heat dissipation material preform provided for an exemplary embodiment of the present application;

[0018] Figure 2 A schematic diagram of a chip packaging structure in which an interface heat dissipation material preform is located according to an exemplary embodiment of the present application;

[0019] Figure 3 A schematic diagram of a single chip shown as an exemplary embodiment of the present application;

[0020] Figure 4 A top view of an interface heat dissipation material preform provided for an exemplary embodiment of the present application;

[0021] Figure 5 A schematic diagram of an interface heat dissipation material preform according to another exemplary embodiment of the present application;

[0022] Figure 6A schematic diagram of a chip packaging structure in which an interface heat dissipation material preform is located is shown as another exemplary embodiment of the present application;

[0023] Figure 7 A schematic diagram of a chip packaging structure in which an interface heat dissipation material preform is located according to another exemplary embodiment of the present application;

[0024] Figure 8 A flow chart of a method for preparing an interface heat dissipation material preform provided by an exemplary embodiment of the present application;

[0025] Fig. 9 A schematic diagram showing the implementation principle of micro-embossing according to an exemplary embodiment of the present application;

[0026] Fig.10 A flowchart of a chip packaging method according to an exemplary embodiment of the present application;

[0027] Description of reference numerals:

[0028] 1: Functional area;

[0029] 11: first texture pattern layer;

[0030] 12: second texture pattern layer;

[0031] 13: Middle layer. DETAILED DESCRIPTION

[0032] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application.

[0033] The terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in this article refers to and includes any or all possible combinations of one or more associated listed items.

[0034] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0035] Specific embodiments are given below to introduce the technical solution of the present application in detail.

[0036] Figure 1 This is a schematic diagram of an interface heat dissipation material preform provided by an exemplary embodiment of the present application. Figure 1 The interface heat dissipation material preform provided in this embodiment includes a plurality of functional regions 1; each functional region 1 includes a first texture pattern layer 11 facing the heat sink, a second texture pattern layer 12 facing the chip, and an intermediate layer 13 arranged between the first texture pattern layer and the second texture pattern layer; wherein the first texture pattern layer 11 has a first pattern of a first specified morphology; the second texture pattern layer 12 has a second pattern of a second specified morphology;

[0037] At least one of the following parameters of different functional areas 1 is different, so that the different functional areas have different heat dissipation effects: the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer;

[0038] When the interface heat dissipation material preform is used in a chip packaging structure, temperature and pressure are applied to the chip packaging structure where the interface heat dissipation material preform is located by a hot pressing method; wherein, under the synergistic effect of the temperature and the pressure, the interface heat dissipation material preform undergoes micro-deformation without melting and maintaining its morphology, so as to adhere the heat sink and the chip in the chip packaging structure together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

[0039] Specifically, the interface heat dissipation material preform is made of the interface heat dissipation material, and the interface heat dissipation material preform is used to provide an effective heat conduction path between the chip and the heat sink to meet the heat dissipation requirements of the chip.

[0040] Furthermore, the interface heat dissipation material preform is made of a material with high thermal conductivity. The interface heat dissipation material can efficiently complete the heat transfer and has good ductility to facilitate the connection between the chip and the heat sink.

[0041] Optionally, in a possible implementation manner, the interface heat dissipation material preform is made of any one of the following materials: indium, tin, silver, indium alloy, tin alloy, silver alloy, graphite, graphene and composite materials.

[0042] Furthermore, the interface heat dissipation material preform includes multiple functional areas, and the specific number of functional areas included is set according to the number of heating areas included in the chip packaging structure in which it is located. It can be understood that the chip packaging structure includes a substrate, at least one chip fixed on the substrate, an interface heat dissipation material preform placed on the chip, and a heat sink placed on the interface heat dissipation material preform. For example, when the chip packaging structure includes multiple chips, it is considered that each chip corresponds to a heating area, which includes multiple heating areas. Further, when the chip packaging structure includes one chip (large chip), it can be considered that there are multiple heating areas on the one chip.

[0043] It should be noted that different functional areas have different heat dissipation effects to adapt to the heat generated by different heat-generating areas of the chip packaging structure.

[0044] Furthermore, each functional area is composed of a stacked first texture pattern layer 11 , an intermediate layer 13 and a second texture pattern layer 12 .

[0045] The first texture pattern layer 11 faces the heat sink. It should be noted that the first texture pattern layer 11 has a first pattern of a first specified morphology, and the specific morphology of the first pattern is set according to actual needs and is not limited in this embodiment.

[0046] Furthermore, the second texture pattern layer 12 faces the chip. It should be noted that the second texture pattern layer 12 has a second pattern of a second specified morphology; wherein the specific morphology of the second pattern is set according to actual needs and is not limited in this embodiment.

[0047] Optionally, in a possible implementation, the specific morphology of the first pattern and the second pattern may be any of the following morphologies: a protrusion matrix or a protrusion array consisting of protrusions of the following types: rectangular protrusions, circular protrusions, linear protrusions, trapezoidal protrusions, polygonal protrusions, elliptical protrusions, triangular protrusions, star-shaped protrusions, conical protrusions, etc.

[0048] Optionally, in a possible implementation, when the specific morphology is a protrusion array, the distance between two adjacent columns can be equal, and the distance between two adjacent columns is set according to actual needs, and is not limited in this embodiment. Further, when the specific morphology is a protrusion array, each row and column can be evenly arranged in the form of a matrix, or can be staggered, and is not limited in this embodiment.

[0049] In a specific implementation, for example, the second pattern may be set to a denser pattern and the first pattern may be set to a sparser pattern according to heat dissipation requirements.

[0050] Furthermore, the middle layer 13 is located between the first texture pattern layer 11 and the second texture pattern layer 12 , and plays a role of connection and support. The heat on the chip can be transferred to the heat sink through the first texture pattern layer 11 , the middle layer 13 and the second texture pattern layer 12 .

[0051] Furthermore, the thickness of the first texture pattern layer 11, the thickness of the second texture pattern layer 12, and the thickness of the intermediate layer 13 are also determined according to the actual heat dissipation requirements. In specific implementation, the thickness of the first texture pattern layer 11, the thickness of the second texture pattern layer 12, and the thickness of the intermediate layer 13 can be determined according to the heat dissipation requirements; the heat dissipation capacity corresponding to different thickness combinations can also be determined based on historical heat dissipation data, and then the thickness of the first texture pattern layer 11, the thickness of the second texture pattern layer 12, and the thickness of the intermediate layer 13 can be determined based on this. For example, in one embodiment, when the interface heat dissipation material preform is used to encapsulate two chips of the same thickness, the interface heat dissipation material preform includes two functional areas, which are respectively recorded as the first functional area and the second functional area. Further, for the first functional area, the thickness of the first texture pattern layer 11 is determined to be 300 microns, the thickness of the second texture pattern layer 12 is determined to be 50 microns, and the thickness of the intermediate layer 13 is determined to be 200 microns; similarly, for the second functional area, the thickness of the first texture pattern layer 11 is determined to be 200 microns, the thickness of the second texture pattern layer 12 is determined to be 150 microns, and the thickness of the intermediate layer 13 is determined to be 200 microns.

[0052] It should be noted that for each functional area, the contact area between the functional area and the chip and the heat sink and the heat transfer path will affect the heat dissipation effect of the functional area. Among them, the contact area between the functional area and the chip and the heat sink is affected by the first pattern of the first texture pattern layer 11 and the second pattern morphology of the second texture pattern layer 12. The heat transfer path is affected by the thickness distribution method of the first texture pattern layer 11, the second texture pattern layer 12 and the intermediate layer 13. For example, when the thickness of the two functional areas is the same, if the thickness distribution method of the first texture pattern layer 11, the second texture pattern layer 12 and the intermediate layer 13 is different, the heat dissipation effect is also different (for example, the first texture pattern layer 11 and the second texture pattern layer 12 of one functional area are thinner and the intermediate layer 13 is thicker, and the first texture pattern layer 11 and the second texture pattern layer 12 of another functional area are thicker and the intermediate layer 13 is thinner, the heat dissipation effects of the two functional areas are different).

[0053] In this embodiment, at least one of the following parameters of different functional areas is set to be different so that the different functional areas have different heat dissipation effects: the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer.

[0054] It should be noted that, for the same functional area, the first texture pattern layer 11 and the second texture pattern layer 12 may be the same or different, and this is not limited in the present embodiment. For example, in one possible implementation, for a certain functional area, the first texture pattern layer 11 and the second texture pattern layer 12 are symmetrical about the intermediate layer 13, that is, the first pattern of the first texture pattern layer 11 and the second pattern of the second texture pattern layer 12 have the same morphology, and the thickness of the first texture pattern layer 11 and the second texture pattern layer 12 is also the same. For another example, in another possible implementation, for a certain functional area, the morphology of the first texture pattern layer 11 and the second texture pattern layer 12 are different, or the thickness of the first texture pattern layer 11 and the second texture pattern layer 12 are different.

[0055] Specifically, the interface heat dissipation material preform is used for a chip packaging structure, and the chip packaging structure may include one chip or multiple chips. That is, the interface heat dissipation material preform can be used to package one chip, or to package multiple chips at the same time.

[0056] It should be noted that when the interface heat dissipation material preform is applied to the chip packaging structure, temperature and pressure are applied to the chip packaging structure by hot pressing (pressure is applied to the chip packaging structure from the side where the heat sink is located). At this time, the interface heat dissipation material preform softens under the action of temperature and undergoes micro-deformation under the action of pressure. After the interface heat dissipation material preform is slightly deformed, a new metal layer is exposed, and the new metal layer is bonded to the chip and the heat dissipation cover, that is, the upper part of the first texture pattern layer is adhered to the heat sink through micro-deformation, and the lower part of the second texture pattern layer is adhered to the chip through micro-deformation.

[0057] The interface heat dissipation material preform provided in the present embodiment is provided with a plurality of functional regions, and each functional region includes a first texture pattern layer facing the heat sink, a second texture pattern layer facing the chip, and an intermediate layer provided between the first texture pattern layer and the second texture pattern layer, and the first texture pattern layer has a first pattern with a first specified morphology, and the second texture pattern layer has a second pattern with a second specified morphology, and at least one parameter of the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer in different functional regions is different, so that different functional regions have different heat dissipation effects. In this way, when the interface heat dissipation material preform is applied to a chip packaging structure, temperature and pressure can be applied to the chip packaging structure by hot pressing, so that the interface heat dissipation material preform is slightly deformed under the synergistic effect of temperature and pressure without melting and maintaining the morphology, so as to adhere the heat sink and the chip together through the slightly deformed first texture pattern layer and the slightly deformed second texture pattern layer. In this way, on the first hand, by setting up multiple functional areas and making each functional area have different heat dissipation effects, the interface heat dissipation material preform is applied to the chip packaging structure to meet the heat dissipation requirements of different heating areas inside the chip packaging structure. On the second hand, since multiple different functional areas are integrated, the heat dissipation effect can be coordinated and adjusted in a variety of different ways such as thickness or pattern morphology. For different heat dissipation requirements, the lowest cost solution can be selected for heat dissipation while ensuring heat dissipation. On the third hand, by setting up different functional areas, multiple chips with different heat dissipation requirements can be packaged at one time, thereby improving the efficiency of chip packaging.

[0058] Three more specific embodiments are given below to introduce the technical solution of the present application in detail:

[0059] Embodiment 1: A single chip is packaged using the interface heat dissipation material preform.

[0060] Figure 2 This is a schematic diagram of a chip packaging structure where an interface heat dissipation material preform is located according to an exemplary embodiment of the present application. Figure 2 ,exist Figure 2 In the example shown, the interface heat dissipation material preform is used to package a single chip; the single chip has multiple heat generating areas, and at least two of the multiple heat generating areas have different heat generating areas; the multiple functional areas include at least two heat dissipation areas adapted to the at least two heat generating areas;

[0061] The thickness of the at least two heat dissipation areas is the same, and the heat dissipation effects of the at least two heat dissipation areas are different, so that the single chip can be packaged through the interface heat dissipation material preform and the heat dissipation requirements of the at least two heat dissipation areas can be met; wherein the thickness of each heat dissipation area is equal to the sum of the thickness of the first texture pattern, the thickness of the middle layer and the thickness of the second texture pattern.

[0062] Specifically, when the chip to be packaged is a single chip (for example, a relatively large chip), the single chip has multiple heating areas, and the heating conditions of different heating areas may be the same or different. Further, the heat generation of at least two of the multiple heating areas is different, that is, the heating conditions of at least two heating areas are different.

[0063] For example, Figure 3 This is a schematic diagram of a single chip shown in an exemplary embodiment of the present application. Figure 3 ,exist Figure 3 In the example shown, the chip has two heating areas. For the convenience of description, the two heating areas are respectively recorded as the first heating area and the second heating area. Figure 3 It is understandable that the first heating area has a higher calorific value, and the second heating area has a lower calorific value. Furthermore, since the calorific values ​​of the two heating areas are different, the corresponding heat dissipation requirements are also different.

[0064] Furthermore, when the heat generation amounts of at least two of the multiple heat generation areas included in a single chip are different, the interface heat dissipation material preform includes at least two functional areas matching the at least two heat generation areas (for the convenience of explanation, the at least two functional areas are recorded as at least two heat dissipation areas).

[0065] Further, combined with the above example, in order to encapsulate Figure 3 The chip shown, Figure 4 A top view of an interface heat dissipation material preform provided by an exemplary embodiment of the present application. Figure 3 and Figure 4 ,exist Figure 4 In the example shown, the interface heat dissipation material preform includes a first heat dissipation region and a second heat dissipation region; wherein the first heat dissipation region is adapted to the first heat generating region, and the second heat dissipation region is adapted to the second heat dissipation region.

[0066] With reference to the foregoing description, it can be understood that each heat dissipation region completes heat transfer through the first texture pattern, the middle layer and the second texture pattern to achieve heat dissipation.

[0067] It should be noted that the thickness of each heat dissipation area is the same. It can be understood that the thickness of each heat dissipation area is equal to the sum of the thickness of the first texture pattern, the thickness of the middle layer and the thickness of the second texture pattern. Figure 2 , the thickness of the first heat dissipation area and the second heat dissipation area are the same.

[0068] The following is a detailed description of how to achieve different heat dissipation effects through the interface heat dissipation material preform:

[0069] Figure 5 This is a schematic diagram of an interface heat dissipation material preform according to another exemplary embodiment of the present application. Figure 5 , Optionally, in a possible implementation, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer of the at least two heat dissipation regions are the same, and the first pattern morphology and / or the second pattern morphology of the at least two heat dissipation regions are different;

[0070] or;

[0071] The morphology of the first pattern and / or the morphology of the second pattern of the at least two heat dissipation regions are the same, and at least two of the thickness of the first texture pattern layer, the thickness of the second texture pattern layer and the thickness of the intermediate layer in the at least two heat dissipation regions are different;

[0072] or;

[0073] The morphologies of the first patterns and / or the second patterns of the at least two heat dissipation regions are different, and at least two thicknesses of the first texture pattern layer, the second texture pattern layer and the intermediate layer in the at least two heat dissipation regions are different.

[0074] For example, in Figure 5 In the example shown in Figure A, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the middle layer in the heat dissipation area on the left and the heat dissipation area on the right are the same, the first pattern morphology of the heat dissipation area on the left is spherical, and the second pattern morphology is square; the first pattern morphology of the heat dissipation area on the right is square, and the second pattern morphology is spherical. In this way, when the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the middle layer are the same, different first pattern morphologies and second pattern morphologies are set to achieve different heat dissipation effects in different heat dissipation areas.

[0075] Further, in Figure 5In the example shown in Figure B, the first pattern morphology and the second pattern morphology of the heat dissipation area on the left are the same as those of the heat dissipation area on the right. The thickness relationship of the heat dissipation area on the left is: the thickness of the first texture pattern layer < the thickness of the middle layer < the thickness of the second example pattern layer; the thickness relationship of the heat dissipation area on the right is: the thickness of the middle layer < the thickness of the first texture pattern layer = the thickness of the second example pattern layer. In this way, when the first pattern morphology and the second pattern morphology are the same, by setting at least two of the thickness of the first texture pattern layer, the thickness of the second texture pattern layer and the thickness of the middle layer to be different, the heat dissipation effects of different heat dissipation areas are different.

[0076] Further, in Figure 5 In the example shown in Figure C, the first pattern morphology of the heat dissipation area on the left is square, and the second pattern morphology is spherical; the first pattern morphology of the heat dissipation area on the right is spherical, and the second pattern morphology is square; the thickness relationship of the heat dissipation area on the left is: the thickness of the first texture pattern layer = the thickness of the second example pattern layer > the thickness of the second example pattern layer; the thickness relationship of the heat dissipation area on the right is: the thickness of the first texture pattern layer = the thickness of the second example pattern layer < the thickness of the middle layer. In this way, by setting at least two of the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the middle layer to be different, and setting the morphology of the first pattern and the morphology of the second pattern in different heat dissipation areas to be different, the heat dissipation effects of different heat dissipation areas can be different.

[0077] See also Figures 2 to 5It can be understood that when the interface heat dissipation material preform is used to encapsulate a single chip, the interface heat dissipation material preform includes two functional areas (i.e., two heat dissipation areas) corresponding to the first heat-generating area and the second heat-generating area on the chip with different heat generation. When the thickness of the two heat dissipation areas is the same, further, under the premise of ensuring that the thickness of the two heat dissipation areas is the same, by setting the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer, the two heat dissipation areas can have different heat dissipation effects (i.e., by setting the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer of the two heat dissipation areas The thickness, as well as the thickness of the middle layer are the same, and the first pattern morphology and / or the second pattern morphology of the at least two heat dissipation areas are different; or; the first pattern morphology and / or the second pattern morphology of the two heat dissipation areas are the same, and at least two of the thicknesses of the first texture pattern layer, the thickness of the second texture pattern layer and the thickness of the middle layer in the at least two heat dissipation areas are different; or the first pattern morphology and / or the second pattern morphology of the two heat dissipation areas are different, and at least two of the thicknesses of the first texture pattern layer, the thickness of the second texture pattern layer and the thickness of the middle layer in the at least two heat dissipation areas are different, so that the thicknesses of the two heat dissipation areas are the same, but the heat dissipation effects are different).

[0078] See also Figure 5 As described above, different texture patterns and thickness distribution methods affect the path and efficiency of heat conduction. For example, in one embodiment, some patterns have a higher surface area, thereby increasing heat radiation; while other patterns optimize heat conduction by guiding heat flow.

[0079] The interface heat dissipation material preform provided in this embodiment, on the one hand, can optimize the heat conduction path by influencing the path and efficiency of heat conduction through different texture patterns, so that heat can be more effectively transferred from the chip to the heat sink. On the other hand, by combining different patterns and thickness distribution schemes, the interface heat dissipation material preform can achieve accurate heat dissipation of different heat dissipation areas in a single chip, and each heat dissipation and heating area can obtain a heat dissipation effect that matches its heat dissipation requirements, ensuring the reliability and scientificity of heat dissipation.

[0080] Embodiment 2: Encapsulating multiple chips using an interface heat dissipation material preform.

[0081] Optional, Figure 6 This is a schematic diagram of a chip packaging structure in which an interface heat dissipation material preform is located in another exemplary embodiment of the present application. Figure 6 ,exist Figure 6 In the example shown, the interface heat dissipation material preform is used to package multiple chips; the multiple functional areas include multiple chip fixing areas adapted to the multiple chips;

[0082] The heat dissipation capabilities of the multiple chip fixing areas are different; the sum of the thickness of each chip fixing area and the thickness of the chip adapted to the chip fixing area is equal to a specified value, so that the multiple chips can be fixed simultaneously through the interface heat dissipation material preform.

[0083] Specifically, when a plurality of chips are packaged using the interface heat dissipation material preform, different chips may have different heat generation amounts and thus have corresponding different heat dissipation requirements.

[0084] Furthermore, at this time, the number of functional areas included in the interface heat dissipation material preform is equal to the number of chips, one functional area corresponds to one chip, that is, one functional area is adapted to one chip. For the convenience of explanation, at this time, the functional area is recorded as the chip fixing area.

[0085] It should be noted that the sum of the thickness of each chip fixing region and the thickness of the chip adapted to the chip fixing region is equal to a specified value, so that the multiple chips can be fixed simultaneously by the interface heat dissipation material preform.

[0086] For example, in Figure 6 In the example shown, the chip packaging structure includes two chips. For the convenience of explanation, the two chips are sequentially recorded as a first chip and a second chip. Similarly, the interface heat dissipation material preform includes two chip fixing areas, which are respectively recorded as a first chip fixing area and a second chip fixing area, wherein the total thickness of the first chip and the first chip fixing area is equal to a specified value, the first chip and the first chip fixing area match, and the first chip fixing area is used to fix the first chip; similarly, the total thickness of the second chip and the second chip fixing area is equal to a specified value, the second chip and the second chip fixing area match, and the second chip fixing area is used to fix the second chip.

[0087] It should be noted that the specified value is set according to actual needs and is not limited in this embodiment.

[0088] In specific implementation, if the thicknesses of the multiple chips are the same, then the thicknesses of the multiple chip fixing areas on the interface heat dissipation material preform are also the same. In addition, the thicknesses of the first texture pattern layer, the second texture pattern layer, and the intermediate layer of the multiple chip fixing areas can be the same, and the first pattern morphology and / or the second pattern morphology of the at least two heat dissipation areas are different; or, the morphology of the first pattern and / or the morphology of the second pattern of the multiple chip fixing areas are the same, and at least two of the thicknesses of the first texture pattern layer, the second texture pattern layer, and the intermediate layer in the multiple chip fixing areas are different; or; the morphology of the first pattern and / or the morphology of the second pattern of the multiple chip fixing areas are different, and at least two of the thicknesses of the first texture pattern layer, the second texture pattern layer, and the intermediate layer in the multiple chip fixing areas are different, so as to ensure that the thicknesses of the multiple chip fixing areas are the same, so that the heat dissipation effects of the multiple chip fixing areas are different (in this case, the specific morphology of the interface heat dissipation material preform can be as follows: Figure 5 as shown).

[0089] The interface heat dissipation material preform provided in this embodiment can fix multiple chips at the same time while meeting the heat dissipation requirements of different chips, can adapt to different chip requirements, can simplify the packaging process, reduce assembly time, improve production flexibility, and improve production efficiency; in addition, the standardized design of the interface heat dissipation material preform helps to ensure the consistency and repeatability of each multi-chip package, which can reduce the variability in the production process.

[0090] Embodiment 3: The interface heat dissipation material preform is used to package a plurality of chips, and the plurality of chips include chips of at least two different thicknesses.

[0091] Figure 7 This is a schematic diagram of a chip packaging structure in which an interface heat dissipation material preform is located according to another exemplary embodiment of the present application. Figure 7 When the interface heat dissipation material preform is used to fix a plurality of chips, the plurality of chips include at least two chips of different thicknesses; the plurality of chip fixing regions include at least two types of regions of different thicknesses, so that the at least two chips of different thicknesses can be fixed simultaneously by the interface heat dissipation material preform;

[0092] At least one of the following parameters of the at least two types of regions with different thicknesses is different, so that the thicknesses of the at least two types of regions with different thicknesses are different: the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer.

[0093] Specifically, in Figure 7In the example shown, the chip packaging structure includes two chips. For the convenience of explanation, the two chips are sequentially recorded as a third chip and a fourth chip. The interface heat dissipation material preform includes two chip fixing areas, which are respectively recorded as a third chip fixing area and a fourth chip fixing area. Similarly, the total thickness of the third chip and the third chip fixing area is equal to a specified value, the third chip and the third chip fixing area match, and the third chip fixing area is used to fix the third chip; similarly, the total thickness of the fourth chip and the fourth chip fixing area is equal to a specified value, the fourth chip and the fourth chip fixing area match, and the fourth chip fixing area is used to fix the fourth chip.

[0094] Please continue to refer to Figure 7 By adjusting at least one of the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer, a third chip fixing area and a fourth chip fixing area with different thicknesses can be obtained, so that the lower end of the interface heat dissipation material preform contacts with chips of different heights, while the upper end of the interface heat dissipation material preform has the same height and contacts with the lower surface of the heat sink.

[0095] For example, in Figure 7 In the example shown, the height of the third chip is higher and the height of the fourth chip is lower. At this time, the thickness of the third chip fixing area used to fix the third chip is smaller, and the thickness of the fourth chip fixing area used to fix the fourth chip is larger. In this way, the height difference between the two chips can be eliminated through the chip fixing area to achieve reasonable fixation.

[0096] In a possible implementation, the thickness difference between any two regions with different thicknesses is between 20 μm and 700 μm;

[0097] Alternatively, the thickness difference between any two regions with different thicknesses is less than or equal to 80% B; wherein B is the thickness value of the region with the largest thickness among the plurality of chip fixing regions.

[0098] In specific implementation, for example, in one embodiment, the thickness difference between any two regions with different thicknesses may be 260 μm. For another example, in another embodiment, the region with the largest thickness among the plurality of chip fixing regions is 500 μm, and the thickness difference between any two regions with different thicknesses is less than or equal to 400 μm.

[0099] The interface heat dissipation material preform provided in this embodiment can simultaneously encapsulate multiple chips of different thicknesses through the thickness difference of different functional areas in the interface heat dissipation material preform, thereby solving the problem that the traditional packaging method is difficult to be compatible with chips of different thicknesses, and improving the flexibility and application scope of the packaging. In this way, the integrated chip is fixed by the interface heat dissipation material preform, ensuring the stability and reliability of the packaging.

[0100] Corresponding to the aforementioned embodiment of an interface heat dissipation material preform, the present application also provides an embodiment of a method for preparing an interface heat dissipation material preform.

[0101] Figure 8 This is a flow chart of a method for preparing an interface heat dissipation material preform provided by an exemplary embodiment of the present application. Figure 8 The method for preparing the interface heat dissipation material preform provided in this embodiment is used to prepare the interface heat dissipation material preform provided in any one of the first aspects of the present application; the preparation method comprises:

[0102] S801, obtaining an initial part; wherein the initial part is a plate-like object having a single thickness region or a plate-like object having multiple thickness regions.

[0103] Specifically, the initial piece is the starting part of the interface heat dissipation material preform. In specific implementation, the interface heat dissipation material can be used to form a plate-like object with a single thickness or multiple thickness regions. For example, in one embodiment, the interface heat dissipation material can be used to form a flat plate-like object; for another example, in another possible implementation, a micro-embossing model can be used for embossing to form a plate-like object with multiple thickness regions.

[0104] It is understood that when there are multiple thickness regions, each thickness region is used to form a functional region.

[0105] S802, using a micro-embossing model to emboss the initial part to form the interface heat dissipation material preform; wherein the micro-embossing model has pattern areas matching multiple functional areas; when the initial part is a plate-like object with multiple thickness areas, each thickness area is used to form a functional area.

[0106] Specifically, the micro-embossing mold is a tool for embossing a specific pattern on an initial part. The micro-embossing mold has a pattern area that matches the functional area required by the interface heat dissipation material preform to be formed, and can accurately control the shape, size and texture of each functional area.

[0107] Fig. 9 This is a schematic diagram of the implementation principle of micro-embossing according to an exemplary embodiment of the present application, wherein: Fig. 9 Figure A in Figure 1 shows the implementation principle of stamping an initial part having multiple thickness regions. Fig. 9 Figure B in the figure shows the implementation principle diagram of stamping an initial part of a single thickness area.

[0108] Please refer to Fig. 9In Figure A, a micro-embossing model can be used to prepare an initial part with multiple thickness regions, and then the initial part can be embossed by a micro-embossing model with different pattern regions to prepare an interface heat dissipation material preform. For example, by embossing the first pattern region, a functional region of the initial part corresponding to the first pattern region is obtained, and by embossing the second pattern region, a functional region of the initial part corresponding to the second pattern region is obtained; similarly, please refer to Fig. 9 As shown in Figure B, the initial part with a single thickness area can be directly embossed using a micro-embossing model with different pattern areas, and the preparation of the interface heat dissipation material preform can be completed in one embossing.

[0109] Please continue to refer to Fig. 9 It should be noted that the micro-embossing model has multiple pattern areas, each of which is used to form a functional area; further, each pattern area includes an upper mold and a lower mold, the upper mold has a pattern matching the first pattern, and the lower mold has a second pattern matching pattern. During embossing, the upper mold contacts the upper surface of the initial part to form a first texture pattern layer of a functional area, and the lower mold contacts the lower surface of the initial part to form a second texture pattern layer of the functional area. In this way, an interface heat dissipation material preform with multiple functional areas can be formed.

[0110] In addition, in a possible implementation, during the stamping process, the initial piece of the interface heat dissipation material can be heated in an inert gas environment to soften the initial piece of the interface heat dissipation material and prevent it from being oxidized. Further, the temperature at which the initial piece of the interface heat dissipation material is heated needs to be less than or equal to 85% of the melting temperature of the initial piece, that is, the maximum heating temperature is 85% of the melting temperature of the initial piece.

[0111] Optionally, the micro-embossing mold may be a linear pressing mold or a roller mold, which is not limited in this embodiment.

[0112] Furthermore, after the stamping is completed, the interface heat dissipation material preform can be cut off by cutting the model to remove the excess part.

[0113] The preparation method of the interface heat dissipation material preform provided in this embodiment can, through a micro-embossing model, emboss functional areas with different heat dissipation effects on the initial part according to different heat dissipation requirements. In this way, it can ensure that each part of the chip packaging structure can obtain the best heat dissipation effect, thereby improving the heat dissipation performance of the entire chip packaging structure.

[0114] Corresponding to the aforementioned embodiment of an interface heat dissipation material preform, the present application also provides an embodiment of a chip packaging method.

[0115] Fig.10This is a flow chart of a chip packaging method shown in an exemplary embodiment of the present application. Fig.10 The chip packaging method provided in this embodiment includes:

[0116] S1001. Fix at least one chip on a substrate, and place an interface heat dissipation material preform on the at least one chip; wherein the interface heat dissipation material preform is any one of the interface heat dissipation material preforms provided in the first aspect of the present application.

[0117] In specific implementation, when the chip is a large chip, a large chip is directly fixed on the substrate, and then an interface heat dissipation material preform is placed on the chip; when the chip is integrated with multiple chips, each chip is placed in order at a corresponding position on the substrate, and then the interface heat dissipation material preform is placed on multiple chips according to the matching relationship between the functional areas on the interface heat dissipation material preform and each chip.

[0118] S1002, placing a heat sink on the interface heat dissipation material preform to form an intermediate piece.

[0119] In a specific implementation, the heat sink is placed on the interface heat dissipation material preform to obtain an intermediate component consisting of the substrate, the chip, the interface heat dissipation material preform and the heat sink.

[0120] S1003, applying temperature and pressure to the intermediate piece so that the interface heat dissipation material preform is micro-deformed under the synergistic effect of the temperature and the pressure without melting and maintaining the morphology, so as to adhere the heat sink and the chip together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

[0121] In specific implementation, under the action of temperature and pressure, the chip and the heat sink are fixed together through the interface heat dissipation material preform, so that the heat generated by the chip can be transferred to the heat sink through the interface heat dissipation material preform to complete the heat dissipation.

[0122] It should be noted that the specific values ​​of temperature and pressure are set according to actual needs and are not limited in this embodiment. In addition, the specific value of the temperature is less than the melting point of the interface heat dissipation material preform, so that the interface heat dissipation material preform will not be completely melted. Further, under the action of pressure, the interface heat dissipation material preform undergoes micro-deformation while maintaining its morphology, and the first texture pattern layer after micro-deformation is embedded in the heat sink, and the second texture pattern layer after micro-deformation is embedded in the chip, and the first texture pattern layer after micro-deformation and the second texture pattern layer after micro-deformation adhere the heat sink and the chip together.

[0123] The chip packaging method provided in this embodiment uses any interface heat dissipation material preform provided in the first aspect of the present application in the chip packaging process. In this way, after the intermediate piece is formed, it is not necessary to perform a reflow soldering process on the intermediate piece, and temperature and pressure can be directly applied to the intermediate piece. Through the coordinated work of temperature and pressure, the interface heat dissipation material preform undergoes micro-deformation without melting and maintaining the morphology. In this way, the heat sink and the chip can be adhered together through the first texture pattern layer after micro-deformation and the second texture pattern layer after micro-deformation. In this way, in the first aspect, the heat sink and the chip can be directly fixed through the interface heat dissipation material preform, which can simplify the chip packaging process, reduce the difficulty of chip packaging, and improve production efficiency. In the second aspect, the interface heat dissipation material preform undergoes micro-deformation under the coordinated action of temperature and pressure, which can ensure close contact with the chip and the heat sink, thereby improving the reliability and durability of the chip. In addition, since the interface heat dissipation material preform includes multiple areas with different heat dissipation effects, the heat dissipation capacity of the entire chip packaging structure can be improved.

[0124] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. An interface heat dissipation material preform, characterized in that: The interface heat dissipation material preform comprises a plurality of functional regions; each functional region comprises a first texture pattern layer facing the heat sink, a second texture pattern layer facing the chip, and an intermediate layer disposed between the first texture pattern layer and the second texture pattern layer; wherein the first texture pattern layer has a first pattern of a first specified morphology; and the second texture pattern layer has a second pattern of a second specified morphology; At least one of the following parameters of different functional areas is different, so that the different functional areas have different heat dissipation effects: the morphology of the first pattern, the morphology of the second pattern, the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer; When the interface heat dissipation material preform is applied to a chip packaging structure, temperature and pressure are applied to the chip packaging structure where the interface heat dissipation material preform is located by a hot pressing method; wherein, under the synergistic effect of the temperature and the pressure, the interface heat dissipation material preform undergoes micro-deformation without melting and maintaining its morphology, so as to adhere the heat sink and the chip of the chip packaging structure together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

2. The interface heat dissipation material preform according to claim 1, characterized in that: The interface heat dissipation material preform is used to package a single chip; the single chip has multiple heating areas, and at least two of the multiple heating areas have different heat generation; the multiple functional areas include at least two heat dissipation areas adapted to the at least two heating areas; The thickness of the at least two heat dissipation areas is the same, and the heat dissipation effects of the at least two heat dissipation areas are different, so that the single chip can be packaged through the interface heat dissipation material preform and the heat dissipation requirements of the at least two heat dissipation areas can be met; wherein the thickness of each heat dissipation area is equal to the sum of the thickness of the first texture pattern, the thickness of the middle layer and the thickness of the second texture pattern.

3. The interface heat dissipation material preform according to claim 1, characterized in that: The interface heat dissipation material preform is used to encapsulate multiple chips; the multiple functional areas include multiple chip fixing areas adapted to the multiple chips; The heat dissipation capabilities of the multiple chip fixing areas are different; the sum of the thickness of each chip fixing area and the thickness of the chip adapted to the chip fixing area is equal to a specified value, so that the multiple chips can be fixed simultaneously through the interface heat dissipation material preform.

4. The interface heat dissipation material preform according to claim 3, characterized in that: The plurality of chips include at least two chips of different thicknesses; the plurality of chip fixing regions include at least two types of regions of different thicknesses, so as to simultaneously fix the at least two chips of different thicknesses through the interface heat dissipation material preform; At least one of the following parameters of the at least two types of regions with different thicknesses is different, so that the thicknesses of the at least two types of regions with different thicknesses are different: the thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer.

5. The interface heat dissipation material preform according to claim 2, characterized in that: The thickness of the first texture pattern layer, the thickness of the second texture pattern layer, and the thickness of the intermediate layer of the at least two heat dissipation regions are the same, and the morphology of the first pattern and / or the morphology of the second pattern of the at least two heat dissipation regions are different; or; The morphology of the first pattern and / or the morphology of the second pattern of the at least two heat dissipation regions are the same, and at least two of the thickness of the first texture pattern layer, the thickness of the second texture pattern layer and the thickness of the intermediate layer in the at least two heat dissipation regions are different; or; The morphologies of the first patterns and / or the second patterns of the at least two heat dissipation regions are different, and at least two thicknesses of the first texture pattern layer, the second texture pattern layer and the intermediate layer in the at least two heat dissipation regions are different.

6. The interface heat dissipation material preform according to claim 4, characterized in that: The thickness difference between any two regions with different thicknesses is between 20 μm and 700 μm; or, The thickness difference between any two regions with different thicknesses is less than or equal to 80% B; wherein B is the thickness value of the region with the largest thickness among the plurality of chip fixing regions.

7. The interface heat dissipation material preform according to claim 1, characterized in that: The interface heat dissipation material preform is made of any one of the following materials: indium, tin, silver, indium alloy, tin alloy, silver alloy, graphite, graphene and composite material.

8. A method for preparing a preform of an interface heat dissipation material, characterized in that: The preparation method is used to prepare the interface heat dissipation material preform according to any one of claims 1 to 7; the preparation method comprises: Obtaining an initial piece; wherein the initial piece is a plate-like object having a single thickness region or a plate-like object having multiple thickness regions; The initial part is stamped with a micro-stamping model to form the interface heat dissipation material preform; wherein the micro-stamping model has pattern areas matching multiple functional areas; when the initial part is a plate-like object with multiple thickness areas, each thickness area is used to form a functional area.

9. The preparation method according to claim 8, characterized in that: The method of using a micro-embossing model to emboss the initial part comprises: During the stamping process, the initial part is heated, and an inert gas is used to form a protective environment during the heating process to soften the initial part and prevent the initial part from oxidizing; wherein the heating temperature is less than or equal to 85%C; C is the melting temperature of the initial part.

10. A chip packaging method, characterized in that: The method comprises: Fixing at least one chip on the substrate, and placing an interface heat dissipation material preform on the at least one chip; wherein the interface heat dissipation material preform is the interface heat dissipation material preform according to any one of claims 1 to 7; placing a heat sink on the interface heat dissipation material preform to form an intermediate part; Temperature and pressure are applied to the intermediate member so that the interface heat dissipation material preform is micro-deformed under the synergistic effect of the temperature and the pressure without melting and maintaining the morphology, so as to adhere the heat sink and the chip together through the micro-deformed first texture pattern layer and the micro-deformed second texture pattern layer.

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