Hybrid device driving circuit, system and control method

Abstract

The invention relates to the technical field of power electronics, and discloses a hybrid device driving circuit, system and control method.The hybrid device driving circuit comprises a DSP module, an FPGA module, a hybrid device driving module and a mode switching comparison module, and the mode switching comparison module obtains a real-time voltage signal on a load; comparing the real-time voltage signal with a preset reference voltage of each modulation mode, and outputting a mode switching signal; the FPGA module determines a target modulation mode of a PWM signal output by the DSP module based on the mode switching signal, and processes the PWM signal into a target PWM signal corresponding to the target modulation mode; and the hybrid device driving module respectively controls the on and off of the IGBT and the SIC MOS tube based on the target PWM signal, and adjusts the real-time voltage signal under the action of the on and off of the IGBT and the SIC MOS tube so as to drive the load. The problems that an existing hybrid device driving circuit is low in precision and large in loss in control over a delay switch of a switching device are solved.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a hybrid device driving circuit, system and control method. Background Art

[0002] With the rapid development of new energy electric vehicles, higher requirements are put forward for high power density and high efficiency of motor controllers. SIC MOS tubes are favored by the new energy electric vehicle related industries due to their good performance, much lower switching loss than IGBT, and much lower conduction voltage drop of SIC MOS tubes than IGBT under light load. However, due to the high price of SIC MOS tubes compared with IGBT, they have not been widely used. In view of this, a parallel use scheme of IGBT and SIC MOS tubes is proposed.

[0003] In the traditional solution, in the hybrid drive of SIC MOS tubes and IGBTs, two PWMs are output to control IGBTs and SICMOS tubes. However, since the switching voltage drops of IGBTs and SIC MOS tubes are different, it is necessary to generate a turn-on timing strategy by detecting the load circuit. The turn-on timing strategy obtained by the traditional solution has low accuracy and suboptimal efficiency when controlling the delayed switching of IGBTs and SIC MOS tubes. Summary of the invention

[0004] The present application provides a hybrid device driving circuit, system and control method to solve the problems of low accuracy and high loss in the control of delayed switching of switching devices in the existing hybrid device driving circuit.

[0005] The first aspect of the present application provides a hybrid device driving circuit, comprising: a DSP module, an FPGA module, a hybrid device driving module and a mode switching comparison module, wherein the hybrid device driving module comprises an IGBT and a SIC MOS tube, the mode switching comparison module is electrically connected to the hybrid device driving module, the DSP module and the FPGA module respectively, and the FPGA module is electrically connected to the DSP module and the hybrid device driving module respectively; the mode switching comparison module is used to obtain a real-time voltage signal on a load, and compare the real-time voltage signal with a preset reference voltage of each modulation mode, and output a mode switching signal; the DSP module is used to output a PWM signal and a reference signal of each modulation mode; wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; the FPGA module is used to determine a target modulation mode of the PWM signal based on the mode switching signal, and process the PWM signal into a target PWM signal corresponding to the target modulation mode; the hybrid device driving module is used to control the on and off of the IGBT and the SIC MOS tube respectively based on the target PWM signal, and adjust the real-time voltage signal under the action of the on and off of the IGBT and the SIC MOS tube to drive the load.

[0006] In a feasible implementation manner, the mode switching comparison module includes: a threshold setting circuit, connected to the output end of the DSP module, for shaping and filtering the reference signal based on the control logic of the IGBT and the SIC MOS tube in each preset modulation mode to obtain a reference voltage, wherein the reference voltage includes an upper threshold and a lower threshold; a hysteresis voltage circuit, provided between the threshold setting circuit and the FPGA module, for obtaining a real-time voltage signal on the load, and comparing the real-time voltage signal with the upper threshold and the lower threshold of each modulation mode, respectively, and outputting the mode switching signal to the FPGA module based on the comparison result.

[0007] In a feasible implementation, the mode switching comparison module further includes: a threshold sampling circuit provided between the output end of the threshold setting circuit and the input end of the DSP module, for collecting a reference voltage output by the threshold setting circuit and outputting it to the DSP module; the DSP module determines whether the threshold setting requirements of the hysteresis comparison circuit are met based on the reference voltage.

[0008] In a feasible implementation manner, the threshold setting circuit includes: a push-pull unit, a filtering unit and an operational amplifier connected in series in sequence, the input end of the push-pull unit is connected to the output end of the DSP module, and the output end of the operational amplifier is connected to the input end of the hysteresis comparison circuit; the push-pull unit shapes the reference signal based on the control logic of the IGBT and the SIC MOS tube in each preset modulation mode, outputs it to the filtering unit for filtering, and outputs the reference voltage through the operational amplifier.

[0009] In a feasible implementation manner, the push-pull unit is composed of a PMOS tube and an NMOS tube connected in series.

[0010] In a feasible implementation manner, the filtering unit is an RC filtering circuit composed of a resistor and a capacitor.

[0011] In a feasible implementation manner, the hysteresis comparison circuit includes: a same-direction hysteresis comparison unit and a reverse hysteresis comparison unit connected in parallel, and a first positive feedback unit and a second positive feedback unit; the first positive feedback unit and the second positive feedback unit jointly set the hysteresis voltage of the hysteresis comparison circuit; the two input ends of the same-direction hysteresis comparison unit are respectively connected to the load and the output end of the threshold setting circuit, so as to obtain the real-time voltage signal of the load and compare it with the lower limit threshold of the reference voltage output by the threshold setting circuit; the two input ends of the reverse hysteresis comparison unit are respectively connected to the load and the output end of the threshold setting circuit The first positive feedback unit is provided between the first input terminal of the same-direction hysteresis comparison unit and the output terminal of the same-direction hysteresis comparison unit, and the first input terminal of the same-direction hysteresis comparison unit is one of the same-direction hysteresis comparison units connected to the load; the second positive feedback unit is provided between the first input terminal of the reverse hysteresis comparison unit and the output terminal of the reverse hysteresis comparison unit, and the first input terminal of the reverse hysteresis comparison unit is one of the reverse hysteresis comparison units connected to the threshold setting circuit.

[0012] In a feasible implementation, the hysteresis comparison circuit also includes: a first N-order filter circuit, arranged between the first input end of the same-direction hysteresis comparison unit, the second input end of the reverse hysteresis comparison unit and the load, for filtering the real-time voltage signal; the second input end of the reverse hysteresis comparison unit is one of the reverse hysteresis comparison units connected to the load; a second N-order filter circuit, arranged between the output end of the same-direction hysteresis comparison unit, the output end of the reverse hysteresis comparison unit and the FPGA module, for filtering the mode switching signal.

[0013] In a feasible implementation, the hybrid device driving circuit further includes: a sensor module disposed on the input line of the load, for collecting the real-time current signal in the input line and converting it into the real-time voltage signal and outputting it to the mode switching comparison module.

[0014] In a feasible implementation manner, the FPGA module is specifically used for: if the target modulation mode is modulation mode one, converting the PWM signal based on a first control logic to obtain a target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT; if the target modulation mode is modulation mode two, converting the PWM signal based on a second control logic to obtain a target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SIC MOS tube.

[0015] A second aspect of the present application provides a hybrid device driving circuit system, comprising: at least one load and the hybrid device driving circuit as described above, wherein the load is electrically connected to the IGBT and the SIC MOS tube in the hybrid device driving module respectively.

[0016] The third aspect of the present application provides a control method, which is applied to the hybrid device driving circuit as described above, and the method includes: obtaining a real-time voltage signal on a load and a PWM signal and a reference signal output by the DSP module, wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; generating a corresponding reference voltage based on the rectangular wave signal and preset modulation modes; comparing the real-time voltage signal with the reference voltage of each modulation mode, and outputting a mode switching signal; determining a target modulation mode of the PWM signal based on the mode switching signal, and processing the PWM signal into a target PWM signal corresponding to the target modulation mode; controlling the on and off of the IGBT and the SIC MOS tube respectively based on the target PWM signal, and adjusting the real-time voltage signal to drive the load under the action of the on and off of the IGBT and the SIC MOS tube.

[0017] In a feasible implementation manner, the processing of the PWM signal into a target PWM signal corresponding to the target modulation mode includes: if the target modulation mode is modulation mode one, converting the PWM signal based on a first control logic to obtain a target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT; if the target modulation mode is modulation mode two, converting the PWM signal based on a second control logic to obtain a target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SIC MOS tube.

[0018] In the technical solution provided by the present application, the hybrid device driving circuit includes: a DSP module, an FPGA module, a hybrid device driving module and a mode switching comparison module, the hybrid device driving module includes an IGBT and a SIC MOS tube, the mode switching comparison module is electrically connected to the hybrid device driving module, the DSP module and the FPGA module respectively, and the FPGA module is electrically connected to the DSP module and the hybrid device driving module respectively; the mode switching comparison module is used to obtain a real-time voltage signal on the load, and compare the real-time voltage signal with a preset reference voltage of each modulation mode, and output a mode switching signal; the DSP module is used to output a PWM signal and a reference signal of each modulation mode; wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; the FPGA module is used to determine a target modulation mode of the PWM signal based on the mode switching signal, and process the PWM signal into a target PWM signal corresponding to the target modulation mode; the hybrid device driving module is used to control the on and off of the IGBT and the SIC MOS tube respectively based on the target PWM signal, and adjust the real-time voltage signal under the action of the on and off of the IGBT and the SIC MOS tube to drive the load. In the present application, an FPGA module and a mode switching comparison module are set to respectively realize the control output of the PWM signal and the mode switching of the PWM signal modulation. The FPGA module realizes the output of the PWM signal to reduce the load rate of the DSP module, and the FPGA module can accurately control the timing relationship of the PWM signals of the SIC MOS tube and the IGBT based on the corresponding mode output, thereby improving the delay control accuracy of the driving switch of the hybrid device driving circuit and reducing the loss of the switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of a first structure of a hybrid device driving circuit in an embodiment of the present application;

[0020] Figure 2 A second structural schematic diagram of the hybrid device driving circuit in an embodiment of the present application;

[0021] Figure 3This is a third structural schematic diagram of the hybrid device driving circuit in the embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structure of a threshold setting circuit in an embodiment of the present application;

[0023] Figure 5 A schematic diagram of the circuit principle of the threshold setting circuit in the embodiment of the present application;

[0024] Figure 6 This is a schematic diagram of the structure of the hysteresis comparison circuit in the embodiment of the present application;

[0025] Figure 7 Schematic diagram of the circuit principle of the hysteresis comparison circuit in the embodiment of the present application;

[0026] Figure 8 This is a schematic diagram of the structure of the threshold value recovery circuit in the embodiment of the present application;

[0027] Fig. 9 Schematic diagram of the control method of the hybrid device driving circuit in the embodiment of the present application

[0028] Fig.10 The corresponding relationship between modulation mode 1 and modulation mode 2 in the PWM signal in the embodiment of the present application;

[0029] Fig.11 This is a schematic diagram of a target PWM signal corresponding to modulation mode 1 in an embodiment of the present application;

[0030] Fig.12 This is a schematic diagram of a target PWM signal corresponding to modulation mode 2 in an embodiment of the present application;

[0031] Fig.13 This is a timing diagram of each PWM signal in the modulation mode in the embodiment of the present application;

[0032] Fig.14 This is a timing diagram of each PWM signal under modulation mode 2 in an embodiment of the present application;

[0033] Fig.15 Schematic diagram of a structure of a hybrid device driving system in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The present application provides a hybrid device driving circuit, system and control method, which are used to utilize the timing processing capability of the FPGA module to process a PWM output by the DSP module into a PWM wave required by the hybrid device, and can accurately control the turn-on delay and turn-off delay time of the IGBT and SIC MOS tube in the hybrid device driving module. The FPGA module switches the corresponding modulation mode by identifying the mode switching signal to realize the output of the PWM signal to control the hybrid device driving module to drive the load, thereby improving the control accuracy of the delay switch and reducing the switching loss of the hybrid parallel device.

[0035] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0036] like Figure 1 As shown, the embodiment of the present application provides a hybrid device driving circuit, specifically comprising:

[0037] A DSP module 110, an FPGA module 120, a hybrid device driver module 130 and a mode switching comparison module 140, wherein the hybrid device driver module 130 includes an IGBT and a SIC MOS tube, the mode switching comparison module 140 is electrically connected to the hybrid device driver module 130, the DSP module 110 and the FPGA module 120, respectively, and the FPGA module 120 is electrically connected to the DSP module 110 and the hybrid device driver module 130, respectively;

[0038] The mode switching comparison module 140 is used to obtain a real-time voltage signal on the load, and compare the real-time voltage signal with a preset reference voltage of each modulation mode, and output a mode switching signal;

[0039] The DSP module 110 is used to output a PWM signal and a reference signal of each modulation mode; wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; the PWM signal output here is actually one, and then converted into two after subsequent processing, corresponding to the on and off control of the IGBT and SIC MOS tube respectively.

[0040] The FPGA module 120 is used to determine the target modulation mode of the PWM signal based on the mode switching signal, and process the PWM signal into a target PWM signal corresponding to the target modulation mode; specifically, the FPGA module 120 outputs two target PWM signals based on the target modulation mode, that is, the FPGA module 120 only needs to obtain a PWM signal from the DSP module 110 and process it into two new PWM signals (which include 6 PWM waves), one of which is used for subsequent control of the IGBT, and the other is used for subsequent control of the SIC MOS tube;

[0041] The hybrid device driving module 130 is used to control the on and off of the IGBT and SICMOS tube respectively based on the target PWM signal, and adjust the real-time voltage signal under the on and off of the IGBT and SIC MOS tube to drive the load.

[0042] It should be noted that the hybrid device driving module 130 is a driving signal output module that integrates two power devices, IGBT and SIC MOS tube, and an inverter bridge. The inverter is actually composed of two power devices, IGBT and SIC MOS tube. The driving signal output module drives the IGBT and SIC MOS tube to turn on and off based on the target PWM signal output by the FPGA module 120. Figure 2 As shown, three-phase output, namely U, V, and W, is achieved by driving IGBT and SIC MOS tubes.

[0043] That is, after the FPGA module 120 outputs the target PWM signal for controlling the IGBT and SIC MOS tubes in the corresponding modulation mode, it is first given to the driver chip in the hybrid device driver module 130, and the driver chip outputs instructions to control the opening and closing of the IGBT and SIC MOS tubes in the inverter bridge according to the timing relationship in the target PWM signal.

[0044] Furthermore, the DSP module 110 outputs two PWM signals, one for controlling the conduction of the inverter bridge to output voltage to control the load, and the other for use as a reference for mode switching comparison. After receiving the real-time voltage signal on the load side, the mode switching comparison circuit 140 compares it with the reference voltage given by the DSP module 110 to obtain the corresponding modulation mode, and outputs it to the FPGA module 120 in the form of a level.

[0045] It is understandable that the DSP module 110 outputs a total of one PWM signal and two rectangular wave signals with specific frequencies and duty cycles. The PWM signal is output to the FPGA module 120, and the two rectangular wave signals are output to the mode switching comparison circuit 140. Figure 2As shown, the PWM signal output to the FPGA module 120 is used to output the PWM wave (such as PWM_GE and PWM_GS in the figure) of the hybrid device driver module 130 based on the modulation mode, and the two PWM waves output to the mode switching comparison circuit 140 are used as the reference voltage of the modulation mode (such as PWM_IS_H and PWM_IS_L in the figure). The hybrid device driver module 130 outputs three-phase signals (such as I_U, I_V, I_W in the figure), and the mode switching comparison circuit 140 identifies each phase signal separately and outputs the corresponding mode switching signal (such as U_SW, V_SW, W_SW in the figure).

[0046] In the present application, an FPGA module and a mode switching comparison module are set to respectively realize the control output of the PWM signal and the mode switching of the PWM signal modulation. The FPGA module realizes the output of the PWM signal to reduce the load rate of the DSP module, and the FPGA module can accurately control the PWM signal timing relationship of the SIC MOS tube and the IGBT based on the corresponding mode output, so as to improve the accuracy of the delay switch of the driving device of the hybrid device driving circuit and reduce the loss.

[0047] It is understandable that the mode switching comparison module 140 compares the phase current voltage waveform collected by the current sensor with the set overcurrent threshold upper and lower limits, and outputs a mode switching signal. The module is composed of a same-direction and reverse hysteresis comparison circuit, and the hysteresis voltage is increased to prevent the output mode switching signal from changing back and forth due to the phase current voltage waveform noise. The reference voltage of the same-direction and reverse comparison circuits is set based on the reference signal output by the DSP module 110. The DSP module 110 outputs a rectangular wave of a certain frequency and duty cycle, which is shaped and filtered into a reference voltage. In practical applications, the reference voltage can also be flexibly adjusted by changing the duty cycle of the rectangular wave, thereby changing the upper and lower limits of the hysteresis voltage, which is convenient for debugging and use, and optimizing the controller overcurrent parameters. The mode switching comparison circuit 140 can accurately identify the switching threshold point, reduce the switching mode switching delay, and improve the accuracy of the control delay switch.

[0048] In a possible implementation, Figure 3 As shown, the mode switching comparison module 140 includes:

[0049] A threshold setting circuit 141 and a hysteresis comparison circuit 142, wherein the threshold setting circuit 141 is connected to the output end of the DSP module 110 and the input end of the hysteresis comparison circuit 142 respectively, and the output end of the hysteresis comparison circuit 142 is connected to the input end of the FPGA module 120;

[0050] The threshold setting circuit 141 is used to shape and filter the reference signal based on the control logic of the IGBT and SIC MOS tube in each preset modulation mode to obtain a reference voltage, wherein the reference voltage includes an upper threshold and a lower threshold;

[0051] The hysteresis voltage circuit 142 is used to obtain the real-time voltage signal on the load, and compare the real-time voltage signal with the upper threshold and the lower threshold of each modulation mode respectively, and output the mode switching signal to the FPGA module 120 based on the comparison result.

[0052] It should be noted that the threshold setting circuit 141 processes the two reference signals respectively and outputs two reference voltages, such as Figure 3 PWM_IS_H and PWM_IS_L in the figure correspond to the upper and lower thresholds of the reference voltage, respectively. The reference voltage of the hysteresis voltage circuit 142 is set by the threshold setting circuit 141. The rectangular wave with a certain frequency and duty cycle output by the DSP module 110 is shaped and filtered into a reference voltage by the threshold setting circuit 141.

[0053] After the hysteresis comparison circuit 142 obtains the real-time voltage signal on the load, it compares it with the upper threshold and the lower threshold output based on the two reference signals PWM_IS_H and PWM_IS_L, and then determines the modulation mode based on the comparison result. There are two modulation modes provided in this application, namely modulation mode 1 and modulation mode 2, wherein modulation mode 1 is that the SIC MOS tube is turned on first and then turned off, and the zero voltage turn-on and turn-off of the IGBT is realized by delaying the IGBT turn-on and turning off before the SIC MOS tube. In practical applications, the modulation mode 1 is used to control the turn-on and turn-off of the IGBT and the SIC MOS tube, which can reduce the switching loss of the hybrid parallel device; the modulation mode 2 is opposite to the modulation mode 1, the IGBT is turned on first and then turned off by delaying the turn-on of the SIC MOS tube and turning off before the IGBT, and by optimizing the turn-on and turn-off time, it is avoided that in the high current mode, when the PWM signal output by the modulation mode 1 controls the turn-on and turn-off of the IGBT and the SIC MOS tube, the current is too large, exceeding the SIC MOSFET safe working area, and causing the SIC MOSFET to be damaged.

[0054] It is understandable that there are two threshold setting circuits 141, which correspond to the upper threshold and the lower threshold of the reference voltage respectively. The circuit structures of the two threshold setting circuits 141 are the same, and are mainly composed of MOS tubes and operational amplifiers.

[0055] Specifically, Figure 4 As shown, the threshold setting circuit 141 includes:

[0056] A push-pull unit 1411, a filtering unit 1412 and an operational amplifier 1413 are connected in series in sequence, wherein the input end of the push-pull unit 1411 is connected to the output end of the DSP module 110, and the output end of the operational amplifier 1413 is connected to the input end of the hysteresis comparison circuit 142; wherein the push-pull unit 1411 is composed of a PMOS tube and an NMOS tube connected in series; and the filtering unit 1412 is an RC filtering circuit composed of a resistor and a capacitor.

[0057] The push-pull unit 1411 shapes the reference signal based on the control logic of the IGBT and SIC MOS tube in each preset modulation mode, outputs it to the filtering unit 1412 for filtering, and outputs the reference voltage through the operational amplifier 1413.

[0058] It is understandable that due to the internal GPIO unit of the DSP module 110, the internal resistance of the push-pull tube is relatively large, usually around 100 to 500Ω, and the output reference voltage deviates from the power supply voltage and ground, resulting in a large deviation between the reference voltage after filtering and the theoretical value; in order to reduce this deviation, a separate push-pull unit 1411 is added to the mode switching comparison circuit 140. The push-pull unit 1411 is composed of a PMOS tube and an NMOS tube. After the reference signals PWM_IS_H and PWM_IS_L output by the DSP module 110 are shaped, the high and low levels of the rectangular waves (IS_H and IS_L) are closer to the power supply voltage and ground, thereby improving the accuracy of the upper and lower thresholds of the reference voltage.

[0059] like Figure 5 As shown, the threshold setting circuits 141 corresponding to the two reference signals PWM_IS_H and PWM_IS_L are respectively used. The threshold setting circuit 141 of PWM_IS_H is taken as an example below. PWM_IS_H is a rectangular wave signal with a certain frequency and duty cycle (D_H) output by the DSP module 110, which is shaped by the push-pull unit 1411 composed of PMOS Q2 and NMOS Q3, and then converted into a DC voltage by the two-order RC filter unit 1412 composed of R22, C11, R23 and C9. The voltage is mainly related to the duty cycle D_H and the voltage of VCC_5V (5V power supply in this example), and finally follows the output reference voltage IS_H through the operational amplifier U4B1413.

[0060] In addition, a current limiting resistor R59 is also set before the PWM_IS_H input push-pull unit 1411. R59 mainly plays a current limiting role. When the DSP module 110 outputs a high impedance state, the input state of the push-pull unit 1411 is uncertain, and R61 is added to pull it down to a low level. The operational amplifier U4B 1413 implements impedance isolation to prevent the threshold setting circuit 141 from affecting the hysteresis comparison circuit 142, and finally outputs the upper threshold value of the reference voltage IS_H = (1-D_H) * VCC_5V; similarly, the lower threshold value of the reference voltage is processed based on the threshold setting circuit 141, and IS_L = (1-D_L) * VCC_5V is obtained.

[0061] In a possible implementation, Figure 3 As shown, the mode switching comparison module 140 also includes:

[0062] A threshold value collection circuit 143 provided between the output end of the threshold setting circuit 141 and the input end of the DSP module 110, for collecting the reference voltage output by the threshold setting circuit 141 and outputting it to the DSP module 110;

[0063] The DSP module 110 determines whether the threshold setting requirement of the hysteresis comparison circuit 142 is met based on the reference voltage.

[0064] It should be noted that the threshold value feedback circuit 143 is actually a feedback circuit of the threshold value setting circuit 141, and is specifically composed of a resistor and a capacitor. Figure 8 As shown, the collected threshold voltage signal is uploaded to the DSP module 110 to determine whether the upper and lower thresholds of the reference voltage output to the hysteresis comparison circuit 142 are correct.

[0065] In a possible implementation, Figure 6 As shown, the hysteresis comparison circuit 142 includes:

[0066] A same-direction hysteresis comparison unit 1421 and a reverse hysteresis comparison unit 1422, as well as a first positive feedback unit 1423 and a second positive feedback unit 1424 connected in parallel; the first positive feedback unit 1423 and the second positive feedback unit 1424 jointly set the hysteresis voltage of the hysteresis comparison circuit 124;

[0067] The two input terminals of the same direction hysteresis comparison unit 1421 are respectively connected to the load and the output terminal of the threshold setting circuit 141, and are used to obtain the real-time voltage signal of the load and compare it with the lower limit threshold of the reference voltage output by the threshold setting circuit 141;

[0068] The two input terminals of the reverse hysteresis comparison unit 1422 are respectively connected to the load and the output terminal of the threshold setting circuit 141, and are used to obtain the real-time voltage signal of the load and compare it with the upper limit threshold of the reference voltage output by the threshold setting circuit 141;

[0069] The first positive feedback unit 1423 is arranged between the first input end of the same-direction hysteresis comparison unit 1421 and the output end of the same-direction hysteresis comparison unit 1421, and the first input end of the same-direction hysteresis comparison unit 1421 is one of the same-direction hysteresis comparison units 1421 connected to the load; the second positive feedback unit 1424 is arranged between the first input end of the reverse hysteresis comparison unit 1422 and the output end of the reverse hysteresis comparison unit 1422, and the first input end of the reverse hysteresis comparison unit 1422 is one of the reverse hysteresis comparison units 1422 connected to the threshold setting circuit 142.

[0070] Furthermore, a filter circuit is provided at the input end and the output end of the same direction hysteresis comparison unit 1421 and the reverse direction hysteresis comparison unit 1422 for filtering the input and output signals.

[0071] Specifically, the hysteresis comparison circuit 142 further includes:

[0072] A first N-order filter circuit 1425 is provided between the first input terminal of the same-direction hysteresis comparison unit 1421, the second input terminal of the reverse hysteresis comparison unit 1422 and the load, and is used to filter the real-time voltage signal; the second input terminal of the reverse hysteresis comparison unit 1422 is one of the reverse hysteresis comparison units 1422 connected to the load;

[0073] The second N-th order filter circuit 1426 is provided between the output end of the same direction hysteresis comparison unit 1421, the output end of the reverse direction hysteresis comparison unit 1422 and the FPGA module 120, and is used for filtering the mode switching signal.

[0074] It is understandable that the circuit structures corresponding to the same direction hysteresis comparison and the reverse hysteresis comparison are the same. Taking the U phase as an example, the implementation principle of the V and W phases is the same as that of the U phase. Figure 7As shown, R1 and C1 form a first-order RC filter circuit (i.e., the first N-order filter circuit 1425), filter the U-phase current signal collected by the current sensor (the sensor output signal is a 0.5-4.5V sinusoidal voltage signal), and then send it to the hysteresis comparison circuit 142. Among them, U38A and its peripheral resistors R9, R424, R15, and R8 are the same-direction hysteresis comparison unit 1421, U38B and its peripheral resistors R21, R24, R433, and R8 are the reverse hysteresis comparison unit 1422, and R15 and R24 are positive feedback resistors (i.e., the first positive feedback unit 1423 and the second positive feedback unit 1424), which play the role of setting the hysteresis voltage; the selected comparators U38A and U38B are open-drain outputs, and a pull-up resistor R8 needs to be added. The pull-up level is VCC_3V3, which is 3.3V in this example because the FPGA module 120 used is 3.3V. IO port, R10 and C5 form an RC filter circuit (that is, the second N-order filter circuit 1426), and the hysteresis comparison circuit 142 finally outputs the U_SW high and low change level signal (0~3.3V square wave signal) to the FPGA module 120; VCC_3V3, IS_L, R8, R15 and R424 determine the hysteresis voltage size of the same direction hysteresis comparison unit 1421; VCC_3V3, IS_H, R8, R21 and R24 determine the hysteresis voltage size of the reverse hysteresis comparison unit 1422.

[0075] In a feasible implementation manner, the hybrid device driving circuit further includes:

[0076] The sensor module 150 disposed on the input line of the load is used to collect the real-time current signal in the input line and convert it into a real-time voltage signal to output to the mode switching comparison module 140 .

[0077] It should be noted that the sensor module 150 is composed of three current sensors, which are used to collect current signals in the U, V, and W three-phase lines respectively, and send them to the mode switching comparison module 140. The mode switching comparison module 140 is provided with three hysteresis comparison circuits 142, or three forward and reverse hysteresis comparison circuits, each corresponding to one line.

[0078] After the mode switching comparison circuit 140 outputs the mode switching signal, the FPGA module 120 determines the target modulation mode by identifying the mode switching signal. If the target modulation mode is modulation mode one, the PWM signal is converted based on the first control logic to obtain the target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT; if the target modulation mode is modulation mode two, the PWM signal is converted based on the second control logic to obtain the target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SIC MOS tube.

[0079] It should be noted that, taking the U-phase line as an example, the FPGA module 120 identifies the mode switching comparison circuit 140 outputs the U_SW mode switching signal. When U_SW is at a high level, the FPGA module 120 implements the modulation mode 1, and when it is at a low level, the modulation mode 2 is implemented. The target PWM signals of the specific modulation mode 1 and the modulation mode 2 are as follows: Figure 11-14 As shown in the figure, the DSP module 110 outputs the PWM signal with a high level time of Ta, a low level time of Tb, and a dead time of Dt; in modulation mode 1, the SIC MOS tube is turned on first and then turned off, and the IGBT is turned on with a delay and the SIC MOS tube is turned off with a delay. In modulation mode 2, the on-off strategy of the IGBT and SIC MOS tube is opposite to that of modulation mode 1, and the IGBT is turned on first and then turned off.

[0080] In summary, by using the timing processing capability of the FPGA module to process a PWM output by the DSP module into two PWM waves required by the hybrid parallel power device, the turn-on delay and turn-off delay time can be accurately controlled. The FPGA module implements modulation mode 1 or modulation mode 2 by identifying the high or low level of the mode switching signal; in modulation mode 1, the SIC MOS tube is turned on first and then turned off, and the zero voltage turn-on and turn-off of the IGBT is achieved by delaying the turn-on of the IGBT and turning off the SIC MOS tube before the SIC MOS tube, thereby reducing the switching loss of the hybrid parallel device; in modulation mode 2, the IGBT is turned on first and then turned off, and the turn-on and turn-off time is optimized to avoid the current exceeding the safe working area of ​​the SIC MOS tube due to the use of modulation mode 1 in the high current mode, thereby causing the SIC MOS tube to be damaged. Such an implementation scheme can not only accurately identify the switching threshold point, reduce the switching delay of the switch mode, and avoid exceeding the safe working area of ​​the SIC MOS tube; but also can accurately control the turn-on and turn-off delay in the modulation mode, and keep the overall upper and lower tube dead time of the hybrid parallel power device unchanged.

[0081] See also Fig. 9, is an implementation method of a control method of a hybrid device drive circuit provided by the present application. This embodiment takes a three-phase motor as an example of a load. The drive of each phase line is separately identified and controlled by the hybrid device drive circuit. The method includes the following steps:

[0082] 901. Obtain a real-time voltage signal on a load, a PWM signal output by a DSP module, and a reference signal, where the reference signal is a rectangular wave signal with a specific frequency and duty cycle.

[0083] In this step, the real-time voltage signal is collected by the current sensor set on the circuit, and the current sensor collects the current signal of the motor circuit, and then converted into the corresponding voltage signal through the mode switching comparison module. The PWM signal and the reference signal are both output by the DSP module, where the PWM signal is the 6-channel PWM wave output by the DSP module, and the reference signal is two-channel PWM wave, specifically the power supply voltage and ground in the circuit. In this case, when the power supply is 5V, the two reference signals should be 5V and 0V (such as Figure 4 PWM_IS_H and PWM_IS_L in the ...

[0084] 902. Generate a corresponding reference voltage based on the rectangular wave signal and preset modulation modes.

[0085] In this step, the preset modulation modes include modulation mode 1 (referred to as mode 1) and modulation mode 2 (referred to as mode 2), and the corresponding modulation modes are configured based on different intervals of the line current signal, such as Fig.10 As shown, according to the on-off voltage drop of the IGBT and the SIC MOS tube, the modulation mode of each interval is set respectively, and then the reference voltage is output based on the size of the rectangular wave signal and the current signal corresponding to each interval.

[0086] The following uses the generation of the upper threshold of the reference voltage as an example to illustrate the working principle of the threshold setting circuit. PWM_IS_H is a rectangular wave signal with a certain frequency and duty cycle (D_H) output by the DSP module. It is shaped by the push-pull unit composed of PMOS Q2 and NMOS Q3, and then converted into a DC voltage by a two-order RC filter circuit composed of R22, C11, R23 and C9. The voltage is mainly related to the duty cycle D_H and VCC_5V (5V power supply in this case). Finally, it is followed by the output reference voltage IS_H through the op amp U4B. Similarly, the principle of the lower threshold of the reference voltage is the same as that of the upper threshold. The calculation formula is the upper threshold IS_H = (1-D_H) * VCC_5V, and the lower threshold IS_L = (1-D_L) * VCC_5V.

[0087] 903. Compare the real-time voltage signal with the reference voltage of each modulation mode, and output a mode switching signal.

[0088] In this embodiment, the mode switching comparison circuit detects the relationship between the voltage amplitudes corresponding to the three-phase current signals and the upper and lower thresholds of the reference voltage, and outputs corresponding phase mode switching signals U_SW, V_SW, and W_SW.

[0089] 904. Determine a target modulation mode of the PWM signal based on the mode switching signal, and process the PWM signal into a target PWM signal corresponding to the target modulation mode.

[0090] In this step, when the mode switching signals U_SW, V_SW, and W_SW are at a high level, the corresponding phase PWM signal is modulated into the target PWM signal corresponding to mode 1; when the mode switching signals U_SW, V_SW, and W_SW are at a low level, the corresponding phase PWM signal is modulated into the target PWM signal corresponding to mode 2.

[0091] If the target modulation mode is modulation mode 1, the PWM signal is converted based on a first control logic to obtain a target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT.

[0092] If the target modulation mode is modulation mode 2, the PWM signal is converted based on a second control logic to obtain a target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SICMOS tube.

[0093] 905. Based on the target PWM signal, the IGBT and the SIC MOS tube are respectively controlled to be turned on and off, and the real-time voltage signal is adjusted to drive the load under the effect of the IGBT and the SIC MOS tube being turned on and off.

[0094] The target PWM signal includes two channels, each of which has 6 PWM waves, such as Figure 4 PWM_GE and PWM_GS in the figure, where the timing relationship in the waveform of PWM_GE and PWM_GS is different according to different modulation modes. PWM_GE is the 6-channel PWM wave output by the FPGA module to the driver chip, which is used to control the IGBT; PWM_GS is the 6-channel PWM wave output by the FPGA module to the driver chip, which is used to control the SIC MOS tube; after receiving PWM_GE and PWM_GS, the driver chip controls the operation of the inverter bridge and outputs the three-phase voltage UVW to control the operation of the motor. Under different modulation modes, the control timing of the upper and lower tubes in the inverter bridge is also different.

[0095] If in mode 1, Fig.13As shown, the FPGA module recognizes that the PWM signal output by the DSP module is at a high level, and modulates two drive signals PWM_GE and PWM_GS based on mode 1. At this time, the SIC MOS tube (corresponding to the drive signal PWM_GS) is turned on with a delay of Tdoff, and the IGBT (corresponding to the drive signal PWM_GE) is turned on with a delay of Tdon+Tdoff; if it is recognized that the DSP module outputs a low-level PWM signal, the IGBT is immediately turned off, and the SIC MOS tube is turned off with a delay of Tdoff; wherein, the PWM_GS high-level time of the FPGA output SIC MOS tube is Ta, and the low-level time is Tb, the PWM_GE high-level time of the IGBT is Ta-Tdon-Tdoff, and the low-level time is Tb+Tdon+Tdoff, so that the IGBT turn-on delay is Tdon, and the turn-off delay is Tdoff, and the upper and lower tube dead time of the SIC MOS tube in the inverter bridge is kept unchanged at Dt, that is, the overall dead time remains unchanged.

[0096] If in mode 2, the principle is opposite to that of mode 1, and will not be repeated here. In actual applications, the specific values ​​of Tdon and Tdoff in mode 1 and mode 2 will be different, and can be adjusted according to the actual situation.

[0097] This embodiment uses the timing processing capability of the FPGA module to process a PWM output by the DSP module into a PWM wave required by the hybrid device, which can accurately control the turn-on delay and turn-off delay time of the IGBT and SIC MOS tube in the hybrid device driver module. The FPGA module switches the corresponding modulation mode by identifying the mode switching signal to realize the output of the PWM signal to control the hybrid device driver module to drive the load. This solves the problem of low accuracy and high loss in the control of the delay switch of the switch device in the existing hybrid device driver circuit.

[0098] The present application also provides a hybrid device driving system, such as Fig.15 As shown, the system includes at least one load 1510 and a hybrid device driving circuit 1520 provided in the above embodiment, and the load 1510 is electrically connected to the IGBT and the SIC MOS tube in the hybrid device driving module 1520 respectively.

[0099] In summary, the hybrid driving circuit provided in the present application includes all the solutions of the hybrid device driving circuit provided in the above embodiments. Therefore, it can also achieve the same functions and solve the same technical problems as the above embodiments.

[0100] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0101] In addition, in the description of the embodiments of the present application, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For those skilled in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0102] In the description of the present application, the terms “first”, “second” and “third” are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0103] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above embodiments, those skilled in the art should understand that any person skilled in the art who is familiar with the technical field can still modify the technical solutions recorded in the above embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A hybrid device driving circuit, characterized in that: include: A DSP module, an FPGA module, a hybrid device driving module and a mode switching comparison module, wherein the hybrid device driving module includes an IGBT and a SIC MOS tube, the mode switching comparison module is electrically connected to the hybrid device driving module, the DSP module and the FPGA module respectively, and the FPGA module is electrically connected to the DSP module and the hybrid device driving module respectively; The mode switching comparison module is used to obtain a real-time voltage signal on the load, compare the real-time voltage signal with a preset reference voltage of each modulation mode, and output a mode switching signal; The DSP module is used to output a PWM signal and a reference signal of each modulation mode; wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; The FPGA module is used to determine a target modulation mode of the PWM signal based on the mode switching signal, and process the PWM signal into a target PWM signal corresponding to the target modulation mode; The hybrid device driving module is used to control the on and off of the IGBT and the SIC MOS tube respectively based on the target PWM signal, and adjust the real-time voltage signal under the action of the on and off of the IGBT and the SIC MOS tube to drive the load.

2. The hybrid device driving circuit according to claim 1, characterized in that: The mode switching comparison module comprises: A threshold setting circuit is connected to the output end of the DSP module, and is used to shape and filter the reference signal based on the control logic of the IGBT and the SIC MOS tube in each preset modulation mode to obtain a reference voltage, wherein the reference voltage includes an upper threshold and a lower threshold; A hysteresis voltage circuit is provided between the threshold setting circuit and the FPGA module, and is used to obtain a real-time voltage signal on the load, and compare the real-time voltage signal with the upper threshold and the lower threshold of each modulation mode respectively, and output the mode switching signal to the FPGA module based on the comparison result.

3. The hybrid device driving circuit according to claim 2, characterized in that: The mode switching comparison module also includes: A threshold value collection circuit provided between the output end of the threshold setting circuit and the input end of the DSP module, for collecting the reference voltage output by the threshold setting circuit and outputting it to the DSP module; The DSP module determines whether the threshold setting requirement of the hysteresis comparison circuit is met based on the reference voltage.

4. The hybrid device driving circuit according to claim 3, characterized in that: The threshold setting circuit comprises: A push-pull unit, a filter unit and an operational amplifier connected in series in sequence, wherein the input end of the push-pull unit is connected to the output end of the DSP module, and the output end of the operational amplifier is connected to the input end of the hysteresis comparison circuit; The push-pull unit shapes the reference signal based on the control logic of the IGBT and the SIC MOS tube in each preset modulation mode, outputs it to the filtering unit for filtering, and outputs the reference voltage through the operational amplifier.

5. The hybrid device driving circuit according to claim 4, characterized in that: The push-pull unit is composed of a PMOS tube and an NMOS tube connected in series.

6. The hybrid device driving circuit according to claim 4, characterized in that: The filtering unit is an RC filtering circuit composed of a resistor and a capacitor.

7. The hybrid device driving circuit according to claim 3, characterized in that: The hysteresis comparison circuit comprises: A same-direction hysteresis comparison unit and a reverse hysteresis comparison unit, as well as a first positive feedback unit and a second positive feedback unit connected in parallel; the first positive feedback unit and the second positive feedback unit jointly set a hysteresis voltage of the hysteresis comparison circuit; The two input terminals of the same direction hysteresis comparison unit are respectively connected to the load and the output terminal of the threshold setting circuit, and are used to obtain the real-time voltage signal of the load and compare it with the lower limit threshold of the reference voltage output by the threshold setting circuit; The two input terminals of the reverse hysteresis comparison unit are respectively connected to the load and the output terminal of the threshold setting circuit, and are used to obtain the real-time voltage signal of the load and compare it with the upper limit threshold of the reference voltage output by the threshold setting circuit; The first positive feedback unit is provided between the first input terminal of the same-direction hysteresis comparison unit and the output terminal of the same-direction hysteresis comparison unit, and the first input terminal of the same-direction hysteresis comparison unit is one of the same-direction hysteresis comparison units connected to the load; The second positive feedback unit is arranged between the first input terminal of the reverse hysteresis comparison unit and the output terminal of the reverse hysteresis comparison unit, and the first input terminal of the reverse hysteresis comparison unit is one of the reverse hysteresis comparison units connected to the threshold setting circuit.

8. The hybrid device driving circuit according to claim 7, characterized in that: The hysteresis comparison circuit also includes: A first N-order filter circuit is provided between the first input terminal of the same direction hysteresis comparison unit, the second input terminal of the reverse hysteresis comparison unit and the load, and is used to filter the real-time voltage signal; the second input terminal of the reverse hysteresis comparison unit is one of the reverse hysteresis comparison units connected to the load; The second N-th order filter circuit is provided between the output end of the same direction hysteresis comparison unit, the output end of the reverse direction hysteresis comparison unit and the FPGA module, and is used for filtering the mode switching signal.

9. The hybrid device driving circuit according to any one of claims 1 to 8, characterized in that: The hybrid device driving circuit also includes: The sensor module disposed on the input line of the load is used to collect the real-time current signal in the input line and convert it into the real-time voltage signal and output it to the mode switching comparison module.

10. The hybrid device driving circuit according to any one of claims 1 to 8, characterized in that: The FPGA module is specifically used for: If the target modulation mode is modulation mode 1, convert the PWM signal based on a first control logic to obtain a target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT; If the target modulation mode is modulation mode 2, the PWM signal is converted based on a second control logic to obtain a target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SIC MOS tube.

11. A hybrid device driving circuit system, characterized in that: include: At least one load and a hybrid device driving circuit according to any one of claims 1 to 10, wherein the load is electrically connected to the IGBT and the SIC MOS tube in the hybrid device driving module respectively.

12. A control method, applied to the hybrid device driving circuit according to any one of claims 1 to 10, characterized in that: The control method comprises: Acquire a real-time voltage signal on the load and a PWM signal and a reference signal output by the DSP module, wherein the reference signal is a rectangular wave signal with a specific frequency and duty cycle; Based on the rectangular wave signal and the preset modulation modes, generating a corresponding reference voltage; Compare the real-time voltage signal with the reference voltage of each modulation mode, and output a mode switching signal; determining a target modulation mode of the PWM signal based on the mode switching signal, and processing the PWM signal into a target PWM signal corresponding to the target modulation mode; Based on the target PWM signal, the IGBT and the SIC MOS tube are respectively controlled to be turned on and off, and under the action of the IGBT and the SIC MOS tube being turned on and off, the real-time voltage signal is adjusted to drive the load.

13. The control method according to claim 12, characterized in that: The processing of the PWM signal into a target PWM signal corresponding to the target modulation mode includes: If the target modulation mode is modulation mode 1, convert the PWM signal based on a first control logic to obtain a target PWM signal, wherein the first control logic is that the SIC MOS tube is turned on before the IGBT and the SIC MOS tube is turned off after the IGBT; If the target modulation mode is modulation mode 2, the PWM signal is converted based on a second control logic to obtain a target PWM signal, wherein the second control logic is that the IGBT is turned on before the SIC MOS tube and the IGBT is turned off after the SIC MOS tube.

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