High-efficiency reconfigurable multi-conversion-ratio switched capacitor converter circuit and working method thereof

By introducing new power tubes Q11A and Q11B into series-parallel switching capacitor converters and adjusting the control signal timing, the problem of energy density and efficiency reduction when converting 4-1 conversion ratio to 2-1 conversion ratio is solved, and the energy density and efficiency reduction is achieved. Higher power tube and capacitance utilization and efficiency improvements.

CN119401796APending Publication Date: 2025-02-07CHENGDU YICHONG WIRELESS POWER TECH CO LTD
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Patent Information

Application Number
CN202411539175.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-31
Publication Date
2025-02-07

AI Technical Summary

Technical Problem

The series-parallel type switching capacitor converter with 4-1 conversion ratio is greatly reduced when performing conversion ratio application.

Method used

New power tubes Q11A and power tubes Q11B are introduced, and the control signal timing is changed to improve the utilization of low-end power tubes and capacitors.

Benefits of technology

The efficiency at 2-1 conversion ratio is significantly improved, avoiding the problems of low power tube utilization and reduced energy density in traditional solutions.

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Abstract

The invention relates to the field of power supply conversion, and provides a high-efficiency reconfigurable multi-conversion-ratio switched capacitor converter circuit and a working method thereof, and the circuit comprises a basic circuit, a power tube Q11A and a power tube Q11B; the basic circuit comprises an A-phase circuit and a B-phase circuit which are connected between the input end VIN and the output end VOUT, and the power tube Q11A and the power tube Q11B are correspondingly connected in the A-phase circuit and the B-phase circuit respectively. According to the high-efficiency multi-conversion-ratio switched capacitor converter circuit provided by the invention, a new power tube Q11A and a new power tube Q11B are introduced, and the time sequence of a control signal is changed, so that the utilization rate of a low-gear power tube and a capacitor can be remarkably improved, and the working efficiency is improved.
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Description

Technical Field

[0001] The present invention relates to the field of power conversion, and in particular to a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit and a working method thereof. Background Art

[0002] With the booming development of portable and wearable electronic devices, Internet of Things (IoT) technology and new energy vehicle market, the demand for high-efficiency, small-size and wide-voltage input range power conversion solutions is becoming increasingly urgent. Switched capacitor converters have gradually become the focus of research due to their inherent advantages, such as no need for inductors, high conversion efficiency and flexible voltage regulation capabilities. Common topologies of switched capacitor converters include Dickson type, series-parallel type and Doubler type. Among these common switched capacitor converter topologies, the series-parallel switched capacitor converter has the advantages of simple principle, simple implementation of multiple conversion ratios and low capacitor cost, and has good application prospects.

[0003] In the forward mode, the most common input-output (or output-input) voltage conversion ratios of the series-parallel switched capacitor converter are 4-1, 3-1, 2-1, and 1-1, and the input-output (or output-input) current conversion ratios are 1-4, 1-3, 1-2, and 1-1. The high-conversion-ratio series-parallel switched capacitor converter can be easily reconstructed into a low-conversion-ratio series-parallel switched capacitor converter, such as Figure 1 It is a series-parallel switched capacitor converter with a conversion ratio of 4-1. Q1AB~Q10AB are power tubes for two phases AB respectively. The control signal timing is as follows: Figure 2 As shown, after reconstruction, we can get Figure 3 The conversion ratio of the series-parallel switched capacitor converter is 2-1, and its control signal is as follows Figure 4 In addition, Figure 1 The 4-1 conversion ratio series-parallel switched capacitor converter can also be reconstructed as Figure 5 The series-parallel switched capacitor converter with a conversion ratio of 3-1 shown in FIG. Figure 6 shown.

[0004] pass Figure 3 , Figure 4The power tube utilization rate of the series-parallel switched capacitor converter with a 2-1 conversion ratio achieved by the reconstruction method is extremely low. The power tubes Q3AB, Q4AB, Q7AB, Q9AB and Q10AB are not used in the 2-1 conversion ratio working mode. Figure 5 , Figure 6 The series-parallel switched capacitor converter with a 3-1 conversion ratio achieved by the reconstruction method uses a high-range power tube but does not use the low-range power tube Q4AB and the power tube Q10AB, which will cause the converter impedance to be large and the efficiency to be low.

[0005] Through the above analysis, it can be seen that Figure 1 When a series-parallel switched capacitor converter with a 4-1 conversion ratio is used in a variable conversion ratio application, the energy density and efficiency of the converter will be greatly reduced. Summary of the invention

[0006] The present invention aims to provide a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit and its working method, so as to solve the problem that the energy density and efficiency of the converter are greatly reduced when the series-parallel switched capacitor converter with a 4-1 conversion ratio is used in a variable conversion ratio application.

[0007] The present invention provides a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit, comprising a basic circuit and a power tube Q11A and a power tube Q11B;

[0008] The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT; the A-phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A; the B-phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and capacitor CF3B; the input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence; note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF2A and the power tube Q2A; the capacitor CF2A and the power tube Q2A, and the electrical connection point CP2A between the capacitor and the power tube Q3A, and the electrical connection point CN2A between the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B; the electrical connection point CP1A is connected in sequence through the drain and source of the power tube Q5A, the power tube The source and drain of Q5B are connected to the electrical connection point CP1B; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence; the electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A;The electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; the electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; the electrical connection point CN3B is grounded via the drain and source of the power tube Q10B;

[0009] The connection mode of the power tube Q11A and the power tube Q11B in the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit can be any one of the following four modes:

[0010] Method 1: The input terminal VIN is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A on one hand, and is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B on the other hand.

[0011] Method 2: The electrical connection point CP1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CP1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B.

[0012] Mode 3: The input terminal VIN is connected to the electrical connection point CP2A via the drain and source of the power tube Q11A on one hand, and is connected to the electrical connection point CP2B via the drain and source of the power tube Q11B on the other hand.

[0013] Method 4: the electrical connection point CN1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CN1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B.

[0014] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0015] The high-efficiency multi-conversion ratio switched capacitor converter circuit proposed in the present invention can significantly improve the utilization rate of low-range power tubes and capacitors by introducing new power tubes Q11A and Q11B and changing the control signal timing, thereby improving work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The block diagram of a series-parallel switched capacitor converter with a 4-1 conversion ratio.

[0017] Figure 2 The control signal timing diagram of a series-parallel switched capacitor converter with a 4-1 conversion ratio.

[0018] Figure 3 The block diagram of a series-parallel switched capacitor converter with a 2-1 conversion ratio.

[0019] Figure 4 The control signal timing diagram of a series-parallel switched capacitor converter with a 2-1 conversion ratio.

[0020] Figure 5 It is a series-parallel switched capacitor converter with a conversion ratio of 3-1.

[0021] Figure 6 The control signal timing diagram of a series-parallel switched capacitor converter with a 3-1 conversion ratio.

[0022] Figure 7 4 is a structural diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 1 of the present invention.

[0023] Figure 8 1 is a control signal timing diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 1 of the present invention at a 4-1 conversion ratio.

[0024] Fig. 9 Schematic diagram of the working state of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 1 of the present invention at a 2-1 conversion ratio, where the dotted line represents the off state.

[0025] Fig.10 This is a control signal timing diagram of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 1 of the present invention at a 2-1 conversion ratio.

[0026] Fig.11 4 is a structural diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 2 of the present invention.

[0027] Fig.12 Schematic diagram of the working state of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Example 2 of the present invention at a 2-1 conversion ratio, where the dotted line represents the off state.

[0028] Fig.13 1 is a control signal timing diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio in Embodiment 2 of the present invention at a 2-1 conversion ratio.

[0029] Fig.14 4 is a structural diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio in Example 3 of the present invention.

[0030] Fig.15 Schematic diagram of the working state of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio in Example 3 of the present invention at a 3-1 conversion ratio, where the dotted line represents the off state.

[0031] Fig.16 1 is a control signal timing diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio in Example 3 of the present invention at a 3-1 conversion ratio.

[0032] Fig.17 4 is a structural diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio in Example 4 of the present invention.

[0033] Fig.18 Schematic diagram of the working state of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio in Example 4 of the present invention at a 3-1 conversion ratio, where the dotted line represents the off state.

[0034] Fig.19 1 is a control signal timing diagram of a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit having a 4-1 conversion ratio and a 3-1 conversion ratio in Example 4 of the present invention at a 3-1 conversion ratio. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0036] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] Example 1

[0038] In order to solve the problem of low power tube utilization and reduced energy density when a series-parallel switched capacitor converter with a 4-1 conversion ratio is reconstructed into a series-parallel switched capacitor converter with a 2-1 conversion ratio, this embodiment proposes a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 2-1 conversion ratio. By introducing new power tubes Q11A and Q11B and changing the control signal timing, the efficiency at a 2-1 conversion ratio is significantly improved when it works at a 2-1 conversion ratio.

[0039] like Figure 7 As shown, the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit includes a basic circuit and a power tube Q11A and a power tube Q11B;

[0040] The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT;

[0041] The A phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A;

[0042] The B phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and a capacitor CF3B;

[0043] Among them, capacitor CF1A, capacitor CF2A and capacitor CF3A, as well as capacitor CF1B, capacitor CF2B and capacitor CF3B are flying capacitors with the same withstand voltage;

[0044] The input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence on the one hand, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence on the other hand;

[0045] Note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF1A and the power tube Q2A; the electrical connection point CP2A between the capacitor CF2A and the power tube Q2A, and the electrical connection point CN2A between the capacitor CF3A and the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B;

[0046] The electrical connection point CP1A is connected to the electrical connection point CP1B via the drain and source of the power tube Q5A and the source and drain of the power tube Q5B in sequence; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence;

[0047] The electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A; the electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; the electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; the electrical connection point CN3B is grounded via the drain and source of the power tube Q10B;

[0048] The input terminal VIN is also connected to the electrical connection point CP3A via the drain and source of the power tube Q11A on one hand, and is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B on the other hand.

[0049] In this embodiment, the working principle of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows:

[0050] (1) When operating at a 4-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: Figure 8 As shown, specifically:

[0051] The power tubes Q11A and Q11B are always in the off state;

[0052] In the A phase circuit, power tubes Q1A, Q2A, Q3A and Q4A are turned on alternately with power tubes Q5A, Q6A, Q7A, Q8A, Q9A and Q10A; in the B phase circuit, power tubes Q1B, Q2B, Q3B and Q4B are turned on alternately with power tubes Q5B, Q6B, Q7B, Q8B, Q9B and Q10B; wherein the control signal of each power tube in the B phase circuit is inversely proportional to the control signal of the corresponding power tube in the A phase circuit.

[0053] (2) When operating at a 2-1 conversion ratio, the working state of each power tube in the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: Fig. 9 As shown, the control signal timing is as follows Fig.10 As shown, specifically:

[0054] The power tubes Q6A, Q9A, Q6B and Q9B are always kept in the on state, and the power tubes Q3A and Q3B are always kept in the off state;

[0055] In the A phase circuit, the power tube Q1A and the power tube Q2A are turned on alternately with the power tube Q5A and the power tube Q8A, and the power tube Q4A and the power tube Q11A are turned on alternately with the power tube Q7A and the power tube Q10A; in the B phase circuit, the power tube Q1B and the power tube Q2B are turned on alternately with the power tube Q5B and the power tube Q8B, and the power tube Q4B and the power tube Q11B are turned on alternately with the power tube Q7B and the power tube Q10B; wherein the control signal of each power tube in the B phase circuit is inversely proportional to the control signal of each corresponding power tube in the A phase circuit. It should be noted that the power tubes Q1A, Q2A, Q5A and Q8A can be turned on independently with the power tubes Q4A, Q11A, Q7A and Q10A.

[0056] From the above, it can be seen that due to the introduction of power tube Q11A and power tube Q11B, when Figure 7When the high-efficiency multi-conversion ratio switched capacitor converter shown in the figure switches from a 4-1 conversion ratio operation to a 2-1 conversion ratio operation, power tubes Q1A, Q2A, Q5A, Q8A, Q4A, Q11A, Q7A and Q10A form two parallel 2-1 conversion ratio switched capacitor converters with power tubes Q1B, Q2B, Q5B, Q8B, Q4B, Q11B, Q7B and Q10B, and power tubes Q6A, Q9A, Q6B and Q9B are always kept in the on state, and power tubes Q3A and Q3B are always kept in the off state, so that capacitors CF2A and CF2B are connected in parallel to the capacitor at the output terminal VOUT. Compared with the traditional series-parallel switched capacitor converter with a conversion ratio of 4-1, the high-efficiency multi-conversion ratio switched capacitor converter circuit with a conversion ratio of 4-1 and 2-1 proposed in this embodiment significantly improves the utilization rate of power tubes and capacitors, thereby improving the efficiency of working under a conversion ratio of 2-1.

[0057] Example 2

[0058] This embodiment provides a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit. The difference from the first embodiment is that the connection method of the power tube Q11A and the power tube Q11B is different from that of the first embodiment. Fig.11 As shown, the electrical connection point CP1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CP1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B. Under this connection mode, the withstand voltage values ​​of the power tubes Q11A and Q11B can be appropriately reduced.

[0059] In this embodiment, the working principle of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows:

[0060] (1) When operating at a 4-1 conversion ratio, the same as in Example 1, reference Figure 8 , I will not go into details here.

[0061] (2) When operating at a 2-1 conversion ratio, the working state of each power tube in the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: Fig.12 As shown, the control signal timing is as follows Fig.13 As shown, specifically:

[0062] The power tubes Q6A, Q6B, Q9A and Q9B are always kept in the on state, and the power tubes Q3A and Q3B are always kept in the off state;

[0063] In the A-phase circuit, power tubes Q1A, Q2A, Q4A and Q11A are turned on alternately with power tubes Q5A, Q7A, Q8A and Q10A; in the B-phase circuit, power tubes Q1B, Q2B, Q4B and Q11B are turned on alternately with power tubes Q5B, Q7B, Q8B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inversely proportional to the control signal of the corresponding power tube in the A-phase circuit.

[0064] From the above, it can be seen that due to the introduction of power tube Q11A and power tube Q11B, when Fig.11 When the high-efficiency multi-conversion ratio switched capacitor converter shown in the figure switches from a 4-1 conversion ratio operation to a 2-1 conversion ratio operation, power tubes Q1A and Q1B, power tubes Q2A and Q2B, power tubes Q4A and Q4B, power tubes Q11A and Q11B, power tubes Q5A and Q5B, power tubes Q7A and Q7B, power tubes Q8A and Q8B, and power tubes Q10A and Q10B form two groups of parallel 2-1 conversion ratio switched capacitor converters, power tubes Q6A, power tubes Q6B, power tubes Q9A and Q9B are always kept in the turned-on state, and power tubes Q3A and Q3B are always kept in the turned-off state, so that capacitors CF2A and CF2B are connected in parallel to the capacitor at the output terminal VOUT. Compared with the traditional series-parallel switched capacitor converter with a conversion ratio of 4-1, the high-efficiency multi-conversion ratio switched capacitor converter circuit with a conversion ratio of 4-1 and 2-1 proposed in this embodiment significantly improves the utilization rate of power tubes and capacitors, thereby improving the efficiency of working under a conversion ratio of 2-1.

[0065] Example 3

[0066] In order to solve the problem of low power tube utilization and reduced energy density when a series-parallel switched capacitor converter with a 4-1 conversion ratio is reconstructed into a series-parallel switched capacitor converter with a 3-1 conversion ratio, this embodiment proposes a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio. By introducing new power tubes Q11A and Q11B and changing the control signal timing, the efficiency at a 3-1 conversion ratio is significantly improved when it works at a 3-1 conversion ratio.

[0067] The difference from the first embodiment is that the connection mode of the power tube Q11A and the power tube Q11B is different from that of the first embodiment. Fig.14As shown, the input terminal VIN is also connected to the electrical connection point CP2A through the drain and source of the power tube Q11A on the one hand, and connected to the electrical connection point CP2B through the drain and source of the power tube Q11B on the other hand. In this connection mode, the power tubes Q1A and Q1B, the power tubes Q2A and Q2B, the power tubes Q5A and Q5B, the power tubes Q6A and Q6B, the power tubes Q8A and Q8B, the power tubes Q9A and Q9B are usually high-end power tubes with high withstand voltage but large impedance per unit area, and the power tubes Q3A and Q3B, the power tubes Q4A and Q4B, the power tubes Q7A and Q7B, and the power tubes Q10A and Q10B are usually low-end power tubes with low withstand voltage and small impedance per unit area.

[0068] In this embodiment, the working principle of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows:

[0069] (1) When operating at a 4-1 conversion ratio, the same as in Example 1, reference Figure 8 , I will not go into details here.

[0070] (2) When operating at a 3-1 conversion ratio, the working state of each power tube in the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: Fig.15 As shown, the control signal timing is as follows Fig.16 As shown, specifically:

[0071] The power tubes Q5A, Q5B, Q8A and Q8B are always kept in the on state, and the power tubes Q1A, Q1B, Q2A and Q2B are always kept in the off state;

[0072] In the A-phase circuit, power tubes Q3A, Q4A and Q11A are turned on alternately with power tubes Q6A, Q7A, Q9A and Q10A; in the B-phase circuit, power tubes Q3B, Q4B and Q11B are turned on alternately with power tubes Q6B, Q7B, Q9B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inversely proportional to the control signal of the corresponding power tube in the A-phase circuit.

[0073] From the above, it can be seen that due to the introduction of power tube Q11A and power tube Q11B, when Fig.14When the high-efficiency multi-conversion ratio switched capacitor converter shown switches from a 4-1 conversion ratio operation to a 3-1 conversion ratio operation, power tubes Q11A and Q11B, power tubes Q3A and Q3B, power tubes Q4A and Q4B, power tubes Q6A and Q6B, power tubes Q7A and Q7B, power tubes Q9A and Q9B, and power tubes Q10A and Q10B form a 3-1 conversion ratio switched capacitor converter, power tubes Q5A, Q5B, Q8A and Q8B are always kept in the turned-on state, and power tubes Q1A, Q1B, Q2A and Q2B are always kept in the turned-off state, so that capacitors CF1A and CF1B are connected in parallel to the capacitor at the output terminal VOUT. Compared with the traditional 4-1 conversion ratio series-parallel switched capacitor converter, the high-efficiency multi-conversion ratio switched capacitor converter circuit with a 4-1 conversion ratio and a 3-1 conversion ratio proposed in this embodiment significantly improves the utilization rate of low-speed power tubes and capacitors, thereby improving the efficiency of working under a 3-1 conversion ratio.

[0074] Example 4

[0075] This embodiment provides a high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit. The difference from the third embodiment is that the connection method of the power tube Q11A and the power tube Q11B is different from that of the third embodiment. Fig.17 As shown, the electrical connection point CN1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CN1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B.

[0076] In this embodiment, the working principle of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows:

[0077] (1) When operating at a 4-1 conversion ratio, the same as in Example 3, reference Figure 8 , I will not go into details here.

[0078] (2) When operating at a 3-1 conversion ratio, the working state of each power tube in the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: Fig.18 As shown, the control signal timing is as follows Fig.19 As shown, specifically:

[0079] The power tubes Q6A, Q6B, Q9A and Q9B are always kept in the on state, and the power tubes Q2A, Q2B, Q3A and Q3B are always kept in the off state;

[0080] In the A-phase circuit, power tubes Q1A, Q4A and Q11A are turned on alternately with power tubes Q5A, Q7A, Q8A and Q10A; in the B-phase circuit, power tubes Q1B, Q4B and Q11B are turned on alternately with power tubes Q5B, Q7B, Q8B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inversely proportional to the control signal of the corresponding power tube in the A-phase circuit.

[0081] From the above, it can be seen that due to the introduction of power tube Q11A and power tube Q11B, when Fig.17 When the high-efficiency multi-conversion ratio switched capacitor converter shown switches from a 4-1 conversion ratio operation to a 3-1 conversion ratio operation, power tubes Q1A and Q1B, power tubes Q4A and Q4B, power tubes Q11A and Q11B, power tubes Q5A and Q5B, power tubes Q7A and Q7B, power tubes Q8A and Q8B, and power tubes Q10A and Q10B form a 3-1 conversion ratio switched capacitor converter, power tubes Q6A, Q6B, power tubes Q9A and Q9B are always kept in the turned-on state, and power tubes Q2A, Q2B, power tubes Q3A and Q3B are always kept in the turned-off state, so that capacitors CF2A and CF2B are connected in parallel to the capacitor at the output terminal VOUT. Compared with the traditional 4-1 conversion ratio series-parallel switched capacitor converter, the high-efficiency multi-conversion ratio switched capacitor converter variant with a 4-1 conversion ratio and a 3-1 conversion ratio proposed in this embodiment significantly improves the utilization rate of low-speed power tubes and capacitors, thereby improving the efficiency of working under a 3-1 conversion ratio.

[0082] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit, characterized in that: Including basic circuit and power tube Q11A and power tube Q11B; The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT; the A-phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A; the B-phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and capacitor CF3B; the input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence; note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF2A and the power tube Q2A; the capacitor CF2A and the power tube Q2A, and the electrical connection point CP2A between the capacitor and the power tube Q3A, and the electrical connection point CN2A between the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B; the electrical connection point CP1A is connected in sequence through the drain and source of the power tube Q5A, the power tube The source and drain of Q5B are connected to the electrical connection point CP1B; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence; the electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A;The electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; the electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; the electrical connection point CN3B is grounded via the drain and source of the power tube Q10B; The input terminal VIN is also connected to the electrical connection point CP3A via the drain and source of the power tube Q11A on one hand, and is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B on the other hand.

2. A method for operating the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit according to claim 1, characterized in that: include: When operating at a 4-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: the power tube Q11A and the power tube Q11B are always in a closed state; in the A-phase circuit, the power tubes Q1A, Q2A, Q3A and Q4A are turned on alternately with the power tubes Q5A, Q6A, Q7A, Q8A, Q9A and Q10A; in the B-phase circuit, the power tubes Q1B, Q2B, Q3B and Q4B are turned on alternately with the power tubes Q5B, Q6B, Q7B, Q8B, Q9B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inverted with the control signal of the corresponding power tube in the A-phase circuit; When operating at a 2-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is: power tube Q6A, power tube Q9A, power tube Q6B and power tube Q9B are always kept in the on state, and power tube Q3A and power tube Q3B are always in the off state; in the A-phase circuit, power tube Q1A and power tube Q2A are turned on alternately with power tube Q5A and power tube Q8A, and power tube Q4A and power tube Q11A are turned on alternately with power tube Q7A and power tube Q10A; in the B-phase circuit, power tube Q1B and power tube Q2B are turned on alternately with power tube Q5B and power tube Q8B, and power tube Q4B and power tube Q11B are turned on alternately with power tube Q7B and power tube Q10B; wherein, the control signal of each power tube in the B-phase circuit is inverted with the control signal of the corresponding power tube in the A-phase circuit.

3. A high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit, characterized in that: Including basic circuit and power tube Q11A and power tube Q11B; The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT; the A-phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A; the B-phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and capacitor CF3B; the input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence; note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF2A and the power tube Q2A; the capacitor CF2A and the power tube Q2A, and the electrical connection point CP2A between the capacitor and the power tube Q3A, and the electrical connection point CN2A between the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B; the electrical connection point CP1A is connected in sequence through the drain and source of the power tube Q5A, the power tube The source and drain of Q5B are connected to the electrical connection point CP1B; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence; the electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A;The electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; The electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; the electrical connection point CN3B is grounded via the drain and source of the power tube Q10B; The electrical connection point CP1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CP1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B.

4. A method for operating the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit according to claim 3, characterized in that: include: When operating at a 4-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: the power tube Q11A and the power tube Q11B are always in a closed state; in the A-phase circuit, the power tubes Q1A, Q2A, Q3A and Q4A are turned on alternately with the power tubes Q5A, Q6A, Q7A, Q8A, Q9A and Q10A; in the B-phase circuit, the power tubes Q1B, Q2B, Q3B and Q4B are turned on alternately with the power tubes Q5B, Q6B, Q7B, Q8B, Q9B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inverted with the control signal of the corresponding power tube in the A-phase circuit; When operating at a 2-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is: power tube Q6A, power tube Q6B, power tube Q9A and power tube Q9B are always kept in the on state, and power tube Q3A and power tube Q3B are always in the off state; in the A phase circuit, power tube Q1A, power tube Q2A, power tube Q4A and power tube Q11A are alternately turned on with power tube Q5A, power tube Q7A, power tube Q8A and power tube Q10A; in the B phase circuit, power tube Q1B, power tube Q2B, power tube Q4B and power tube Q11B are alternately turned on with power tube Q5B, power tube Q7B, power tube Q8B and power tube Q10B; wherein the control signal of each power tube in the B phase circuit is inverted with the control signal of the corresponding power tube in the A phase circuit.

5. A high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit, characterized in that: Including basic circuit and power tube Q11A and power tube Q11B; The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT; the A-phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A; the B-phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and The input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence; Note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF2A and the power tube Q2A; the capacitor CF2A and the power tube Q2A, and the electrical connection point CP2A between the capacitor and the power tube Q3A, and the electrical connection point CN2A between the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B; the electrical connection point CP1A is connected in sequence through the drain and source of the power tube Q5A, the power tube The source and drain of Q5B are connected to the electrical connection point CP1B; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence; the electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A;The electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; the electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; the electrical connection point CN3B is grounded via the drain and source of the power tube Q10B; The input terminal VIN is also connected to the electrical connection point CP2A via the drain and source of the power tube Q11A on one hand, and is connected to the electrical connection point CP2B via the drain and source of the power tube Q11B on the other hand.

6. A method for operating the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit according to claim 5, characterized in that: include: When operating at a 4-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: the power tube Q11A and the power tube Q11B are always in a closed state; in the A-phase circuit, the power tubes Q1A, Q2A, Q3A and Q4A are turned on alternately with the power tubes Q5A, Q6A, Q7A, Q8A, Q9A and Q10A; in the B-phase circuit, the power tubes Q1B, Q2B, Q3B and Q4B are turned on alternately with the power tubes Q5B, Q6B, Q7B, Q8B, Q9B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inverted with the control signal of the corresponding power tube in the A-phase circuit; When operating at a 3-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is: power tube Q5A, power tube Q5B, power tube Q8A and power tube Q8B are always kept in the on state, and power tube Q1A, power tube Q1B, power tube Q2A and power tube Q2B are always in the off state; in the A phase circuit, power tube Q3A, power tube Q4A and power tube Q11A are turned on alternately with power tube Q6A, power tube Q7A, power tube Q9A and power tube Q10A; in the B phase circuit, power tube Q3B, power tube Q4B and power tube Q11B are turned on alternately with power tube Q6B, power tube Q7B, power tube Q9B and power tube Q10B; wherein the control signal of each power tube in the B phase circuit is inverted with the control signal of the corresponding power tube in the A phase circuit.

7. A high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit, characterized in that: Including basic circuit and power tube Q11A and power tube Q11B; The basic circuit includes an A-phase circuit and a B-phase circuit connected between an input terminal VIN and an output terminal VOUT; the A-phase circuit includes a power tube Q1A, a power tube Q2A, a power tube Q3A, a power tube Q4A, a power tube Q5A, a power tube Q6A, a power tube Q7A, a power tube Q8A, a power tube Q9A, a power tube Q10A, a power tube Q11A, a capacitor CF1A, a capacitor CF2A and a capacitor CF3A; the B-phase circuit includes a power tube Q1B, a power tube Q2B, a power tube Q3B, a power tube Q4B, a power tube Q5B, a power tube Q6B, a power tube Q7B, a power tube Q8B, a power tube Q9B, a power tube Q10B, a power tube Q11B, a capacitor CF1B, a capacitor CF2B and capacitor CF3B; the input terminal VIN is connected to the output terminal VOUT via the drain and source of the power tube Q1A, the capacitor CF1A, the source and drain of the power tube Q2A, the capacitor CF2A, the source and drain of the power tube Q3A, the capacitor CF3A, and the source and drain of the power tube Q4A in sequence, and is connected to the output terminal VOUT via the drain and source of the power tube Q1B, the capacitor CF1B, the source and drain of the power tube Q2B, the capacitor CF2B, the source and drain of the power tube Q3B, the capacitor CF3B, and the source and drain of the power tube Q4B in sequence; note: the electrical connection point CP1A between the capacitor CF1A and the power tube Q1A, and the electrical connection point CN1A between the capacitor CF2A and the power tube Q2A; the capacitor CF2A and the power tube Q2A, and the electrical connection point CP2A between the capacitor and the power tube Q3A, and the electrical connection point CN2A between the power tube Q3A; the electrical connection point CP3A between the capacitor CF3A and the power tube Q3A, and the electrical connection point CN3A between the power tube Q4A; the electrical connection point CP1B between the capacitor CF1B and the power tube Q1B, and the electrical connection point CN1B between the power tube Q2B; the electrical connection point CP2B between the capacitor CF2B and the power tube Q2B, and the electrical connection point CN2B between the power tube Q3B; the electrical connection point CP3B between the capacitor CF3B and the power tube Q3B, and the electrical connection point CN3B between the power tube Q4B; the electrical connection point CP1A is connected in sequence through the drain and source of the power tube Q5A, the power tube The source and drain of Q5B are connected to the electrical connection point CP1B; the electrical connection point CP2A is connected to the electrical connection point CP2B via the drain and source of the power tube Q6A and the source and drain of the power tube Q6B in sequence; the electrical connection point CP3A is connected to the electrical connection point CP3B via the drain and source of the power tube Q7A and the source and drain of the power tube Q7B in sequence; the electrical connection point between the power tube Q5A and the power tube Q5B, the electrical connection point between the power tube Q6A and the power tube Q6B, and the electrical connection point between the power tube Q7A and the power tube Q7B are connected to the output terminal VOUT in sequence; the electrical connection point CN1A is grounded via the drain and source of the power tube Q8A; the electrical connection point CN2A is grounded via the drain and source of the power tube Q9A;The electrical connection point CN3A is grounded via the drain and source of the power tube Q10A; the electrical connection point CN1B is grounded via the drain and source of the power tube Q8B; The electrical connection point CN2B is grounded via the drain and source of the power tube Q9B; The electrical connection point CN3B is grounded via the drain and source of the power tube Q10B; The electrical connection point CN1A is connected to the electrical connection point CP3A via the drain and source of the power tube Q11A, and the electrical connection point CN1B is connected to the electrical connection point CP3B via the drain and source of the power tube Q11B.

8. A method for operating the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit according to claim 7, characterized in that: include: When operating at a 4-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is as follows: the power tube Q11A and the power tube Q11B are always in a closed state; in the A-phase circuit, the power tubes Q1A, Q2A, Q3A and Q4A are turned on alternately with the power tubes Q5A, Q6A, Q7A, Q8A, Q9A and Q10A; in the B-phase circuit, the power tubes Q1B, Q2B, Q3B and Q4B are turned on alternately with the power tubes Q5B, Q6B, Q7B, Q8B, Q9B and Q10B; wherein the control signal of each power tube in the B-phase circuit is inverted with the control signal of the corresponding power tube in the A-phase circuit; When operating at a 3-1 conversion ratio, the control signal timing of the high-efficiency reconfigurable multi-conversion ratio switched capacitor converter circuit is: power tube Q6A, power tube Q6B, power tube Q9A and power tube Q9B are always kept in the on state, and power tube Q2A, power tube Q2B, power tube Q3A and power tube Q3B are always in the off state; in the A phase circuit, power tube Q1A, power tube Q4A and power tube Q11A are turned on alternately with power tube Q5A, power tube Q7A, power tube Q8A and power tube Q10A; in the B phase circuit, power tube Q1B, power tube Q4B and power tube Q11B are turned on alternately with power tube Q5B, power tube Q7B, power tube Q8B and power tube Q10B; wherein the control signal of each power tube in the B phase circuit is inverted with the control signal of the corresponding power tube in the A phase circuit.