Deep foundation pit sensor acquisition node and upper computer display system

Abstract

The invention discloses a deep foundation pit sensor acquisition node and an upper computer display system, and belongs to the technical field of building deep foundation pit data acquisition. According to the technical scheme, a ZYNQ chip used for data acquisition, data processing and communication control is respectively connected with a plurality of types of sensors; the storage card used for storing data is connected with the ZYNQ chip; the upper computer is connected with the ZYNQ chip through wireless transmission; the ZYNQ chip comprises a PS module and a PL module. The PS module is connected with a USB module, a memory card and a sensor. The PL module is respectively connected with the RS485 circuit module and the wireless transmission module, the rest PL interfaces are divided into three as a group, and conversion between an IIC protocol and a UART protocol is realized according to comments of the selected interfaces. The system has the beneficial effects that the system has a unified data acquisition and processing platform, flexible sensor access and management, efficient data transmission and storage, convenient data integration and display, reduced monitoring cost, improved monitoring real-time performance and accuracy and the like.

Description

Technical Field

[0001] This invention belongs to the field of deep foundation pit data acquisition technology, and particularly relates to a deep foundation pit sensor acquisition node and a host computer display system. Background Technology

[0002] Deep foundation pit engineering is a high-risk project. Due to its technical complexity and significant accident risks, comprehensive monitoring is required during construction to ensure the safety of the construction environment and surrounding area. To effectively monitor the strength and deformation of the deep foundation pit support structure and promptly control its impact on the surrounding environment, various monitoring methods are typically employed, including manual inspection and automated monitoring. Manual inspection usually employs multiple methods, including manual patrols, manual measurements, and visual inspections. Manual patrols involve engineers periodically inspecting the area around the foundation pit to observe changes in the support structure and surrounding environment. Manual measurements are performed manually using measuring instruments, including parameters such as displacement, tilt, and stress of the support structure. Visual inspections involve visually inspecting the area around the foundation pit using the naked eye or with cameras, recording any abnormalities. Automated monitoring utilizes various sensors to monitor construction and environmental information, including surface displacement monitoring, deep horizontal displacement monitoring, groundwater level monitoring, retaining wall internal force monitoring, support internal force monitoring, and earth pressure monitoring. These monitoring tasks are characterized by numerous monitoring points, diverse data types, and heavy workload.

[0003] The advantages of manual inspection lie in its intuitive perception and flexibility. Engineers can directly observe the condition of the foundation pit support structure and the surrounding environment, which facilitates the timely detection of anomalies. Furthermore, manual inspection is flexible, allowing for adjustments to monitoring methods and frequencies to adapt to different monitoring needs.

[0004] These automated monitoring sensors transmit data to the monitoring system via wired or wireless connections. (Wired connections typically use physical cables such as cables or fiber optics to connect the sensors to the detection system. Sensor data is transmitted through these cables to the data acquisition unit or receiver of the detection system. Wired connections generally offer high stability and reliability, suitable for scenarios requiring long-distance transmission or high data security. Wireless connections utilize wireless communication technology, where sensor nodes communicate with the detection system via wireless signals. Common wireless communication technologies include Wi-Fi, Zigbee, and LoRa. After collecting data, the sensor nodes transmit the data wirelessly to a base station or receiver, which then transmits the data to the detection system for processing and storage. Wireless connections offer greater flexibility and scalability, suitable for scenarios requiring mobility or where wiring is difficult.) Automated monitoring technology offers several advantages during construction, including timeliness, accuracy, continuity, convenience, and safety. It can monitor changes in the foundation pit support structure and surrounding environment in a timely and comprehensive manner, enabling continuous monitoring and measurement during construction. By monitoring data, a safety assessment of the overall stability and deformation of the foundation pit can be conducted, and timely feedback can be provided to the construction team to ensure construction safety.

[0005] Manual inspection: Manual inspection relies heavily on manpower and resources, resulting in high costs, and the results may be affected by human factors. Due to limitations in manpower and time, the monitoring frequency of manual inspection is low, which may prevent timely detection of changes. Furthermore, the accuracy of manual inspection is affected by the skill and experience of the operators, introducing subjectivity and error. More importantly, deep foundation pit engineering requires high-frequency dynamic monitoring, real-time monitoring and early warning during the construction period, and timely adjustments to design and construction methods to ensure project safety, but manual monitoring often falls short of these requirements.

[0006] Automated monitoring: Firstly, as infrastructure scales up, the number of sensors increases, and the current data acquisition interfaces of individual sensor nodes are insufficient. Secondly, different sensors (most RS485 devices) generally have their own dedicated acquisition modules and data software, requiring separate processing of the transmitted data. The monitoring focus differs at different stages of deep foundation pit construction, thus the types and quantities of sensors required also change. Acquisition systems with fixed receiving ports often waste a large number of interfaces, thereby increasing monitoring costs.

[0007] In summary, existing technologies suffer from several drawbacks: manual inspection is costly and infrequent, and its results are susceptible to human error, resulting in insufficient accuracy and timeliness, making it difficult to meet the demands of high-frequency dynamic monitoring and real-time early warning; in automated monitoring, as infrastructure scales up and the number of sensors increases, the data acquisition interfaces of individual sensor nodes are insufficient, limiting data acquisition; different sensors typically use their own dedicated acquisition modules and data software, requiring separate processing after data transmission, increasing the complexity and cost of data integration; and the monitoring focus varies at different stages of deep foundation pit construction, leading to significant variations in the types and numbers of sensors required, making fixed-port acquisition systems prone to wasting numerous interfaces and increasing monitoring costs. Summary of the Invention

[0008] To address the problems existing in the prior art, this invention provides a deep foundation pit sensor acquisition node and host computer display system. This system aims to achieve unified acquisition and processing of multiple sensors, improve the efficiency and accuracy of data acquisition, reduce monitoring costs, and enhance the real-time performance and flexibility of the system. It meets the needs of high-frequency dynamic monitoring and real-time early warning in deep foundation pit engineering, ensuring construction safety and project quality.

[0009] To achieve the above objectives, the present invention provides the following technical solution:

[0010] A sensor acquisition node and host computer display system for deep foundation pits includes:

[0011] ZYNQ chips are used for data acquisition, data processing, and communication control, and are connected to several types of sensors.

[0012] A storage card for storing data is connected to the ZYNQ chip;

[0013] The host computer connects to the ZYNQ chip via wireless transmission.

[0014] Furthermore, the ZYNQ chip includes a PS module and a PL module. The PS module is connected to a USB module, a memory card, and a sensor, respectively. The PL module is connected to an RS485 circuit module and a wireless transmission module, respectively.

[0015] Furthermore, the sensors include a temperature sensor, a laser rangefinder, and a vibrating wire sensor.

[0016] Furthermore, J2_B19 of the PL module is used as the first GPIO, J2_B18 of the PL module is used as the second GPIO, and J2_B26 of the PL module is used as the third GPIO to control whether the vibrating wire sensor with three S+ is read by VM1.

[0017] The J2_B25 of the PL module is used as the fourth GPIO to control whether the vibrating wire sensor of VM2 is read.

[0018] The J2_B33 of the PL module is used as the fifth GPIO to control whether the vibrating wire sensor of VM3 is read.

[0019] The J2_B32 of the PL module is used as the sixth GPIO to control whether the vibrating wire sensor of VM4 is read.

[0020] The J2_B39 of the PL module is used as the seventh GPIO to control whether the vibrating wire sensor of VM5 is read.

[0021] The J2_B40 of the PL module is used as the eighth GPIO to control whether the vibrating string sensor of VM6 is read.

[0022] Furthermore, the USB module is connected to the PS module. When an external signal is sent to the PS module, the D- and D+ signals are sent to the CH340B module. The CH340B module converts the received USB standard signals into UART signals and sends them to the ZYNQ chip.

[0023] Furthermore, the storage card is a TF card module, which performs the following operations: the CD pin is used to detect whether the TF card is inserted; DAT0, DAT1, DAT2, and DAT3 are used for bidirectional data transmission; during data storage and retrieval, the CMD command line is used to send commands and control the operation of the SD card; before storing and retrieving data, commands are sent through the CMD command line to control the working state and operation of the SD card; the CLK clock line is used to synchronize data transmission; the CLK line provides a clock signal to ensure correct data transmission and synchronization.

[0024] Furthermore, the wireless transmission module is a LoRa module, which performs the following operations: LoRa_M0, LoRa_M1, and LoRa_AUX are all set as GPIO pins, and LoRa_RX and LoRa_TX are connected to two pins brought out from the uart_lite IP core; in the initial stage, LoRa_M0 and LoRa_M1 are set to output mode, outputting a high level; LoRa_AUX is set to input mode. When data needs to be transmitted, the level state of LoRa_AUX is first read. If it is high, it can be transmitted; if it is low, it waits for the level to become high before transmitting data; LoRa_RX and LoRa_TX are used for data transmission with the ZYNQ chip.

[0025] Furthermore, the RS485 circuit module performs the following operations: When the ZYNQ chip communicates with an external RS485 device, the UART signal line sent by the ZYNQ chip is converted into a level signal of the MAX13487 through a level conversion chip. The MAX13487 converts the received signal into a standard RS485 signal and sends it to the external RS485 device. When the external RS485 device communicates with the ZYNQ chip, the MAX13487 converts the signals received on lines A and B into standard UART signals, and after level matching, sends them to the ZYNQ core.

[0026] Furthermore, the sensor includes a vibrating wire sensor reading module, which performs the following operations: Two signal lines connected to the vibrating wire sensor via S+ and S- are used. When a measurement command is received via the RX pin of the UART, a 12V excitation signal is first sent through the signal cable. After the vibrating wire sensor receives the excitation signal, an induced electromotive force is generated on the signal cable. The VM501 analyzes the induced electromotive force and sends it back to the ZYNQ chip for processing via the UART interface.

[0027] Furthermore, it also includes a power supply module for powering the system.

[0028] Beneficial effects of the present invention:

[0029] Compared with existing technologies, the deep foundation pit sensor acquisition node and host computer display system described in this invention have the following technical features and beneficial effects:

[0030] (1) Unified data acquisition and processing platform: The present invention uses the ZYNQ chip as the core, which integrates PS (processing system) and PL (programmable logic) modules. It can process data from multiple types of sensors at the same time, including temperature sensors, laser rangefinders, vibrating wire sensors, etc., realizing the integration of data acquisition, processing and communication control, reducing system complexity and cost.

[0031] (2) Flexible Sensor Access and Management: Through the multiple GPIO (General Purpose Input / Output) interfaces provided by the PL module, this invention can flexibly control the reading operations of multiple vibrating wire sensors, solving the problem of insufficient data acquisition interfaces for a single sensor node. At the same time, this design allows the system to dynamically adjust the sensor type and quantity according to the needs of different monitoring stages, improving the system's adaptability and flexibility.

[0032] (3) High-efficiency data transmission and storage: The LoRa module is used as the wireless transmission method, realizing remote, low-power communication between the sensor acquisition nodes and the host computer, which improves the timeliness and reliability of data transmission. At the same time, the TF card module provides a large-capacity data storage function, ensuring the integrity and traceability of the monitoring data.

[0033] (4) Convenient data integration and display: Through the host computer software, data from different sensors can be integrated, analyzed, and displayed, providing engineers with intuitive and comprehensive monitoring information. This data integration method not only simplifies the data processing flow but also improves the readability and understandability of the monitoring results.

[0034] (5) Reduced monitoring costs: The design of this invention fully considers cost-effectiveness, reducing hardware redundancy and waste through an integrated and modular design approach. Simultaneously, by optimizing data transmission and storage methods, the system's energy consumption and maintenance costs are reduced.

[0035] (6) Improve the real-time performance and accuracy of monitoring: Through automated monitoring technology, this invention can achieve real-time and continuous monitoring of the deep foundation pit support structure and its surrounding environment, promptly detect abnormalities and issue early warnings. This real-time monitoring method not only improves the timeliness of monitoring, but also reduces the error and subjectivity of monitoring results by reducing human intervention.

[0036] In summary, the deep foundation pit sensor acquisition node and host computer display system of the present invention has the following beneficial effects: a unified data acquisition and processing platform, flexible sensor access and management, efficient data transmission and storage, convenient data integration and display, reduced monitoring costs, and improved monitoring real-time performance and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and detailed embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0038] Figure 1 This is a GPIO block diagram of the present invention;

[0039] Figure 2 This is a summary diagram of the MIO of the present invention;

[0040] Figure 3 This is a data flow diagram of the present invention;

[0041] Figure 4 This is an overall block diagram of the data collector of the present invention;

[0042] Figure 5 This is a pin diagram of the ZYNQ core module of the present invention;

[0043] Figure 6 Power supply pin diagram for BANK35, BANK33, and BANK13;

[0044] Figure 7 This is a circuit diagram of the USB module of the present invention;

[0045] Figure 8 This is a circuit diagram of the TF card module of the present invention;

[0046] Figure 9 This is a circuit diagram of the LoRa module of the present invention;

[0047] Figure 10 This is a circuit diagram of the RS485 circuit module of the present invention;

[0048] Figure 11 This is a circuit diagram of the vibrating wire sensor reading module of the present invention;

[0049] Figure 12 This is a voltage conversion circuit diagram of the present invention;

[0050] Figure 13 This is a circuit diagram of the power module of the present invention;

[0051] Figure 14 This is a circuit diagram of the 5V to 1.8V power module of the present invention;

[0052] Figure 15 This is a schematic diagram of the system of the present invention;

[0053] Figure 16 This is a schematic diagram showing the connection between the ZYNQ core module and the UART_IIC_SEL IP core of this invention;

[0054] Figure 17 This is a schematic diagram of the IP core of the present invention. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. The following description, in conjunction with the accompanying drawings... Figure 1-15 Further explanation is provided regarding the sensor acquisition nodes and host computer display system for deep foundation pits.

[0056] Example 1

[0057] The technical problems that this invention needs to solve and can solve are as follows:

[0058] 1. The increasing number of sensors during deep foundation pit construction (cost control)

[0059] 2. The focus of monitoring varies at different stages of deep foundation pit construction. Therefore, the key issue is how to address the changing number of sensors required at each stage. If the sensor node interfaces are fixed, it leads to waste when a particular type of sensor is more prevalent and the interfaces on those nodes are fixed. Therefore, this invention focuses on utilizing the PS (ARM) portion of the ZYNQ core to implement the basic functions of the sensor node, and using the PL (FPGA) portion to implement a custom IP core for common interface protocols, achieving compatibility with commonly used sensor interface types.

[0060] This invention provides a sensor acquisition node and host computer display system for deep foundation pits. It employs ZYNQ chip technology, LoRa narrowband wireless communication technology, and a VM501 vibrating wire sensor reading module for data acquisition and transmission. The host computer displays the acquired data.

[0061] First, let's look at the hardware solutions:

[0062] ZYNQ is a series of System-on-Chips (SoCs) from Xilinx, integrating an FPGA (Field Programmable Gate Array) with an ARM processor. Zynq's design combines programmable logic with a high-performance processor, allowing developers to fully leverage hardware accelerators and software processors to achieve high-performance, low-power applications. In ZYNQ, the ARM processor and FPGA reside on the same chip and are connected via a high-speed bus (such as the AXI bus). This hardware-level collaboration allows the ARM processor to directly access the logic resources in the FPGA, enabling configuration and control. Simultaneously, the FPGA can access the ARM processor's memory through a DMA (Direct Memory Access) controller, facilitating data exchange with the processor. At the software level, the ARM processor runs the operating system and applications, while the FPGA can be used to accelerate specific computational tasks or handle real-time I / O events. The ARM processor can control the FPGA's configuration and operation through drivers or applications, enabling flexible management and utilization of the FPGA. Furthermore, the FPGA can send data or events to the ARM processor via interrupts or DMA mechanisms, achieving collaborative work with the processor. ZYNQ's flexibility allows specific application logic to be implemented in an FPGA and controlled and managed by an ARM processor.

[0063] The ZYNQ is divided into two parts: PS and PL. Therefore, the device's pin resources are also divided into two parts. Peripherals in the ZYNQ PS can be connected to the pins on the PS side via MIO (Multiuse I / O) modules, or to the pins on the PL side via EMIO. The Zynq-7000 series chips generally have 54 MIOs, while some chips, such as the 7z007s, have only 32. GPIO is an abbreviation for "general purpose I / O." It is a peripheral in the ZYNQ PS used to observe and control the state of the device's pins. Figure 1 This is a block diagram of GPIO. As can be seen from this invention, GPIO is divided into 4 banks, of which Bank0 and Bank1 are connected to MIO; while Bank2 and Bank3 are connected to EMIO.

[0064] All banks except Bank1 have 32 bits. Bank1 only has 22 bits because there are only 54 MIOs in total. Bank0 (32 bits) controls MIOs [0-31], and the remaining MIOs [31-53] are controlled by Bank1 (22 bits). Banks 2 and 3 are used to control extended MIOs, i.e., EMIOs, meaning there can be a total of 32 + 32 = 64 EMIOs. All peripherals can be accessed through MIOs, and these peripherals are connected to MIOs. Although each MIO can independently control and drive peripherals with individual pins, peripherals such as QSPI, USB, and Ethernet have special requirements for their connection to MIOs, such as... Figure 2 As shown, for Ethernet, it can only be connected to MIO16-27 and MIO28-39 pins. Furthermore, the pin connecting Ethernet to MIO28 can only be used as the Ethernet tx_clk. Therefore, when it is used as an Ethernet interface pin, the corresponding MIO function is already determined. Another characteristic of MIO is that MIO28-39 pins can be used for Ethernet connection, as well as as interface pins for USB and other peripherals. Therefore, when designing peripherals for the PS in this invention, MIOs must be allocated appropriately. From... Figure 2 As can be seen from the MIO list in this invention, once an MIO is selected, its pin location is already determined, and no pin constraints need to be added. According to the ZYNQ user manual UG585's MIO list, as shown below... Figure 2 As shown.

[0065] This invention employs a ZYNQ chip as the processor, fully leveraging the advantages of ARM and FPGA working together. The ARM processor handles high-level data processing and communication control, while the FPGA handles low-level data acquisition and processing. Their collaborative operation improves the performance and flexibility of the data acquisition device. This processor architecture design enables the device to acquire, process, and transmit data more efficiently, meeting the requirements of monitoring scenarios with high data processing speed and real-time performance. The system's data flow diagram is as follows: Figure 3 As shown.

[0066] Data from various sensors used in the foundation pit, including but not limited to temperature sensors, laser rangefinders, and various vibrating wire sensors, are connected to the ZYNQ core for acquisition via wiring harnesses. The ZYNQ core stores the sensor data it acquires on a local TF memory card, and then transmits it to the host computer via a wireless transmission module. The host computer then displays the data.

[0067] Based on the characteristics of ZYNQ, the design focuses on its PS and PL sections. Existing interfaces in the PS section are utilized: the USB module is connected to the serial port of the UART's MIO, the TF card module is connected to the MIO of the SD card, and the vibrating wire sensor module is connected to the serial port of another UART's MIO. The PL section emphasizes the flexibility of this data acquisition unit. Two UART soft cores are implemented on the PL side to connect to the hardware's 485 interface and wireless transmission module. An IIC soft core is used to handle sensors using the IIC protocol (such as the BMP280, a digital pressure sensor using an LGA-8 board with I2C / SPI interfaces). A custom 485 soft core is added to prevent interface shortages. Various control signals in the system are controlled using the EMIO pins on the PL side. The overall block diagram of the data acquisition unit is shown below. Figure 4 As shown.

[0068] Example 2

[0069] This embodiment provides a specific scheme for a deep foundation pit data acquisition device, based on... Figure 4 The entire deep foundation pit data acquisition device is divided into 6 major modules: 1. Core board module, 2. USB interface module, 3. TF card module, 4. LoRa module, 5. RS485 circuit module, and 6. Vibrating wire sensor reading module.

[0070] I. Core Board Module

[0071] The ZYNQ core module uses four SMD-100 connectors to connect to the base plate of the data acquisition unit, such as... Figure 5 As shown, from right to left, they are J1, J2, J3, and J4.

[0072] The power supply pins of the PS end are J4_A46~J4_A50 and J4_B46~J4_B50 of the J4 connector, with a power supply voltage of 12V. The power supply pins of the BANK34 of the PL end are J2_A46, J2_A47, J2_B46, and J2_B47 of the J2 connector, with a power supply voltage of 3.3V.

[0073] VADJ1 and VADJ2 on connector J1 and VADJ4 on connector J2 are the power supply pins for BANK35, BANK33, and BANK13, respectively. The specific voltages are as follows: Figure 6 As shown, it is determined by the external pin connection.

[0074] Connect connector J1_A3, J1_A6, J1_A7, J1_A8, J1_A16, J1_A23, J1_A30, J1_A37, J1_A44 and J1_B3, J1_B6, J1_B7, J1_B8, J1_B16, J1_B23, J1_B30, J1_B37, J1_B44 to GND.

[0075] Connect connector J2_A8, J2_A15, J2_A22, J2_A29, J2_A36, J2_A44, J2_A45, J2_A48 and J2_B8, J2_B15, J2_B22, J2_B29, J2_B36, J2_B44, J2_B45, J2_B48 to GND.

[0076] Connect connector J3_A1, J3_A4, J3_A10, J3_A13, J3_A16, J3_A17, J3_A24, J3_A31, J3_A38, J3_A46 and J3_B1, J3_B4, J3_B10, J3_B13, J3_B16, J3_B17, J3_B24, J3_B31, J3_B38, J3_B46 to GND. Connect J3_B48 to a 0-ohm resistor for grounding.

[0077] Connect connectors J4_A4, J4_A9, J4_A14, J4_A19, J4_A24, J4_A29, J4_A34, J4_A43, J4_A44, J4_A45 and J4_B4, J4_B9, J4_B14, J4_B19, J4_B24, J4_B29, J4_B34, J4_B43, J4_B44, J4_B45 to GND.

[0078] C27H, C27G, C27F, and C27E are connected to GND as mounting holes.

[0079] Use J4_A20 and J4_A21 of the PS section, which are MIO19 and MIO18, as the TX (UAB_TX) and RX (USB_RX) pins of the USB module, respectively.

[0080] Use J4_A17 and J4_A18 of the PS section, which are MIO21 and MIO20, as the RX (VM_RX) and TX (VM_TX) pins of the VM501 vibrating wire sensor reading module, respectively.

[0081] In the PS section, J4_B2 (MIO45) is designated as SD0_DAT3 for connecting to the SD card, J4_B3 (MIO44) as SD0_DAT2 for connecting to the SD card, J4_B5 (MIO43) as SD0_DAT1 for connecting to the SD card, J4_B6 (MIO42) as SD0_DAT0 for connecting to the SD card, J4_B7 (MIO41) as SD0_CMD for connecting to the SD card, J4_B8 (MIO40) as SD0_CLK for connecting to the SD card, and J4_A8 (MIO47) as SD_CD for connecting to the SD card.

[0082] Use J2_A39 (K15) of the PL section as LoRa_M0 to connect to the LoRa wireless transmission module, use J2_A40 (J15) of the PL section as LoRa_M1 to connect to the LoRa wireless transmission module, use J2_A41 (J17) of the PL section as LoRa_TX to connect to the LoRa wireless transmission module, use J2_A42 (J16) of the PL section as LoRa_RX to connect to the LoRa wireless transmission module, and use J2_A43 (R15) of the PL section as LoRa_AUX to connect to the LoRa wireless transmission module.

[0083] Use J2_A37 (K18) in the PL section as the TX to connect to the RS485 module, and use J2_A38 (J18) in the PL section as the RX to connect to the RS485 module.

[0084] Use J2_B19 (N22) of the PL section as one GPIO, J2_B18 (P22) of the PL section as one GPIO, and J2_B26 (N19) of the PL section as one GPIO to control whether the vibrating wire sensor with three S+ is read. Use J2_B25 (N20) of the PL section as one GPIO to control whether the vibrating wire sensor of VM2 is read. Use J2_B33 (M21) of the PL section as one GPIO to control whether the vibrating wire sensor of VM3 is read. Use J2_B32 (M22) of the PL section as one GPIO to control whether the vibrating wire sensor of VM4 is read. Use J2_B39 (L9) of the PL section as one GPIO to control whether the vibrating wire sensor of VM5 is read. Use J2_B40 (L18) of the PL section as one GPIO to control whether the vibrating wire sensor of VM6 is read.

[0085] All I / O pins in the core board are brought out sequentially, with every three I / O pins grouped into a signal group. One of these groups is connected to a DIP switch, which selects the communication mode of the other two pins. This allows for later control of the interface functionality using a soft core. When UART is needed, the UART soft core IP is used; when IIC is needed, the IIC soft core interface is used; and if an RS485 interface is required, a custom RS485 IP core can be added.

[0086] II. USB Interface Module

[0087] Figure 7 This is a USB interface module. USB (Universal Serial Bus) is a universal interface standard used for data transfer and communication between computers and peripheral devices. The module consists of two parts: the CH340 conversion chip and the USB interface.

[0088] The CH340 is a USB-to-serial chip, typically used to convert a USB interface into a UART serial port. The CH340 operates on a 5V power supply, which is connected to the chip's VCC interface via two grounding capacitors (C22 and C23). These grounding capacitors near the chip's power supply provide decoupling filtering, stabilize the power supply, reduce the influence of loop inductance, and improve high-frequency response, thereby ensuring normal chip operation and enhancing its performance stability.

[0089] The CH340's RXD and TXD pins are connected to the core's USB_TX and USB_RX pins (the RX and TX pins of both modules need to be cross-connected) for data transfer between the core board and the CH340.

[0090] The CH340's UD- and UD+ pins connect to the D- and D+ pins of the USB interface, enabling communication with external USB devices. In the USB interface, D+ (Data Positive) and D- (Data Negative) are differential signal pairs used for data transmission and communication between USB devices.

[0091] The CH340's V3 pin is an internal power supply pin. When the CH340's supply voltage VCC is 3.3V, it is directly connected to VCC (e.g., when only 3.3V is available externally). When the CH340's supply voltage VCC is 5V, a 0.01uF decoupling capacitor is connected for filtering (e.g., when the chip's VCC directly uses the 5V from the USB port). After the CH340's VCC (regardless of whether it's 5V or 3.3V) enters the chip, it first passes through a 3.3V LDO regulator, outputting 3.3V for the chip's own use (VDD). This VDD pin is called V3, and it is the actual internal power supply (measurable at 3.3V with a multimeter). In use, this LDO output pin usually needs to be connected to an external decoupling capacitor. This data acquisition device uses a 5V power supply, therefore a 0.01uF decoupling capacitor, namely capacitor C26, is required. J7 is the USB interface.

[0092] Working process:

[0093] When an external USB device is connected to J7, and an external signal is sent to J7, the D- and D+ signals will be sent directly to CH340B. CH340B will convert the received USB standard signals into UART signals and send them to the ZYNQ core.

[0094] III. TF Card Module

[0095] Figure 8 J4 is the TF card module, and U1 is the TF card slot.

[0096] The TXS02612RTWR is designed for interfacing mobile phone baseband with external SDIO peripherals. This device includes a 6-channel SPDT switch with voltage level conversion capability. This allows one SDIO port to connect to two SDIO peripherals. The TXS02612 has three independent power rails, operating across a full range from 1.1V to 3.6V. This allows the baseband and SDIO peripherals to operate at different supply voltages if needed. In this acquisition unit, the TXS02612 is used for voltage conversion between the TF card and the core board.

[0097] The voltages on both sides of the TXS02612RTWR are 1.8V and 3.3V respectively. The 1.8V side is connected to the core board, and the 3.3V side is connected to the TF-CARD socket.

[0098] C3 and C4 are both grounding capacitors, ensuring the chip works normally and improving its performance stability.

[0099] Pins 1, 3, 4, 6, 7, and 9 of the TXS02612RTWR are connected to SD_DAT2, D_DAT3, SD_CMD, SD_DAT0, SD_DAT1, and SD_CLK of the core board, respectively.

[0100] The SEL pin is a selection pin, which selects whether it is B0 or ​​B1. In this data acquisition unit, B0 is selected.

[0101] The DAT0B0, DAT1B0, DAT2B0, DAT3B0, CLKB0, and CMDB0 pins of the B0 terminal of the TXS02612RTWR are connected to the DAT0, DAT1, DAT2, CD / DAT3, CLK, and CMD pins of the TF card slot, respectively. Except for the CLK clock signal, each pin of the TXS02612RTWR is connected to a 4.7K pull-up resistor to 3.3V on the connection line between the other pins of the TXS02612RTWR and the TF card slot.

[0102] The VCC power supply of the TF card slot is 3.3V, and VSS is the pin connected to GND; the CD pin is the pin for detecting the card insertion status. The CD pin should be connected to the SD_CD pin of the core board, with a pull-up resistor R25 in between connected to 3.3V to ensure that it is high level in the idle state. When an SD card is inserted, the SD_CD pin is low level; C1 and C2 are both grounding capacitors to ensure stable power supply.

[0103] The work process is as follows:

[0104] The CD pin is used to detect whether a TF card is inserted. DAT0, DAT1, DAT2, and DAT3 (data lines) are used for bidirectional data transmission. During data storage and retrieval, these data lines are used to transmit data. The CMD (command line) is used to send commands and control the SD card's operation. Before storing and retrieving data, commands are sent via the CMD line to control the SD card's working state and operation. The CLK (clock line) is used to synchronize data transmission. The CLK line provides a clock signal to ensure correct data transmission and synchronization.

[0105] IV. LoRa Module

[0106] Figure 9 The LoRa module is an integrated module, and the following circuit was designed according to its user manual:

[0107] Pin 1 of the LoRa module is the M0 pin, which is the input interface and is connected to the LoRa_M0 of the core board. Its function is to pull it low for more than 3 seconds to restore factory settings. It is directly set to a high level in the core board driver.

[0108] Pin 2 of the LoRa module is pin M1, which is the input interface and is connected to LoRa_M1 on the core board. Its function is to wake up the sleep mode on the falling edge, and it is directly set to high level in the core board driver.

[0109] Pin 3 of the LoRa module is the RXD pin, and pin 4 is the TXD pin, both being input interfaces. Since data from the transmitting end should be transmitted to the receiving end during communication, the TX line of the transmitting end should be connected to the RX line of the receiving end. Conversely, data from the receiving end should be transmitted back via the TX line of the receiving end, so the RX line of the receiving end should be connected to the TX line of the transmitting end. Therefore, connect the RXD pin to the LoRa_TX pin on the core board, and connect the TXD pin to the LoRa_RX pin on the core board.

[0110] Pin 5 of the LoRa module is the AUX pin, which is the output interface and is connected to the LoRa_AUX of the core board. Its function is to pull the AUX pin low for 5ms before sending data via the serial port and pull it high after the transmission is complete. In other words, before sending data, the AUX pin level must be checked, and the signal is sent only when the level is low.

[0111] Pin 6 of the LoRa module is the VCC pin, which is the power supply pin for the module, and the voltage is 5V.

[0112] Pin 7 of the LoRa module is the GND pin, which is connected to the GND of the power supply.

[0113] C24 is a grounding capacitor used to ensure stable power supply;

[0114] The operation is as follows: In the ZYNQ core, LoRa_M0, LoRa_M1, and LoRa_AUX are all configured as GPIOs. LoRa_RX and LoRa_TX are connected to two pins from the UART_Lite IP core. At startup, LoRa_M0 and LoRa_M1 are set to output mode, outputting a high level. LoRa_AUX is set to input / output mode. When data needs to be sent, the level of LoRa_AUX is read first. If it is high, data can be sent; if it is low, the system waits for the level to become high before sending data. LoRa_RX and LoRa_TX are responsible for data transmission with the ZYNQ core.

[0115] V. RS485 Interface Module

[0116] Figure 10This is an RS485 circuit. The right side shows the operating circuit of the MAX13487 chip. The MAX13487 operates at 5V for half-duplex communication and is ±15kV ESD protected. It is an RS-485 / RS-422 compatible transceiver with one driver and one receiver. The MAX13487 uses Maxim's proprietary automatic direction control. This architecture makes the device well-suited for applications such as isolated RS-485 ports, where the driver input is used in conjunction with the driver enable signal to drive a differential bus. The MAX13487 features a low-speed driver to minimize EMI, reduce reflections caused by improperly terminated cables, and achieve error-free transmission up to 500kbps. The MAX13488E has an unrestricted drive slew rate, allowing transmission speeds up to 16Mbps. The MAX13487 has a 1 / 4 unit load receiver input impedance, allowing up to 128 transceivers on the bus. These devices are used for half-duplex communication. All driver outputs are human-machine interface protected to ±15kV ESD. The MAX13487 is packaged in an 8-pin SO package. The equipment operates in a temperature range of -40 to +85 degrees Celsius.

[0117] Pin 1, RO, is the output of the receiver MAX13487. RO is high when MAX13487 is enabled and V(A)~V(B)>+200mV. RO is low when V(A)-V(B)<-200mV.

[0118] Pin 2, RE#, enables the MAX13487 output. Driving RE low enables RO. Driving RE high allows the automatic direction-of-flight circuitry to control the receiver.

[0119] Pin 3 (DE) is the shutdown pin of the MAX13487. Driving SHDN high enables normal operation of the device. Driving SHDN low shuts down the device.

[0120] Pin 4 (DI) is the driver input for the MAX13487. DI is an input to the internal state machine, which automatically enables and disables the driver.

[0121] Pin 5 is the GND ground pin;

[0122] Pin 6 is pin A in the RS485 interface standard;

[0123] Pin 7 is pin B in the RS485 interface standard;

[0124] Pin 8 is the VCC power supply pin for the MAX13487;

[0125] CON2 is an RS485 interface used to connect external RS485 devices.

[0126] The two circuits on the left are voltage matching circuits:

[0127] Q1, Q2, Q3, and Q4 are all NPN transistors. In the upper part of the circuit, when RS485_TX is high, transistor Q1 conducts, meaning the 5V to GND line is open. This causes the base of Q2 to be high, so Q2 also conducts, and RS485_RX is high. The lower part of the circuit works similarly. When 485_TX is high, transistor Q3 conducts, meaning the 3.3V to GND line is open. This causes the base of Q4 to be high, so Q4 also conducts, and RS485_RX is high.

[0128] The overall work process is as follows:

[0129] When the ZYNQ core communicates with an external RS485 device, the UART signal line sent by the ZYNQ core is converted into a level signal by the MAX13487 through the level conversion chip on the left. The MAX13487 then converts the received signal into a standard RS485 signal and sends it to the external RS485 device. When the external RS485 device communicates with the ZYNQ core, the MAX13487 converts the signals received on lines A and B into standard UART signals, performs level matching, and then sends them to the ZYNQ core.

[0130] VI. Vibrating Wire Sensor Reading Module

[0131] Figure 11 This is the circuit for the reading module of the vibrating wire sensor. Figure 12 This is a voltage conversion circuit.

[0132] exist Figure 11 In the diagram, VM1, VM2, VM3, VM4, VM5, and VM6 are interfaces for vibrating wire sensors; AQW214 is an optocoupler relay, which is a key intermediary connecting control logic and power output. It uses optical signals to achieve electrical isolation between input and output, ensuring operational safety, improving reliability, and optimizing power usage.

[0133] The working process of AQW214 (taking U12 as an example): AQW214 mainly consists of the following parts: First, a light-emitting diode (LED) at the input terminal; when current flows through, the LED emits a light signal. Then, a phototransistor at the output terminal receives the light signal emitted by the LED and generates a corresponding current based on changes in light intensity. Finally, an isolation medium between the LED and the phototransistor ensures electrical isolation. An LED is connected between pins 1 and 2 of the AQW214, which controls the conduction of pins 7 and 8 through its illumination. Similarly, an LED is connected between pins 3 and 4 of the AQW214, which controls the conduction of pins 5 and 6 through its illumination.

[0134] VM501 is the reading module for the vibrating wire sensor. Based on the working principle of AQW214 and the vibrating wire sensor, S+ and S- must form a loop. Therefore, S- is connected to each array sensor interface, and AQW214 is used to control whether S+ is connected to VM501. Taking U12 (the AQW214) as an example, pins 1 and 3 of U8 are connected to a 3.3V power supply, and pins 2 and 4 are connected to L18 and L19 on the core board. When L18 is low, pins 1 and 2 are connected, the LED lights up, and pins 7 and 8 are also connected. The S+ on VM6 is then connected to the S+ of VM501, allowing excitation and data reading of the vibrating wire sensor connected to VM6.

[0135] The process of reading the VM501 vibrating wire sensor is as follows: The VM501 is connected to the two signal lines of the vibrating wire sensor via S+ and S-. When a measurement command is received via the RX of the UART, a 12V excitation signal is first sent through the signal cable. After the vibrating wire sensor receives the excitation signal, an induced electromotive force is generated on the signal cable. The VM501 analyzes the induced electromotive force and sends it back to the core board for processing via the UART interface. Figure 12 This is a level conversion circuit.

[0136] VII. Power Supply

[0137] The system uses DC 24V, commonly used in industry, for power supply. After connecting to a power switch, an LM2596SX-12 DC-DC chip converts the 24V to 12V. D1, D3 (5V), D4 (3.3V), and D6 (1.8V) are all Schottky diodes used to prevent reverse voltage. C7, C8, C5, and C6 are filter capacitors. L1 is an inductor, used for filtering and smoothing current. The 12V to 5V converter uses an LM2940S-5, the 12V to 3.3V converter uses an LM2576S-3.3, and the 5V to 1.8V converter uses an AMS1117-1.8.

[0138] A 12V DC power supply is used for:

[0139] a. Convert the remaining voltages, including 5V and 3.3V.

[0140] b. Supply the excitation voltage to the VM501 reading module of the vibrating wire sensor.

[0141] c. Powering the ZYNQ core

[0142] A 5V DC power supply is used for:

[0143] e. Power supply for the USB module

[0144] f. Power supply for RS485 module

[0145] g. Power supply for the LoRa module

[0146] h. Voltage matching between the RS485 module and the ZYNQ core

[0147] The 3.3V DC power supply is used for:

[0148] A.Bank34 power supply

[0149] B. Power supply for the TF card module

[0150] C. Control of the optocoupler relay of the vibrating wire sensor

[0151] D. Power supply to the vibrating wire sensor reading module.

[0152] E. Voltage selection for Bank13, Bank33, and Bank35

[0153] Voltage matching between the F.RS485 module and the ZYNQ core

[0154] G. Voltage matching between the vibrating wire sensor reading module and the ZYNQ core

[0155] A 1.8V DC power supply is used for:

[0156] ① Voltage matching between the vibrating wire sensor reading module and the ZYNQ core

[0157] ② The voltage on one side of the TF card voltage conversion chip TXS02612RTWR

[0158] Example 3

[0159] This embodiment provides a specific implementation scheme.

[0160] 1. ZYNQ Configuration:

[0161] All configurations were done using Vivado software according to the network interface shown in the schematic. A custom RS485 IP core was created, and LVDS was used to convert differential signals to sequential signals. LVDS is a low-swing differential signaling technology that allows signals to be transmitted at hundreds of Mbps over differential PCB pairs or balanced cables. Its low voltage amplitude and low current drive output achieve low noise and low power consumption. Then, an IP was written in Verilog. This IP's function is to determine the function of a pair of differential signals by the high or low level of a certain pin. Finally, the entire block design was generated into a bitstream and imported into the SDK for further development.

[0162] Preferably, this embodiment provides a UART_IIC_SEL IP core, such as Figure 16 As shown, in the IP core, to connect to Xilinx's official AXI-IIC protocol, six IIC interfaces are connected: SCL_I, SCL_O, SCL_T, SDA_I, SDA_O, and SDA_T. Two AXI-UARTLITE interfaces are also connected: RX and TX. Furthermore, to enable protocol selection based on the high / low level of the select pin, a protocol selection pin FLAG signal is required. This FLAG signal not only controls whether the two external interfaces A and B connect to AXI-IIC or AXI-UART in the IP core, but also connects to the ZYNQ core. The ZYNQ core driver uses the FLAG signal to determine whether to use the IIC or UART protocol to send data.

[0163] Implementation process:

[0164] First, external signals:

[0165] This IP core's function is to select the protocol implemented on pins A and B via a protocol selection pin (FLAG). When FLAG is high, A is the TX pin of the UART protocol, and B is the RX pin of the UART protocol. When FLAG is low, A is the SDA pin of the IIC protocol, and B is the SCL pin of the IIC protocol.

[0166] 1) IIC Protocol

[0167] The AXI-IIC IP core has six external interfaces: SCL_I, SCL_O, SCL_T, SDA_I, SDA_O, and SDA_T. SCL_I, SCL_O, and SCL_T form one group, and SDA_I, SDA_O, and SDA_T form another. _I represents the input channel, _O represents the output channel, and _T represents the selection channel. Therefore, in the AXI-IIC IP core, _I is of type INPUT, _O is of type OUTPUT, and _T is of type OUTPUT. To connect to the uart_iic_sel IP core, the input type channels in the interface need to be changed to output type channels.

[0168] 2) UART protocol

[0169] The AXI-UART IP core has two external interfaces: RX and TX. RX is the input, and TX is the output. Therefore, in the uart_iic_sel IP core, RX is the output and TX is the input.

[0170] The final generated IP core is as follows Figure 17 As shown, by introducing a protocol selection pin (FLAG), this IP core allows for dynamic selection of the IIC or UART protocol at runtime without requiring changes to hardware connections or system reconfiguration. This flexibility is particularly important for applications that need to support multiple communication protocols simultaneously, such as embedded systems and industrial automation equipment. By integrating the interfaces of two commonly used communication protocols (IIC and UART) into a single IP core and allowing protocol selection via software control, this design significantly improves system integration. This not only reduces the required hardware resources (such as the number of GPIO pins) but also simplifies system design and lowers development costs.

[0171] Because this IP core allows selective activation of the IIC or UART protocols when needed, it effectively manages system power and resource usage. When a protocol is not required, its interface can be placed in a low-power state or completely shut down, thereby saving power and reducing unnecessary resource consumption.

[0172] Encapsulating the communication protocol selection logic within a separate IP core simplifies system maintenance and upgrades. When adding a new communication protocol or modifying an existing one, only this IP core needs updating or replacing, eliminating the need for large-scale modifications to the entire system. This IP core offers significant convenience for projects requiring rapid verification of compatibility between different communication protocols. Developers can quickly implement and test switching between multiple communication protocols on the hardware platform, thereby accelerating the prototyping process.

[0173] 2. The driver program is written in C using the Vivado SDK and is divided into modules:

[0174] 1. RS485 module

[0175] 2. Vibrating Wire Sensor Module

[0176] 3. MiniUSB module

[0177] 4. LoRa wireless transmission module

[0178] The overall process of the entire system is as follows:

[0179] 1. The LoRa module received complete data.

[0180] After system initialization, the LoRa module waits for the host computer to send a data query command. When data is received, an interrupt is generated, and data reception begins. The data is stored in the u8 array. The timer interrupt performs an interrupt query every millisecond. If the length of the received data field is not zero and no data is received for more than ten milliseconds, it is considered that the data reception is complete, and the data parsing continues.

[0181] 2. Perform CRC checks on the received data to verify its correctness.

[0182] After the LoRa module finishes receiving data, it first performs CRC monitoring to ensure that the received data is error-free. Then, if there are no errors, it performs data parsing. The parsing process is as follows:

[0183] The code is explained as follows:

[0184]

[0185]

[0186] Node ID: Used to indicate which node it is.

[0187] Module code:

[0188] The data in the entire hardware circuit is divided into several categories, each corresponding to a code. For example, if there are three RS485 interfaces, these three RS485 interfaces are divided into RS485 interface 0, RS485 interface 1, and RS485 interface 2. Subsequently, there are three vibrating wire sensor modules, which will be further ordered as: vibrating wire sensor 3, vibrating wire sensor 4, and vibrating wire sensor 6. That is, 00 represents RS485 interface 0, 01 represents RS485 interface 1, and 04 represents vibrating wire sensor 4.

[0189] address:

[0190] The address field is used to select which channel of the vibrating wire sensor to query. The RS485 field does not use this field and is not parsed. Since the vibrating wire sensor reuses the same module, the above needs to be controlled. Figure 12 The high and low levels of S1 to S3, S4, S5, S6, S7, and S8 are used to connect the vibrating wire sensor being queried. 01 represents setting S1 to S3 to low level, 02 represents S4 to low level, 03 represents S5 to low level, 04 represents S6 to low level, 05 represents S7 to low level, and 06 represents S8 to low level.

[0191] Sensor query command:

[0192] This field is the command used to query the sensor value. After parsing the entire code, this field is sent to the corresponding sensor module.

[0193] CRC check:

[0194] Whether sending commands to the module or receiving response data from the module, strict data verification should be performed. In rare cases, the response data returned by the module may contain errors; verification using the checksum of the data frame can prevent the reading of erroneous data.

[0195] 3. Sensor data query

[0196] After the code is parsed, the data in the command field is sent to the corresponding module. If it is a vibrating wire sensor module, the corresponding interface of the address field will be set to the corresponding level first.

[0197] 4. Interruption of reception

[0198] After the sensor receives data, it will automatically send back the sensor data in the current state. The monitoring method is the same as that of the LoRa module. When the interrupt starts, the data length and the time distance from the last received data are monitored every millisecond. If the length of the received data field is not zero and no data is received for more than ten milliseconds, it is considered that the data reception is complete. After receiving the complete data sent back by the sensor, the system will first perform CRC monitoring on the received data. After the monitoring is successful, the system will first store the data in the TF card, and then the LoRa module will send it out. Then the host computer system will store the received data in the database and then process the data.

[0199] Host computer module:

[0200] The host computer system uses the Spring Boot framework in Java, and the front-end page is written using Vue 3 and Element Plus. The specific functions are as follows:

[0201] Communication between the host computer and the sensor nodes is carried out using the MQTT or TCP / MQTT protocol. The host computer will automatically collect data from the sensor nodes at regular intervals. The required instructions need to be stored in the corresponding database in advance. Each sensor node has its own address, which makes it easy for the host computer to identify the location of the sensor.

[0202] Users are divided into three categories: system administrators, project administrators, and website visitors. System administrators have full system privileges, including but not limited to setting permissions for other users, managing website information display, project management, managing sensor information used in each project, and managing alarm notifications. Project administrators have the same functions as system administrators, except they lack the ability to set permissions for other users. Website visitors can only view the system's large screen data display.

[0203] In terms of project management: For system administrators, project management allows them to add, delete, modify, and query all project information, as well as add and delete projects as a whole. Project administrators can only perform CRUD operations on all project information, but cannot edit projects outside of their managed projects.

[0204] Data Dashboard: Based on the project selected by the visitor, the sensor information of the entire project is displayed (all users can see it, but cannot modify the data).

[0205] Sensor Management:

[0206] The sensor information includes:

[0207] 1) Sensor number

[0208] 2) Sensor type

[0209] 3) Sensor Name

[0210] 4) Interface type (RS485 or vibrating wire sensor)

[0211] 5) Sensor alarm threshold

[0212] 6) Data collection cycle

[0213] 7) Data Acquisition Command

[0214] System administrators can perform CRUD operations on all sensor information, including adding or deleting specific types of sensors. Project administrators can perform CRUD operations on sensor information used in the project.

[0215] The entire system operation process is as follows:

[0216] 1. From the user's perspective:

[0217] a) Data will be automatically displayed upon entering the system homepage.

[0218] b) Usernames and passwords are assigned by the system administrator. Users log in by entering their username and password; if correct, they are admitted to the system; otherwise, an error message is displayed and login is denied.

[0219] c) After logging in, you can access different backend pages based on your permissions, and then perform operations according to those permissions.

[0220] 2. From the perspective of data collection:

[0221] d) After the system starts running, it sends a data acquisition command to the sensor node after the acquisition period is reached, according to the sensor's acquisition cycle.

[0222] e) After receiving the command, the sensor node replies with confirmation data. The system then receives this confirmation and resends it. The host then enters a state of waiting to receive data. Once the sensor node sends its data, the system sends another confirmation message, which the sensor then receives and sends back its own confirmation message.

[0223] The query is complete.

[0224] f) After the query is completed, the data is parsed, and then the data is summarized and stored.

[0225] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A deep foundation pit sensor collection node and host computer display system, characterized in that: include: ZYNQ chips for data acquisition, data processing and communication control are connected to several types of sensors; A storage card for storing data, connected to the ZYNQ chip; The host computer is connected with the ZYNQ chip via wireless transmission.

2. The deep foundation pit sensor acquisition node and host computer display system according to claim 1 is characterized in that: The ZYNQ chip includes a PS module and a PL module. The PS module is respectively connected to a USB module, a storage card, and a sensor; the PL module is respectively connected to an RS485 circuit module and a wireless transmission module.

3. The deep foundation pit sensor acquisition node and host computer display system according to claim 1 is characterized in that: The sensors include a temperature sensor, a laser distance sensor, and a vibrating string sensor.

4. The deep foundation pit sensor acquisition node and host computer display system according to claim 2 is characterized in that: Use J2_B19 of the PL module as the first GPIO, J2_B18 of the PL module as the second GPIO, and J2_B26 of the PL module as the third GPIO to control whether the vibrating string sensor with three S+ of VM1 is read or not; Use J2_B25 of the PL module as the fourth GPIO to control whether the vibrating string sensor of VM2 is read; Use J2_B33 of the PL module as the fifth GPIO to control whether the vibrating string sensor of VM3 is read; Use J2_B32 of the PL module as the sixth GPIO to control whether the vibrating string sensor of VM4 is read or not; Use J2_B39 of the PL module as the seventh GPIO to control whether the vibrating string sensor of VM5 is read or not; J2_B40 of the PL module is used as the eighth GPIO to control whether the vibrating string sensor of VM6 is read or not.

5. The deep foundation pit sensor acquisition node and host computer display system according to claim 2 is characterized in that: The USB module is connected to the PS module. When an external signal is sent to the PS module, the D- and D+ signals are sent to the CH340B module. The CH340B module converts the received USB standard signal into a UART signal and sends it to the ZYNQ chip.

6. The deep foundation pit sensor acquisition node and host computer display system according to claim 2 is characterized in that: The storage card is a TF card module, and the TF card module performs the following operations: the CD pin is used to detect whether the TF card is inserted, and DAT0, DAT1, DAT2, and DAT3 are used for bidirectional data transmission; during the data storage and reading process, the CMD command line is used to send commands and control the operation of the SD card; before storing and reading data, commands are sent through the CMD command line to control the working status and operation of the SD card, and the CLK clock line is used for synchronous data transmission; the CLK line provides a clock signal to ensure the correct transmission and synchronization of data.

7. The deep foundation pit sensor acquisition node and host computer display system according to claim 2 is characterized in that: The wireless transmission module is a LoRa module, which performs the following operations: LoRa_M0, LoRa_M1, and LoRa_AUX are all set to GPIO, and LoRa_RX and LoRa_TX are connected to two pins derived from the uart_liteIP core; in the initial stage, LoRa_M0 and LoRa_M1 are set to output mode and output high level; LoRa_AUX is set to input mode, and when data needs to be sent, the level status of LoRa_AUX is first read. If it is a high level, it can be sent. If it is a low level, wait for the level to become a high level before sending data; LoRa_RX and LoRa_TX are used to transmit data with the ZYNQ chip.

8. The deep foundation pit sensor acquisition node and host computer display system according to claim 2 is characterized in that: The RS485 circuit module performs the following operations: when the ZYNQ chip communicates with an external RS485 device, the UART signal line sent by the ZYNQ chip is converted into a level signal of the MAX13487 through the level conversion chip, and the MAX13487 converts the received signal into a standard RS485 signal and sends it to the external RS485 device; when the external RS485 device communicates with the ZYNQ chip, the MAX13487 converts the signals received by the AB lines into standard UART signals, and sends them to the ZYNQ core after level matching.

9. The deep foundation pit sensor acquisition node and host computer display system according to claim 2, characterized in that: The sensor includes a vibrating string sensor reading module, which performs the following operations: it is connected to the two signal lines of the vibrating string sensor through S+ and S-. When a measurement instruction is received through the RX of the UART, a 12V excitation signal is first sent through the signal cable. After the vibrating string sensor receives the excitation signal, an induced electromotive force is generated on the signal cable. VM501 analyzes the induced electromotive force and sends it back to the ZYNQ chip through the UART interface for processing.

10. The deep foundation pit sensor acquisition node and host computer display system according to any one of claims 1 to 9, characterized in that: A power module is also included for supplying power.

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