Preparation method of GaN HEMT device and GaN HEMT device

Abstract

The invention provides a preparation method of a GaN HEMT (High Electron Mobility Transistor) device and the GaN HEMT device. The preparation method comprises the following steps: forming a substrate of an SIC material of a second doping type; forming a single SIC epitaxial wafer of the first doping type growing along the C axis; forming an electric field stop layer of a first doping type on the front surface of the SIC epitaxial wafer; wherein the doping concentration of the electric field stop layer is greater than that of the substrate; forming a stripping layer at a position below the electric field stop layer in the SIC epitaxial wafer; wherein the part, located between the electric field stop layer and the stripping layer, in the SIC epitaxial wafer serves as an electric field pressure bearing layer; bonding the front surface of the electric field stop layer and the front surface of the substrate together; stripping is carried out at the stripping layer; the electric field stop layer is arranged on the substrate, and the electric field pressure bearing layer is arranged on the electric field stop layer. According to the GaN HEMT device and the manufacturing method thereof, the technical problem caused by relatively high cost of a traditional GaN HEMT device is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for preparing a GaN HEMT device and a GaN HEMT device. Background Art

[0002] Gallium nitride high electron mobility transistor (GaN HEMT) is an emerging semiconductor device that has been widely used in many fields due to its excellent performance. Compared with traditional silicon-based devices, GaN HEMT has higher switching speed and higher breakdown voltage, which enables it to perform well in high-frequency, high-power and high-temperature environments.

[0003] In recent years, GaN HEMT device technology has developed rapidly. Many semiconductor companies and research institutions have increased their investment in the research and production of GaN materials. Compared with early technologies, today's GaN HEMT devices have made significant progress in cost, stability and production processes. With the maturity of manufacturing processes, GaN HEMT devices have become more and more widely used in the market, and prices have gradually decreased, promoting their popularity in various fields.

[0004] ‌GaN on SiC HEMT device: specifically refers to GaN HEMT devices made on silicon carbide (SiC) substrates. GaN onSiC HEMT devices are usually high-resistance SiC substrates, on which is the epitaxial structure of the GaN HEMT device.

[0005] Figure 1 Schematic diagram of a GaN on SiC HEMT device in the prior art. Figure 1 From the literature "A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs". Figure 1 As shown, the Substrate Via (i.e., substrate through hole 1-1) is opened from the back side of the device to the front side to achieve grounding.

[0006] The existing GaN on SiC HEMT is also facing the problem of expensive silicon carbide substrates while developing. The epitaxial gallium nitride material on the silicon carbide substrate has lower defect density and higher crystal quality than the epitaxial gallium nitride material on the silicon or sapphire substrate. Therefore, high-performance GaN HEMT devices often use SiC materials as substrates. The existing SiC substrate technology for manufacturing GaNHEMT devices in the industry is generally a SiC high-resistance substrate grown along the C-axis. The GaN epitaxial layer grown on the SiC high-resistance substrate grown along the C-axis has lower defects and dislocations and good material quality.

[0007] Conventional substrates used in large-scale power devices are low-priced, low-resistance single-crystal SIC substrates, D-grade wafers (test wafer grade) or polycrystalline SIC substrates that grow at a 4-degree angle from the C-axis. However, the price of SiC high-resistance substrates grown along the C-axis is much higher than that of low-resistance substrates grown at a 4-degree angle from the C-axis. As a result, the cost of the substrate accounts for the majority of the total cost of the GaN HEMT device. At the same time, since GaN HEMT devices are often back-thinned and back-gold-plated, the SiC high-resistance SIC substrates grown along the C-axis with a thickness of several hundred microns used as substrates will be thinned to a thickness of tens to several microns, and the excess SIC substrates will be removed by CMP technology and not used, resulting in a waste of expensive substrate materials.

[0008] Therefore, the high cost of traditional GaN HEMT devices limits their application scenarios, which is a technical problem that technical personnel in this field urgently need to solve.

[0009] The above information disclosed in the background section is only for enhancing understanding of the background of the present application and therefore it may contain information that does not form the prior art known to a person of ordinary skill in the art. Summary of the invention

[0010] The present application provides a method for preparing a GaN HEMT device and a GaN HEMT device, so as to solve the technical problem that the application scenarios of traditional GaN HEMT devices are limited due to their high cost.

[0011] The present application provides a method for preparing a GaN HEMT device, comprising the following steps: forming a substrate of SIC material of a second doping type; forming a separate SIC epitaxial wafer of the first doping type grown along the C-axis; Forming an electric field stop layer of a first doping type on the front side of the SIC epitaxial wafer; wherein the doping concentration of the electric field stop layer is greater than the doping concentration of the substrate; forming a peeling layer at a position below the electric field stop layer in the SIC epitaxial wafer; wherein a portion of the SIC epitaxial wafer between the electric field stop layer and the peeling layer serves as an electric field bearing layer; bonding the front side of the electric field stop layer and the front side of the substrate together; Stripping is performed at the stripping layer; wherein the electric field termination layer is located above the substrate, and the electric field bearing layer is located above the electric field termination layer; Wherein, above the electric field bearing layer is the epitaxial structure of the GaN HEMT device.

[0012] The present application also provides a GaN HEMT device, including: a substrate of SIC material of a second doping type; A field stop layer of SIC of a first doping type grown along the C-axis is formed on the substrate; An electric field bearing layer of SIC of the first doping type grown along the C-axis is formed on the electric field stopping layer 11 .

[0013] Due to the adoption of the above technical solution, this application has the following technical effects: The thickness of the substrate of the present application is relatively large, and after the entire GaN HEMT device is completed, the back of the substrate needs to be thinned. The low-cost substrate used in the present application serves as a supporting base on the one hand, and is also an object of thinning on the other hand.

[0014] Compared with the thickness lost in the thinning process in the prior art, the thickness of the peeling layer lost in the preparation method of the GaN HEMT device of the present application is very small. The electric field termination layer and the electric field pressure bearing layer in the present application play the role of pressure bearing and electric field termination. Therefore, the substrate, the electric field termination layer, and the electric field pressure bearing layer as a whole can correspond to the high-resistance SiC substrate in the background technology.

[0015] The growth of SIC epitaxial wafers along the C-axis is a high-cost process with complex control. The SIC epitaxial wafers along the C-axis formed by one growth can be used multiple times, and each use can be used to prepare one or a batch of GaN HEMT devices, which can also reduce the preparation cost of GaN HEMT devices and reduce the complexity of the preparation method. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 A schematic diagram of a GaN on SiC HEMT device in the prior art; Figure 2-A A flow chart of a method for preparing a GaN HEMT device of the present application; Figure 2-BA schematic diagram of completing step S1 of the method for preparing a GaN HEMT device of the present application; Figure 2-C A schematic diagram of completing step S3 of the method for preparing a GaN HEMT device of the present application; Figure 2-D A schematic diagram of completing step S4 of the method for preparing a GaN HEMT device of the present application; Figure 2-E A schematic diagram of completing step S5 of the method for preparing a GaN HEMT device of the present application; Figure 2-F A schematic diagram of executing step S6 of the method for preparing a GaN HEMT device of the present application; Figure 2-G A schematic diagram of completing step S6 of the method for preparing a GaN HEMT device of the present application; Figure 3 A schematic diagram of an implementation of the GaN HEMT device of the present application; Figure 4 A schematic diagram of another implementation of the GaN HEMT device of the present application; Figure 5 A schematic diagram of another implementation of the GaN HEMT device of the present application; Figure 6 A schematic diagram of completing step S7 of the method for preparing a GaN HEMT device of the present application; Figure 7 A schematic diagram of completing step S8 of the method for preparing a GaN HEMT device of the present application; Figure 8 A schematic diagram of completing step S9 of the method for preparing a GaN HEMT device of the present application; Fig. 9 A schematic diagram of completing step S10 of the method for preparing a GaN HEMT device of the present application; Fig.10 A schematic diagram of completing step S11 of the method for preparing a GaN HEMT device of the present application; Fig.11 A schematic diagram of completing step S12 of the method for preparing a GaN HEMT device of the present application; Fig.12 A schematic diagram of completing step S13 of the method for preparing a GaN HEMT device of the present application; Fig.13 This is a schematic diagram of completing step S14 of the method for preparing a GaN HEMT device of the present application.

[0017] Reference numerals: In the background technology: Substrate through hole 1-1; In this application: Substrate 10, SIC epitaxial wafer 12-0, electric field termination layer 11, electric field bearing layer 12, peeling layer 13; SIC connection area 20, first connection area 21, AlN layer 22, AlN layer base 220, GaN buffer layer 23, GaN buffer layer base 230, GaN layer 24, GaN layer base 240, AlGaN layer 25, AlGaN layer base 250, Gate metal 26, SiN layer 27, SiN layer base 270, drain 28-1, source 28-2, Metal silicide layer 29 , source metal 31 , back grounding metal 32 , and second connection region 33 . DETAILED DESCRIPTION

[0018] In order to make the technical solutions and advantages of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict. Embodiment 1

[0019] like Figure 2-A As shown, a method for preparing a GaN HEMT device of the present application comprises the following steps: like Figure 2-B As shown, step S1: forming a substrate 10 of a SIC material of a second doping type; Step S2: forming a separate SIC epitaxial wafer 12 - 0 of the first doping type grown along the C axis; like Figure 2-C As shown, step S3: forming an electric field stop layer 11 of a first doping type on the front side of the SIC epitaxial wafer 12 - 0 ; wherein the doping concentration of the electric field stop layer 11 is greater than the doping concentration of the substrate 10 ; like Figure 2-D As shown, step S4: forming a peeling layer 13 at a position below the electric field termination layer 11 in the SIC epitaxial wafer 12-0; wherein a portion of the SIC epitaxial wafer 12-0 between the electric field termination layer 11 and the peeling layer 13 serves as an electric field bearing layer 12; like Figure 2-E As shown, step S5: bonding the front side of the electric field stop layer 11 and the front side of the substrate 10 together; like Figure 2-FAs shown, step S6: peeling is performed at the peeling layer 13; wherein, Figure 2-G As shown, the electric field termination layer 11 is located on the substrate 10, and the electric field bearing layer 12 is located on the electric field termination layer 11; Wherein, the epitaxial structure of the GaN HEMT device is located above the electric field bearing layer 12 .

[0020] The method for preparing the GaN HEMT device of the present application comprises the following steps: Step S1: forming a substrate 10 of a second doping type SIC material. Specifically, a separate substrate 10 of a second doping type SIC material grown at an angle of 4 degrees away from the C axis may be formed. The cost of the second doping type substrate 10 grown at an angle of 4 degrees away from the C axis is relatively low.

[0021] Step S2: forming a separate C-axis grown SIC epitaxial wafer 12-0 of the first doping type. Note that the C-axis grown SIC epitaxial wafer 12-0 is not formed directly on the substrate 10 grown at a 4-degree angle away from the C-axis, because a SIC epitaxial wafer grown along the C-axis cannot be grown on the substrate 10 grown at a 4-degree angle away from the C-axis.

[0022] Step S3: forming an electric field stop layer 11 of a first doping type on the front side of the SIC epitaxial wafer 12 - 0 ; wherein the doping concentration of the electric field stop layer 11 is greater than the doping concentration of the substrate 10 .

[0023] Step S4: forming a peeling layer 13 at a position below the electric field termination layer 11 in the SIC epitaxial wafer 12 - 0 ; wherein a portion of the SIC epitaxial wafer 12 - 0 between the electric field termination layer 11 and the peeling layer 13 serves as the electric field bearing layer 12 .

[0024] Step S5: Turn the entire SIC epitaxial wafer 12 - 0 upside down, and bond the front side of the electric field stop layer 11 and the front side of the substrate 10 together.

[0025] Step S6: stripping is performed at the stripping layer 13; wherein the electric field termination layer 11 is located above the substrate 10, and the electric field bearing layer 12 is located above the electric field termination layer 11. At this time, the portion of the SIC epitaxial wafer 12-0 located at the stripping layer 13 and above is stripped, and the electric field termination layer 11 and the electric field bearing layer 12 are located above the substrate 10 from bottom to top.

[0026] From now on, the substrate 10, the electric field stop layer 11 and the electric field bearing layer 12 as a whole serve as the basis of the epitaxial structure of the GaN HEMT device, that is, the substrate 10, the electric field stop layer 11 and the electric field bearing layer 12 as a whole correspond to the high-resistance SiC substrate in the background technology.

[0027] The substrate 10 grown at a 4-degree angle away from the C-axis in the present application is relatively thick, and after the entire GaN HEMT device is completed, it is necessary to thin the back of the substrate 10. The substrate 10 grown at a 4-degree angle away from the C-axis, which is used in the present application at a relatively low cost, serves as a supporting base on the one hand, and is also an object of thinning on the other hand.

[0028] The substrate 10 of SIC material grown at an angle of 4 degrees away from the C axis cannot be directly used as the basis of the epitaxial structure of GaN HEMT devices due to its own characteristics. If it is directly grown on the substrate 10 grown at an angle of 4 degrees away from the C axis, only epitaxy with an angle of 4 degrees away from the C axis can be grown, and epitaxy with an angle of 4 degrees away from the C axis cannot be directly used as the basis of the epitaxial structure of GaN HEMT devices.

[0029] Therefore, the present application realizes the electric field termination layer 11 and the electric field bearing layer 12 on the substrate 10 through the SIC epitaxial wafer, the electric field termination layer 11, the electric field bearing layer 12, the flip-flop, the front bonding method, and the peeling method. The cost of the electric field termination layer 11 and the electric field bearing layer 12 is relatively high, but the thickness in the GaN HEMT device of the present application is relatively small, and the electric field termination layer 11 and the electric field bearing layer 12 do not need to be thinned in the preparation process of the entire GaN HEMT device, and the high-cost electric field termination layer 11 and the electric field bearing layer 12 will not be lost. In the whole process, only one layer of peeling layer 13 is lost. Compared with the thickness lost in the thinning process in the prior art, the thickness of the peeling layer 13 lost in the preparation method of the GaN HEMT device of the present application is very small. The electric field termination layer 11 and the electric field pressure bearing layer 12 in the present application play the role of pressure bearing and electric field termination. Therefore, the substrate 10, the electric field termination layer 11, and the electric field pressure bearing layer 12 as a whole can correspond to the high-resistance SiC substrate in the background technology.

[0030] In addition, the first doping type SIC epitaxial wafer 12-0 grown along the C-axis can be grown to a larger thickness at one time. The peeling layer 13, the electric field termination layer 11 and the electric field pressure bearing layer 12 in the preparation of a single GaN HEMT device will consume a certain thickness of the SIC epitaxial wafer 12-0, and the remaining part of the SIC epitaxial wafer 12-0 can still be used as a SIC epitaxial wafer in the preparation of other GaN HEMT devices. In this way, the first doping type SIC epitaxial wafer 12-0 grown along the C-axis is achieved. The growth of the SIC epitaxial wafer 12-0 grown along the C-axis is a high-cost process and is complex to control. The SIC epitaxial wafer 12-0 grown along the C-axis formed by one growth can be used multiple times, and each use can be used to prepare one or a batch of GaN HEMT devices, which can also reduce the preparation cost of GaN HEMT devices and reduce the complexity of the preparation method.

[0031] In implementation, the step of forming the electric field stop layer 11 of the first doping type on the front side of the SIC epitaxial wafer 12-0 is specifically as follows: An electric field stop layer 11 of a first doping type is formed on the front side of the SIC epitaxial wafer 12 - 0 by ion implantation; Alternatively, an electric field stop layer 11 of the first doping type is formed on the front side of the SIC epitaxial wafer 12 - 0 by epitaxial growth.

[0032] In the implementation, the step of forming the peeling layer 13 at a position below the electric field stop layer 11 in the SIC epitaxial wafer 12-0 is specifically as follows: A lift-off layer 13 is formed in the SIC epitaxial wafer 12 - 0 at a position below the electric field stop layer 11 by hydrogen ion implantation.

[0033] In implementation, the step of bonding the front surface of the electric field stop layer 11 and the front surface of the substrate 10 together is specifically as follows: The front side of the electric field termination layer 11 and the front side of the substrate 10 are connected together by low temperature bonding.

[0034] The bonding method may be a Smartcut bonding method.

[0035] In implementation, the step of bonding the front surface of the electric field stop layer 11 and the front surface of the substrate 10 together is specifically as follows: Connecting the front side of the electric field stop layer 11 and the front side of the substrate 10 together by low temperature bonding; The step of peeling the SIC epitaxial wafer 12-0 at the peeling layer 13 is specifically as follows: The peeling layer 13 is peeled off by thermal reaction, and the bonding is strengthened by high-temperature thermal annealing, and the surface of the electric field bearing layer 12 just peeled off is smoothed by CMP process (chemical mechanical polishing process).

[0036] The ion implantation, bonding, stripping, high temperature annealing to strengthen bonding, and CMP processes used in the preparation method of the GaN HEMT device of the present application are all common and mature processes, and no additional process development costs are required, making the preparation method of the GaN HEMT device of the present application more convenient and less difficult to implement.

[0037] In implementation, the substrate 10 is a substrate of a single crystal or polycrystalline SIC material; Or D-grade film (test piece grade) of SIC substrate.

[0038] In implementation, the substrate 10 is a high-resistance substrate or a low-resistance substrate.

[0039] Specifically, the GaN HEMT device of the present application also includes steps of preparing other structures.

[0040] Specifically, the first doping type is P type, and the second doping type is N type.

[0041] In implementation, the substrate 10 is a low-resistance substrate; The upper surface of the electric field pressure bearing layer 12 is divided into a first area of ​​the electric field pressure bearing layer and a second area of ​​the electric field pressure bearing layer; the preparation method further comprises the following steps: A back grounding metal 32 is formed on the back side of the substrate 10; A first connection area base of a first doping type is formed downward from the first region of the electric field bearing layer, a first through hole is formed downward from the upper surface of the first connection area base by etching, and a SIC of a second doping type is filled in the first through hole to form a SIC connection area 20 of a second doping type; wherein the portion of the first connection area base that is not etched forms a first connection area 21.

[0042] The back-side grounding metal 32 , the substrate 10 and the SIC connection region 20 are connected to connect the zero potential to a position on the upper surface of the SIC connection region 20 in the GaN HEMT device.

[0043] The implementation also includes the following steps: Injection is performed on the inner wall of the first through hole to form a second connection area 33, wherein the second connection area 33: In the vertical direction, the second connection region 33 is connected below the first connection region 21, and the bottom end of the SIC connection region 20 enters into the electric field stop layer 11 or the bottom end of the SIC connection region 20 is connected to the upper surface of the substrate 10; In the lateral direction, the second connection area 33 is formed on the outer peripheral surface of the SIC connection area 20; The doping concentration of the second connection region 33 is greater than the doping concentration of the electric field stop layer 11 .

[0044] The electric field termination layer 11 and the electric field bearing layer 12 formed on the substrate 10 are necessary structures for the GaN HEMT device. The upper surface of the electric field bearing layer is divided into a first area of ​​the electric field bearing layer and a second area of ​​the electric field bearing layer, and the GaN HEMT front structure is formed on the first area of ​​the electric field bearing layer.

[0045] The first through hole is formed by etching downward from the second region of the electric field bearing layer, and the bottom end of the first through hole enters into the substrate 10. That is, the starting point of the etching for forming the first through hole is the second region of the electric field bearing layer, and the end point is to enter into the substrate 10. The etching for forming the first through hole only needs to penetrate the thickness of the electric field termination layer 11 and the electric field bearing layer 12 of the SIC material and enter deeper into the substrate 10. The total thickness of the electric field termination layer 11 and the electric field bearing layer 12 is generally only a few microns, so the depth of etching for forming the first through hole is very small.

[0046] The N-type SIC connection region 20 is formed by filling the first through hole with N-type polycrystalline SIC, and the lower end of the SIC connection region 20 enters the substrate 10. In this way, the back grounding metal 32, the N-type substrate 10 and the N-type SIC connection region 20 are connected.

[0047] The front structure of the GaN HEMT is formed on the first electric field pressure-bearing area. The distance between the back grounding metal 32 and the upper surface of the GaNHEMT front structure is the total thickness of the GaN HEMT device of the present application. Therefore, the etching for forming the first through hole is performed on the SIC material with greater etching difficulty, and the etching depth is relatively small, and it is also much smaller than the thickness of the GaN HEMT device of the present application. Therefore, the etching for forming the first through hole does not need to adopt the TSV through hole process, but only needs to adopt the semi-through hole etching process to form it. The etching process is simple and the process implementation difficulty is relatively low.

[0048] The depth of the first through hole is small, and correspondingly, the diameter of the first through hole is also small, so that the area occupied by the first through hole is also small.

[0049] The back grounding metal 32 is grounded and the conductive carriers are electrons. The substrate adopts an N-type low-resistance substrate 10, that is, the majority carriers of the substrate 10 are electrons and the substrate 10 has more electrons. Since the back grounding metal 32 and the N-type low-resistance substrate 10 each have more electrons as conductive carriers, the connection between the N-type low-resistance substrate 10 and the back grounding metal 32 is better electrically connected and has lower resistance.

[0050] The N-type substrate 10 and the N-type SIC connection area 20 are both N-type, and most carriers are electrons. In this way, by controlling the doping concentration of the N-type substrate 10 and the N-type SIC connection area 20, the connection between the N-type substrate 10 and the N-type SIC connection area 20 can achieve better electrical connection and lower resistance.

[0051] Thus, the back grounding metal 32, the N-type substrate 10 and the N-type SIC connection area 20 are connected and the electrical connection is good, and the resistance is low. Since the back grounding metal 32 is grounded. Through the connection of the back grounding metal 32, the N-type substrate 10 and the N-type SIC connection area 20, the zero potential of the grounded back grounding metal 32 has been connected to the upper surface of the SIC connection area 20 (corresponding to the height of the upper surface of the second region of the epitaxial layer), that is, the zero potential has been connected to the inside of the GaN HEMT device of the present application and in the middle position in the thickness direction, providing conditions for the GaN HEMT device of the present application to be grounded from the front. In this way, the structural form of the GaN HEMT device of the present application realizes that the front grounding no longer needs to penetrate the entire thickness of the device, and thus no longer needs to adopt the TSV through-hole process.

[0052] The preparation process of the GaN HEMT device of the present application is shown in FIG. 2A- Figure 6 On this basis, the following steps are also included: Step S7: Figure 6 As shown, a back grounding metal 32 is formed on the back of an N-type low-resistance substrate 10, and an epitaxial layer of a P-type SIC material is formed from the upper surface of the substrate 10, and the epitaxial layer is sequentially composed of a P-type electric field stop layer 11 and an electric field bearing layer 12 from bottom to top; Step S8: Figure 7 As shown, a P-type first connection region base is formed by implantation, a first through hole is formed by etching downward from the upper surface of the first connection region base, and an N-type polycrystalline SIC is filled in the first through hole to form an N-type SIC connection region 20; at this time, a first connection region 21 is formed; Step S9: Figure 8 As shown, an AlN layer foundation 220, a GaN buffer layer foundation 230, a GaN layer foundation 240, an AlGaN layer foundation 250, and a SiN layer foundation 270 are sequentially formed from bottom to top above the electric field pressure bearing layer 12, the N-type SIC connection region 20, and the first connection region 21; Step S10: Fig. 9 As shown, etching is performed downward from the upper surface of the SiN layer foundation 270 to expose the first connection region 21 and the N-type SIC connection region 20; Step S11: Fig.10 As shown, a metal silicide layer 29 is formed on the first connection region 21 and the N-type SIC connection region 20; Step S12: Fig.11 As shown, a gate metal 26 is formed on a SiN layer foundation 270; Step S13: Fig.12As shown, a first contact hole 30 is formed on the metal silicide layer 29 to form a source 28-1 and a drain 28-2; thus, an AlN layer 22, a GaN buffer layer 23, a GaN layer 24, an AlGaN layer 25, and a SiN layer 27 are formed; Step S14: Fig.13 As shown, source metal 31 and drain metal are formed. Embodiment 2

[0053] The GaN HEMT device of the present application comprises: A substrate 10 of a SIC material of a second doping type; An electric field stop layer 11 of SIC of a first doping type grown along the C-axis is formed on the substrate 10; An electric field bearing layer 12 of SIC of the first doping type grown along the C-axis is formed on the electric field termination layer 11 .

[0054] The substrate 10 may specifically be a substrate 10 of the second doping type grown at an angle of 4 degrees away from the C-axis.

[0055] The GaN HEMT device of the present application, the substrate 10, the electric field stop layer 11 and the electric field pressure bearing layer 12 as a whole, as the basis of the epitaxial structure of the GaN HEMT device, has a low overall cost and a relatively simple preparation process. The substrate 10, the electric field stop layer 11 and the electric field pressure bearing layer 12 as a whole correspond to the high-resistance SiC substrate in the background technology.

[0056] The substrate 10 grown at a 4-degree angle away from the C-axis in the present application is relatively thick, and after the entire GaN HEMT device is completed, it is necessary to thin the back of the substrate 10. The substrate 10 grown at a 4-degree angle away from the C-axis, which is used in the present application at a relatively low cost, serves as a supporting base on the one hand, and is also an object of thinning on the other hand.

[0057] The electric field termination layer 11 and the electric field pressure-bearing layer 12 have high costs, but the thickness is small in the GaN HEMT device of the present application, and the electric field termination layer 11 and the electric field pressure-bearing layer 12 do not need to be thinned in the entire GaN HEMT device preparation process, and the high-cost electric field termination layer 11 and the electric field pressure-bearing layer 12 will not be lost. The electric field termination layer 11 and the electric field pressure-bearing layer 12 in the present application play the role of pressure bearing and electric field termination, so the substrate 10, the electric field termination layer 11, and the electric field pressure-bearing layer 12 as a whole can correspond to the high-resistance SiC substrate in the background technology.

[0058] In implementation, the substrate 10 is a low-resistance substrate 10; The upper surface of the electric field pressure bearing layer 12 is divided into a first area of ​​the electric field pressure bearing layer and a second area of ​​the electric field pressure bearing layer; GaN HEMT devices also include: A grounded backside grounding metal 32 is formed on the back side of the substrate 10; A first through hole is formed downward from the first region of the electric field bearing layer, and the bottom end of the first through hole enters into the substrate 10; An N-type SIC connection region 20 is formed by filling the first through hole with N-type polycrystalline SIC, and the lower end of the SIC connection region 20 enters into the substrate 10; A GaN HEMT front structure formed on the second region of the electric field bearing layer; The back grounding metal 32 , the N-type substrate 10 and the N-type SIC connection region 20 are connected to connect the zero potential to the inside of the GaN HEMT device and the upper surface of the SIC connection region 20 .

[0059] Patent application with publication number CN118016691A discloses a gallium nitride heterostructure based on a large-size silicon-based composite substrate and a method for manufacturing the same.

[0060] Compared with the patent application with publication number CN118016691A, this application has the following differences: The patent application with publication number CN118016691A is for a silicon-based composite substrate, which uses Si and SiC substrates for bonding. The thermal conductivity and lattice constants of these two heterogeneous materials are different, so there will inevitably be problems such as thermal mismatch and lattice mismatch during bonding. Stress will be generated at the bonding interface. In order to relax the stress, certain dislocations will be formed at the interface, and may even extend upward to affect the SiC material, and subsequently affect the performance of gallium nitride materials and devices. In order to form a good interface first, it is necessary to strictly control the bonding process and quality, resulting in increased costs. The thermal conductivity of silicon materials is much lower than that of SiC and GaN materials, and the heat dissipation is very slow, which greatly limits the high-temperature and high-power applications of power devices.

[0061] Moreover, the silicon-based composite substrate cannot be applied to the structure in which the SiC connecting layer is connected to the substrate in the present application. Due to the heterojunction structure formed by the SiC material and the Si material, there may be defects, dangling bonds and interface states at the interface, which affect the transmission of electrons from the SiC connecting layer to the Si material, thereby affecting the performance of the GaN device.

[0062] This application uses an epitaxial wafer of SiC material to bond with a SiC substrate. The materials are homogeneous, and there is no problem of thermal mismatch and lattice mismatch at the bonding interface. There are no special requirements for the bonding process and it will not bring about cost increase. At the same time, the SiC connecting layer and the substrate are made of the same material, and the device performance will not be affected.

[0063] In practice, the depth of the lower end of the N-type SIC connection region 20 entering the substrate 10 is in a range of greater than or equal to 0.1 μm, so as to ensure a good connection between the N-type SIC connection region 20 and the substrate 10 .

[0064] In implementation, the thickness of the substrate 10 is in the range of 5 μm to 300 μm; The resistivity of the substrate 10 is in the range of greater than or equal to 0.1 mohm. cm is less than or equal to 1000ohm cm.

[0065] The logic of selecting the resistivity of the substrate is that the device needs to conduct electricity to the back side through the substrate. According to current technology, the thickness of the back substrate is about 100μm. In order to lower the resistance to ground, 10mm 2 Device, according to 100ohm The resistivity of the substrate is 10 ...

[0066] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device of the present application also includes: A metal silicide layer 29, wherein the metal silicide layer 29 is formed on the N-type SIC connection region 20; A first contact hole 30 is formed on the metal silicide layer 29; an upper end of the first contact hole 30 is connected to a source metal 31 of the GaN HEMT front structure; The source metal 31 of the GaN HEMT front structure, the first contact hole 30, the metal silicide layer 29, the N-type SIC connection region 20, the N-type substrate 10, and the grounded back grounding metal 32 are connected.

[0067] In this way, the source metal 31 of the GaN HEMT front structure is grounded from the front of the GaN HEMT device of the present application through the first contact hole 30, the metal silicide layer 29, the N-type SIC connection area 20, the N-type substrate 10, and the grounded back grounding metal 32. That is, the source of the GaN HEMT device of the present application is grounded through the front grounding structure.

[0068] The first contact hole 30 is formed by using a contact hole process, and the metal of the first contact hole 30 is tungsten. Therefore, the manufacturing process of the first contact hole 30 is simple and the cost is low.

[0069] Thus, the front side grounding structure of the GaN HEMT device of the present application includes: The source metal 31 , the first contact hole 30 , the metal silicide layer 29 , the N-type SIC connection region 20 (filled in the first through hole), the N-type substrate 10 , the grounded back side grounding metal 32 , and the first connection region 21 .

[0070] The two-terminal structure adopted is that the metal silicide layer 29 and the structure below it (N-type SIC connection area 20 (filled in the first through hole), N-type substrate 10, the grounded back grounding metal 32, and the first connection area 21) are one section, and the structure above the metal silicide layer 29 (source metal 31, the first contact hole 30) is one section. Both the first contact hole 30 and the first through hole are relatively short, far less than the overall thickness of the GaN HEMT device of the present application. Moreover, the first contact hole 30 adopts the contact hole process, and the first through hole adopts the semi-through hole process. That is, the preparation process of the front grounding structure of the GaN HEMT device of the present application does not require the TSV process, and the shortcomings brought by the TSV process are not present in the present application.

[0071] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device of the present application also includes: A P-type connection region is formed downward from the first region of the epitaxial layer in the epitaxial layer, the P-type connection region is connected to the outer peripheral surface of the N-type SIC connection region 20; and the metal silicide layer 29 is formed on the N-type SIC connection region 20 and the P-type connection region; The metal silicide layer 29 is respectively connected to the N-type SIC connection region 20 and the P-type connection region.

[0072] In this way, the back grounding metal 32, the N-type substrate 10, the N-type SIC connection area 20, and the metal silicide layer 29 are connected; and the P-type epitaxial layer, the P-type connection area, and the metal silicide layer 29 are connected.

[0073] The zero potential of the grounded back grounding metal 32 is connected to the metal silicide layer 29 through the back grounding metal 32, the N-type substrate 10, the N-type SIC connection area 20, and the metal silicide layer 29. The P-type epitaxial layer is connected to the zero potential through the metal silicide layer 29, the P-type connection area, and the P-type epitaxial layer.

[0074] About the structure of epitaxial layer: As a first optional manner, the epitaxial layer includes: A P-type electric field stop layer 11 is formed on the substrate 10 .

[0075] As a second optional method, in implementation, Figure 3 , Figure 4 , Figure 5 As shown, the epitaxial layer includes: A P-type electric field stop layer 11 is formed on the substrate 10; The P-type electric field bearing layer 12 is formed on the electric field termination layer 11 .

[0076] It is a better implementation method to set a P-type electric field termination layer 11 and a P-type electric field bearing layer 12 at the same time. In this way, the various parameters of the P-type electric field bearing layer 12 with a lower doping concentration are used to meet the requirements of the withstand voltage of the GaN HEMT device, and the various parameters of the P-type electric field termination layer 11 with a higher doping concentration are used to meet the requirements of the electric field cutoff of the GaN HEMT device. Therefore, the withstand voltage of the GaN HEMT device of the present application can meet the requirements, and the electric field can also be cut off in the electric field termination layer 11, and the thickness of the entire GaN HEMT device is kept small.

[0077] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device also includes: A P-type first connection region 21 is formed downward from the upper surface of the epitaxial layer and connected to the outer peripheral surface of the N-type SIC connection region 20, and the first connection region 21 occupies a part of the epitaxial layer in the lateral direction; The metal silicide layer 29 is also formed on the first connection region 21 , and the metal silicide layer 29 connects the first connection region 21 and the N-type SIC connection region 20 , respectively.

[0078] The epitaxial layer of the P-type SiC material, the P-type first connection region 21, and the metal silicide layer 29 are connected and have good electrical connection. Since the zero potential has been connected to the metal silicide layer 29, the epitaxial layer is connected to the zero potential.

[0079] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the P-type connection region includes a P-type first connection region 21, wherein the first connection region 21: In the vertical direction, the first connection area 21 is formed downward from the upper surface of the electric field bearing layer 12, and the lower surface of the first connection area 21 is higher than the lower surface of the electric field bearing layer 12; In the lateral direction, the first connection area 21 is connected to the outer peripheral surface of the N-type SIC connection area 20 and occupies a part of the electric field bearing layer 12; The doping concentration of the first connection region 21 is greater than the doping concentration of the electric field bearing layer 12; The metal silicide layer 29 is also formed on the first connection region 21 , and the metal silicide layer 29 connects the first connection region 21 and the N-type SIC connection region 20 , respectively.

[0080] The doping concentration of the P-type first connection region 21 is greater than the doping concentration of the P-type electric field bearing layer 12. In this way, the P-type electric field bearing layer 12, the P-type first connection region 21, and the metal silicide layer 29 that has been connected to zero potential are electrically connected, thereby achieving the connection of the P-type electric field bearing layer 12 to zero potential.

[0081] The metal silicide layer 29 is respectively connected to the first connection area 21 and the N-type SIC connection area 20. The zero potential of the grounded back grounding metal 32 is connected to the metal silicide layer 29 through the back grounding metal 32, the N-type substrate 10, the N-type SIC connection area 20, and the metal silicide layer 29. The P-type electric field bearing layer 12, the P-type first connection area 21, and the metal silicide layer 29 that has been connected to the zero potential are electrically connected, so that the P-type electric field bearing layer 12 is connected to the zero potential.

[0082] The first region of the epitaxial layer corresponds to the first region of the electric field bearing layer, and the second region of the epitaxial layer corresponds to the second region of the electric field bearing layer.

[0083] As an alternative, Figure 4 As shown, the first connection region 21 is located below the first region of the electric field bearing layer, and is partially located below the second region of the electric field bearing layer, that is, the first connection region 21 extends to below the GaN HEMT front structure in the lateral direction.

[0084] Since the doping concentration of the first connection region 21 is greater than the doping concentration of the electric field bearing layer 12 , the electric field generated by the GaN HEMT front structure is rapidly reduced at the position of the first connection region 21 , thereby balancing the electric field.

[0085] As another alternative, Figure 5 As shown, the P-type connection region further includes a P-type second connection region 33: In the vertical direction, the second connection region 33 is connected below the first connection region 21, and the bottom end of the N-type SIC connection region 20 enters into the electric field stop layer 11 or the bottom end of the N-type SIC connection region 20 is connected to the upper surface of the substrate 10; In the lateral direction, the second connection region 33 is formed on the outer peripheral surface of the N-type SIC connection region 20; The doping concentration of the second connection region 33 is greater than the doping concentration of the electric field stop layer 11 .

[0086] Since the doping concentration of the second connection area 33 is greater than that of the electric field termination layer 11, and the doping concentration of the first connection area 21 is greater than that of the electric field bearing layer 12, the connection between the P-type electric field termination layer 11, the second connection area 33, the first connection area 21, and the metal silicide layer 29 is better, and the connection between the N-type electric field bearing layer 12, the second connection area 33, the first connection area 21, and the metal silicide layer 29 is better.

[0087] The epitaxial layer of the P-type SiC material, the P-type second connection region 33 , and the metal silicide layer 29 are connected and have good electrical connection, so as to better connect the epitaxial layer to zero potential.

[0088] The reason why the first connection region 21 and the second connection region 33 are formed into two structures by two processes is that, due to the limitation of the implantation process, the depth of the first connection region 21 cannot be too deep, and the first connection region 21 cannot directly enter the electric field stop layer 11. Therefore, the second connection region 33 is formed by ion implantation on the side wall of the through hole.

[0089] The higher the doping concentration of the first connection region 21 and the second connection region 33, the better. In actual preparation, the doping concentration of the first connection region 21 and the second connection region 33 is limited by the ion implantation process.

[0090] In the implementation, the doping concentration of the first connection region 21 is in the range of greater than or equal to 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the first connection region 21 is at least 2 orders of magnitude higher than the doping concentration of the electric field bearing layer 12; The doping concentration of the second connection region 33 is in the range of 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the second connection region 33 is at least 2 orders of magnitude higher than the doping concentration of the electric field termination layer 11.

[0091] Specifically, Figure 3 , Figure 4 ,and Figure 5 As shown, the front structure of GaN HEMT includes: An AlN layer 22 is formed on the second region of the electric field bearing layer; A GaN buffer layer 23 formed on the AlN layer 22; A GaN layer 24 formed on the GaN buffer layer 23; An AlGaN layer 25 formed on the GaN layer 24; A SiN layer 27 formed on the AlGaN layer 25; A gate metal 26 is formed on the SiN layer 27 and connected to the AlGaN layer 25 through a contact hole passing through the SiN layer 27; The source electrode 28 - 1 and the drain electrode 28 - 2 respectively penetrate through the SiN layer 27 and the AlGaN layer 25 and enter the GaN layer 24 , and are respectively connected to two ends of the GaN layer 24 ; The source metal 31 is connected to the source 28 - 1 .

[0092] Among them, AlN, aluminum nitride; GaN, gallium nitride; AlGaN, aluminum gallium nitride; SiN, silicon nitride.

[0093] AlGaN / GaN forms a heterojunction, and the two-dimensional electron gas (2DEG) generated by the heterojunction is the basis for the operation of all GaN HEMT devices. The AlGaN layer 25 and the GaN layer 24 form a heterojunction, and the two-dimensional electron gas 2DEG generated by the heterojunction is controlled to be turned on and off by the gate metal 26.

[0094] The electric field termination layer 11 and the electric field bearing layer 12 are required to grow along the C-axis because the performance of the front structure of the GaN HEMT is better in this way.

[0095] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0096] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0097] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0098] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0099] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0100] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A method for preparing a GaN HEMT device, characterized in that: include: forming a substrate (10) of a SIC material of a second doping type; Forming a separate SIC epitaxial wafer (12-0) of the first doping type grown along the C-axis; An electric field stop layer (11) of a first doping type is formed on the front surface of the SIC epitaxial wafer (12-0); wherein the doping concentration of the electric field stop layer (11) is greater than the doping concentration of the substrate (10); A peeling layer (13) is formed at a position below the electric field termination layer (11) in the SIC epitaxial wafer (12-0); wherein a portion of the SIC epitaxial wafer (12-0) between the electric field termination layer (11) and the peeling layer (13) serves as an electric field pressure bearing layer (12); Bonding the front side of the electric field termination layer (11) and the front side of the substrate (10) together; Peeling is performed at the position of the peeling layer (13); wherein the electric field termination layer (11) and the electric field pressure bearing layer (12) are sequentially disposed on the substrate (10).

2. The method for preparing a GaN HEMT device according to claim 1, characterized in that: The step of forming an electric field stop layer (11) of a first doping type on the front surface of the SIC epitaxial wafer (12-0) is specifically: Forming an electric field stop layer (11) of a first doping type on the front side of the SIC epitaxial wafer (12-0) by ion implantation; Alternatively, an electric field stop layer (11) of the first doping type is formed by epitaxial growth on the front side of the SIC epitaxial wafer (12-0).

3. The method for preparing a GaN HEMT device according to claim 2, characterized in that: The step of forming a lift-off layer (13) at a position below the electric field stop layer (11) in the SIC epitaxial wafer (12-0) is specifically: A peeling layer (13) is formed by hydrogen ion implantation at a position below the electric field termination layer (11) in the SIC epitaxial wafer (12-0).

4. The method for preparing a GaN HEMT device according to claim 3, characterized in that: The step of bonding the front surface of the electric field termination layer (11) and the front surface of the substrate (10) together comprises: Connecting the front side of the electric field termination layer (11) and the front side of the substrate (10) together by low temperature bonding; The step of peeling the SIC epitaxial wafer (12-0) at the position of the peeling layer (13) is specifically: The peeling layer (13) is peeled off by thermal reaction, and the bonding is strengthened by high-temperature thermal annealing, and the surface of the electric field pressure bearing layer (12) just peeled off is smoothed by CMP.

5. The method for preparing a GaN HEMT device according to any one of claims 1 to 4, characterized in that: The substrate (10) is a single crystal or polycrystalline substrate, and the substrate is a high-resistance substrate or a low-resistance substrate; The steps of forming a substrate (10) of a SIC material of a second doping type are specifically as follows: A substrate (10) of a second doping type SIC material grown at an angle of 4 degrees off the C axis is formed.

6. The method for preparing a GaN HEMT device according to any one of claims 1 to 4, characterized in that: The substrate (10) is a low-resistance substrate; The upper surface of the electric field pressure bearing layer (12) is divided into a first area of ​​the electric field pressure bearing layer and a second area of ​​the electric field pressure bearing layer; the preparation method further comprises the following steps: Forming a grounded backside grounding metal (32) on the back side of the substrate (10); A first connection area base of a first doping type is formed downward from the second region of the electric field bearing layer, a first through hole is formed downward from the upper surface of the first connection area base by etching, and a SIC of a second doping type is filled in the first through hole to form a SIC connection area of ​​a second doping type (20); wherein the portion of the first connection area base that is not etched forms a first connection area (21).

7. The method for preparing a GaN HEMT device according to claim 6, characterized in that: The following steps are also included: Injection is performed on the inner wall of the first through hole to form a second connection area (33), wherein the second connection area (33): In the vertical direction, the second connection region (33) is connected below the first connection region (21), and the bottom end of the SIC connection region (20) enters into the electric field termination layer (11) or the bottom end of the SIC connection region (20) is connected to the upper surface of the substrate (10); In the lateral direction, the second connection area (33) is formed on the outer peripheral surface of the SIC connection area (20).

8. A GaN HEMT device, characterized in that: include: A substrate (10) of a SIC material of a second doping type; An electric field stop layer (11) of SIC of a first doping type grown along the C axis is formed on the substrate (10); An electric field bearing layer (12) of a SIC of a first doping type grown along the C axis is formed on the electric field termination layer (11).

9. The GaN HEMT device according to claim 8, characterized in that: The substrate (10) is a low-resistance substrate; The upper surface of the electric field pressure bearing layer (12) is divided into a first area of ​​the electric field pressure bearing layer and a second area of ​​the electric field pressure bearing layer; GaN HEMT devices also include: A grounded backside grounding metal (32) formed on the back side of the substrate (10); A first through hole is formed downward from the first region of the electric field bearing layer, and the bottom end of the first through hole enters into the substrate (10); An N-type SIC connection region (20) is formed by filling N-type polycrystalline SIC in the first through hole, and the lower end of the SIC connection region (20) enters into the substrate (10); A GaN HEMT front structure formed on the second region of the electric field bearing layer; The back-side grounding metal (32), the N-type substrate (10) and the N-type SIC connection region (20) are connected and connected to the GaN HEMT device.

10. The GaN HEMT device according to claim 9, characterized in that: Also includes: A metal silicide layer (29), wherein the metal silicide layer (29) is formed on an N-type SIC connection region (20); A first contact hole (30) is formed on the metal silicide layer (29); the upper end of the first contact hole (30) is connected to the source metal (31) of the GaN HEMT front structure; Wherein, the source metal (31) of the GaN HEMT front structure, the first contact hole (30), and the metal silicide layer (29) are connected.

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