Array of heat dissipation type power semiconductors

Abstract

An array of heat dissipation type power semiconductors includes power semiconductors and a heat sink. The power semiconductor has a power semiconductor chip, a plurality of first terminals and a second terminal. The power semiconductor chip has a plurality of semiconductor terminals. Each of the first terminals is electrically coupled to an associated one of the semiconductor terminals. The second terminal is a surface mount terminal and is electrically coupled to one of the first terminals. The heat sink has a heat sink body and a plurality of fins. The heat sink body has a base and an outer surface. The base portion is directly fixedly coupled to the surface mount terminal. The outer surface has a heat sink mounting portion to which the heat sink extends. At least a portion of the fin mounting portion is oriented non-parallel to the base.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 354,262, filed on June 22, 2022, the disclosure of which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a heat dissipation type power semiconductor and related inverters, motor assemblies and vehicle drive units. Background Art

[0004] This section provides background information related to the present disclosure which is not necessarily prior art.

[0005] Commonly assigned U.S. Patent No. 11303183 discloses a motor assembly having an inverter with a plurality of heat dissipating power semiconductors, the plurality of heat dissipating power semiconductors including a power semiconductor and a heat sink fixedly coupled to the power semiconductor. The power semiconductor can be any type of power semiconductor (such as a MOSFET or an IGBT) that can be controlled to selectively transmit power, having a power semiconductor chip, a plurality of pin terminals electrically coupled to the power semiconductor chip, and a board terminal electrically coupled to one of the pin terminals. The heat sink can be formed of a suitable material (such as copper) and coupled to the board terminal in a suitable manner (such as a solder connection that mechanically couples and electrically couples the heat sink to the board terminal). A suitable fluid circulates through the inverter and through the heat sink on the heat sink to cool the heat dissipating power semiconductor during operation of the motor assembly.

[0006] Commonly assigned International Patent Application No. PCT / US2002 / 026127 discloses a motor assembly having an inverter with a plurality of heat dissipating power semiconductors and a heat sink fixedly connected to the power semiconductors. The power semiconductor can be any type of power semiconductor (such as a MOSFET or an IGBT) that can be controlled to selectively transmit power, having a power semiconductor chip, a plurality of pin terminals electrically connected to the power semiconductor chip, and a board terminal electrically connected to one of the pin terminals. The heat sink can be formed of a suitable material (such as copper) and is connected to the board terminal during a sintering operation. A suitable fluid circulates through the inverter and passes through the heat sink on the heat sink to cool the heat dissipating power semiconductor during operation of the motor assembly. The sintered bond between the heat sink and the board terminal is relatively stronger than the solder bond disclosed in U.S. Patent No. 11303183.

[0007] Commonly assigned U.S. Patent Application Publication No. 2022 / 0037241 discloses a motor assembly having an inverter with a plurality of heat-dissipating power semiconductors, wherein the heat sink and the board terminal are integrally and integrally formed. This configuration eliminates the bonding between the heat sink and the board terminal.

[0008] While the above configuration is satisfactory for its intended purpose, there remains a need in the art for a heat dissipating power semiconductor that is capable of dissipating heat from the power semiconductor at a relatively high rate. Summary of the invention

[0009] This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.

[0010] In one form, the present disclosure provides an array of heat-dissipating power semiconductors, which includes power semiconductors and a heat sink. The power semiconductor has a power semiconductor chip, a plurality of first terminals and a second terminal. The power semiconductor chip has a plurality of semiconductor terminals. Each first terminal is electrically connected to an associated semiconductor terminal. The second terminal is a surface-mounted terminal and is electrically connected to one of the first terminals. The heat sink has a heat sink body and a plurality of groups of heat sinks. The heat sink body has a base and a plurality of boundary surfaces. The base is directly fixedly connected to the surface-mounted terminals. Each boundary surface terminates at an associated boundary surface plane. Each boundary surface plane intersects with at least one of the other boundary surface planes. Each group of heat sinks is fixedly connected to the body and extends directly from an associated boundary surface.

[0011] In another form, the present disclosure provides an array of heat-dissipating power semiconductors, which includes power semiconductors and a heat sink. The power semiconductor has a power semiconductor chip, a plurality of first terminals and a second terminal. The power semiconductor chip has a plurality of semiconductor terminals. Each first terminal is electrically connected to an associated semiconductor terminal. The second terminal is a surface-mounted terminal and is electrically connected to one of the first terminals. The heat sink has a heat sink body and a plurality of heat sinks. The heat sink body has a base and an outer surface. The base is directly fixedly connected to the surface-mounted terminal. The outer surface has a heat sink mounting portion, to which the heat sink extends. At least a portion of the heat sink mounting portion is oriented not parallel to the base.

[0012] In yet another form, the present disclosure provides an array of heat-dissipating power semiconductors, which includes a plurality of heat-dissipating power semiconductors. Each heat-dissipating power semiconductor has a power semiconductor and a heat sink. The power semiconductor has a power semiconductor chip, a plurality of first terminals and a second terminal. The power semiconductor chip has a plurality of semiconductor terminals. Each first terminal is electrically connected to an associated semiconductor terminal. The second terminal is a surface-mounted terminal and is electrically connected to one of the first terminals. The heat sink has a heat sink body and a plurality of heat sinks. The heat sink body has a base and an outer surface. The base is directly fixedly connected to the surface-mounted terminal. The outer surface has a heat sink mounting portion to which the heat sink extends. At least a portion of the heat sink mounting portion is oriented not parallel to the base. The heat-dissipating power semiconductors are arranged so that a portion of the heat sink on one of the heat-dissipating power semiconductors and a portion of the heat sink on an adjacent heat-dissipating power semiconductor are disposed in an associated flow channel, which is suitable for receiving a flow of a coolant.

[0013] Further areas of applicability will become apparent from the description provided herein.The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.

[0015] Figure 1 is a perspective view of a heat dissipating power semiconductor constructed according to the teachings of the present disclosure;

[0016] Figure 2 for Figure 1 Bottom view of heat-dissipating power semiconductor;

[0017] Figure 3 A perspective view of a portion of a heat dissipating power semiconductor;

[0018] Figure 4 for Figure 1 A side view of a heat dissipating power semiconductor;

[0019] Figure 5 A top view of a portion of an inverter for an electric motor assembly, the inverter comprising Figure 1 A linear array of heat-dissipating power semiconductors;

[0020] Figure 6 and Figure 7 A top view of a portion of an inverter for an electric motor assembly, each inverter comprising Figure 1 at least one radial array of heat-dissipating power semiconductors; and

[0021] Figures 8 to 10 A perspective view of a heat sink in an alternating configuration.

[0022] Corresponding reference numerals indicate corresponding parts throughout the several views of the drawings. DETAILED DESCRIPTION

[0023] Refer to the attached figure Figures 1 to 4 A heat sink type power semiconductor constructed in accordance with the teachings of the present disclosure is generally indicated by reference numeral 10. The heat sink type power semiconductor 10 may include a power semiconductor 12 and a heat sink 14.

[0024] The power semiconductor 12 can be any type of power semiconductor, such as a transistor. For example, the power semiconductor 12 can be an insulated gate bipolar transistor (IGBT), but in the specific example provided, it is a metal oxide semiconductor field effect transistor (MOSFET). The power semiconductor 12 may include a semiconductor chip 20, a plurality of pin terminals 22, a board terminal 24, and a package 26. The semiconductor chip 20 may have a plurality of semiconductor terminals (not specifically shown), each of which is electrically connected to an associated pin terminal 22. In the example provided, the semiconductor chip 20 has four semiconductor terminals, which include a gate (not specifically shown), a source sense (not specifically shown), a source (not specifically shown), and a drain (not specifically shown). Each pin terminal 22 is formed of a conductive metal material (such as copper) and can be electrically connected to an associated semiconductor terminal. For example, each pin terminal 22 can be bonded to an associated semiconductor terminal with a soldering material, thereby electrically and physically connecting the pin terminal 22 to an associated semiconductor terminal. Alternatively, one or more bonding wires 30 can be used to electrically connect one of the pin terminals 22 to an associated semiconductor terminal. The board terminal 24 can be electrically coupled to one of the pin terminals 22 and can be mounted directly to one of the semiconductor terminals. In the example provided, the pin terminal 22a is electrically coupled to the gate, the pin terminal 22b is electrically coupled to the source sensing portion, the pin terminal 22c is electrically coupled to the source, and the pin terminal 22d is electrically coupled to both the drain and the board terminal 24. The board terminal 24 is formed of a suitable conductive metal material such as copper. The package body 26 is formed of a packaging material disposed on the semiconductor chip 20. The semiconductor chip 20 and the bonding wires 30 are completely encapsulated in the packaging material, and the pin terminals 22 are partially encapsulated in the packaging material. Optionally, the board terminal 24 can be partially encapsulated in the packaging material.

[0025] The heat sink 14 may have a body or heat sink base 40 and a plurality of fins 42 fixedly coupled to and protruding outwardly from the heat sink base 40. The heat sink base 40 may be formed of a suitable material, such as copper, and may be formed into a shape that allows at least two different groups of fins 42 to protrude from the heat sink base 40 in different directions. In the example provided, the heat sink base 40 is generally wedge-shaped, having a bottom or base surface 50, a pair of first faces 52, and a pair of second faces 54. The first faces 52 are opposite to each other and intersect each other along a linear top 60. The first faces 52 are boundary surfaces of the heat sink base 40 and terminate at respective boundary surface planes P1, P2. The boundary surface plane P1 of one of the first faces 52 may intersect with the boundary surface plane P2 of the adjacent second of the first faces 52. Alternatively, adjacent first faces of the first faces 52 may intersect each other.

[0026] The respective groups 62 of fins 42 extend vertically from each of the first faces 52. The fins 42 in each group 62 of fins 42 may be fixedly coupled to the heat sink base 40 and may extend directly from an associated one of the first faces 52. At least one group 62 of fins 42 may be integrally formed with the heat sink base 40. The groups 62 of fins 42 on an adjacent pair of first faces 52 may be symmetrically arranged about a symmetry plane P3 intersecting the boundary surface planes P1, P2 of the adjacent pair of first faces 52. In this particular example, the second faces 54 are opposite to each other and are flat and parallel to each other. It will be understood that the heat sink base 40 is shaped differently, and / or the fins 42 may be formed on additional faces or other faces or sides of the heat sink base 40 shown in the drawings, or protrude therefrom. For example, the heat sink base 40 may be shaped as a pyramid or a truncated pyramid, and a group of fins 42 may be formed on two or more faces of the pyramid or the truncated pyramid.

[0027] The fins 42 of each group 62 of fins 42 can be shaped and spaced apart in any desired manner. In the particular example provided, each fin 42 has a tapered rod-like configuration having an elliptical cross-sectional shape that is relatively larger where the proximal end of the fin 42 abuts the heat sink base 40 and relatively narrower at the opposite or distal end. In addition, the distal ends of the fins 42 are angled so as to be located in a plane that is not perpendicular to the longitudinal axis of the fins 42. As such, in the example provided, the height of the fins 42 is non-uniform. If desired, the heat sink 14 can be integrally and integrally formed in a desired manner, such as by investment casting, cold forging, or metal injection molding (MIM). Alternatively, the heat sink base 40 and the fins 42 can be formed as discrete components and can be assembled together so that the fins 42 are fixedly coupled to the heat sink base 40.

[0028] The heat sink base 40 and the board terminal 24 may be integrally and unitarily formed with each other. Alternatively, the heat sink base 40 and the board terminal 24 may be fixedly coupled and electrically coupled to each other, for example, by welding or sintering.

[0029] Figures 5 to 7 The above-mentioned heat dissipating power semiconductor 10 is depicted in an inverter of a motor assembly employed in an electric drive unit of a vehicle. The inverter, motor assembly, and electric drive unit may be configured as described in U.S. Patent No. 11303183 or International Patent Application No. PCT / US2002 / 019900 filed on March 11, 2022, the disclosures of which are incorporated herein by reference and as if fully set forth herein.

[0030] refer to Figure 5 , the heat dissipation type power semiconductors 10 can be arranged in one or more linear arrays 70, wherein adjacent heat dissipation type power semiconductors 10 are nested together so that the groups 62 of heat sinks 42 on adjacent sides of the heat dissipation type power semiconductors cooperate to form flow channels 74. The linear arrays 70 can be exposed to a flow of coolant F that is substantially perpendicular to the linear arrays 70. The coolant in contact with the linear arrays 70 can be forced to pass through the flow channels 74 (i.e., between the groups 62 of heat sinks 42 on the first faces 52 of adjacent heat sinks 14). In the example shown, adjacent heat dissipation type power semiconductors 10 are depicted as being offset from each other so that the flow channels 74 include spaces between adjacent heat dissipation type power semiconductors 10. However, it will be understood that the groups 62 of heat sinks 42 of adjacent heat dissipation type power semiconductors 62 can be nested together. Accordingly, it will be understood that each flow channel 74 consists of the volume of the space between the first faces 52 of adjacent heat sinks 14 minus the volume of the heat sinks 42 extending from the first faces 52 of adjacent heat sinks 14.

[0031] Alternatively, the heat dissipating power semiconductor 10 may be Figure 6 and Figure 7 The arrangement shown in is one or more radial arrays. Figure 6 In the example of FIG. 8 , coolant flows through the flow passages 74 from the interior of the radial array 80 in a radially outward direction. Figure 7 In the example shown, two concentric radial arrays 80a and 80b are used, and the flow channels 74 formed between the heat dissipating power semiconductors 10 of the two radial arrays 80a and 80b allow the coolant to flow through the radial arrays 80a and 80b in a radial direction (radially inwardly directed in the example shown).

[0032] It will be understood that the array of heat sink type power semiconductors 10 may be formed to have geometries other than those described herein and shown in the drawings. In addition, the flow of coolant may be directed through the array of heat sink type power semiconductors 10 in a direction different from that described herein and shown in the drawings. For example, the flow of coolant may be directed orthogonally to the array. Figures 5 to 7 In the examples, the flow of coolant can be directed into or out of the drawing plane, rather than in the specific direction illustrated.

[0033] refer to Figure 8 , a first alternatingly constructed heat sink 14a is shown. In this example, the heat sink base 40a and each of the two different groups of fins 42a are formed as discrete components that are fixedly coupled to each other (e.g., by sintering, brazing, soldering, and / or welding). Each of the groups of fins 42a can include a plurality of fin subgroups 42a-1 formed from strips of a material such as copper, and bent to form a plurality of alternating protrusions 42a-2 of a desired shape. In the example provided, the alternating protrusions 42a-2 of each fin subgroup 42a-1 are formed to have a square wave shape, and the alternating protrusions 42a-2 of each adjacent pair of fin subgroups 42a-1 are offset from each other.

[0034] exist Fig. 9 In the example of FIG. 5 , a channel 50 b - 1 is formed in the heat sink base 40 b of the heat sink 14 b. The channel 50 b - 1 defines a base surface 50 b and is sized to accommodate a power semiconductor 12 ( Figure 1 ). Accordingly, it will be understood that when the heat sink 14b is mounted to the power semiconductor 12 ( Figure 1 ), the heat sink base 40b is suspended from the power semiconductor 12 ( Figure 1 ) on the lateral side.

[0035] Fig.10 The example of FIG. 4 illustrates a fin group 42c of a heat sink 14c formed of columnar fins having diamond and triangular cross-sectional shapes. It will be appreciated that the fins of the fin group may be configured in a variety of different ways, including columnar fins having circular or square shapes.

[0036] For the purpose of illustration and description, the foregoing description of the embodiment has been provided. It is not intended to be exhaustive or limit the present disclosure. The individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but are interchangeable where applicable and can be used in selected embodiments, even if not specifically shown or described. It can also be changed in many ways. These changes should not be considered as departing from the present disclosure, and all these modifications are intended to be included within the scope of the present disclosure.

Claims

1. An array of heat dissipation power semiconductors, comprising: A power semiconductor having a power semiconductor chip, a plurality of first terminals and a second terminal, wherein the power semiconductor chip has a plurality of semiconductor terminals, each of the first terminals is electrically connected to an associated one of the semiconductor terminals, and the second terminal is a surface mount terminal and is electrically connected to one of the first terminals; as well as A heat sink has a heat sink body and a plurality of groups of heat sink fins, wherein the heat sink body has a base and a plurality of boundary surfaces, the base being directly fixedly connected to the surface mount terminals, each of the boundary surfaces terminating at an associated boundary surface plane, each of the boundary surface planes intersecting at least one of the other boundary surface planes, and each group of heat sink fins being fixedly connected to the body and extending directly from an associated one of the boundary surfaces. 2 . The array of heat-dissipating power semiconductors according to claim 1 , wherein a first one of the boundary surfaces intersects at least one of the other boundary surfaces. 3 . The array of heat-dissipating power semiconductors according to claim 1 , wherein the heat sink body has two boundary surfaces. 4 . The array of heat-dissipating power semiconductors according to claim 1 , wherein at least one set of heat-dissipating fins is integrally and unitarily formed with the heat sink body. 5 . The array of heat-dissipating power semiconductors according to claim 1 , wherein the groups of heat-dissipating fins on a pair of adjacent boundary surfaces are symmetrically arranged with respect to a symmetry plane intersecting the boundary surface planes of the pair of adjacent boundary surfaces.

6. An array of heat dissipation power semiconductors, comprising: A power semiconductor having a power semiconductor chip, a plurality of first terminals and a second terminal, wherein the power semiconductor chip has a plurality of semiconductor terminals, each of the first terminals is electrically coupled to an associated one of the semiconductor terminals, and the second terminal is a surface mount terminal and is electrically coupled to one of the first terminals; as well as A heat sink has a heat sink body and a plurality of heat sinks, wherein the heat sink body has a base and an outer surface, wherein the base is directly and fixedly connected to the surface mounting terminal, and the outer surface has a heat sink mounting portion, the heat sink extends to the heat sink mounting portion, and at least a portion of the heat sink mounting portion is not parallel to the base. 7 . The array of heat-dissipating power semiconductors according to claim 6 , wherein the heat sink mounting portion comprises a first planar section and a second planar section that are not parallel to each other. 8 . The array of heat-dissipating power semiconductors according to claim 7 , wherein the first planar segment and the second planar segment intersect each other. 9 . The array of heat-dissipating power semiconductors according to claim 6 , wherein at least a portion of the heat sink is integrally and unitarily formed with the heat sink body.

10. An array of heat dissipation power semiconductors, comprising: A plurality of heat dissipation type power semiconductors, each of the heat dissipation type power semiconductors has a power semiconductor and a heat sink, the power semiconductor has a power semiconductor chip, a plurality of first terminals and a second terminal, the power semiconductor chip has a plurality of semiconductor terminals, each of the first terminals is electrically connected to an associated one of the semiconductor terminals, the second terminal is a surface mounting terminal and is electrically connected to one of the first terminals, the heat sink has a heat sink body and a plurality of heat sinks, the heat sink body has a base and an outer surface, the base is directly fixedly connected to the surface mounting terminal, the outer surface has a heat sink mounting portion, the heat sink extends to the heat sink mounting portion, and at least a portion of the heat sink mounting portion is not parallel to the base; The heat dissipating power semiconductors are arranged such that a portion of the heat sink on one of the heat dissipating power semiconductors and a portion of the heat sink on an adjacent one of the heat dissipating power semiconductors are disposed in an associated flow channel adapted to receive a flow of a coolant. 11 . The array of heat-dissipating power semiconductors according to claim 10 , wherein the heat sink mounting portion of each heat sink comprises a first planar section and a second planar section that are not parallel to each other. 12 . The array of heat-dissipating power semiconductors according to claim 11 , wherein the first planar segment and the second planar segment intersect each other. 13 . The array of heat-dissipating power semiconductors according to claim 10 , wherein the heat sink body and at least a portion of the heat sink of each heat sink are integrally and unitarily formed.

14. An array of heat dissipation type power semiconductors according to claim 10, wherein a first portion of the heat dissipation type power semiconductors are arranged in a first row, and wherein a second portion of the heat dissipation type power semiconductors are arranged in a second row parallel to the first row, and wherein the heat dissipation power semiconductors of the first portion and the heat dissipation power semiconductors of the second portion are nested with each other.

15. An array of heat dissipating power semiconductors according to claim 10, wherein at least a first portion of the heat dissipating power semiconductors are arranged around a central longitudinal axis, so that the heat dissipating power semiconductors of at least the first portion of the heat dissipating power semiconductors are circumferentially spaced around the central longitudinal axis, and wherein a flow channel is formed along the central longitudinal axis.

16. An array of heat-dissipating power semiconductors according to claim 15, wherein the second portion of the heat-dissipating power semiconductors is arranged around the central longitudinal axis so that the heat-dissipating power semiconductors of the second portion of the heat-dissipating power semiconductors are circumferentially spaced apart around the central longitudinal axis, and wherein the power semiconductors of the second portion of the heat-dissipating power semiconductors are arranged radially outside of the power semiconductors of at least the first portion of the heat-dissipating power semiconductors.

17. An array of heat-dissipating power semiconductors according to claim 16, wherein the heat sink of at least the first portion of the heat-dissipating power semiconductors and the heat sink of the second portion of the heat-dissipating power semiconductors are nested together, so that a portion of the heat sink of one heat-dissipating power semiconductor faces a portion of the heat sink of an adjacent heat-dissipating power semiconductor.

18. An array of heat-dissipating power semiconductors according to claim 16, wherein the heat sinks of at least the first portion of the heat-dissipating power semiconductors are nested together so that a portion of the heat sink of one heat-dissipating power semiconductor faces a portion of the heat sink of an adjacent heat-dissipating power semiconductor.

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