Power device test circuit, control method and power device test method
By designing power device testing circuits, using power supply, switch, half-bridge circuit and inductor circuit, various types of tests of transistors to be tested are realized, solving the problem of frequent replacement of test equipment in the prior art and improving testing efficiency and accuracy.
Patent Information
- Application Number
- CN202411411566.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-10
- Publication Date
- 2025-02-11
AI Technical Summary
The existing power device certification experiments mainly focus on environmental tests and experimental conditions of single electrical stress, which leads to the test only under a single stress, and the test equipment needs to be replaced frequently, which increases the difficulty of testing, cumbersome steps and low efficiency.
A power device testing circuit is designed, including power supply, switch, half-bridge circuit and inductor circuit. By controlling the operation of the switch circuit and inductor circuit, various types of tests of the transistor to be tested are realized, including reliability tests at different currents.
It realizes reliability testing of power devices under different current conditions, reduces testing difficulty, simplifies the test process, and improves testing efficiency.
Smart Images
Figure CN119414193A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of power semiconductor devices, and in particular to a power device test circuit, a control method, and a power device test method. Background Art
[0002] The stability and reliability of power devices are important criteria for judging product quality, so it is very necessary to conduct certification tests on power devices before they are finalized and mass-produced. The current power device certification tests mainly include high-temperature gate bias test, high-temperature reverse bias test, high-humidity reverse bias test, dynamic gate bias test and dynamic reverse bias test.
[0003] However, current power device certification experiments are concentrated on environmental tests and single electrical stress experimental conditions. The relevant tests can only test the reliability of power devices under a single stress, and a test usually only corresponds to one stress. Therefore, when conducting other types of electrical stress tests, the test equipment needs to be replaced, which increases the difficulty of the test, makes the test steps cumbersome, and reduces the test efficiency. Summary of the invention
[0004] A power device test circuit, a control method, and a power device test method provided in the embodiments of the present application can implement various types of tests, reduce the difficulty of testing power devices, simplify the test process, and improve the test efficiency of power devices.
[0005] According to a first aspect of an embodiment of the present application, a power device test circuit is provided, comprising:
[0006] power supply;
[0007] a switch, the switch being connected in series with the power supply;
[0008] A first half-bridge circuit, comprising a first switch circuit and a second switch circuit connected in series, wherein the first half-bridge circuit is connected in parallel with the power supply and the switch;
[0009] a second half-bridge circuit, comprising at least one sub-bridge circuit, wherein the sub-bridge circuit comprises a third switch circuit and a fourth switch circuit connected in series, wherein the second half-bridge circuit is connected in parallel with the first half-bridge circuit, wherein the first switch circuit to the fourth switch circuit all comprise transistors, the transistor in the fourth switch circuit is a transistor to be tested, and the second switch circuit and the third switch circuit further comprise a diode, wherein the diode is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor;
[0010] An inductor circuit includes at least one inductor, one end of the inductor is connected between the first switch circuit and the second switch circuit, and the other end of the inductor is connected between the third switch circuit and the fourth switch circuit, and the inductor circuit is used to store electrical energy in a first test cycle to change the current input from the inductor circuit to the fourth switch circuit in a second test cycle, wherein the first test cycle and the second test cycle are two adjacent test cycles, and the first test cycle occurs earlier than the second test cycle.
[0011] In some embodiments, the second half-bridge circuit includes a first sub-bridge circuit and a second sub-bridge circuit, the first sub-bridge circuit includes the third switch circuit and the fourth switch circuit connected in series, the second sub-bridge circuit includes a fifth switch circuit and a sixth switch circuit connected in series, wherein the fifth switch circuit and the sixth switch circuit both include transistors, the transistor in the sixth switch circuit is a transistor to be tested, and the fifth switch circuit further includes a diode, the diode is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor;
[0012] The inductor circuit includes a first inductor, a second inductor and a third inductor, one end of the first inductor is connected between the first switch circuit and the second switch circuit, one end of the second inductor is electrically connected to the other end of the first inductor, the other end of the second inductor is connected between the third switch circuit and the fourth switch circuit, one end of the third inductor is electrically connected to the other end of the first inductor, and the other end of the third inductor is connected between the fifth switch circuit and the sixth switch circuit.
[0013] In some embodiments, the first switch circuit, the fourth switch circuit, and the sixth switch circuit further include a diode, the diode is connected in parallel with the transistor, and a conduction direction of the diode is opposite to a conduction direction of the transistor.
[0014] In some implementations, the power device test circuit further includes:
[0015] A capacitor is connected in parallel with the power supply and the switch.
[0016] A second aspect of an embodiment of the present application provides a control method for a power device test circuit, for controlling the power device test circuit as described in any one of the first aspects above, the control method comprising:
[0017] In the first time interval, the switch is closed, the transistors in the second switch circuit and the third switch circuit are turned off, and the transistors in the first switch circuit and the fourth switch circuit are turned on;
[0018] In a second time interval, turning off the transistor in the fourth switch circuit;
[0019] In a third time interval, turning off the transistor in the first switch circuit;
[0020] Cycle the operations from the first time interval to the third time interval in sequence;
[0021] Among them, within the first test cycle, the duration of the first time interval, the second time interval and the third time interval are adjusted to change the current of the fourth switch circuit within the first time interval of the second test cycle, the first test cycle and the second test cycle are two adjacent test cycles, and the occurrence time of the first test cycle is earlier than the occurrence time of the second test cycle.
[0022] In some implementations, the control method of the power device test circuit further includes:
[0023] Closing the switch to turn off the transistors in the first switch circuit and the second switch circuit;
[0024] The transistors in the third switch circuit and the fourth switch circuit are alternately turned on.
[0025] In some implementations, the control method of the power device test circuit further includes:
[0026] Short-circuit the inductor in the inductive circuit;
[0027] Closing the switch to turn off the transistors in the third switch circuit and the fourth switch circuit;
[0028] The transistors in the first switch circuit and the second switch circuit are turned on alternately.
[0029] In some implementations, the control method of the power device test circuit further includes:
[0030] Turning off the switch, and turning on the transistors in the first switch circuit, the second switch circuit, and the third switch circuit;
[0031] The transistor in the fourth switch circuit is turned on and off alternately.
[0032] In some implementations, when the power device test circuit includes a second sub-bridge circuit, the control method includes:
[0033] testing the transistors to be tested in the fourth switch circuit and the sixth switch circuit separately;
[0034] When testing the transistor to be tested of the fourth switch circuit, turning off the transistors in the fifth switch circuit and the sixth switch circuit;
[0035] When testing the transistor to be tested in the sixth switch circuit, the transistors in the third switch circuit and the fourth switch circuit are turned off.
[0036] According to a third aspect of an embodiment of the present application, a method for testing a power device is provided, which is used to test a power device according to the power device test circuit described in any one of the first aspects above, and the testing method includes:
[0037] Applying electrical stress to the transistor to be tested in the power device test circuit through the power device test circuit;
[0038] The electrical characteristic parameters of the transistor to be tested are tested.
[0039] A power device test circuit, control method and power device test method provided by the embodiment of the present application form an H-shaped bridge arm circuit, and can charge the inductor circuit when the transistors in the first switch circuit and the fourth switch circuit are turned on. When only the transistor in the first switch circuit is turned on, the diode in the third switch circuit is used as a freewheeling diode, so that the inductor circuit forms a loop through the diode in the third switch circuit and the transistor in the first switch circuit, and further the inductor in the inductor circuit can be discharged slowly. When all the transistors in the first switch circuit to the fourth switch circuit are turned off, the diode, the inductor circuit and the power supply in the second switch circuit and the third switch circuit can form a loop, so that the inductor circuit can be discharged quickly. Therefore, the conduction time of the transistors in the first switch circuit and the fourth switch circuit in the first test cycle can be adjusted to change the electric energy stored in the inductor circuit at the end of the first test cycle, and then the input current of the transistor in the fourth switch circuit can be changed in the second test cycle through the electric energy pre-stored in the inductor circuit, so that the reliability test of the transistor under different currents can be realized. Various types of tests on power devices can be implemented through the power device test circuit, which can further reduce the difficulty of testing power devices, simplify the test process, and improve the test efficiency of power devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0041] FIG1 is a schematic structural diagram of a power device test circuit provided in an embodiment of the present application;
[0042] FIG2 is a schematic structural diagram of another power device test circuit provided in an embodiment of the present application;
[0043] FIG3 is a schematic flow chart of a control method for a power device test circuit provided in an embodiment of the present application;
[0044] FIG4 is a schematic timing diagram of a control method for a power device test circuit provided in an embodiment of the present application;
[0045] FIG5 is a schematic flow chart of a method for testing a power device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0046] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0048] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.
[0049] It should be noted that the current power device certification experiments are all concentrated on environmental tests and single electrical stress experimental conditions. The relevant tests can only test the reliability of power devices under a single stress, and a test usually only corresponds to one stress. Therefore, when performing other types of electrical stress tests, the test equipment needs to be replaced, which increases the difficulty of the test, the test steps are cumbersome, and the test efficiency is low. Therefore, it is very important to invent a power device test circuit that can be used for multiple types of power device tests.
[0050] As shown in FIG1 , in a first aspect of an embodiment of the present application, a power device test circuit is provided, including: a power supply E, a switch S, a first half-bridge circuit, a second half-bridge circuit and an inductor circuit L, wherein the switch S is connected in series with the power supply E; the first half-bridge circuit includes a first switch circuit T1 and a second switch circuit T2 connected in series, and the first half-bridge circuit is connected in parallel with the power supply E and the switch S; the second half-bridge circuit includes at least one sub-bridge circuit, the sub-bridge circuit includes a third switch circuit T3 and a fourth switch circuit T4 connected in series, and the second half-bridge circuit is connected in parallel with the first half-bridge circuit, wherein the first switch circuit T1 to the fourth switch circuit T4 all include transistors, and the transistor in the fourth switch circuit T4 is a transistor to be tested. The second switch circuit T2 and the third switch circuit T3 also include a diode, which is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor; the inductance circuit L includes at least one inductance, one end of the inductance is connected between the first switch circuit T1 and the second switch circuit T2, and the other end of the inductance is connected between the third switch circuit T3 and the fourth switch circuit T4, and the inductance circuit L is used to store electric energy in a first test cycle to change the current input from the inductance circuit L to the fourth switch circuit T4 in a second test cycle, wherein the first test cycle and the second test cycle are two adjacent test cycles, and the occurrence time of the first test cycle is earlier than the occurrence time of the second test cycle.
[0051] It should be noted that the test circuit of the power device provided in the embodiment of the present application can change the operating current and operating time of the transistor in the fourth switch circuit T4, thereby realizing the working condition simulation of the transistor in the fourth switch circuit T4, and further can test the electrical characteristic parameters of the transistor in the fourth switch circuit T4 after operation, such as current, voltage, etc., thereby realizing the reliability test of the power device.
[0052] The power device test circuit provided in the embodiment of the present application forms an H-shaped bridge arm circuit, and can charge the inductance circuit L when the transistors in the first switch circuit T1 and the fourth switch circuit T4 are turned on. When only the transistor in the first switch circuit T1 is turned on, the diode in the third switch circuit T3 is used as a freewheeling diode, so that the inductance circuit L forms a loop through the diode in the third switch circuit T3 and the transistor in the first switch circuit T1, and further, the inductance in the inductance circuit L can be discharged slowly. When all the transistors in the first switch circuit T1 to the fourth switch circuit T4 are turned off, a loop can be formed through the diodes in the second switch circuit T2 and the third switch circuit T3, the inductance circuit L and the power supply E, so that the inductance circuit L is discharged quickly. Therefore, the electric energy stored in the inductance circuit L at the end of the first test cycle can be changed by adjusting the conduction time of the transistors in the first switch circuit T1 and the fourth switch circuit T4 in the first test cycle, and then the input current of the transistor in the fourth switch circuit T4 can be changed in the second test cycle through the electric energy pre-stored in the inductance circuit L, so that the reliability test of the transistor under different currents can be realized. Various types of tests on power devices can be implemented through the power device test circuit, which can further reduce the difficulty of testing power devices, simplify the test process, and improve the test efficiency of power devices.
[0053] As shown in FIG2 , in some feasible implementations, the second half-bridge circuit includes a first sub-bridge circuit and a second sub-bridge circuit, the first sub-bridge circuit includes a third switch circuit T3 and a fourth switch circuit T4 connected in series, and the second sub-bridge circuit includes a fifth switch circuit T5 and a sixth switch circuit T6 connected in series, wherein the fifth switch circuit T5 and the sixth switch circuit T6 both include transistors, the transistor in the sixth switch circuit T6 is a transistor to be tested, and the fifth switch circuit T5 also includes a diode, the diode is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor; the inductance circuit L includes a first inductance L1, a second inductance L2, and a third inductance L3, one end of the first inductance L1 is connected between the first switch circuit T1 and the second switch circuit T2, one end of the second inductance L2 is electrically connected to the other end of the first inductance L1, the other end of the second inductance L2 is connected between the third switch circuit T3 and the fourth switch circuit T4, one end of the third inductance L3 is electrically connected to the other end of the first inductance L1, and the other end of the third inductance L3 is connected between the fifth switch circuit T5 and the sixth switch circuit T6.
[0054] It should be noted that the above-mentioned power device test circuit can be adapted to power devices in a three-phase power module.
[0055] The power device test circuit provided in the embodiment of the present application enables the first inductor L1 and the second inductor L2 to serve together as the inductor circuit of the first sub-bridge circuit, and the first inductor L1 and the third inductor L3 to serve together as the inductor circuit of the second sub-bridge circuit, which can increase the test positions of the power device test circuit, further improve the test performance of the power device test circuit, reduce the test difficulty of the power device, simplify the test process, and improve the test efficiency of the power device.
[0056] In some feasible implementations, the first switch circuit T1 , the fourth switch circuit T4 , and the sixth switch circuit T6 further include a diode, which is connected in parallel with the transistor, and a conduction direction of the diode is opposite to a conduction direction of the transistor.
[0057] The power device test circuit provided in the embodiment of the present application can improve the safety and stability of the power device test circuit by setting the first switch circuit T1, the fourth switch circuit T4 and the sixth switch circuit T6 to include diodes, and the diodes are connected in parallel with the transistors. The conduction direction of the diodes is opposite to the conduction direction of the transistors. This can avoid reverse breakdown of the transistors in the switch circuits during the inductive discharge process, thereby further improving the test performance of the power device test circuit and improving the reliability and accuracy of the test data.
[0058] As shown in FIG. 1 and FIG. 2 , in some feasible implementations, the power device test circuit further includes: a capacitor C, wherein the capacitor C is connected to the power source E and the switch S in parallel.
[0059] The power device test circuit provided in the embodiment of the present application, by setting a capacitor C in parallel with a power supply E and a switch S, can provide a voltage fluctuation of a power supply E through the capacitor C, and at the same time can provide a transient current to improve the stability of the power device test circuit, thereby further improving the test performance of the power device test circuit and improving the reliability and accuracy of the test data.
[0060] As shown in FIG3 , a second aspect of an embodiment of the present application provides a control method for a power device test circuit, which is used to control the power device test circuit according to any one of the first aspects above, and the control method includes:
[0061] Step S110: within a first time interval, close the switch S, turn off the transistors in the second switch circuit T2 and the third switch circuit T3, and turn on the transistors in the first switch circuit T1 and the fourth switch circuit T4.
[0062] Step S120: turning off the transistor in the fourth switch circuit T4 within the second time interval.
[0063] Step S130: During a third time interval, turn off the transistor in the first switch circuit T1.
[0064] Step S140, looping the operations from the first time interval to the third time interval in sequence;
[0065] Among them, within the first test cycle, the durations of the first time interval, the second time interval and the third time interval are adjusted to change the current of the fourth switch circuit T4 within the first time interval of the second test cycle, the first test cycle and the second test cycle are two adjacent test cycles, and the occurrence time of the first test cycle is earlier than the occurrence time of the second test cycle.
[0066] As shown in Figure 4, a control timing diagram of the first switch circuit and the fourth switch circuit in a control method of a power device test circuit according to an embodiment of the present application is provided, wherein the first time interval is t1, the second time interval is t2, and the third time interval is t3.
[0067] The control method of the power device test circuit provided in the embodiment of the present application forms an H-shaped bridge arm circuit, and can charge the inductance circuit L when the transistors in the first switch circuit T1 and the fourth switch circuit T4 are turned on in the first time interval t1. In the second time interval t2, when only the transistor in the first switch circuit T1 is turned on, the diode in the third switch circuit T3 is used as a freewheeling diode, so that the inductance circuit L forms a loop through the diode in the third switch circuit T3 and the transistor in the first switch circuit T1, and further, the inductance in the inductance circuit L can be discharged slowly. In the third time interval t3, when all the transistors in the first switch circuit T1 to the fourth switch circuit T4 are turned off, a loop can be formed through the diodes in the second switch circuit T2 and the third switch circuit T3, the inductance circuit L and the power supply E, so that the inductance circuit L is discharged quickly. Therefore, the electric energy stored in the inductor circuit L at the end of the first test cycle can be changed by adjusting the time proportion of the first time interval t1, the second time interval t2 and the third time interval t3 in the first test cycle, and then the input current of the transistor in the fourth switch circuit T4 can be changed in the second test cycle by the electric energy pre-stored in the inductor circuit L, so that the reliability test of the transistor under different currents can be realized. Various types of tests of power devices can be realized by the power device test circuit, which can further reduce the test difficulty of power devices, simplify the test process, and improve the test efficiency of power devices.
[0068] In some feasible implementations, the control method of the power device test circuit further includes: closing the switch S to turn off the transistors in the first switch circuit T1 and the second switch circuit T2; and alternately turning on the transistors in the third switch circuit T3 and the fourth switch circuit T4.
[0069] In the control method of the power device test circuit provided by the embodiment of the present application, since the transistors in the first switch circuit T1 and the second switch circuit T2 are in the off state, there is no current flowing in the inductor circuit L. Therefore, when the transistor in the third switch circuit T3 is in the on state, the power supply voltage will be applied to the transistor in the fourth switch circuit T4. Conversely, when the transistor in the fourth switch circuit T4 is in the on state, the power supply voltage will be applied to the transistor in the third switch circuit T3. Therefore, the voltage at both ends of the source and drain of the transistor in the fourth switch circuit T4 can be dynamically adjusted, so that the electrical parameters of the gate, source and drain of the transistor in the fourth switch circuit T4 can be further determined in combination with the on state of the transistor in the fourth switch circuit T4, and the response of the transistor in the fourth switch circuit T4 can be tested.
[0070] In some feasible implementations, the control method of the power device test circuit also includes: short-circuiting the inductor L in the inductor circuit; closing the switch S to turn off the transistors in the third switch circuit T3 and the fourth switch circuit T4; and alternately turning on the transistors in the first switch circuit T1 and the second switch circuit T2.
[0071] Exemplarily, the inductor L may be short-circuited by connecting it in parallel with a conducting wire or the like.
[0072] In the control method of the power device test circuit provided by the embodiment of the present application, since the transistors in the third switch circuit T3 and the fourth switch circuit T4 are in the off state and the inductor L is short-circuited, the transistors in the first switch circuit T1 and the third switch circuit T3 are connected in parallel, and the transistors in the second switch circuit T2 and the fourth switch circuit T4 are connected in parallel. By alternately turning on the transistors in the first switch circuit T1 and the second switch circuit T2, the voltages at both ends of the source and drain thereof can be changed synchronously and alternately, and further, the voltages at both ends of the source and drain of the transistors in the third switch circuit T3 and the fourth switch circuit T4 connected in parallel can be changed synchronously and alternately, so that the reliability test of the source and drain of the transistor in the fourth switch circuit T4 can be realized.
[0073] In some feasible implementations, the control method of the power device test circuit further includes: disconnecting the switch S, turning on the transistors in the first switch circuit T1, the second switch circuit T2 and the third switch circuit T3; and alternately turning on and off the transistors in the fourth switch circuit T4.
[0074] In the control method of the power device test circuit provided in the embodiment of the present application, since the transistors in the first switch circuit T1, the second switch circuit T2 and the third switch circuit T3 are turned on, and the switch S is turned off, the source and drain of the transistor in the fourth switch circuit T4 will be in a short-circuit state, and the power supply voltage will not be loaded on the two ends of the transistor in the fourth switch circuit T4. When the transistor in the fourth switch circuit T4 is alternately turned on and off, electrical stress will only be applied to the gate of the transistor in the fourth switch circuit T4, thereby realizing reliability testing of the gate of the transistor in the fourth switch circuit T4.
[0075] In some feasible embodiments, when the power device test circuit includes a second sub-bridge circuit, the control method includes: separately testing the transistors to be tested in the fourth switch circuit T4 and the sixth switch circuit T6; when testing the transistor to be tested in the fourth switch circuit T4, turning off the transistors in the fifth switch circuit T5 and the sixth switch circuit T6; when testing the transistor to be tested in the sixth switch circuit T6, turning off the transistors in the third switch circuit T3 and the fourth switch circuit T4.
[0076] The control method of the power device test circuit provided in the embodiment of the present application can realize the disconnection of the second sub-bridge circuit by turning off the transistors in the fifth switch circuit T5 and the sixth switch circuit T6, thereby preventing the transistors in the fifth switch circuit T5 and the sixth switch circuit T6 from interfering with the transistors in the fourth switch circuit T4. Similarly, the transistors in the third switch circuit T3 and the fourth switch circuit T4 can be turned off to avoid interfering with the transistors in the sixth switch circuit T6 during the test process. Therefore, the test positions of the power device test circuit can be increased, and the test performance of the power device test circuit can be further improved, the test difficulty of the power device can be reduced, the test process can be simplified, the test efficiency of the power device can be improved, and the accuracy and objectivity of the test results can be improved.
[0077] As shown in FIG5 , a third aspect of an embodiment of the present application provides a method for testing a power device, which is used to test a power device according to any one of the power device test circuits in the first aspect. The method includes:
[0078] Step S210: applying electrical stress to the transistor to be tested in the power device test circuit through the power device test circuit.
[0079] Step S220: testing the electrical characteristic parameters of the transistor to be tested.
[0080] The power device testing method provided by the embodiment of the present application can charge the inductance circuit L by using the power device testing circuit when the transistors in the first switch circuit T1 and the fourth switch circuit T4 are turned on. When only the transistor in the first switch circuit T1 is turned on, the diode in the third switch circuit T3 is used as a freewheeling diode, so that the inductance circuit L forms a loop through the diode in the third switch circuit T3 and the transistor in the first switch circuit T1, and further the inductance in the inductance circuit L can be discharged slowly. When all the transistors in the first switch circuit T1 to the fourth switch circuit T4 are turned off, the diodes in the second switch circuit T2 and the third switch circuit T3, the inductance circuit L and the power supply E form a loop, so that the inductance circuit L is discharged quickly. Therefore, the electric energy stored in the inductance circuit L at the end of the first test cycle can be changed by adjusting the conduction time of the transistors in the first switch circuit T1 and the fourth switch circuit T4 in the first test cycle, and then the input current of the transistor in the fourth switch circuit T4 can be changed in the second test cycle by the electric energy pre-stored in the inductance circuit L, so that the reliability test of the transistor under different currents can be realized. Various types of tests on power devices can be implemented through the power device test circuit, which can further reduce the difficulty of testing power devices, simplify the test process, and improve the test efficiency of power devices.
[0081] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0082] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0083] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.
Claims
1. A power device test circuit, characterized in that: include: power supply; a switch, the switch being connected in series with the power supply; A first half-bridge circuit, comprising a first switch circuit and a second switch circuit connected in series, wherein the first half-bridge circuit is connected in parallel with the power supply and the switch; a second half-bridge circuit, comprising at least one sub-bridge circuit, wherein the sub-bridge circuit comprises a third switch circuit and a fourth switch circuit connected in series, wherein the second half-bridge circuit is connected in parallel with the first half-bridge circuit, wherein the first switch circuit to the fourth switch circuit all comprise transistors, the transistor in the fourth switch circuit is a transistor to be tested, and the second switch circuit and the third switch circuit further comprise a diode, wherein the diode is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor; An inductor circuit includes at least one inductor, one end of the inductor is connected between the first switch circuit and the second switch circuit, and the other end of the inductor is connected between the third switch circuit and the fourth switch circuit, and the inductor circuit is used to store electrical energy in a first test cycle to change the current input from the inductor circuit to the fourth switch circuit in a second test cycle, wherein the first test cycle and the second test cycle are two adjacent test cycles, and the first test cycle occurs earlier than the second test cycle.
2. The power device test circuit according to claim 1, characterized in that: The second half-bridge circuit includes a first sub-bridge circuit and a second sub-bridge circuit, the first sub-bridge circuit includes the third switch circuit and the fourth switch circuit connected in series, the second sub-bridge circuit includes a fifth switch circuit and a sixth switch circuit connected in series, wherein the fifth switch circuit and the sixth switch circuit both include transistors, the transistor in the sixth switch circuit is a transistor to be tested, and the fifth switch circuit also includes a diode, the diode is connected in parallel with the transistor, and the conduction direction of the diode is opposite to that of the transistor; The inductor circuit includes a first inductor, a second inductor and a third inductor, one end of the first inductor is connected between the first switch circuit and the second switch circuit, one end of the second inductor is electrically connected to the other end of the first inductor, the other end of the second inductor is connected between the third switch circuit and the fourth switch circuit, one end of the third inductor is electrically connected to the other end of the first inductor, and the other end of the third inductor is connected between the fifth switch circuit and the sixth switch circuit.
3. The power device test circuit according to claim 2, characterized in that: The first switch circuit, the fourth switch circuit and the sixth switch circuit further include a diode, which is connected in parallel with the transistor, and a conduction direction of the diode is opposite to a conduction direction of the transistor.
4. The power device test circuit according to claim 1, characterized in that: Also includes: A capacitor is connected in parallel with the power supply and the switch.
5. A control method for a power device test circuit, characterized in that: Used to control the power device test circuit according to any one of claims 1 to 4, the control method comprising: In the first time interval, the switch is closed, the transistors in the second switch circuit and the third switch circuit are turned off, and the transistors in the first switch circuit and the fourth switch circuit are turned on; In a second time interval, turning off the transistor in the fourth switch circuit; In a third time interval, turning off the transistor in the first switch circuit; Cycle the operations from the first time interval to the third time interval in sequence; Among them, within the first test cycle, the duration of the first time interval, the second time interval and the third time interval are adjusted to change the current of the fourth switch circuit within the first time interval of the second test cycle, the first test cycle and the second test cycle are two adjacent test cycles, and the occurrence time of the first test cycle is earlier than the occurrence time of the second test cycle.
6. The control method of the power device test circuit according to claim 5, characterized in that: Also includes: Closing the switch to turn off the transistors in the first switch circuit and the second switch circuit; The transistors in the third switch circuit and the fourth switch circuit are alternately turned on.
7. The control method of the power device test circuit according to claim 5, characterized in that: Also includes: Short-circuit the inductor in the inductive circuit; Closing the switch to turn off the transistors in the third switch circuit and the fourth switch circuit; The transistors in the first switch circuit and the second switch circuit are turned on alternately.
8. The control method of the power device test circuit according to claim 5, characterized in that: Also includes: Turning off the switch, and turning on the transistors in the first switch circuit, the second switch circuit, and the third switch circuit; The transistor in the fourth switch circuit is turned on and off alternately.
9. The control method of the power device test circuit according to claim 5, characterized in that: In the case where the power device test circuit includes a second sub-bridge circuit, the control method includes: testing the transistors to be tested in the fourth switch circuit and the sixth switch circuit separately; When testing the transistor to be tested of the fourth switch circuit, turning off the transistors in the fifth switch circuit and the sixth switch circuit; When testing the transistor to be tested in the sixth switch circuit, the transistors in the third switch circuit and the fourth switch circuit are turned off.
10. A method for testing a power device, characterized in that: A power device test circuit according to any one of claims 1 to 4 is used to test a power device, the test method comprising: Applying electrical stress to the transistor to be tested in the power device test circuit through the power device test circuit; The electrical characteristic parameters of the transistor to be tested are tested.