Apparatus and method for synchronization in wireless communication network

Abstract

The present disclosure provides an apparatus and method for synchronization in a wireless communication network. The present disclosure provides an apparatus for a user equipment (UE), comprising: a memory to store a synchronization grid and a frequency offset value, the frequency offset value being greater than or equal to 50 kHz; and a processor configured to access the memory through the memory interface, where the processor is configured to determine a set of frequencies in a predetermined operating band based on the synchronization grid and the frequency offset value, detect one or more synchronization signals for each frequency in the set of frequencies, and transmit the one or more synchronization signals to the memory interface. And performing timing or frequency synchronization with the access node (AN) based on the detected one or more synchronization signals.

Description

[0001] This application is a divisional application of the invention patent application with application date of April 12, 2019, application number 201910296026.8, and invention name “Device and method for synchronization in a wireless communication network”.

[0002] Priority declaration

[0003] This application is based on and claims the priority of U.S. Provisional Application Serial No. 62 / 657,609 filed on April 13, 2018 and U.S. Provisional Application Serial No. 62 / 658,424 filed on April 16, 2018, the entire contents of which are incorporated herein by reference in their entirety. Technical Field

[0004] Embodiments of the present disclosure generally relate to the field of wireless communications, and in particular, to an apparatus and method for synchronization in a wireless communication network. Background Art

[0005] During the initial system acquisition of the user equipment (UE) in the Long Term Evolution (LTE) network, the UE uses a channel raster to perform frequency scanning to detect a set of center frequency candidates. In the 5G New Radio (NR) network, due to deployment in a very wide frequency band, the use of a channel raster for frequency scanning may not be effective enough, so a synchronization raster, which is usually a multiple of the channel raster, can be applied for initial system synchronization or switching process. Summary of the invention

[0006] One aspect of the present disclosure provides an apparatus for a user equipment (UE), comprising: a memory for storing a synchronization grid and a frequency offset value, wherein the frequency offset value is greater than or equal to 50kHz; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a group of frequencies in a predetermined working frequency band based on the synchronization grid and the frequency offset value, detect one or more synchronization signals for each frequency in the group of frequencies, and perform timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0007] One aspect of the present disclosure provides an apparatus for a user equipment (UE), comprising: a memory; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a group of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, detect one or more synchronization signals for each frequency in the group of frequencies, and perform timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals; and wherein the memory is used to store the synchronization grid and the frequency offset value.

[0008] One aspect of the present disclosure provides an apparatus for an access node (AN), comprising: a memory for storing a synchronization grid and a frequency offset value, wherein the frequency offset value is greater than or equal to 50kHz; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a predetermined working frequency band based on the synchronization grid and the frequency offset value, and send one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0009] One aspect of the present disclosure provides an apparatus for an access node (AN), comprising: a memory; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, and send one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies; and wherein the memory is used to store the synchronization grid and the frequency offset value.

[0010] One aspect of the present disclosure provides a computer-readable medium storing instructions, which, when executed by a processor of a user equipment (UE), causes the processor to: determine a set of frequencies in a frequency band below 6 GHz based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz; detect one or more synchronization signals for each frequency in the set of frequencies; and perform timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0011] One aspect of the present disclosure provides a computer-readable medium storing instructions, which, when executed by a processor of an access node (AN), causes the processor to: determine a set of frequencies in a frequency band below 6 GHz based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz; and send one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Embodiments of the present disclosure will be illustrated by way of example and not limitation in the accompanying drawings in which like reference numerals refer to similar elements.

[0013] Figure 1 The architecture of a system of a network according to some embodiments of the present disclosure is shown.

[0014] Figure 2 A schematic block diagram of an example synchronization component used by a UE to perform a synchronization process according to some embodiments of the present disclosure is shown.

[0015] Figure 3 A schematic block diagram of example configuration components of an access node (AN) for configuring a synchronization signal for a synchronization process according to some embodiments of the present disclosure is shown.

[0016] Figure 4 An example relationship between an operating frequency band, a minimum channel bandwidth, a synchronization signal block, a channel grid, and a synchronization grid according to some embodiments of the present disclosure is shown.

[0017] Figure 5 is a flow chart illustrating a synchronization process between a UE and an AN in a wireless communication network according to some embodiments of the present disclosure.

[0018] Figure 6 is a flow chart illustrating a synchronization process between a UE and an AN in a wireless communication network according to some embodiments of the present disclosure.

[0019] Figure 7 Example components of a device according to some embodiments of the present disclosure are shown.

[0020] Figure 8 An example interface of a baseband circuit according to some embodiments of the present disclosure is shown.

[0021] Fig. 9 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium and performing any one or more of the methodologies discussed herein, according to some example embodiments. DETAILED DESCRIPTION

[0022] The various aspects of the illustrative embodiments will be described using terms commonly used by those skilled in the art to convey the essence of the present disclosure to other persons skilled in the art. However, it will be readily understood by those skilled in the art that many alternative embodiments may be practiced using portions of the described aspects. For purposes of explanation, specific numbers, materials, and configurations are set forth to provide a thorough understanding of the illustrative embodiments. However, it will be readily understood by those skilled in the art that alternative embodiments may be practiced without these specific details. In other cases, well-known features may be omitted or simplified to avoid blurring the illustrative embodiments.

[0023] Furthermore, various operations will be described as multiple discrete operations in a manner that is most helpful for understanding the illustrative embodiments; however, the order of description should not be construed as implying that these operations are necessarily order dependent. In particular, these operations do not need to be performed in the order presented.

[0024] The phrases "in an embodiment," "in one embodiment," and "in some embodiments" are used repeatedly herein. The phrase generally does not refer to the same embodiment; however, it may. The terms "comprising," "having," and "including" are synonymous unless the context dictates otherwise. The phrases "A or B" and "A / B" mean "(A), (B), or (A and B)."

[0025] Figure 1 The architecture of a system 100 of a network according to some embodiments of the present disclosure is shown. The system 100 is shown to include user equipment (UE) 101 and UE 102. UE 101 and UE 102 are shown as smart phones (e.g., handheld touch screen mobile computing devices that can connect to one or more cellular networks). However, it can also include any mobile or non-mobile computing device, such as a personal data assistant (PDA), a pager, a laptop computer, a desktop computer, a wireless handheld device, or any computing device that includes a wireless communication interface.

[0026] In some embodiments, any one of UE 101 and UE 102 may include an Internet of Things (IoT) UE, which may include a network access layer designed for low-power IoT applications that utilize short-term UE connections. The IoT UE may utilize technologies such as machine-to-machine (M2M) or machine-type communication (MTC) to exchange data with an MTC server or device via a public land mobile network (PLMN), proximity-based services (ProSe) or device-to-device (D2D) communications, sensor networks, or IoT networks. The M2M or MTC data exchange may be a machine-initiated data exchange. The IoT network describes interconnecting IoT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure) with short-term connections. The IoT UE may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate connectivity to the IoT network.

[0027] UE 101 and UE 102 may be configured to connect (e.g., be communicatively coupled) to a radio access network (RAN) 110, which may be, for example, an evolved universal mobile telecommunications system (UMTS) terrestrial radio access network (E-UTRAN), a next generation RAN (NG RAN), or some other type of RAN. UE 101 and UE 102 may utilize connections 103 and 104, respectively, each of which includes a physical communication interface or physical layer (discussed in further detail below); in this example, connections 103 and 104 are shown as air interfaces that allow for communicatively coupling, and may be consistent with a cellular communication protocol, which may be, for example, a global system for mobile communications (GSM) protocol, a code division multiple access (CDMA) network protocol, a push-to-talk (PTT) protocol, a cellular PTT (POC) protocol, a universal mobile telecommunications system (UMTS) protocol, a 3GPP long term evolution (LTE) protocol, a fifth generation (5G) protocol, a new radio (NR) protocol, etc.

[0028] In this example, UEs 101 and 102 may also exchange communication data directly through a proximity-based service (ProSe) interface 105. The ProSe interface 105 may also be referred to as a sidelink interface including one or more logical channels, including but not limited to a physical sidelink control signal (PSCCH), a physical sidelink shared channel (PSSCH), a physical sidelink discovery channel (PSDCH), and a physical sidelink broadcast channel (PSBCH).

[0029] The RAN 110 may include one or more access nodes (ANs) that enable connections 103 and 104. These ANs may be referred to as base stations (BSs), NodeBs, evolved NodeBs (eNBs), next generation NodeBs (gNBs), RAN nodes, etc., and may include ground stations (e.g., ground access points) or satellite stations that provide coverage within a geographic area (e.g., a cell). The RAN 110 may include one or more RAN nodes for providing macro cells, such as a macro RAN node 111, and one or more RAN nodes for providing femto cells or pico cells (e.g., cells with smaller coverage areas, smaller user capacity, or higher bandwidth than macro cells), such as a low power (LP) RAN node 112.

[0030] Any of the RAN nodes 111 and 112 may terminate the air interface protocol and may be the first point of contact for the UEs 101 and 102. In some embodiments, any of the RAN nodes 111 and 112 may implement various logical functions of the RAN 110, including but not limited to radio network controller (RNC) functions, such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.

[0031] According to some embodiments, UEs 101 and 102 may be configured to communicate with each other or with any of RAN nodes 111 and 112 over a multi-carrier communication channel using orthogonal frequency division multiplexing (OFDM) communication signals according to various communication techniques, such as but not limited to orthogonal frequency division multiple access (OFDMA) communication techniques (e.g., for downlink communication) or single carrier frequency division multiple access (SC-FDMA) communication techniques (e.g., for uplink and ProSe or sidelink communication), but the scope of the embodiments is not limited in this respect. OFDM signals may include multiple orthogonal subcarriers.

[0032] In some embodiments, a downlink resource grid may be used for downlink transmissions from any of the RAN nodes 111 and 112 to the UEs 101 and 102, while similar techniques may be used for uplink transmissions. The grid may be a time-frequency grid, referred to as a resource grid or a time-frequency resource grid, which is a physical resource in the downlink in each time slot. This time-frequency plane representation method is a common practice in OFDM systems, which makes radio resource allocation more intuitive. Each column and each row of the resource grid corresponds to an OFDM symbol and an OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to a time slot in a radio frame. The smallest time-frequency unit in the resource grid is represented as a resource element. Each resource grid includes a plurality of resource blocks, which describe the mapping of certain physical channels to resource elements. Each resource block includes a set of resource elements. In the frequency domain, this may represent the minimum amount of resources that can currently be allocated. There are several different physical downlink channels that are transmitted using such resource blocks.

[0033] Downlink channels may include a Physical Downlink Shared Channel (PDSCH) and a Physical Downlink Control Channel (PDCCH).

[0034] The PDSCH may carry user data and higher layer signaling to the UEs 101 and 102. The PDCCH may carry information on transport formats and resource allocations related to the PDSCH channel, among other things. It may also inform the UEs 101 and 102 of transport formats, resource allocations, and hybrid automatic repeat request (HARQ) information related to uplink shared channels. Typically, downlink scheduling (allocation of control and shared channel resource blocks to the UEs 101 and 102 within a cell) may be performed at any of the RAN nodes 111 and 112 based on channel quality information fed back from the UEs 101 and 102. Downlink resource allocation information for (e.g., allocated to) each of the UEs 101 and 102 may be sent on the PDCCH.

[0035] PDCCH can use control channel elements (CCE) to transmit control information. Before mapping to resource elements, PDCCH complex-valued symbols can first be organized into quadruplets, and then these quadruplets can be permuted using a sub-block interleaver for rate matching. Each PDCCH can be sent using one or more of these CCEs, where each CCE can correspond to nine groups of physical resource elements (referred to as resource element groups (REGs)), each group including four physical resource elements. Four orthogonal phase shift keying (QPSK) symbols can be mapped to each REG. PDCCH can be sent using one or more CCEs, depending on the size of the downlink control information (DCI) and the channel conditions. There may be four or more different PDCCH formats in LTE, with different numbers of CCEs (e.g., aggregation levels, L=1, 2, 4, or 8)

[0036] Some embodiments may use the concept of resource allocation for control channel information, which is an extension of the above concept. For example, some embodiments may use an enhanced physical downlink control channel (EPDCCH), which uses PDSCH resources for control information transmission. One or more enhanced control channel elements (ECCEs) may be used to send EPDCCH. Similar to the above, each ECCE may correspond to nine groups of physical resource elements (referred to as enhanced resource element groups (EREGs)), each group including four physical resource elements. In some cases, ECCE may have other numbers of EREGs.

[0037] RAN 110 is shown as being communicatively coupled to a core network (CN) 120 via an S1 interface 113. In an embodiment, CN 120 may be an evolved packet core (EPC) network, a NextGen packet core (NPC) network, or another type of CN. In some embodiments, S1 interface 114 is divided into two parts: S1-U interface 114, which carries traffic data between RAN nodes 111 and 112 and a serving gateway (S-GW) 122; S1-mobility management entity (MME) interface 115, which is a signaling interface between RAN nodes 111 and 112 and MME 121.

[0038] In one embodiment, CN 120 may include MME 121, S-GW 122, Packet Data Network (PDN) Gateway (P-GW) 123, and Home Subscriber Server (HSS) 124. MME 121 may be similar in function to the control plane of a conventional Serving General Packet Radio Service (GPRS) Support Node (SGSN). MME 121 may manage mobility aspects of access such as gateway selection and tracking area list management. HSS 124 may include a database for network users, including subscription-related information for supporting network entities in handling communication sessions. CN 120 may include one or more HSS 124, depending on the number of mobile subscribers, the capacity of the devices, the organization of the network, etc. For example, HSS 124 may provide support for routing / roaming, authentication, authorization, naming / addressing resolution, location dependency, etc.

[0039] The S-GW 122 may terminate the S1 interface 113 towards the RAN 110 and route data packets between the RAN 110 and the CN 120. In addition, the S-GW 122 may be a local mobility anchor for inter-RAN node handovers and may also provide an anchor for inter-3GPP mobility. Other responsibilities may include lawful interception, charging, and some policy enforcement.

[0040] The P-GW 123 may terminate the SGi interface toward the PDN. The P-GW 123 may route data packets between the CN 120 and an external network such as a network including an application server (AS) 130 (or referred to as an application function (AF)) via an Internet Protocol (IP) interface 125. Typically, the application server 130 may be an element that provides applications that use IP bearer resources with a core network (e.g., a UMTS packet service (PS) domain, a LTE PS data service, etc.). In this embodiment, the P-GW 123 is shown as being communicatively coupled to the application server 130 via an IP communication interface 125. The application server 130 may also be configured to support one or more communication services (e.g., voice over Internet protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) for the UEs 101 and 102 via the CN 120.

[0041] The P-GW 123 may also be a node for policy enforcement and charging data collection. The Policy and Charging Rules Function (PCRF) 126 is a policy and charging control element of the CN 120. In a non-roaming scenario, there may be a single PCRF associated with the UE's Internet Protocol Connectivity Access Network (IP-CAN) session in the Home Public Land Mobile Network (HPLMN). In a roaming scenario with local traffic bursts, there may be two PCRFs associated with the UE's IP-CAN session: the Home PCRF (H-PCRF) within the HPLMN and the Visited PCRF (V-PCRF) in the Visited Public Land Mobile Network (VPLMN). The PCRF 126 may be communicatively coupled to the application server 130 via the P-GW 123. The application server 130 may signal the PCRF 126 to indicate a new service flow and select appropriate quality of service (QoS) and charging parameters. PCRF 126 may provide the rules to a Policy and Charging Enforcement Function (PCEF) (not shown) using the appropriate Traffic Flow Template (TFT) and QoS Class Identifier (QCI), which initiates the QoS and charging specified by application server 130 .

[0042] Figure 1 The number of devices and / or networks shown is provided for illustration purposes only. In practice, there may be additional devices and / or networks, fewer devices and / or networks, different devices and / or networks, or different Figure 1 Alternatively or additionally, one or more devices of system 100 may perform one or more functions described as being performed by another one or more devices of system 100. Furthermore, although Figure 1 Although "direct" connections are shown in the figure, these connections should be interpreted as logical communication paths. In practice, one or more intermediate devices (e.g., routers, gateways, modems, switches, hubs, etc.) may exist.

[0043] When the system 100 is deployed in an LTE network, during initial system acquisition at a UE (e.g., UE 101), the UE may perform frequency scanning using a channel grid to detect a set of center frequency candidates. However, when the system 100 is deployed in a 5G NR network, since it is deployed in a very wide frequency band, frequency scanning using a channel grid may not be effective enough, so a synchronization grid that is typically a multiple of the channel grid may be applied for initial system synchronization or a switching process.

[0044] When there is no explicit signaling about the frequency location of synchronization signal (SS) blocks, the synchronization raster may indicate the frequency locations of SS blocks that the UE may use for system synchronization.

[0045] Specifically, according to the relevant 3GPP technical specifications, for the frequency band below 6 GHz (also known as the FR1 re-farming band) and the channel grid of 100 kHz, the frequency position of the SS block can be given by the following formula (1).

[0046] SSREF=N*900kHz+M*5kHz (1)

[0047] In the above formula, N and M are integers, for example, N=1:3000, M=-1:1 (i.e., N may be an integer selected from 1 to 3000, and M may be an integer selected from {-1, 0, 1}); SSREF represents the frequency position of the SS block; 900 kHz is the synchronization grid; and 5 kHz is the frequency offset value. The synchronization grid and the frequency offset value may be predefined for a specific operating frequency band in the relevant 3GPP technical specifications.

[0048] Figure 2 A schematic block diagram of an example synchronization component 200 for a UE to perform a synchronization process according to some embodiments of the present disclosure is shown.

[0049] The synchronization component 200 for a UE (eg, UE 101) may be configured to perform timing or frequency synchronization with an access node (eg, RAN node 111) in a network based on a synchronization signal. Figure 2 As shown in , the synchronization component 200 may include a determination component 210, which is configured to determine a set of frequencies in the FR1 re-farming band based on a predefined synchronization grid 211 and a predefined frequency offset value 212. For example. The set of frequencies can be determined according to the above equation (1). The synchronization component 200 may also include a detection component 220, which is configured to detect one or more synchronization signals 221 for timing or frequency synchronization with an access node (AN) for each frequency in the set of frequencies. In addition, the synchronization component 200 may include an acquisition component 230, which is configured to acquire a master information block (MIB) by decoding a physical broadcast channel (PBCH) sent from the AN; and a search component 240, which is configured to search for a center frequency based at least on detecting one or more synchronization signals 221 and acquiring the MIB.

[0050] and Figure 2 Correspondingly, Figure 3 A schematic block diagram is shown of an example configuration component 300 of an AN for configuring a synchronization signal for a synchronization process according to some embodiments of the present disclosure.

[0051] like Figure 3As shown in , the configuration component 300 for the AN may include a determination component 310, which is configured to determine a set of frequencies in the FR1 re-farming band based on a predefined synchronization grid 211 and a predefined frequency offset value 212. For example. The set of frequencies can be determined according to the above equation (1). Then, the configuration component 310 can send one or more synchronization signals 221 and PBCH 301 to at least one UE at one or more frequencies in the set of frequencies. The one or more synchronization signals 221 can be used by the UE to perform timing or frequency synchronization with the AN.

[0052] According to the previous description, when there is no explicit signaling about the frequency position of the synchronization signal block, the frequency position of the synchronization signal block that the UE can use for system synchronization can be calculated based on the synchronization grid and the frequency offset value.

[0053] For example, in equation (1) above, at each integer multiple of 900kHz, there are three possible frequency positions for the SS block by defining a frequency offset value of 5kHz. For a subcarrier spacing (SCS) of 15kHz, a frequency offset value of 5kHz is defined. For an SCS of 30kHz, the frequency offset value may be defined as 10kHz. The offset value may be defined to ensure that the frequency difference between the synchronization grid and the channel grid is a multiple of 15kHz.

[0054] However, a frequency offset value of 5kHz or 10kHz is considered to be too small. For example, in a receiver at a UE, there may be reference clock inaccuracies and / or Doppler shifts, which may result in a frequency offset greater than 10kHz. Therefore, during an initial cell search at a UE, with a frequency offset value of 5kHz or 10kHz, SS blocks may not be distinguishable from each other.

[0055] Therefore, in order to optimize the synchronization process and ensure that a larger frequency offset is used to distinguish SS blocks from each other, it is proposed to define a new synchronization grid and a new frequency offset value as large as possible without causing additional signaling overhead. On the other hand, it is also required to define a suitable synchronization grid to allow the minimum bandwidth channel within the working frequency band of the UE to accommodate the synchronization signal.

[0056] Figure 4 An example relationship between an operating frequency band, a minimum channel bandwidth, a synchronization signal block, a channel grid, and a synchronization grid according to some embodiments of the present disclosure is shown.

[0057] like Figure 4 As shown, in order to allow the minimum bandwidth channel within the working frequency band of the UE to accommodate the synchronization signal, the synchronization grid can be defined according to the following equation (2).

[0058] Rss=Floor((CBWeff-min-BWSS+RCH) / RCH)×RCH (2)

[0059] Where RSS is the synchronization raster, CBWeff-min is the effective minimum channel bandwidth, BWSS is the bandwidth of the synchronization signal, and RCH is the channel raster.

[0060] Figure 5 is a flow chart illustrating a synchronization process between a UE and an AN in a wireless communication network according to some embodiments of the present disclosure.

[0061] At 510, the UE may determine a set of frequencies in a predetermined operating frequency band based on a synchronization raster and a frequency offset value greater than or equal to 50 kHz.

[0062] The synchronization grid is predefined as the maximum frequency value that allows the smallest bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0063] The synchronization grid may be an integer multiple of the channel grid. When the predetermined operating frequency band is a frequency band below 6 GHz, the synchronization grid may be defined as 1200 kHz. Alternatively, the synchronization grid may be defined as 1300 kHz, 1400 kHz, or 1500 kHz. In addition, the frequency offset value may also be predefined as 100 kHz or 200 kHz. Therefore, a set of frequencies in the predetermined operating frequency band may be determined based on the synchronization grid and the frequency offset value according to a predefined equation.

[0064] As an example, the set of frequencies may be determined by the following equation (3).

[0065] SSREF=N*1200kHz+M*50kHz (3)

[0066] In the above formula, N and M are integers, for example, N=1:2250 or N=0:2250, and M=0:1:2 (that is, N can be an integer selected from 1 to 2250 or from 0 to 2250, and M can be an integer selected from {0,1,2}); SSREF represents the frequency position of the determined SS block; 1200kHz is the synchronization grid; and 50kHz is the frequency offset value.

[0067] As another example, the set of frequencies may be determined by the following equation (4).

[0068] SSREF=N*1300kHz+M*100kHz (4)

[0069] In the above formula, N and M are integers, for example, N=1:1928, and M=-1:1; SSREF represents the frequency position of the determined SS block; 1300 kHz is the synchronization grid; and 100 kHz is the frequency offset value.

[0070] As another example, the set of frequencies may be determined by the following equation (5).

[0071] SSREF=N*1400kHz+M*200kHz (5)

[0072] In the above formula, N and M are integers, for example, N=1:1928, and M=-1:1; SSREF represents the frequency position of the determined SS block; 1400 kHz is the synchronization grid; and 200 kHz is the frequency offset value.

[0073] As another example, the set of frequencies may be determined by the following equation (6).

[0074] SSREF=N*1500kHz+M*100kHz (6)

[0075] In the above formula, N and M are integers, for example, N=1:1928, and M=-1:1; SSREF represents the frequency position of the determined SS block; 1500 kHz is the synchronization grid; and 100 kHz is the frequency offset value.

[0076] At 520 , the AN may determine a set of frequencies in a predetermined operating frequency band based on the synchronization grid and the frequency offset value in the same manner as in step 510 .

[0077] At 530 , the AN may send one or more synchronization signals to the UE at one or more frequencies from the set of frequencies determined at 520 .

[0078] At 540, the UE may detect one or more synchronization signals for each frequency in the determined set of frequencies.

[0079] At 550, the UE may perform timing or frequency synchronization with the AN based on the detected one or more synchronization signals.

[0080] Figure 6 is a flow chart illustrating a synchronization process between a UE and an AN in a wireless communication network according to some embodiments of the present disclosure.

[0081] At 610, the UE may determine a set of frequencies in a sub-6 GHz frequency band based on a synchronization raster of 1200 kHz and a frequency offset value greater than or equal to 50 kHz.

[0082] In addition, the frequency offset value may also be predefined as 100 kHz or 200 kHz. Therefore, a set of frequencies in a predetermined operating frequency band may be determined according to a predefined equation based on the synchronization grid and the frequency offset value.

[0083] As an example, the set of frequencies may be determined by the following equation (3).

[0084] SS REF =N*1200kHz+M*50kHz (3)

[0085] In the above formula, N and M are integers, for example, N = 1:2250 or N = 0:2250, and M = 0:1:2; SS REF represents the frequency position of the determined SS block; 1200kHz is the synchronization grid; and 50kHz is the frequency offset value.

[0086] At 620 , the AN may determine a set of frequencies in a predetermined operating frequency band based on the synchronization grid and the frequency offset value in the same manner as in step 610 .

[0087] At 630 , the AN may send one or more synchronization signals to the UE at one or more frequencies from the set of frequencies determined at 620 .

[0088] At 640, the UE may detect one or more synchronization signals for each frequency in the determined set of frequencies.

[0089] At 650, the UE may perform timing or frequency synchronization with the AN based on the detected one or more synchronization signals.

[0090] Figure 7 Example components of a device 700 according to some embodiments are shown. In some embodiments, the device 700 may include an application circuit 702, a baseband circuit 704, a radio frequency (RF) circuit 706, a front end module (FEM) circuit 708, one or more antennas 710, and a power management circuit (PMC) 712 coupled together at least as shown. The components of the device 700 shown may be included in a UE or an AN. In some embodiments, the device 700 may include fewer elements (e.g., the AN may not use the application circuit 702, but include a processor / controller to process IP data received from the EPC). In some embodiments, the device 700 may include additional elements, such as a memory / storage device, a display, a camera, a sensor, or an input / output (I / O) interface. In other embodiments, the components described below may be included in more than one device (e.g., for a Cloud-RAN (C-RAN) implementation, the circuit may be separately included in more than one device).

[0091] The application circuit 702 may include one or more application processors. For example, the application circuit 702 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The (one or more) processors may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). The processor may be coupled to or may include a memory / storage device, and may be configured to run instructions stored in the memory / storage device to enable various applications and / or operating systems to run on the device 700. In some embodiments, the processor of the application circuit 702 may process IP packets received from the EPC.

[0092] The baseband circuit 704 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The baseband circuit 704 may include one or more baseband processors or control logic to process baseband signals received from the receive signal path of the RF circuit 706 and generate baseband signals for the transmit signal path of the RF circuit 706. The baseband processing circuit 704 may interface with the application circuit 702 to generate and process baseband signals and control the operation of the RF circuit 706. For example, in some embodiments, the baseband circuit 704 may include a third generation (3G) baseband processor 704A, a fourth generation (4G) baseband processor 704B, a fifth generation (5G) baseband processor 704C, or (one or more) other baseband processors 704D for other existing generations, generations under development, or generations to be developed in the future (e.g., the sixth generation (6G), etc.). The baseband circuit 704 (e.g., one or more of the baseband processors 704A-D) may handle various radio control functions that support communication with one or more radio networks via the RF circuit 706. In other embodiments, some or all of the functions of the baseband processors 704A-D may be included in the modules stored in the memory 704G and these functions may be performed via the central processing unit (CPU) 704E. The radio control functions may include, but are not limited to: signal modulation / demodulation, encoding / decoding, radio frequency shifting, etc. In some embodiments, the modulation / demodulation circuitry of the baseband circuitry 704 may include fast Fourier transform (FFT), precoding, and / or constellation mapping / demapping functions. In some embodiments, the encoding / decoding circuitry of the baseband circuitry 704 may include convolution, tail-biting convolution, turbo, Viterbi, and / or low-density parity check (LDPC) encoder / decoder functions. The embodiments of the modulation / demodulation and encoder / decoder functions are not limited to these examples, and may include other suitable functions in other embodiments.

[0093] In some embodiments, the baseband circuit 704 may include one or more audio digital signal processors (DSPs) 704F. (One or more) audio DSPs 704F may include elements for compression / decompression and echo cancellation, and may include other appropriate processing elements in other embodiments. In some embodiments, the components of the baseband circuit may be appropriately combined in a single chip, a single chipset, or arranged on the same circuit board. In some embodiments, some or all of the components of the baseband circuit 704 and the application circuit 702 may be implemented together, for example, on a system on a chip (SOC).

[0094] In some embodiments, the baseband circuit 704 may provide communications compatible with one or more radio technologies. For example, in some embodiments, the baseband circuit 704 may support communications with an Evolved Universal Terrestrial Radio Access Network (EUTRAN) or other wireless metropolitan area network (WMAN), wireless local area network (WLAN), wireless personal area network (WPAN). Embodiments in which the baseband circuit 704 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuits.

[0095] The RF circuit 706 may support communication with a wireless network using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuit 706 may include switches, filters, amplifiers, etc. to assist in communication with the wireless network. The RF circuit 706 may include a receive signal path, which may include circuitry for down-converting RF signals received from the FEM circuit 708 and providing baseband signals to the baseband circuit 704. The RF circuit 706 may also include a transmit signal path, which may include circuitry for up-converting baseband signals provided by the baseband circuit 704 and providing RF output signals to the FEM circuit 708 for transmission.

[0096] In some embodiments, the receive signal path of the RF circuit 706 may include a mixer circuit 706a, an amplifier circuit 706b, and a filter circuit 706c. In some embodiments, the transmit signal path of the RF circuit 706 may include a filter circuit 706c and a mixer circuit 706a. The RF circuit 706 may also include a synthesizer circuit 706d, which is used to synthesize the frequency used by the mixer circuit 706a for the receive signal path and the transmit signal path. In some embodiments, the mixer circuit 706a of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 708 based on the synthesized frequency provided by the synthesizer circuit 706d. The amplifier circuit 706b may be configured to amplify the down-converted signal, and the filter circuit 706c may be a low pass filter (LPF) or a band pass filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to the baseband circuit 704 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, but this is not required.In some embodiments, the mixer circuit 706a of the receive signal path may include a passive mixer, but the scope of the embodiments is not limited in this respect.

[0097] In some embodiments, mixer circuit 706a of the transmit signal path may be configured to up-convert an input baseband signal based on a synthesized frequency provided by synthesizer circuit 706d to generate an RF output signal for FEM circuit 708. The baseband signal may be provided by baseband circuit 704 and may be filtered by filter circuit 706c.

[0098] In some embodiments, the mixer circuit 706a of the receive signal path and the mixer circuit 706a of the transmit signal path may include two or more mixers and may be arranged for quadrature down-conversion and / or up-conversion, respectively.

[0099] In some embodiments, the mixer circuit 706a of the receive signal path and the mixer circuit 706a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuit 706a of the receive signal path and the mixer circuit 706a of the transmit signal path may be arranged for direct down conversion and / or direct up conversion, respectively. In some embodiments, the mixer circuit 706a of the receive signal path and the mixer circuit 706a of the transmit signal path may be configured for superheterodyne operation.

[0100] In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, but the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, the RF circuit 706 may include an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) circuit, and the baseband circuit 704 may include a digital baseband interface to communicate with the RF circuit 706.

[0101] In some dual-mode embodiments, separate radio IC circuits may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[0102] In some embodiments, synthesizer circuit 706d may be a fractional-N synthesizer or a fractional-N / N+1 synthesizer, but the scope of the embodiments is not limited in this respect, as other types of frequency synthesizers may be suitable. For example, synthesizer circuit 706d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.

[0103] Synthesizer circuit 706d may be configured to synthesize an output frequency for use by mixer circuit 706a of RF circuit 706 based on the frequency input and the divider control input. In some embodiments, synthesizer circuit 706d may be a fractional-N / N+1 synthesizer.

[0104] In some embodiments, the frequency input may be provided by a voltage controlled oscillator (VCO), but this is not required. The divider control input may be provided by the baseband circuit 704 or the application processor 702 according to the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a lookup table based on the channel indicated by the application processor 702.

[0105] The synthesizer circuit 706d of the RF circuit 706 may include a frequency divider, a delay locked loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the frequency divider may be a dual-mode frequency divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or N+1 (e.g., based on a carry output) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded tunable delay elements, a phase detector, a charge pump, and a D-type flip-flop. In these embodiments, the delay element may be configured to decompose the VCO cycle into at most Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0106] In some embodiments, the synthesizer circuit 706d can be configured to generate a carrier frequency as an output frequency, while in other embodiments, the output frequency can be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used with an orthogonal generator and divider circuit to generate multiple signals with multiple different phases from each other at the carrier frequency. In some embodiments, the output frequency can be an LO frequency (fLO). In some embodiments, the RF circuit 706 can include an IQ / polarity converter.

[0107] The FEM circuitry 708 may include a receive signal path that may include circuitry configured to operate on RF signals received from one or more antennas 710, amplify the received signals, and provide an amplified version of the received signals to the RF circuitry 706 for further processing. The FEM circuitry 708 may also include a transmit signal path that may include circuitry configured to amplify signals provided by the RF circuitry 706 for transmission by one or more of the one or more antennas 710. In various embodiments, amplification via the transmit signal path or the receive signal path may be accomplished only in the RF circuitry 706, only in the FEM 708, or in both the RF circuitry 706 and the FEM 708.

[0108] In some embodiments, the FEM circuit 708 may include a TX / RX switch to switch between transmit mode and receive mode operation. The FEM circuit may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuit may include a low noise amplifier (LNA) to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., to the RF circuit 706). The transmit signal path of the FEM circuit 708 may include a power amplifier (PA) for amplifying the input RF signal (e.g., provided by the RF circuit 706) and one or more filters for generating an RF signal for subsequent transmission (e.g., through one or more of the one or more antennas 710).

[0109] In some embodiments, PMC 712 can manage the power provided to baseband circuit 704. Specifically, PMC 712 can control power selection, voltage scaling, battery charging, or DC-DC conversion. When device 700 is capable of being powered by a battery, for example, when the device is included in a UE, PMC 712 can generally be included. PMC 712 can improve power conversion efficiency while providing a desired implementation size and heat dissipation characteristics.

[0110] Although Figure 7PMC 712 is shown coupled only to baseband circuitry 704. However, in other embodiments, PMC 712 may additionally or alternatively be coupled to other components, such as, but not limited to, application circuitry 702, RF circuitry 706, or FEM 708, and perform similar power management operations for the other components.

[0111] In some embodiments, the PMC 712 may control or otherwise be a part of various power saving mechanisms of the device 700. For example, if the device 700 is in the RRC_Connected state, in which the device 700 remains connected to the RAN node when it expects to receive traffic soon, it may then enter a state known as discontinuous reception mode (DRX) after a period of inactivity. During this state, the device 700 may be powered off for brief intervals, thereby saving power.

[0112] If there is no data traffic activity for an extended period of time, the device 700 may transition to the RRC_Idle state, in which the device 700 is disconnected from the network and does not perform operations such as channel quality feedback, handover, etc. The device 700 enters a very low power state and performs paging, in which the device 700 periodically wakes up again to listen to the network and then powers off again. The device 700 may not receive data in this state, and in order to receive data, it may transition back to the RRC_Connected state.

[0113] An additional power saving mode may allow a device to be unavailable to the network for periods longer than the paging interval, ranging from a few seconds to a few hours. During this time, the device is completely unable to access the network and may be completely powered off. Any data sent during this time will incur significant delays, assuming the delay is acceptable.

[0114] The processor of the application circuit 702 and the processor of the baseband circuit 704 can be used to execute elements of one or more instances of the protocol stack. For example, the processor of the baseband circuit 704 (alone or in combination) can be used to perform layer 3, layer 2, or layer 1 functions, and the processor of the application circuit 704 can utilize data received from these layers (e.g., packet data) and further perform layer 4 functions (e.g., Transport Communication Protocol (TCP) and User Datagram Protocol (UDP) layers). As mentioned herein, layer 3 may include an RRC layer. As mentioned herein, layer 2 may include a medium access control (MAC) layer, a radio link control (RLC) layer, and a packet data convergence protocol (PDCP) layer. As mentioned herein, layer 1 may include a physical (PHY) layer of a UE / RAN node.

[0115] Figure 8An example interface of a baseband circuit according to some embodiments is shown. As described above, Figure 7 The baseband circuit 704 may include processors 704A-704E and a memory 704G used by the processors. Each of the processors 704A-704E may include a memory interface 804A-804E, respectively, to send / receive data to / from the memory 704G.

[0116] The baseband circuit 704 may also include one or more interfaces to communicatively couple to other circuits / devices, such as a memory interface 812 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 704), an application circuit interface 814 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 704), and an application circuit interface 815 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 704). Figure 7 The interface for sending / receiving data to / from the application circuit 702), the RF circuit interface 816 (for example, for sending / receiving data to / from Figure 7 The present invention also includes an interface for sending / receiving data to / from the RF circuit 706 of the wireless communication device 710), a wireless hardware connection interface 818 (for example, an interface for sending / receiving data to / from a near field communication (NFC) component, a Bluetooth component (for example, Bluetooth low energy), a Wi-Fi component, and other communication components), and a power management interface 820 (for example, an interface for sending / receiving power or control signals to / from the PMC 712).

[0117] Fig. 9 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the methods discussed herein, according to some example embodiments. Specifically, Fig. 9 A diagrammatic representation of hardware resources 900 is shown, including one or more processors (or processor cores) 910, one or more memory / storage devices 920, and one or more communication resources 930, each of which may be communicatively coupled via a bus 940. For embodiments utilizing node virtualization (e.g., NFV), a hypervisor 902 may be executed to provide an execution environment for one or more network slices / sub-slices to utilize hardware resources 900.

[0118] Processor 910 (e.g., a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a digital signal processor (DSP) such as a baseband processor, an application specific integrated circuit (ASIC), a radio frequency integrated circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, processor 912 and processor 914.

[0119] The memory / storage device 920 may include main memory, disk storage, or any suitable combination thereof. The memory / storage device 920 may include, but is not limited to, any type of volatile or non-volatile memory, such as dynamic random access memory (DRAM), static random access memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, solid-state storage, etc.

[0120] The communication resources 930 may include interconnect or network interface components or other suitable devices to communicate with one or more peripheral devices 904 or one or more databases 906 via the network 908. For example, the communication resources 930 may include a wired communication component (e.g., for coupling via a universal serial bus (USB)), a cellular communication component, an NFC component, a Bluetooth component (e.g., Bluetooth low energy), a Wi-Fi component, and other communication components.

[0121] The instructions 950 may include software, programs, applications, applet programs, apps, or other executable code for causing at least any processor 910 to perform any one or more of the methods discussed herein. The instructions 950 may reside in whole or in part in at least one of the processor 910 (e.g., within a buffer memory of the processor), the memory / storage device 920, or any suitable combination thereof. In addition, any portion of the instructions 950 may be transmitted to the hardware resources 900 from any combination of the peripheral device 904 or the database 906. Therefore, the memory of the processor 910, the memory / storage device 920, the peripheral device 904, and the database 906 are examples of computer-readable and machine-readable media.

[0122] The following paragraphs describe examples of various embodiments.

[0123] Example 1 includes an apparatus for a user equipment (UE), comprising: a memory for storing a synchronization grid and a frequency offset value, the frequency offset value being greater than or equal to 50kHz; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a predetermined operating frequency band based on the synchronization grid and the frequency offset value, detect one or more synchronization signals for each frequency in the set of frequencies, and perform timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0124] Example 2 includes the apparatus of Example 1, wherein the synchronization grid is an integer multiple of the channel grid.

[0125] Example 3 includes the apparatus of Example 1 or 2, wherein the predetermined operating frequency band is a sub-6 GHz frequency band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0126] Example 4 includes the apparatus of any one of Examples 1 to 3, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0127] Example 5 includes the apparatus of Example 1, wherein the frequency offset value is 100 kHz or 200 kHz.

[0128] Example 6 includes an apparatus for a user equipment (UE), comprising: a memory; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, detect one or more synchronization signals for each frequency in the set of frequencies, and perform timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals; and wherein the memory is used to store the synchronization grid and the frequency offset value.

[0129] Example 7 includes the apparatus of Example 6, wherein the frequency offset value is 100 kHz or 200 kHz.

[0130] Example 8 includes the apparatus of Example 6, wherein the processor is further configured to determine the set of frequencies according to a formula N*1200 kHz+M*50 kHz, where N=1:2250 or N=0:2250, and M=0:1:2.

[0131] Example 9 includes a device for an access node (AN), comprising: a memory for storing a synchronization grid and a frequency offset value, the frequency offset value being greater than or equal to 50kHz; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a predetermined operating frequency band based on the synchronization grid and the frequency offset value, and send one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0132] Example 10 includes the apparatus of Example 9, wherein the synchronization raster is an integer multiple of the channel raster.

[0133] Example 11 includes the apparatus of Example 9 or 10, wherein the predetermined operating frequency band is a sub-6 GHz band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0134] Example 12 includes the apparatus of any one of Examples 9 to 11, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0135] Example 13 includes the apparatus of Example 9, wherein the frequency offset value is 100 kHz or 200 kHz.

[0136] Example 14 includes an apparatus for an access node (AN), comprising: a memory; and a processor for accessing the memory through a memory interface, wherein the processor is configured to: determine a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, and send one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies; and wherein the memory is used to store the synchronization grid and the frequency offset value.

[0137] Example 15 includes the apparatus of Example 14, wherein the frequency offset value is 100 kHz or 200 kHz.

[0138] Example 16 includes the apparatus of Example 14, wherein the processor is further configured to determine the set of frequencies according to a formula N*1200 kHz+M*50 kHz, where N=1:2250 or N=0:2250, and M=0:1:2.

[0139] Example 17 includes a method performed at a user equipment (UE), comprising: determining a set of frequencies in a predetermined operating frequency band based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz; detecting one or more synchronization signals for each frequency in the set of frequencies; and performing timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0140] Example 18 includes the method of Example 17, wherein the synchronization grid is an integer multiple of the channel grid.

[0141] Example 19 includes the method of Example 17 or 18, wherein the predetermined operating frequency band is a sub-6 GHz band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0142] Example 20 includes the method of any one of Examples 17 to 19, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0143] Example 21 includes the method of Example 17, wherein the frequency offset value is 100 kHz or 200 kHz.

[0144] Example 22 includes a method performed at a user equipment (UE), comprising: determining a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz; detecting one or more synchronization signals for each frequency in the set of frequencies; and performing timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0145] Example 23 includes the method of Example 22, wherein the frequency offset value is 100 kHz or 200 kHz.

[0146] Example 24 includes the method of Example 22, wherein determining a set of frequencies in the sub-6 GHz frequency band comprises determining the set of frequencies according to a formula N*1200 kHz+M*50 kHz, wherein N=1:2250 or N=0:2250, and M=0:1:2.

[0147] Example 25 includes a method performed at an access node (AN), comprising: determining a set of frequencies in a predetermined operating frequency band based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz, and sending one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0148] Example 26 includes the method of Example 25, wherein the synchronization grid is an integer multiple of the channel grid.

[0149] Example 27 includes the method of Example 25 or 26, wherein the predetermined operating frequency band is a sub-6 GHz band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0150] Example 28 includes the method of any one of Examples 25 to 27, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0151] Example 29 includes the method of Example 25, wherein the frequency offset value is 100 kHz or 200 kHz.

[0152] Example 30 includes a method performed at an access node (AN), comprising: determining a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz; and sending one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0153] Example 31 includes the method of Example 30, wherein the frequency offset value is 100 kHz or 200 kHz.

[0154] Example 32 includes the method of Example 30, wherein determining a set of frequencies in the sub-6 GHz frequency band comprises determining the set of frequencies according to a formula N*1200 kHz+M*50 kHz, wherein N=1:2250 or N=0:2250, and M=0:1:2.

[0155] Example 33 includes an apparatus for a user equipment (UE), comprising: a component for determining a set of frequencies in a predetermined operating frequency band based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz; a component for detecting one or more synchronization signals for each frequency in the set of frequencies; and a component for performing timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0156] Example 34 includes the apparatus of Example 33, wherein the synchronization grid is an integer multiple of the channel grid.

[0157] Example 35 includes the apparatus of Example 33 or 34, wherein the predetermined operating frequency band is a sub-6 GHz band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0158] Example 36 includes the apparatus of any one of Examples 33 to 35, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0159] Example 37 includes the apparatus of Example 33, wherein the frequency offset value is 100 kHz or 200 kHz.

[0160] Example 38 includes an apparatus for a user equipment (UE), comprising: a component for determining a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz; a component for detecting one or more synchronization signals for each frequency in the set of frequencies; and a component for performing timing or frequency synchronization with an access node (AN) based on the detected one or more synchronization signals.

[0161] Example 39 includes the apparatus of Example 38, wherein the frequency offset value is 100 kHz or 200 kHz.

[0162] Example 40 includes the apparatus of Example 38, wherein the component for determining a set of frequencies in a frequency band below 6 GHz includes a component for determining the set of frequencies according to a formula N*1200 kHz+M*50 kHz, wherein N=1:2250 or N=0:2250, and M=0:1:2.

[0163] Example 41 includes an apparatus for an access node (AN), comprising: a component for determining a set of frequencies in a predetermined operating frequency band based on a synchronization grid and a frequency offset value greater than or equal to 50 kHz, and a component for sending one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0164] Example 42 includes the apparatus of Example 41, wherein the synchronization grid is an integer multiple of the channel grid.

[0165] Example 43 includes the apparatus of Example 41 or 42, wherein the predetermined operating frequency band is a sub-6 GHz band and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz.

[0166] Example 44 includes the apparatus of any one of Examples 41 to 43, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in a predetermined operating frequency band to accommodate the synchronization signal.

[0167] Example 45 includes the apparatus of Example 41, wherein the frequency offset value is 100 kHz or 200 kHz.

[0168] Example 46 includes an apparatus for an access node (AN), comprising: determining a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz; and sending one or more synchronization signals to a user equipment (UE) at one or more frequencies in the set of frequencies.

[0169] Example 47 includes the apparatus of Example 46, wherein the frequency offset value is 100 kHz or 200 kHz.

[0170] Example 48 includes the apparatus of Example 46, wherein the component for determining a set of frequencies in a frequency band below 6 GHz includes a component for determining the set of frequencies according to the formula N*1200 kHz+M*50 kHz, wherein N=1:2250 or N=0:2250, and M=0:1:2.

[0171] Example 49 includes a computer-readable medium having instructions stored thereon, which, when executed by a processor of a user equipment (UE), causes the processor to perform a method as in any one of Examples 17 to 24.

[0172] Example 50 includes a computer-readable medium having instructions stored thereon, which, when executed by a processor of an access node (AN), causes the processor to perform a method as in any one of Examples 25 to 32.

[0173] Example 51 comprises a user equipment (UE) as described and shown in the specification.

[0174] Example 52 comprises an access node (AN) as described and illustrated in the specification.

[0175] Example 53 includes a method performed at a user equipment (UE) as described and shown in the specification.

[0176] Example 54 includes a method performed at an access node (AN) as described and illustrated in the specification.

[0177] Although certain embodiments are illustrated and described herein for descriptive purposes, various alternative and / or equivalent embodiments or implementations planned to achieve the same purpose may replace the embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptation or variation of the embodiments discussed herein. Therefore, it is readily understood that the embodiments described herein are limited only by the appended claims and their equivalents.

Claims

1. An apparatus comprising a memory coupled to a processor, the processor being configured to: detecting one or more synchronization signals for a set of frequencies, wherein the set of frequencies in a predetermined operating frequency band is based on a synchronization grid and a frequency offset value, wherein the frequency offset value is 50 kHz or greater, and wherein the predetermined operating frequency band is a sub-6 GHz frequency band, and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz, or 1500 kHz, and A timing or frequency synchronization with the access node AN is performed based on the detected synchronization signal or signals.

2. The apparatus of claim 1, wherein the synchronization grid is an integer multiple of the channel grid.

3. The apparatus according to any one of claims 1 to 2, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in the predetermined working frequency band to accommodate a synchronization signal. The apparatus according to claim 1 , wherein the frequency offset value is 100 kHz or 200 kHz.

5. A device comprising: Memory; and a processor, configured to access the memory through a memory interface, Wherein, the processor is configured to: detecting one or more synchronization signals for each frequency in a set of frequencies, wherein the set of frequencies in the sub-6 GHz frequency band is based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, and A timing or frequency synchronization with the access node AN is performed based on the detected synchronization signal or signals. The apparatus according to claim 5 , wherein the frequency offset value is 100 kHz or 200 kHz. 7 . The apparatus according to claim 5 , wherein the processor is further configured to determine the set of frequencies according to a formula: N*1200 kHz+M*50 kHz, where M=1, 3, 5.

8. An apparatus comprising a memory coupled to a processor, the processor being configured to: determining a set of frequencies in a predetermined operating frequency band based on the synchronization grid and the frequency offset value, and transmitting one or more synchronization signals at one or more frequencies in the set of frequencies, The predetermined operating frequency band is a frequency band below 6 GHz, and the synchronization grid is 1200 kHz, 1300 kHz, 1400 kHz or 1500 kHz.

9. The apparatus of claim 8, wherein the synchronization grid is an integer multiple of the channel grid.

10. The apparatus according to any one of claims 8 to 9, wherein the synchronization grid is predefined as a maximum frequency value that allows a minimum bandwidth channel in the predetermined working frequency band to accommodate a synchronization signal. The apparatus according to claim 8 , wherein the frequency offset value is 100 kHz or 200 kHz.

12. An apparatus comprising: Memory; and a processor, configured to access the memory through a memory interface, Wherein, the processor is configured to: determining a set of frequencies in a frequency band below 6 GHz based on a synchronization grid of 1200 kHz and a frequency offset value greater than or equal to 50 kHz, and One or more synchronization signals are sent at one or more frequencies in the set of frequencies for transmission to a user equipment UE. The apparatus according to claim 12 , wherein the frequency offset value is 100 kHz or 200 kHz.

14. The apparatus of claim 12, wherein the processor is further configured to determine the set of frequencies according to a formula: N*1200 kHz+M*50 kHz, where M=1, 3, 5.

15. A computer readable medium storing instructions, which, when executed by a processor of a user equipment (UE), causes the processor to: A set of frequencies in a predetermined working frequency band is determined according to the formula N*1200kHz+M*50kHz, where N is an integer, M=1, 3, 5; detecting one or more synchronization signals for each frequency in the set of frequencies; and A timing or frequency synchronization with the access node AN is performed based on the detected synchronization signal or signals.

16. A computer-readable medium storing instructions which, when executed by a processor of an access node AN, cause the processor to: Sending one or more synchronization signals at one or more frequencies in the set of frequencies for transmission to a user equipment UE, wherein the set of frequencies in the sub-6 GHz frequency band is based on a synchronization raster and a frequency offset value greater than or equal to 50 kHz; and The synchronization grid is 1200kHz, 1300kHz, 1400kHz or 1500kHz.

17. The computer-readable medium of claim 16, wherein the instructions, when executed by the processor of the AN, cause the processor to further: The set of frequencies is determined according to the formula N*1200kHz+M*50kHz, where M=1,3,5.

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