A wiring process for a multi-layer printed circuit board

Abstract

The present invention discloses a wiring process for a multi-layer printed circuit board, which relates to the technical field of electronic circuit board manufacturing. The method includes: obtaining the objectives and preset parameter conditions for wiring the multi-layer printed circuit board; based on the objectives and preset parameter conditions for wiring the multi-layer printed circuit board, calculating the target connection method using a circuit board wiring model; coating a photoresist on the inner copper foil of the intermediate layer substrate, and transferring the circuit pattern to the copper foil through exposure and development processes according to the target path of the wiring, the target layer selection, the target via position, and the target component position; using a drilling machine to drill holes at specified positions; forming a conductive layer on the hole walls of the holes through an electroplating process; and repeating the manufacturing process of the inner layer of the intermediate layer substrate on the outer copper foil of the intermediate layer substrate according to the target path of the wiring, the target layer selection, the target via position, and the target component position to form an outer layer circuit pattern. This application improves the efficiency of the wiring process for the printed circuit board.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuit board manufacturing, and more particularly, to a wiring process for multilayer printed circuit boards. Background Art

[0002] With the rapid development of electronic technology and the increasing development of integrated circuit design and manufacturing levels, the functions of printed circuit boards have become increasingly enhanced, and the number of stacked layers has increased day by day. In the prior art, circuit design of printed circuit boards is usually carried out by technicians according to wiring objectives, thereby determining the wiring process of printed circuit boards. However, this method has the technical problem of low efficiency of manual wiring.

[0003] For the above problems, no effective solution has been proposed yet. Summary of the Invention

[0004] An embodiment of the present application provides a wiring process for multilayer printed circuit boards to solve the above technical problems.

[0005] The present application provides a wiring process for multilayer printed circuit boards, including:

[0006] Obtaining the objectives and preset parameter conditions for wiring of multilayer printed circuit boards;

[0007] Based on the objectives and the preset parameter conditions for wiring of the multilayer printed circuit boards, calculating a target connection method using a circuit board wiring model; wherein, the circuit board wiring model is trained and optimized based on a machine learning algorithm; the target connection method includes a target path for wiring, target layer selection, target via position, and target component position;

[0008] Cutting a copper foil into an intermediate layer substrate with a preset processing size;

[0009] Coating a photoresist on the inner layer copper foil of the intermediate layer substrate, and transferring a circuit pattern to the copper foil through exposure and development processes according to the target path for wiring, the target layer selection, the target via position, and the target component position; removing the redundant copper foil through an etching process to form an inner layer circuit pattern;

[0010] Stacking the inner layer circuit patterns and insulating layers alternately, and laminating the inner layer circuit patterns and the insulating layers into one body through a high-temperature and high-pressure process; using a drilling machine to drill holes at designated positions;

[0011] Forming a conductive layer on the hole wall of the hole through an electroplating process to achieve electrical connection between different layers;

[0012] Repeat the manufacturing process of the inner layer of the intermediate layer substrate on the outer copper foil of the intermediate layer substrate according to the target path of the wiring, the target layer selection, the target via position, and the target component position to form an outer circuit pattern.

[0013] Further, the targets of the multi-layer printed circuit board wiring include one or more of the following: wiring density target, signal integrity target, electromagnetic compatibility target, power consumption target, noise target, component distance target, thermal management target, cost target, mechanical stability target, electrical safety target, maintainability target, and transmission target; wherein, the transmission target includes that the wiring design meets the preset impedance matching and transmission line requirements;

[0014] The preset parameter conditions include the signal line length, wiring width, wiring pitch, interlayer insulation thickness, and the diameter and depth of the micro-via; wherein, the signal lines include data signal lines and clock signal lines, and the data signal lines include single-ended signal lines or differential signal lines.

[0015] Further, the target component positions include the positions of special components, noise components, noise sub-modules, high-voltage components, and low-voltage components; wherein, the special components include large-scale ICs, high-power transistors, and signal sources; the noise components include clock generators and crystal oscillators; the noise sub-modules include high-current circuits and switching circuits.

[0016] Further, the component distance target includes: the positions of the noise components meet the first spacing condition; the positions of the noise sub-modules meet the second spacing condition; the width of the electrical isolation band between the high-voltage components and the low-voltage components is greater than a preset width threshold;

[0017] Wherein, the first spacing condition includes that the distance between the noise component and the clock input terminal of the central processing unit is greater than a first preset distance, and the distance between the noise component and the high-speed signal circuit is greater than a second preset distance; the second spacing condition includes that the distance between the noise sub-module and the high-speed signal circuit is greater than a third preset distance; the high-speed signal circuit includes a logic control circuit and a storage circuit.

[0018] Further, the steps of constructing, training, and optimizing the circuit board wiring model include:

[0019] Collect the circuit board wiring data in various wiring cases, and create a multi-cross tree data structure of wiring information according to the circuit board wiring data; wherein, the circuit board wiring data includes wiring objectives, parameter conditions, paths, layer selections, via positions, and component positions; the nodes in the multi-cross tree structure of wiring information include decision points, connection points, and branch points; the decision points correspond to the wiring objectives; the branch points correspond to the parameter conditions; the connection points correspond to the paths, the layer selections, the via positions, and the component positions;

[0020] Use the particle swarm algorithm to update each node in the multi-cross tree data structure of wiring information to obtain an optimized multi-cross tree data structure;

[0021] Build a machine learning model based on the optimized multi-cross tree data structure;

[0022] Use the machine learning algorithm to train and optimize the constructed machine learning model.

[0023] Further, the use of the particle swarm algorithm to update each node in the multi-cross tree data structure of wiring information to obtain an optimized multi-cross tree data structure includes:

[0024] Set initial parameters; wherein, the initial parameters include population size, inertia weight, learning factor, number of iterations, maximum speed value, and minimum speed value;

[0025] Based on the decision points, connection points, and branch points included in the multi-cross tree structure of wiring information, determine the initial position vector set;

[0026] Randomly assign a position vector to each particle according to the initial position vector set; and randomly assign a velocity vector to each particle; wherein, the position vector represents the current solution, and the velocity vector represents the trend and amplitude of the particle movement;

[0027] Evaluate the quality of the position vector and velocity vector of each particle according to the fitness function of each particle;

[0028] Based on the evaluation results of the quality of the position vector and velocity vector of each particle, update the individual optimal position and global optimal position of the particle until the number of iterations is reached;

[0029] Update each node in the multi-cross tree data structure of wiring information according to the individual optimal position and global optimal position of the particle after the iteration is completed to obtain the optimized multi-cross tree data structure.

[0030] Further, the machine learning algorithm includes a standard LM algorithm and a long short-term memory algorithm; the machine learning model is constructed based on the optimized multi-cross tree data structure; the constructed machine learning model is trained and optimized using the machine learning algorithm, including:

[0031] Based on the optimized multi-cross tree data structure, a long short-term memory network model is constructed using a sequential model; wherein, the long short-term memory network model includes a vector embedding layer, a bidirectional LSTM layer, and a fully connected layer;

[0032] The model parameters of the constructed long short-term memory network model are corrected using the standard LM algorithm to obtain the fitting feature quantity of the model parameters;

[0033] According to the optimized multi-cross tree data structure, the corrected long short-term memory network model is trained and optimized until the fitting feature quantity of the model parameters satisfies the cross-entropy loss condition;

[0034] The corrected long short-term memory network model after training and optimization is determined as the circuit board wiring model.

[0035] Further, the circuit board wiring model is integrated into a multi-layer printed circuit board design software to enable the multi-layer printed circuit board design software to automatically assist designers in making wiring decisions.

[0036] Further, the top layer of the multi-layer printed circuit board is a power layer; the bottom layer of the multi-layer printed circuit board is a ground layer; both the top layer and the bottom layer use negative films; the power layer is partitioned and isolated using partition lines, and the line width of the partition lines is between 20 and 70 mil.

[0037] Further, a drilling machine is used to drill holes at specified positions, including: applying micro-hole technology and blind buried hole process to drill holes at the specified positions.

[0038] Based on the embodiments provided in this application, obtain the objectives and preset parameter conditions for multi-layer printed circuit board wiring; based on the objectives and preset parameter conditions for multi-layer printed circuit board wiring, use a circuit board wiring model to calculate the target connection method; wherein, the circuit board wiring model is trained and optimized based on machine learning algorithms; the target connection method includes the target path of the wiring, target layer selection, target via position, and target component position; cut the copper foil into an intermediate layer substrate with a preset processing size; coat a photoresist on the inner copper foil of the intermediate layer substrate, and transfer the circuit pattern to the copper foil through exposure and development processes according to the target path of the wiring, target layer selection, target via position, and target component position; remove the redundant copper foil through an etching process to form an inner layer circuit pattern; stack the inner layer circuit pattern and the insulating layer alternately, and laminate the inner layer circuit pattern and the insulating layer into one body through a high-temperature and high-pressure process; use a drilling machine to drill holes at designated positions; form a conductive layer on the hole wall of the holes through an electroplating process to achieve electrical connection between different layers; repeat the manufacturing process of the inner layer of the intermediate layer substrate on the outer copper foil of the intermediate layer substrate according to the target path of the wiring, target layer selection, target via position, and target component position to form an outer layer circuit pattern. Thus, it realizes the automatic design of multi-layer printed circuit boards according to the wiring objectives and preset parameter conditions, thereby improving the efficiency of the wiring process of printed circuit boards.

[0039] Specifically, it has the following beneficial effects: clarifying the wiring objectives and preset parameters helps to formulate a reasonable design plan and ensure the feasibility and effectiveness of the design; optimizing the wiring model through machine learning algorithms can quickly calculate the optimal connection method, including the wiring path, layer selection, via position, and component position, thereby improving the design efficiency and accuracy; the coating of the photoresist provides a basis for the subsequent transfer of the circuit pattern and ensures the clarity and precision of the pattern; through precise exposure and development processes, it ensures the fidelity of the circuit pattern, reduces errors in the subsequent etching process, and improves the reliability of the circuit; the etching process can effectively remove unnecessary copper foil to form a clear circuit pattern and ensure the functionality and performance of the circuit; the high-temperature and high-pressure process can ensure good adhesion between layers and improve the mechanical strength and electrical performance of the circuit board; the precise drilling position ensures the reliability of subsequent electrical connections and reduces circuit failures caused by improper hole positions; the electroplating process can effectively achieve interlayer connection, ensure smooth signal transmission, and improve the overall performance of the circuit board; by repeating the manufacturing process, it ensures the consistency and reliability of the outer layer circuit pattern and the inner layer circuit pattern, and finally forms a complete multi-layer printed circuit board. Description of the Drawings

[0040] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, form a part of this application, and the illustrative embodiments and descriptions thereof are used to explain this application and do not constitute an improper limitation of this application. In the drawings:

[0041] Figure 1 It is a flowchart of an optional multi - layer printed circuit board wiring process according to an embodiment of the present application;

[0042] Figure 2 It is a flowchart of another optional multi - layer printed circuit board wiring process according to an embodiment of the present application.

[0043] The realization of the object of the present invention, functional features and advantages will be further described in conjunction with embodiments with reference to the accompanying drawings. Specific Embodiments

[0044] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application.

[0045] Optionally, as Figure 1 shown, the present application provides a multi - layer printed circuit board wiring process, including:

[0046] S101, obtaining the target and preset parameter conditions for multi - layer printed circuit board wiring;

[0047] S102, based on the target and preset parameter conditions for multi - layer printed circuit board wiring, using a circuit board wiring model to calculate the target connection method; wherein, the circuit board wiring model is trained and optimized based on a machine learning algorithm; the target connection method includes the target path of wiring, target layer selection, target via position, and target component position;

[0048] S103, cutting the copper foil into an intermediate layer substrate with a preset processing size;

[0049] S104, coating a photoresist on the inner - layer copper foil of the intermediate layer substrate, and transferring the circuit pattern to the copper foil through exposure and development processes according to the target path of wiring, target layer selection, target via position, and target component position; removing the redundant copper foil through an etching process to form an inner - layer circuit pattern;

[0050] S105, alternately stacking the inner - layer circuit pattern and the insulating layer, and laminating the inner - layer circuit pattern and the insulating layer into one body through a high - temperature and high - pressure process; using a drilling machine to drill holes at designated positions;

[0051] S106, forming a conductive layer on the hole wall of the hole through an electroplating process to achieve electrical connection between different layers;

[0052] S107, repeating the production process of the inner layer of the intermediate layer substrate on the outer - layer copper foil of the intermediate layer substrate according to the target path of wiring, target layer selection, target via position, and target component position to form an outer - layer circuit pattern.

[0053] Based on the embodiments provided in this application, obtain the objectives and preset parameter conditions for multi-layer printed circuit board wiring; based on the objectives and preset parameter conditions for multi-layer printed circuit board wiring, use a circuit board wiring model to calculate the target connection method; wherein, the circuit board wiring model is trained and optimized based on machine learning algorithms; the target connection method includes the target path of the wiring, the target layer selection, the target via position, and the target component position; cut the copper foil into an intermediate layer substrate with a preset processing size; coat a photoresist on the inner copper foil of the intermediate layer substrate, and transfer the circuit pattern to the copper foil through exposure and development processes according to the target path of the wiring, the target layer selection, the target via position, and the target component position; remove the redundant copper foil through an etching process to form an inner layer circuit pattern; stack the inner layer circuit pattern and the insulating layer alternately, and laminate the inner layer circuit pattern and the insulating layer into one body through a high-temperature and high-pressure process; use a drilling machine to drill holes at specified positions; form a conductive layer on the hole wall of the holes through an electroplating process to achieve electrical connection between different layers; repeat the manufacturing process of the inner layer of the intermediate layer substrate on the outer copper foil of the intermediate layer substrate according to the target path of the wiring, the target layer selection, the target via position, and the target component position to form an outer layer circuit pattern. Thus, it realizes the automatic design of multi-layer printed circuit boards according to the wiring objectives and preset parameter conditions, thereby improving the efficiency of the wiring process of printed circuit boards.

[0054] Specifically, it has the following beneficial effects: clarifying the wiring objectives and preset parameters helps to formulate a reasonable design plan and ensure the feasibility and effectiveness of the design; optimizing the wiring model through machine learning algorithms can quickly calculate the optimal connection method, including the wiring path, layer selection, via position, and component position, thereby improving the design efficiency and accuracy; the coating of the photoresist provides a basis for the subsequent transfer of the circuit pattern and ensures the clarity and precision of the pattern; through precise exposure and development processes, it ensures the fidelity of the circuit pattern, reduces errors in the subsequent etching process, and improves the reliability of the circuit; the etching process can effectively remove unnecessary copper foil to form a clear circuit pattern and ensure the functionality and performance of the circuit; the high-temperature and high-pressure process can ensure good adhesion between layers, improve the mechanical strength and electrical performance of the circuit board; the precise drilling position ensures the reliability of subsequent electrical connections and reduces circuit failures caused by improper hole positions; the electroplating process can effectively achieve interlayer connection, ensure smooth signal transmission, and improve the overall performance of the circuit board; by repeating the manufacturing process, it ensures the consistency and reliability of the outer layer circuit pattern and the inner layer circuit pattern, and finally forms a complete multi-layer printed circuit board.

[0055] Further, the goals of multi-layer printed circuit board wiring include one or more of the following: wiring density goal, signal integrity goal, electromagnetic compatibility goal, power consumption goal, noise goal, component distance goal, thermal management goal, cost goal, mechanical stability goal, electrical safety goal, maintainability goal, and transmission goal; among them, the transmission goal includes that the wiring design meets the preset impedance matching and transmission line requirements;

[0056] The preset parameter conditions include the length of the signal line, the wiring width, the wiring spacing, the interlayer insulation thickness, and the diameter and depth of the micro-via; among them, the signal lines include data signal lines and clock signal lines, and the data signal lines include single-ended signal lines or differential signal lines.

[0057] Further, the target component positions include the positions of special components, noise components, noise sub-modules, high-voltage components, and low-voltage components; among them, the special components include large-scale ICs, high-power transistors, and signal sources; the noise components include clock generators and crystal oscillators; the noise sub-modules include high-current circuits and switching circuits.

[0058] Further, the component distance goal includes: the position of the noise component satisfies the first spacing condition; the position of the noise sub-module satisfies the second spacing condition; the width of the electrical isolation band between the high-voltage component and the low-voltage component is greater than the preset width threshold;

[0059] Among them, the first spacing condition includes that the distance between the noise component and the clock input terminal of the central processing unit is greater than the first preset distance, and the distance between the noise component and the high-speed signal circuit is greater than the second preset distance; the second spacing condition includes that the distance between the noise sub-module and the high-speed signal circuit is greater than the third preset distance; the high-speed signal circuit includes a logic control circuit and a storage circuit.

[0060] Further, the steps of constructing, training, and optimizing the circuit board wiring model include:

[0061] Collect the circuit board wiring data in various wiring cases, and create a multi-cross-tree data structure of wiring information according to the circuit board wiring data; among them, the circuit board wiring data includes wiring goals, parameter conditions, paths, layer selections, via positions, and component positions; the nodes in the multi-cross-tree structure of wiring information include decision points, connection points, and branch points; the decision points correspond to the wiring goals; the branch points correspond to the parameter conditions; the connection points correspond to the paths, layer selections, via positions, and component positions;

[0062] Use the particle swarm optimization algorithm to update each node in the multi-cross-tree data structure of wiring information to obtain an optimized multi-cross-tree data structure;

[0063] Build a machine learning model based on the optimized multi-cross-tree data structure;

[0064] The constructed machine learning model is trained and optimized using machine learning algorithms.

[0065] Furthermore, the particle swarm algorithm is used to update each node in the multi-cross tree data structure of routing information to obtain an optimized multi-cross tree data structure, including:

[0066] Set initial parameters; among them, the initial parameters include population size, inertia weight, learning factors, number of iterations, maximum speed value, and minimum speed value;

[0067] Based on the decision points, connection points, and branch points included in the multi-cross tree structure of routing information, determine the initial position vector set;

[0068] Randomly assign a position vector to each particle according to the initial position vector set; and randomly assign a velocity vector to each particle; where the position vector represents the current solution, and the velocity vector represents the trend and amplitude of particle movement;

[0069] Update the position vector and velocity vector of each particle based on the following formula;

[0070]

[0071]

[0072] Among them, is the velocity vector of particle i at time t; is the position vector of particle i at time t; is the individual optimal position of particle i; is the global optimal position; is the inertia weight; , are both learning factors; is a random number; is the velocity vector of particle i at time t + 1; The position vector of particle i at time t + 1;

[0073] Evaluate the quality of the position vector and velocity vector of each particle according to the fitness function of each particle;

[0074]

[0075] Among them, is the fitness function of each particle; the two-dimensional coordinates of the j-th point of a certain particle are ; the two-dimensional coordinates of the (j + 1)-th point of a certain particle are ;

[0076] Based on the evaluation results of the mass of the position vector and velocity vector of each particle, update the individual optimal position and global optimal position of the particle until the number of iterations is reached;

[0077] According to the individual optimal position and global optimal position of the particle after the iteration is completed, update each node in the multi-cross tree data structure of the wiring information to obtain an optimized multi-cross tree data structure.

[0078] Based on the embodiments provided in the present application, the particle swarm algorithm can effectively optimize the multi-cross tree data structure of the wiring information, improving the efficiency and accuracy of the circuit board wiring. This method combines the advantages of swarm intelligence and adaptive learning, and can find the optimal solution in a complex wiring environment, thereby improving the overall performance and reliability of the circuit design.

[0079] The machine learning algorithm includes the standard LM algorithm and the long short-term memory algorithm; a machine learning model is constructed based on the optimized multi-cross tree data structure;

[0080] Optionally, as Figure 2 shown, use the machine learning algorithm to train and optimize the constructed machine learning model, including:

[0081] S201, based on the optimized multi-cross tree data structure, use the sequential model to construct a long short-term memory network model; among them, the long short-term memory network model includes a vector embedding layer, a bidirectional LSTM layer, and a fully connected layer;

[0082] S202, use the standard LM algorithm to correct the model parameters of the constructed long short-term memory network model to obtain the fitting feature quantity of the model parameters;

[0083] S203, according to the optimized multi-cross tree data structure, train and optimize the corrected long short-term memory network model until the fitting feature quantity of the model parameters meets the cross-entropy loss condition;

[0084] S204, determine the corrected long short-term memory network model after the training and optimization is completed as the circuit board wiring model.

[0085]

[0086] Among them, is the fitting feature quantity of the model parameters; is the model parameter of the long short-term memory network model; is the Jacobian matrix of the model parameters; is the transpose of the Jacobian matrix of the model parameters; is the jitter term of the standard LM algorithm; is the inverse matrix of the Jacobian matrix of the model parameters.

[0087] Based on the embodiments provided in this application, by using a sequential model, time series data can be effectively processed, which is particularly important for the time-dependence problem in circuit board wiring. The combination of the vector embedding layer, the bidirectional LSTM layer, and the fully connected layer helps the model capture complex spatio-temporal features and improve the accuracy of wiring decisions; the LM algorithm is an effective non-linear least squares optimization algorithm used to quickly correct model parameters. Through this method, a more accurate model parameter fitting can be obtained; through continuous training and optimization, the model can better adapt to the structure and characteristics of the wiring data. This iterative process ensures that the fitting feature quantity of the model parameters satisfies the cross-entropy loss condition, thereby improving the prediction performance and generalization ability of the model; the finally determined model can serve as an effective tool for circuit board wiring, providing accurate wiring paths, layer selection, via positions, and component position predictions. This helps automate and optimize the circuit board design process, improving design efficiency and the quality of the final product.

[0088] Further, integrate the circuit board wiring model into the multilayer printed circuit board design software to enable the multilayer printed circuit board design software to automatically assist designers in making wiring decisions.

[0089] Further, the top layer of the multilayer printed circuit board is the power layer; the bottom layer of the multilayer printed circuit board is the ground layer; both the top layer and the bottom layer use negative films; the power layer uses partition lines for partition isolation, and the line width of the partition lines is between 20 and 70 mil.

[0090] Further, use a drilling machine to drill holes at specified positions, including: applying micro-hole technology and blind buried hole process to drill holes at specified positions.

[0091] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structural or equivalent process transformations made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, are similarly included in the patent protection scope of the present invention.

Claims

1. A multi-layer printed circuit board wiring process, characterized in that, Including: Obtaining the objectives and preset parameter conditions for the routing of a multi-layer printed circuit board; Based on the objectives and the preset parameter conditions for the routing of the multi-layer printed circuit board, using a circuit board routing model to calculate the target connection method; wherein, the circuit board routing model is trained and optimized based on a machine learning algorithm; the target connection method includes the target path of the routing, the target layer selection, the target via position, and the target component position; Cutting the copper foil into an intermediate layer substrate with a preset processing size; Coating a photoresist on the inner copper foil of the intermediate layer substrate, and transferring the circuit pattern to the copper foil through exposure and development processes according to the target path of the routing, the target layer selection, the target via position, and the target component position; removing the redundant copper foil through an etching process to form an inner layer circuit pattern; Stacking the inner layer circuit patterns and the insulating layers alternately, and laminating the inner layer circuit patterns and the insulating layers into one body through a high-temperature and high-pressure process; using a drilling machine to drill holes at specified positions; Forming a conductive layer on the hole wall of the hole through an electroplating process to achieve electrical connection between different layers; Repeating the manufacturing process of the inner layer of the intermediate layer substrate on the outer copper foil of the intermediate layer substrate according to the target path of the routing, the target layer selection, the target via position, and the target component position to form an outer layer circuit pattern; The steps for constructing, training, and optimizing the circuit board routing model include: collecting the circuit board routing data in various routing cases, and creating a multi-cross tree data structure of routing information based on the circuit board routing data; wherein, the circuit board routing data includes routing objectives, parameter conditions, paths, layer selections, via positions, and component positions; the nodes in the multi-cross tree structure of routing information include decision points, connection points, and branch points; the decision points correspond to the routing objectives; the branch points correspond to the parameter conditions; the connection points correspond to the paths, the layer selections, the via positions, and the component positions; Using a particle swarm algorithm to update each node in the multi-cross tree data structure of routing information to obtain an optimized multi-cross tree data structure; Constructing a machine learning model based on the optimized multi-cross tree data structure; Using the machine learning algorithm to train and optimize the constructed machine learning model.

2. The multi-layer printed circuit board routing process according to claim 1, wherein The objectives of the multi-layer printed circuit board routing include one or more of the following: routing density objective, signal integrity objective, electromagnetic compatibility objective, power consumption objective, noise objective, component distance objective, thermal management objective, cost objective, mechanical stability objective, electrical safety objective, maintainability objective, and transmission objective; wherein, the transmission objective includes that the routing design meets the preset impedance matching and transmission line requirements; The preset parameter conditions include the signal line length, routing width, routing spacing, interlayer insulation thickness, and the diameter and depth of the micro-holes; wherein, the signal lines include data signal lines and clock signal lines, and the data signal lines include single-ended signal lines or differential signal lines.

3. The multi-layer printed circuit board wiring process according to claim 2, wherein the target component positions include the positions of special components, noise components, noise component modules, high-voltage components, and low-voltage components; among them, the special components include large-scale ICs, high-power transistors, and signal sources; the noise components include clock generators and crystal oscillators; the noise component modules include high-current circuits and switching circuits.

4. The multi-layer printed circuit board wiring process according to claim 3, wherein the component distance targets include: the positions of the noise components satisfy the first spacing condition; the positions of the noise component modules satisfy the second spacing condition; the width of the electrical isolation band between the high-voltage components and the low-voltage components is greater than a preset width threshold; wherein, the first spacing condition includes that the distance between the noise component and the clock input terminal of the central processing unit is greater than a first preset distance, and the distance between the noise component and the high-speed signal circuit is greater than a second preset distance; the second spacing condition includes that the distance between the noise component module and the high-speed signal circuit is greater than a third preset distance; the high-speed signal circuit includes a logic control circuit and a storage circuit.

5. The multi-layer printed circuit board wiring process according to claim 1, wherein The use of the particle swarm algorithm to update each node in the wiring information multi-cross tree data structure to obtain an optimized multi-cross tree data structure includes: setting initial parameters; wherein, the initial parameters include population size, inertia weight, learning factor, number of iterations, maximum speed value, and minimum speed value; determining an initial position vector set based on the decision points, connection points, and branch points included in the wiring information multi-cross tree structure; randomly assigning a position vector to each particle according to the initial position vector set; and randomly assigning a speed vector to each particle; wherein, the position vector represents the current solution, and the speed vector represents the trend and amplitude of the particle movement.

6. The multi-layer printed circuit board wiring process according to claim 5, wherein evaluating the quality of the position vector and speed vector of each particle according to the fitness function of each particle; updating the individual optimal position and global optimal position of the particle based on the evaluation results of the quality of the position vector and speed vector of each particle until the number of iterations is reached; updating each node in the wiring information multi-cross tree data structure according to the individual optimal position and global optimal position of the particle after the iteration is completed to obtain the optimized multi-cross tree data structure.

7. The multi-layer printed circuit board wiring process according to claim 6, wherein The machine learning algorithm includes a standard LM algorithm and a long short-term memory algorithm; the machine learning model is constructed based on the optimized multi-cross tree data structure; using the machine learning algorithm to train and optimize the constructed machine learning model, including: constructing a long short-term memory network model based on the optimized multi-cross tree data structure using a sequential model; wherein, the long short-term memory network model includes a vector embedding layer, a bidirectional LSTM layer, and a fully connected layer; correcting the model parameters of the constructed long short-term memory network model using the standard LM algorithm to obtain the fitting feature quantity of the model parameters.

8. The multi-layer printed circuit board wiring process according to claim 7, wherein, The machine learning algorithms include the standard LM algorithm and the long short-term memory algorithm; the machine learning model is constructed based on the optimized multi-cross tree data structure; Training and optimizing the constructed machine learning model using the machine learning algorithms further includes: According to the optimized multi-cross tree data structure, training and optimizing the corrected long short-term memory network model until the fitting feature quantity of the model parameters meets the cross-entropy loss condition; Determining the corrected long short-term memory network model after the training and optimization is completed as the circuit board wiring model.

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