Stacked integrated micro-display device and preparation method thereof

Abstract

The invention discloses a stacked and integrated micro-display device and a preparation method thereof, and relates to the technical field of semiconductors. The micro display device comprises a driving wafer and a plurality of display device layers arranged on the driving wafer, any display device layer comprises a sub-pixel, and the sub-pixel is electrically connected with a first type of electrode contact in the driving wafer through a transparent conductive layer at the top of the display device layer; at least one display device layer further comprises an electrode conduction structure, the electrode conduction structure is conducted with electrode contacts including the first type of electrode contacts in the driving wafer, and the electrode conduction structure comprises a first electrode conduction structure and a second electrode conduction structure which are stacked in the direction away from the driving wafer; the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a stacked integrated micro display device and a preparation method thereof. Background Art

[0002] In the field of microdisplay, in order to achieve colored display, there is a need for multi-color stacking integration.

[0003] In the related technologies, the color stacking scheme is generally prepared by the following process: after pixelation, fill the insulating layer and then flatten it, prepare the through-hole interconnection structure, and complete the preparation of the multi-color display screen after multiple stacking; or, after pixelation, isolate the cathode layer and the anode layer by means of an insulating layer, then fill the insulating layer and flatten it, prepare the through-hole interconnection structure, and complete the preparation of the multi-color display screen after multiple stacking. Among them, the above-mentioned related technologies all need to be connected to the electrode contacts in the driving wafer in the form of through-hole interconnection to achieve addressing display.

[0004] However, with the trend of pixel miniaturization, the aspect ratio of through-hole preparation has gradually increased, resulting in higher processing difficulty and the need to upgrade high-end etching equipment suitable for integrated circuit nanometers, which greatly increases processing costs. In addition, through-holes with large aspect ratios are prone to voids when filling interconnect metals, resulting in poor current transmission, further affecting the optoelectronic performance and reliability of the device. Summary of the invention

[0005] The object of the present invention is to provide a stacked integrated micro display device and a preparation method thereof, which can reduce the influence of through-hole interconnection for electrode conduction on device performance.

[0006] In order to achieve the above-mentioned object of the invention, the present invention proposes the following technical solutions:

[0007] In one aspect, a micro display device is provided, the micro display device comprising a driving wafer, and a multi-layer display device layer disposed on the driving wafer;

[0008] Any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the display device layer;

[0009] At least one of the display device layers also includes an electrode conduction structure, and the electrode conduction structure is conductively connected to the electrode contacts in the driving wafer including the first type of electrode contacts. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

[0010] In a possible implementation, the first electrode conduction structure is a fence-style structure, and the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure;

[0011] The second electrode conductive structure is a through-hole style structure.

[0012] In a possible implementation manner, a metal reinforcement structure is disposed between the first electrode conduction structure and the second electrode conduction structure.

[0013] In a possible implementation manner, the metal reinforcement structure contacts the top and a portion of the sidewall of the second portion structure.

[0014] In a possible implementation manner, the second electrode conduction structure is in contact with a top and a portion of a side wall of the second partial structure.

[0015] In a possible implementation manner, a color compound is disposed inside the first electrode conductive structure.

[0016] In a possible implementation, the top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second partial structure in the first electrode conduction structure is lower than the top height of the color compound.

[0017] In a possible implementation, the second electrode conductive structure is attached to the top and part of the side wall of the color system compound, and is in contact with the top and part of the side wall of the second partial structure;

[0018] or,

[0019] The metal reinforcement structure below the second electrode conductive structure is attached to the top and part of the side wall of the color compound, and is in contact with the top and part of the side wall of the second partial structure.

[0020] In a possible implementation manner, a fence inner reflective layer and a fence inner insulating layer are provided between the first electrode conductive structure and the color system compound.

[0021] In a possible implementation manner, the thickness of the sub-pixel and the color compound is between 0.2 um and 5 um.

[0022] In a possible implementation manner, a surface size of the first electrode conductive structure is smaller than or equal to a surface size of a sub-pixel in the same display device layer.

[0023] In a possible implementation, the first part of the structure includes:

[0024] A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

[0025] In one possible implementation, the outer periphery of the sub-pixel is surrounded by a metal fence structure that is structurally consistent with the first electrode conduction structure, and the bottom of the metal fence structure is connected to the bonding metal layer at the bottom of the sub-pixel and the outer edge of the first ohmic contact layer to surround the sub-pixel, and the top height of the metal fence structure is not higher than the top height of the sub-pixel.

[0026] In a possible implementation manner, a side of the sub-pixel away from the driving wafer is covered with a transparent conductive layer; and a dielectric insulating layer is provided between the top of the metal fence structure and the transparent conductive layer.

[0027] In a possible implementation manner, between the metal fence structure and the sub-pixel, there are a fence inner reflective layer and a fence inner insulating layer.

[0028] In a possible implementation, the angle of the second portion of the structure is between 45 degrees and 135 degrees.

[0029] In a possible implementation manner, the thickness of the second portion of the structure is between 10 nm and 1500 nm.

[0030] In a possible implementation manner, the electrode contact further includes a second type electrode contact, and the electrode conductive structure includes a second type electrode conductive structure conductively connected to the second type electrode contact.

[0031] In a possible implementation, the electrode conduction structure includes a first type of electrode conduction structure that is conductively connected to the first type of electrode contact;

[0032] A metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure in the first type electrode conduction structure;

[0033] The first type electrode conduction structure is electrically connected to the transparent conductive layer through the metal reinforcement structure, and the transparent conductive layer is also in contact with a side of the sub-pixel in the same display device layer away from the driving wafer.

[0034] On the other hand, a method for preparing a micro display device is also provided, the method being used to prepare the micro display device as described in the above aspect, the method comprising:

[0035] Prepare the drive wafer;

[0036] Bonding and integrating multiple display device layers on the driving wafer, and preparing an electrode conduction structure in at least one of the display device layers;

[0037] Among them, any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the current display device layer; the electrode conduction structure is conductive with the electrode contacts in the driving wafer including the first type of electrode contacts, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

[0038] In a possible implementation, bonding and integrating multiple display device layers on the driving wafer, and preparing an electrode conduction structure in at least one of the display device layers, includes:

[0039] For the preparation of the i-th display device layer, the i-th color system compound is bonded and integrated onto a driving wafer or a previous display device layer, and the i-th color system compound is pixelated to form an i-th sub-pixel;

[0040] Prepare a first electrode conduction structure arranged horizontally with the i-th sub-pixel, fill it with an insulating layer and expose the top of the first electrode conduction structure;

[0041] The second electrode conduction structure is prepared on the first electrode conduction structure.

[0042] In a possible implementation, a continuous bonding metal layer and a first ohmic contact layer are provided between the i-th sub-pixel and the driving wafer or the previous display device layer;

[0043] The method of preparing a first electrode conduction structure arranged horizontally with the i-th sub-pixel comprises:

[0044] The bonding metal layer and the first ohmic contact layer are patterned and etched to form the first electrode conduction structure, wherein the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure.

[0045] In a possible implementation, the step of preparing the second electrode conduction structure on the first electrode conduction structure includes:

[0046] Filling the first electrode conductive structure with an insulating layer;

[0047] Through-hole etching and metal backfilling are performed on a region of the insulating layer corresponding to the first electrode conduction structure to form the second electrode conduction structure.

[0048] In a possible implementation manner, before preparing the second electrode conduction structure, the method further includes:

[0049] A transparent conductive layer is prepared on top of the i-th sub-pixel by transparent conductive film deposition.

[0050] In a possible implementation manner, after preparing the transparent conductive layer, the method further includes:

[0051] A metal grid is prepared on the top of the transparent conductive layer and the top of the first electrode conductive structure to form a metal reinforcement structure.

[0052] In a possible implementation manner, before preparing the first electrode conduction structure, the method further includes:

[0053] Retaining an insulating film layer on the side wall of the i-th sub-pixel to form an inner fence insulating layer;

[0054] A reflective layer inside the fence is prepared on the side wall of the insulating layer inside the fence.

[0055] Compared with the prior art, the present invention has the following beneficial effects:

[0056] The micro display device includes a driving wafer and a multi-layer display device layer arranged on the driving wafer; any display device layer includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the display device layer; at least one display device layer also includes an electrode conduction structure, and the electrode conduction structure is conductively connected to the electrode contacts including the first type of electrode contacts in the driving wafer, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer, the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer, and the stacked electrode conduction structure reduces the through-hole depth-to-width ratio, which reduces the processing difficulty of the through-hole process on the one hand, and eliminates the void problem of metal filling of the through-hole on the other hand, thereby avoiding the current transmission difference problem caused by the void. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 is a schematic structural diagram of a micro display device provided in an embodiment of the present application;

[0058] Figure 2 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0059] Figure 3 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0060] Figure 4 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0061] Figure 5 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0062] Figure 6 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0063] Figure 7 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0064] Figure 8 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0065] Fig. 9 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0066] Fig.10is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0067] Fig.11 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0068] Fig.12 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0069] Fig.13 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0070] Fig.14 is a method flow chart of a method for preparing a micro display device provided in an embodiment of the present application;

[0071] Fig.15 is a schematic diagram of a preparation process of an electrode conduction structure provided in an embodiment of the present application;

[0072] Fig.16 is a schematic structural diagram of another micro display device provided in an embodiment of the present application;

[0073] Fig.17 is a schematic diagram of a process for preparing a reflective layer in a fence provided in an embodiment of the present application;

[0074] Fig.18 It is a schematic diagram of a process for preparing a reflective layer inside a fence provided in an embodiment of the present application.

[0075] Reference numerals:

[0076] 100-driving wafer, 110-second type electrode contact, 120-first type electrode contact, 210-first display device layer, 220-first sub-pixel, 230-second display device layer, 240-second sub-pixel, 250-third display device layer, 260-third sub-pixel, 310-first electrode conduction structure, 311-first partial structure, 312-second partial structure, 313-bonding metal layer, 314-first ohmic contact layer, 320-second electrode conduction structure, 330-metal reinforcement structure, 340-color compound, 350-reflective layer inside the fence, 360-insulating layer inside the fence, 370-dielectric insulating layer, 380-metal fence structure, 400-transparent conductive layer. DETAILED DESCRIPTION

[0077] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0078] In the description of the present invention, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0079] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0080] In the embodiments of the present application, the shortcomings of non-aligned bonding metal and stacked devices in through-hole preparation are mainly optimized, and an electrode conduction structure that is interconnected with the drive wafer is prepared by an unconventional through-hole process. In addition to the second electrode conduction structure in the through-hole style, the electrode conduction structure also includes a stacked fence style first electrode conduction structure, thereby greatly reducing the aspect ratio of the through-hole interconnection, reducing the process difficulty of through-hole preparation, and solving the void problem of through-hole interconnection metal filling.

[0081] Next, the device structure proposed in this application is described.

[0082] First, the present application embodiment provides a stacked multi-color micro display device, such as Figure 1 As shown, the micro display device includes:

[0083] A driving wafer 100 and a multi-layer display device layer arranged on the driving wafer 100; any display device layer includes sub-pixels, and the sub-pixels are electrically connected to the first type electrode contacts 120 in the driving wafer 100 through the transparent conductive layer 400 on the top of the display device layer; at least one display device layer also includes an electrode conduction structure, and the electrode conduction structure is conductively connected to the electrode contacts including the first type electrode contacts 120 in the driving wafer 100, and the electrode conduction structure includes: a first electrode conduction structure 310 and a second electrode conduction structure 320 stacked in a direction away from the driving wafer 100, the top height of the first electrode conduction structure 310 is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure 320 is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure 310 and the second electrode conduction structure 320 belong to different levels of insulating layers in the current display device layer.

[0084] In an embodiment of the present application, a micro display device having multiple display device layers is provided, wherein at least one sub-pixel is arranged in each display device layer, and the sub-pixels in different display device layers can be designed to emit light of different wavelengths, thereby realizing a color display, and the sub-pixels in each display device layer are electrically connected to the first type electrode contact 120 of the driving wafer through the transparent conductive layer in the display device layer. Among them, a stacked electrode conduction structure is arranged in at least one display device layer, and this electrode conduction structure includes a first electrode conduction structure 310 and a second electrode conduction structure 320 stacked in a direction away from the driving wafer 100. In this stacked electrode conduction structure, the first electrode conduction structure 310 as a whole is not higher than the height of the sub-pixels in the current display device layer, and at least part of the second electrode conduction structure 320 is higher than or equal to the height of the sub-pixels in the current display device layer. Under the design of this electrode conduction structure, the first electrode conduction structure 310 and the second electrode conduction structure 320 belong to different levels of insulating layers in the current display device layer. In two adjacent display device layers, the sub-pixels in the previous display device layer can be separated from the sub-pixels in the previous display device layer by a certain distance in height, and this distance is related to the height of the insulating layer to which the second electrode conduction structure 320 belongs protruding from the insulating layer to which the first electrode conduction structure 310 belongs.

[0085] Among them, the electrode contact may include a second type electrode contact 110, and accordingly, the electrode conduction structure is actually a second type electrode conduction structure, and this second type electrode conduction structure is conductive with the second type electrode contact 110; the electrode contact may also include a first type electrode contact 120, and accordingly, the electrode conduction structure is actually a first type electrode conduction structure, and this first type electrode conduction structure is conductive with the first type electrode contact 120.

[0086] For example: Figure 1 As shown, the micro display device has three display device layers: a first display device layer 210, a second display device layer 230 and a third display device layer 250, the first display device layer 210 includes a first sub-pixel 220, the second display device layer 230 includes a second sub-pixel 240, the third display device layer 250 includes a third sub-pixel 260, and the driving wafer 100 is provided with a first type electrode contact 120 and a second type electrode contact 110. In both cathode connection and anode connection, stacked electrode conduction structures are used: in the first display device layer 210, a first type of electrode conduction structure for cathode connection with the first sub-pixel 220, and a second type of electrode conduction structure for anode connection with the second sub-pixel 240 and the third sub-pixel 260 are provided; in the second display device layer 230, a first type of electrode conduction structure for cathode connection with the second sub-pixel 240, and a second type of electrode conduction structure for anode connection with the third sub-pixel 260 are provided; in the third display device layer 250, a second type of electrode conduction structure for cathode connection with the third sub-pixel 260 is provided.

[0087] It is understandable that the structure used for conducting with the electrode contacts in the driving wafer 100 in the micro display device can all adopt the above-mentioned stacked electrode conduction structure, or partially adopt the above-mentioned stacked electrode conduction structure and partially adopt other styles of structures, and the present application does not impose any restrictions on this.

[0088] The driver wafer 100 may be an active design that combines one or more of a thin film transistor (TFT), a low temperature polysilicon (LTPS), a CMOS integrated circuit, a high mobility transistor (HEMT), etc. Specifically, the driver wafer 100 is provided with a driver circuit, and the driver circuit is provided with at least one second type electrode contact 110 and at least one first type electrode contact 120.

[0089] Each sub-pixel may include: a bonding metal layer, a first ohmic contact layer, an active layer, and a second ohmic contact layer stacked in a direction away from the driving wafer 100 .

[0090] It can be understood that the first ohmic contact layer and the second ohmic contact layer in the present application can be designed to be a P-type ohmic contact layer and an N-type ohmic contact layer, respectively, or can be designed to be an N-type ohmic contact layer and a P-type ohmic contact layer, respectively.

[0091] Specifically, the sub-pixel is made of compound wafer material. The structure of some compound wafers is as follows. In some practical applications, the film layer of the compound wafer will be more complicated, or there will be cross-use of materials. The material range is not limited. It typically mainly includes P-type material, N-type material, and MQW quantum wells and other functional layers sandwiched between the two:

[0092]

[0093] Each display device layer may be filled with an insulating layer, and the insulating layer material may include a single film layer such as silicon oxide, silicon nitride, aluminum oxide, boron nitride, or a stack of two or more of these materials.

[0094] In one possible implementation, Figure 1 As shown, the first electrode conduction structure 310 is a fence style structure, and the first electrode conduction structure 310 includes: a first part structure 311 arranged along the horizontal direction, and a second part structure 312 surrounding the first part structure 311; the second electrode conduction structure 320 is a through-hole style structure.

[0095] Among them, Figure 2 As shown, the first partial structure 311 may include: a bonding metal layer 313 and a first ohmic contact layer 314 stacked in a direction away from the driving wafer 100. The first partial structure 311 in the first electrode conduction structure 310 is formed by utilizing the bonding structure in the display device layer itself, thereby facilitating the preparation of the first electrode conduction structure 310. For example, the preparation of the first electrode conduction structure 310 may be formed by reverse sputtering during the patterning of the bonding metal layer 313 and the first ohmic contact layer 314 in the display device layer, thereby facilitating the preparation of the electrode conduction structure.

[0096] The angle of the second structure portion 312 is between 45 degrees and 135 degrees, and the thickness of the second structure portion 312 is between 10 nm and 1500 nm.

[0097] In one possible implementation, Figure 2 As shown, a metal reinforcement structure 330 is disposed between the first electrode conduction structure 310 and the second electrode conduction structure 320 .

[0098] In this implementation, a metal reinforcement structure 330 is prepared between the first electrode conductive structure 310 and the second electrode conductive structure 320, so that the current diffusion capability is enhanced and the internal resistance of the device is reduced, thereby reducing the power consumption of the chip. The metal reinforcement structure 330 can be a single layer or multiple layers of metal layers such as Cr, Pt, Ti, Au, Al, Cu, TiN, TaN, etc.

[0099] Further, such as Figures 3 to 5As shown, the metal reinforcement structure 330 contacts the top and part of the side wall of the second part structure 312. In order to ensure that the contact area of ​​the first electrode conductive structure 310 is in better contact with the metal reinforcement structure 330, part of the side wall of the second part structure 312 is exposed to increase the contact area between the metal reinforcement structure 330 and the first electrode conductive structure 310, thereby further enhancing the current diffusion capability, reducing the internal resistance of the device, and thus reducing the power consumption of the chip. Exemplarily, the height h of the exposed side wall of the second part structure 312 is ≥ 50nm.

[0100] In one possible implementation, Figure 6 , Figure 7 As shown, the second electrode conductive structure 320 contacts the top and a portion of the sidewall of the second portion structure 312 .

[0101] In this implementation, if the first electrode conductive structure 310 is directly connected to the second electrode conductive structure 320, in order to ensure that the contact area of ​​the first electrode conductive structure 310 is in better contact with the second electrode conductive structure 320, part of the side wall of the second part structure 312 is exposed, so as to increase the contact area between the second electrode conductive structure 320 and the first electrode conductive structure 310, thereby further enhancing the current diffusion capability, reducing the internal resistance of the device, and thus reducing the power consumption of the chip. Exemplarily, the height h of the exposed side wall of the second part structure 312 is ≥ 50nm.

[0102] In one possible implementation, Figure 2 , Figure 3 , Figure 6 As shown, a color compound 340 is disposed inside the first electrode conductive structure 310 .

[0103] In this implementation, since the first electrode conductive structure 310 for conductive interconnection is a fence-style structure, if the thickness is thin and the elastic modulus is small, collapse is likely to occur during the process. The color compound 340 is retained inside the first electrode conductive structure 310 to support the first electrode conductive structure 310, so that the first electrode conductive structure 310 is attached to the side wall surface of the color compound 340 instead of being suspended, thereby solving the problem of collapse. In addition, the thickness of the sub-pixels and the color compound 340 in each display device layer is between 0.2um and 5um.

[0104] Furthermore, the top height of the color compound 340 is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure 312 in the first electrode conductive structure 310 is lower than the top height of the color compound 340. That is, in order to facilitate the process, the height of the prepared first electrode conductive structure 310 can be smaller than the height of the color compound 340 and the sub-pixel.

[0105] Furthermore, in the design that the height of the first electrode conductive structure 310 is smaller than the height of the color compound 340, the second electrode conductive structure 320 is attached to the top and part of the side wall of the color compound 340, and is in contact with the top and part of the side wall of the second partial structure 312. Figure 8 As shown, the metal reinforcement structure 330 below the second electrode conductive structure 320 is attached to the top and a portion of the sidewall of the color compound 340 , and is in contact with the top and a portion of the sidewall of the second portion structure 312 .

[0106] Under the design that the height of the first electrode conductive structure 310 is less than the height of the color compound 340, in order to ensure the contact between the contact area of ​​the first electrode conductive structure 310 and the second electrode conductive structure 320, it is necessary to pattern the dielectric insulating layer and then perform etching to expose the contact area of ​​the first electrode conductive structure 310 and even part of the side wall, so that the metal reinforcement structure 330 or the second electrode conductive structure 320 can contact the first electrode conductive structure 310 to achieve current conduction. This design can also reduce the short circuit and leakage problems caused by the mutual connection between the common cathode and the common anode. For example, Figure 8 As shown, the height difference H between the first electrode conductive structure 310 and the color compound 340 is ≥50 nm.

[0107] In one possible implementation, Fig. 9 , Fig.10 As shown, between the first electrode conductive structure 310 and the color system compound 340, there is a fence inner reflective layer 350 and a fence inner insulating layer 360. The fence inner reflective layer 350 can be as follows Fig. 9 As shown, the top height is lower than the top height of the sub-pixel, or Fig.10 As shown, the top height is higher than the top height of the sub-pixel.

[0108] In this implementation, a high reflective mirror structure is specially arranged on the inner wall of the first electrode conductive structure 310 to form a fence inner reflective layer 350, which can solve the problem of low reflectivity and light absorption of the first electrode conductive structure 310, improve the reflection of the light emitted from the compound epitaxial side wall, thereby increasing light extraction and improving the brightness of the device. It can be understood that Fig. 9 , Fig.10 Only one set of inner reflective layer 350 and inner insulating layer 360 of the fence is shown. Multiple sets of inner reflective layer 350 and inner insulating layer 360 of the fence can also be set on the inner wall of the first electrode conductive structure 310. The multiple sets of inner reflective layer 350 and inner insulating layer 360 of the fence can further improve the reflection of the light outgoing from the side wall and enhance the brightness of the device. The present application does not impose any restrictions on this.

[0109] It is understandable that Figures 2 to 3 , Figure 6 , Figure 8 As shown, the color compound 340 is disposed inside all the first electrode conductive structures 310, and the color compound 340 may also be disposed inside the first electrode conductive structures 310. Figure 11 to Figure 12 As shown, the color compound 340 is only provided in part of the first electrode conductive structure 310, or Figures 4 to 5 , Figure 7 , Fig.13 As shown, the color compound 340 is not disposed in the first electrode conductive structure 310 , but is directly filled with an insulating material, which is not limited in the present application.

[0110] In one possible implementation, Figure 2 As shown, the surface size of the first electrode conductive structure 310 is smaller than or equal to the surface size of the sub-pixel in the same display device layer.

[0111] In this implementation, by limiting the size of the first electrode conductive structure 310 , it is possible to avoid this part of the structure occupying too much space, affecting the arrangement of sub-pixels, and thus causing the problem of too low pixel density.

[0112] Further, such as Figure 2 As shown, the electrode conduction structure includes a first type electrode conduction structure that is in conduction with the first type electrode contact 120, and a metal reinforcement structure 330 is provided between the first electrode conduction structure 310 and the second electrode conduction structure 320 in the first type electrode conduction structure; the first type electrode conduction structure is electrically connected to the transparent conductive layer 400 through the metal reinforcement structure 330, and the transparent conductive layer 400 is in contact with a side of the sub-pixel in the same display device layer away from the driving wafer 100. A metal reinforcement structure 330 is provided between the first electrode conduction structure 310 and the second electrode conduction structure 320 that are used to conduct with the first type electrode contact 120, and the metal reinforcement structure 330 is also connected to the transparent conductive layer 400, so that electrical connection is achieved through the metal reinforcement structure 330.

[0113] Among them, the transparent conductive layer 400 can be a combination of one or more of an ITO (Indium Tin Oxide) film, an AZO (Antimony doped Zinc Oxide) film, an ATO (Antimony doped Tin Oxide) film, and an FTO (Fluorine doped Tin Oxide) film, or a metal-doped ITO single layer or stacked layer formed by thinly coating Al, Au, and Ag on the ITO surface and then annealing to enhance the current transmission capability of the transparent conductive layer 400.

[0114] In one possible implementation, Figure 2As shown, the outer periphery of the sub-pixel is surrounded by a metal fence structure 380 that is structurally consistent with the first electrode conduction structure 310, and the bottom of the metal fence structure 380 is connected to the outer edge of the bonding metal layer 313 and the first ohmic contact layer 314 at the bottom of the sub-pixel to surround the sub-pixel, and the top height of the metal fence structure 380 is not higher than the top height of the sub-pixel.

[0115] In this implementation, a metal fence structure 380 similar in style to the first electrode conduction structure 310 in the electrode conduction structure is simultaneously manufactured around the outer periphery of the sub-pixel. The metal fence structure 380 is connected to the outer edge of the bonding metal layer 313 and the first ohmic contact layer 314 at the bottom of the sub-pixel. The metal fence structure can block light leakage from the side walls of the sub-pixel, thereby suppressing or even eliminating light crosstalk between adjacent sub-pixels, thereby improving the display effect of the micro-display device.

[0116] Further, such as Figure 2 As shown, a transparent conductive layer 400 is covered on one side of the sub-pixel away from the driving wafer 100; a dielectric insulating layer 370 is spaced between the top of the metal fence structure 380 and the transparent conductive layer 400. The dielectric insulating layer 370 can avoid short circuit and leakage problems caused by the common cathode and the common anode being connected.

[0117] Further, such as Fig. 9 , Fig.10 As shown, between the metal fence structure 380 and the sub-pixel, there are a fence inner reflective layer 350 and a fence inner insulating layer 360. A high reflective mirror structure is specially arranged on the inner wall of the metal fence structure 380 to form the fence inner reflective layer 350, which can solve the problem of low reflectivity and light absorption of the metal fence structure 380, improve the reflection of the light emitted from the compound epitaxial side wall, thereby increasing light extraction and improving the brightness of the device.

[0118] In summary, the embodiment of the present application provides a stacked integrated micro display device, which includes a driving wafer and a multi-layer display device layer arranged on the driving wafer; any display device layer includes sub-pixels; at least one display device layer also includes an electrode conduction structure, the electrode conduction structure is conductively connected to the electrode contacts in the driving wafer, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is higher than the top height of the sub-pixel in the current display device layer. Through the stacked electrode conduction structure, the aspect ratio of the through hole is reduced, which on the one hand reduces the processing difficulty of the through hole process, and on the other hand eliminates the void problem of the through hole metal filling, thereby avoiding the current transmission difference problem caused by the void.

[0119] Next, the preparation method of the micro display device corresponding to the structure described in the above embodiment is described. Fig.14 As shown, the method for preparing a micro display device may include the following steps:

[0120] Step S1: Prepare the drive wafer.

[0121] Step S2: bonding and integrating multiple display device layers on the driving wafer, and preparing an electrode conduction structure in at least one display device layer.

[0122] Among them, any display device layer includes sub-pixels; the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the display device layer; the electrode conduction structure is conductive with the electrode contacts in the driving wafer including the first type of electrode contacts, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixels in the current display device layer, the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

[0123] Specifically, step S2 may include:

[0124] S21: For the preparation of the i-th display device layer, the i-th color system compound layer is bonded and integrated onto a driving wafer or a previous display device layer, and the i-th color system compound layer is pixelated to form an i-th sub-pixel.

[0125] For example, taking the i-th display device layer as the first display device layer, the preparation process of the first sub-pixel in the first display device layer can be as follows: Fig.15 As shown:

[0126] Step 1: Select the first layer of color compounds and prepare the first ohmic contact layer.

[0127] Specifically, a contact material is prepared on the P contact surface or the N contact surface of the first layer of the color system compound to form a first ohmic contact layer 314, and the contact material can be a transparent conductive film such as ITO, IZO, IGZO, AZO, or a metal alloy film such as AuBe, AnZn, etc., with a thickness ranging from 1nm to 300nm. The thickness of the first ohmic contact layer 314 ranges from 1nm to 300nm.

[0128] Step 2: Bond the first layer of color compound to the wafer for integration.

[0129] Specifically, bonding structures are prepared on the first layer of color compound and the driving wafer 100 , respectively, and the first layer of color compound and the driving wafer 100 are bonded and integrated by wafer-level bonding to form a bonding metal layer 313 .

[0130] The bonding structure can be a conductive material, and the main bonding material can be one or more of a Ni, Sn combination, an Au, Sn combination, a Cu, Sn combination, an Au, In combination, an Au, Au combination, an Al, Al combination, a Cu, Cu combination, an ITO, ITO combination, etc. The bonding material and the wafer can include an adhesion layer (such as Cr, Ti, Ni, etc.) and a blocking depletion layer (such as Ni, Pt, Cu, etc.), and the bonding structure on the compound and the driver wafer can be symmetrical or asymmetrical.

[0131] In one embodiment, symmetrical metal bonding is used, that is, the bonding structure on the compound and the driver wafer is the same, and the bonding structure is Cr (10nm, adhesion layer) / Pt (50nm, blocking depletion layer) / Au (100nm) / Sn (150nm) / Au (50nm). After high-temperature hot pressing bonding, the compound and the driver wafer are bonded and integrated.

[0132] Step 3: Pixelation preparation.

[0133] Specifically, the substrate and related structures of the first layer of color compound after bonding and integration are removed to expose the second ohmic contact layer. After the second ohmic contact layer is exposed, the first layer of color compound is patterned and pixel prepared by semiconductor photolithography and etching process, and the first ohmic contact layer 314 is used as the etching cut-off layer. The etched first sub-pixel 210 or the retained color compound 340 corresponds to the anode contact in the driving wafer 100, which can be one-to-one or one-to-many.

[0134] S22: preparing a first electrode conduction structure arranged horizontally with the i-th sub-pixel, filling the first electrode conduction structure with an insulating layer and exposing the top of the first electrode conduction structure.

[0135] After the first electrode conduction structure is prepared, an insulating dielectric is filled, and the insulating dielectric includes a single layer or multiple layers of filling materials such as silicon oxide, silicon nitride, SiC, SiCN, PSG, BPSG, polyimide, etc., and then planarization is performed. The planarization can be performed by CMP (Chemical Mechanical Planarization), etching, or a combination of the two, and the planarization exposes the contact area of ​​the first electrode conduction structure.

[0136] Among them, there is a continuous bonding metal layer and a first ohmic contact layer between the i-th sub-pixel and the driving wafer or the previous display device layer; accordingly, S22 may specifically include: patterning and etching the bonding metal layer and the first ohmic contact layer to form a first electrode conduction structure, and the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure. That is, patterning and etching are performed according to the anode and cathode positions arranged on the driving wafer in advance, and the unnecessary bonding metal layer and the first ohmic contact layer are removed, and the first electrode conduction structure is formed simultaneously.

[0137] It is understandable that the first electrode conduction structure can be prepared by reverse sputtering during the process of patterning the bonding metal layer and the first ohmic contact layer in the display device layer, thereby facilitating the preparation of the electrode conduction structure.

[0138] In a possible implementation, after the preparation of the first electrode conduction structure is completed and before the preparation of the second electrode conduction structure, the following step is further included: preparing a transparent conductive layer on the top of the i-th sub-pixel by depositing a transparent conductive film.

[0139] Specifically, Fig.16 As shown, after the surface of the second ohmic contact layer of the sub-pixel in each display device layer is exposed, electrical connection is performed, and a transparent conductive film is deposited by sputtering, evaporation, etc. to form a transparent conductive layer 400.

[0140] Furthermore, after preparing the transparent conductive layer, the method further includes the following steps: preparing a metal grid on the top of the transparent conductive layer and the top of the first electrode conductive structure to form a metal reinforcement structure.

[0141] Specifically, Fig.16 As shown, a metal reinforcement structure 330 is prepared on the transparent conductive layer 400. The metal reinforcement structure 330 can be realized by patterned evaporation or sputtering, or by etching after coating.

[0142] In a possible implementation, before preparing the first electrode conduction structure, the following steps are also included: retaining an insulating film layer on the side wall of the i-th sub-pixel to form an inner fence insulating layer; and preparing an inner fence reflective layer on the side wall of the inner fence insulating layer.

[0143] Specifically, after completing the pixel preparation, an insulating layer is retained on the epitaxial surface of the sub-pixel, and then an insulating film layer is prepared by plasma deposition, sputtering, atomic layer deposition, etc. The thickness of the insulating layer ranges from 1nm to 1500nm, and the insulating layer material includes a single film layer such as silicon oxide, silicon nitride, aluminum oxide, boron nitride, or a stack of two or more materials. Then, an etching method such as RIE (Reactive Ion Etching) / ICP (Inductive Coupled Plasma) / IBE (Ion Beam Etching) is used to retain the insulating film layer of the side wall to form an insulating layer inside the fence, and then a layer of reflective material with high reflectivity is plated to form a reflective layer inside the fence. Subsequently, the etching method is used to prepare the first electrode conduction structure, and then the insulating layer is filled.

[0144] In one embodiment, when the first electrode conductive structure 310 is prepared to have the same height as the color compound 340 and the insulating layer, the process from pixelation in the display device layer to filling of the insulating layer is as follows: Fig.17 As shown, after the structural process, a dielectric insulating layer 370 and a transparent conductive layer 400 need to be prepared to obtain Fig.10 The structure shown can prevent the metal fence structure 380 around the sub-pixel from being short-circuited with the common cathode.

[0145] In one embodiment, when the first electrode conductive structure 310 is prepared, it is lower than the height of the color system compound 340 and the insulating layer, and after the insulating layer is filled, a planarization process is also used. The process from pixelization in the display device layer to filling and planarization of the insulating layer is as follows: Fig.18 As shown, after the structural process, the insulating layer is filled, planarized, and then the transparent conductive layer 400 is prepared to obtain Fig. 9 In the structure shown, there is no need to prepare the dielectric insulating layer 370 because the height of the metal fence structure 380 around the sub-pixel is smaller than the height of the sub-pixel itself.

[0146] S23: Preparing a second electrode conduction structure on the first electrode conduction structure.

[0147] S23 may specifically include: filling an insulating layer on the first electrode conduction structure; and performing through-hole etching and metal backfilling on a region of the insulating layer corresponding to the first electrode conduction structure to form a second electrode conduction structure.

[0148] Insulating dielectric backfill and planarization are performed on the wafer where cathode connection is completed, and through-hole etching and metal backfill preparation are performed in the insulating layer above the first electrode conduction structure in the anode and cathode regions where lower-layer connection is required. After backfilling, planarization is performed by CMP, etching, or a combination of the two to achieve a non-flat surface with a slightly concave or protruding structure of the through-hole.

[0149] It can be understood that if the display device layer on which the second electrode conduction structure is prepared is defined as a new driving wafer, the above steps S21 to S23 can be repeated to stack the wafer until double or more layers of pixelation are completed.

[0150] In summary, the preparation method of the micro display device provided in the embodiment of the present application integrates multiple layers of display device layers on a driving wafer, wherein at least one layer of the display device layer is provided with an anode conduction structure, and the anode conduction structure includes: a first electrode conduction structure arranged in the horizontal direction and a second electrode conduction structure arranged in the vertical direction; the bottom of the second electrode conduction structure is connected to the outer edge of the first electrode conduction structure in the display device layer of the current layer to surround the first electrode conduction structure, and the top is connected to the sub-pixel in the upper display device layer, or is connected to the bottom of the first electrode conduction structure in the upper display device layer; the bottom of the first electrode conduction structure is connected to the anode contact in the driving wafer, or is connected to the top of the second electrode conduction structure in the lower display device layer, so that anode conduction is achieved through this fence-style anode conduction structure, without the need to perform a process of first through-hole and then metal filling, thereby reducing the process difficulty of graphical overlay alignment.

[0151] All of the above optional technical solutions can be combined in any way to form optional embodiments of the present invention, that is, any multiple embodiments can be combined to meet the needs of different application scenarios. They are all within the protection scope of this application and will not be described one by one here.

[0152] It should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A stacked integrated micro display device, characterized in that: The micro display device comprises a driving wafer and a multi-layer display device layer arranged on the driving wafer; Any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the display device layer; At least one of the display device layers also includes an electrode conduction structure, and the electrode conduction structure is conductively connected to the electrode contacts in the driving wafer including the first type of electrode contacts. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

2. The micro display device according to claim 1, characterized in that: The first electrode conduction structure is a fence-style structure, and the first electrode conduction structure includes: a first part structure arranged in a horizontal direction, and a second part structure surrounding the first part structure; The second electrode conductive structure is a through-hole style structure.

3. The micro display device according to claim 2, characterized in that: A metal reinforcement structure is disposed between the first electrode conduction structure and the second electrode conduction structure.

4. The micro display device according to claim 3, characterized in that: The metal reinforcement structure contacts the top and a portion of the sidewall of the second portion structure.

5. The micro display device according to claim 2, characterized in that: The second electrode conductive structure contacts the top and a portion of the sidewall of the second portion structure.

6. The micro display device according to claim 2, characterized in that: A color compound is disposed inside the first electrode conductive structure.

7. The micro display device according to claim 6, characterized in that: The top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure in the first electrode conduction structure is lower than the top height of the color compound.

8. The micro display device according to claim 7, characterized in that: The second electrode conductive structure is attached to the top and part of the side wall of the color system compound, and is in contact with the top and part of the side wall of the second partial structure; or, The metal reinforcement structure below the second electrode conductive structure is attached to the top and part of the side wall of the color compound, and is in contact with the top and part of the side wall of the second partial structure.

9. The micro display device according to claim 6, characterized in that: The first electrode conductive structure and the color compound are separated by a fence inner reflective layer and a fence inner insulating layer.

10. The micro display device according to claim 6, characterized in that: The thickness of the sub-pixel and the color compound is between 0.2um and 5um.

11. The micro display device according to claim 2, characterized in that: The surface size of the first electrode conductive structure is smaller than or equal to the surface size of the sub-pixels in the same display device layer.

12. The micro display device according to claim 2, characterized in that: The first part of the structure comprises: A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

13. The micro display device according to claim 2, characterized in that: The outer periphery of the sub-pixel is surrounded by a metal fence structure that is structurally consistent with the first electrode conduction structure. The bottom of the metal fence structure is connected to the bonding metal layer at the bottom of the sub-pixel and the outer edge of the first ohmic contact layer to surround the sub-pixel. The top height of the metal fence structure is not higher than the top height of the sub-pixel.

14. The micro display device according to claim 13, characterized in that: A side of the sub-pixel away from the driving wafer is covered with a transparent conductive layer; A dielectric insulating layer is provided between the top of the metal fence structure and the transparent conductive layer.

15. The micro display device according to claim 13, characterized in that: The metal fence structure and the sub-pixel are separated by a fence inner reflective layer and a fence inner insulating layer.

16. The micro display device according to claim 2, characterized in that: The angle of the second portion structure is between 45 degrees and 135 degrees.

17. The micro display device according to claim 2, characterized in that: The thickness of the second part structure is between 10 nm and 1500 nm.

18. The micro display device according to claim 1, characterized in that: The electrode contacts further include a second type electrode contact, and the electrode conductive structure includes a second type electrode conductive structure conductively connected to the second type electrode contact.

19. The micro display device according to claim 1, characterized in that: The electrode conduction structure includes a first type of electrode conduction structure that is in conduction with the first type of electrode contact; A metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure in the first type electrode conduction structure; The first type electrode conduction structure is electrically connected to the transparent conductive layer through the metal reinforcement structure, and the transparent conductive layer is also in contact with a side of the sub-pixel in the same display device layer away from the driving wafer.

20. A method for preparing a micro display device, characterized in that: The method is used to prepare the micro display device according to any one of claims 1 to 19, and the method comprises: Prepare the drive wafer; Bonding and integrating multiple display device layers on the driving wafer, and preparing an electrode conduction structure in at least one of the display device layers; Among them, any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the current display device layer; the electrode conduction structure is conductive with the electrode contacts in the driving wafer including the first type of electrode contacts, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

21. The method according to claim 20, characterized in that The step of bonding and integrating a plurality of display device layers on the driving wafer and preparing an electrode conduction structure in at least one of the display device layers comprises: For the preparation of the i-th display device layer, the i-th color system compound is bonded and integrated onto a driving wafer or a previous display device layer, and the i-th color system compound is pixelated to form an i-th sub-pixel; Prepare a first electrode conduction structure arranged horizontally with the i-th sub-pixel, fill it with an insulating layer and expose the top of the first electrode conduction structure; The second electrode conduction structure is prepared on the first electrode conduction structure.

22. The method according to claim 21, characterized in that A continuous bonding metal layer and a first ohmic contact layer are provided between the i-th sub-pixel and the driving wafer or the previous display device layer; The method of preparing a first electrode conduction structure arranged horizontally with the i-th sub-pixel comprises: The bonding metal layer and the first ohmic contact layer are patterned and etched to form the first electrode conduction structure, wherein the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure.

23. The method according to claim 21, characterized in that The step of preparing the second electrode conduction structure on the first electrode conduction structure comprises: Filling the first electrode conductive structure with an insulating layer; Through-hole etching and metal backfilling are performed on a region of the insulating layer corresponding to the first electrode conduction structure to form the second electrode conduction structure.

24. The method according to claim 21, characterized in that Before preparing the second electrode conduction structure, the method further includes: A transparent conductive layer is prepared on top of the i-th sub-pixel by transparent conductive film deposition.

25. The method according to claim 24, characterized in that After preparing the transparent conductive layer, the method further comprises: A metal grid is prepared on the top of the transparent conductive layer and the top of the first electrode conductive structure to form a metal reinforcement structure.

26. The method according to claim 21, characterized in that Before preparing the first electrode conduction structure, the method further includes: Retaining an insulating film layer on the side wall of the i-th sub-pixel to form an inner fence insulating layer; A reflective layer inside the fence is prepared on the side wall of the insulating layer inside the fence.

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