Integrated circuit for flat panel display
By forming a reflective layer on the luminescent photoelectric device of the micro LED display, reflecting upward light to the downward direction, the problem of low yield rate during the LED transfer process in the prior art is solved, the efficiency and production efficiency of the display are improved, and the efficiency of the display is reduced. cost.
Patent Information
- Application Number
- CN202380048335.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-20
- Filing Date
- 2023-06-12
- Publication Date
- 2025-02-11
AI Technical Summary
Existing micro LED displays have problems with low yield rates in the process of transferring LEDs from the source wafer to the display backplane, resulting in pixels missing or misalignment, increasing production costs.
By forming a reflective layer on the top surface of the light-emitting optoelectronic device, upward light from the optoelectronic device is reflected in the downward direction, thereby improving the efficiency of the integrated circuit and the production efficiency of the display.
It improves the efficiency of integrated circuits and the production efficiency of displays, reduces the damage to thin film transistors by high-intensity light, extends the service life of integrated circuits, and reduces production costs.
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Figure CN119422253A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an integrated circuit for a flat panel display, and more particularly to an integrated circuit for a monolithic display. Background Art
[0002] Micro-LED displays are an emerging flat-panel display technology that uses arrays of micro-LEDs to form individual pixels. Micro-LED displays have many advantages over earlier liquid crystal displays (LCDs). For example, since the LEDs are powered only when the pixels are to be lit and can be completely turned off the rest of the time, Micro-LED displays are more energy-efficient and have higher contrast. In addition, Micro-LED displays have faster response times, making them more suitable for augmented reality (AR) and virtual reality (VR) applications that require high pixel density and high frame rates.
[0003] Micro-LED displays are typically made by transferring micro-LEDs from a source wafer to a receiving substrate (display backplane). This enables the use of separate red, green, and blue source micro-LED wafers to create an RGB display. Typically, the pitch of the micro-LEDs on the source wafer is different from the pitch of the backplane pixels, so techniques are needed to transfer them to the correct position.
[0004] However, when pixels are moved individually, an expensive "pick-and-place" machine may take considerable time to produce one display, which increases the cost of the display. In order to shorten production time, it has also been considered to use an adhesive film to transfer multiple pixels to a substrate at the same time.
[0005] However, there are many problems with the process described above. Specifically, the yield of the transfer process is not 100%, which results in missing pixels or misaligned pixels on the backplane. Further repair work is required to produce a completely normal display, which significantly increases the manufacturing cost of these components. Since the display may have up to 24 million sub-pixels, the success rate needs to be at least 99.99999%. Currently, the best success rate is about 99%. This problem is particularly evident when producing displays with very high resolution, pixel density, and contrast, such as displays for augmented reality (AR) or virtual reality (VR) devices. Given that the demand for such devices will be higher in the future, a better way to produce micro LED displays is needed.
[0006] One way to avoid transferring the LEDs from the source wafer to the backplane is to process the backplane directly on top of the micro-LEDs on the source wafer, thereby producing a single-piece display. For example, a sapphire substrate forms the bottom layer of the display, on which the micro-LEDs and thin-film transistors (TFTs) are deposited. Since TFTs are usually opaque, the area of each pixel needs to be shared by the TFT and the micro-LEDs, which reduces the drive current of the display. In addition, if a more flexible TFT (such as LTPS) is used to reduce the area occupied by the TFT, the high temperature process required to manufacture the LTPS will seriously damage the performance of the micro-LEDs.
[0007] Another problem with the above-mentioned monolithic display is that, since the LED emits light in all directions, only a small portion of the light can be emitted from the monolithic display in a desired direction.
[0008] It is therefore an object of the present invention to overcome one or more of the problems set forth above. Summary of the invention
[0009] According to a first aspect of the present invention, an integrated circuit for a flat panel display is provided, the integrated circuit comprising: a light-emitting optoelectronic device, the light-emitting optoelectronic device having a top surface and a bottom surface opposite to the top surface; a thin film transistor, the thin film transistor being formed above the top surface of the light-emitting optoelectronic device, the thin film transistor being operably connected to the optoelectronic device; a reflective layer, the reflective layer being formed between the top surface of the optoelectronic device and the thin film transistor, the reflective layer being arranged to reflect light emitted from the optoelectronic device so that the reflected light is emitted from the integrated circuit along a direction corresponding to the bottom surface of the light-emitting optoelectronic device.
[0010] In other words, the reflective layer reflects the upward light from the optoelectronic device in a downward direction. Thus, the present invention deviates from the conventional arrangement of micro-LED circuits, which is to arrange them so that light is emitted in an upward direction (i.e., corresponding to the growth direction and opposite to the substrate direction). Instead, the reflective layer is used so that all or most of the light is emitted downward through the bottom surface of the integrated circuit. In this way, the reflective layer causes most of the light from the optoelectronic device to be directed in a downward direction, thereby improving the efficiency of the integrated circuit and the efficiency of the flat panel display produced.
[0011] The increased efficiency of the integrated circuit allows the optoelectronic devices to run at a lower temperature to achieve the same light output, thereby improving the performance and life of the integrated circuit. In addition, because the light from the optoelectronic devices is emitted in a downward direction, the thin film transistors do not absorb or scatter any light from the optoelectronic devices; this also reduces the chance of high-intensity light damaging the thin film transistors. This also means that the area of the integrated circuit does not need to be shared by the thin film transistors and the optoelectronic devices, however, such sharing is required in known single-body micro-LED displays, which have an upward emission direction, so the transistors must be deposited to avoid blocking too much of the light emitted upward. In this way, the thin film transistors can cover a larger area of the integrated circuit without blocking the light from the optoelectronic devices, allowing the thin film transistors to provide more current to the integrated circuit.
[0012] The integrated circuit includes a single device where the optoelectronic device and the thin film transistor are grown on the same substrate (which is later removed). Therefore, the term "formed on" as used herein preferably refers to the growth or deposition of components on a particular layer, rather than to the manufacture of these components separately and then merging these components together at another manufacturing stage. Thus, the thin film transistor is deposited in a layer covering the light emitting optoelectronic device.
[0013] In other words, the integrated circuit includes a light-emitting optoelectronic device (preferably an LED) and a thin film transistor deposited on the optoelectronic device, so that the optoelectronic device and the thin film transistor overlap. More specifically, the optoelectronic device and the thin film transistor overlap along the growth direction. One or more layers can be deposited between the optoelectronic device and the thin film transistor.
[0014] As used herein, the terms "top", "bottom", "above", and "below" refer to directions and relative positions as described in the figures. It will be understood that these terms do not require that the embodiments described herein operate only in a particular orientation. The term "top" refers to the growth direction, that is, the growth direction relative to the substrate (the device may or may not be removed from the substrate). In other words, the growth direction is perpendicular to the plane defined by the substrate, the optoelectronic device, the reflective layer and / or the thin film transistor. "The direction corresponding to the bottom surface of the light emitting diode" refers to the bottom surface of the integrated circuit, requiring that the light emitted upward is reflected by the reflective layer and is directed out of the bottom surface of the integrated circuit. As used herein, the term "integrated circuit" refers collectively to a circuit of all the features described in the attached claim 1 (such as optoelectronic devices and thin film transistors). It will be understood that the term "integrated circuit" also refers to a subset of these features, or to a circuit with any number of additional components (such as other thin film transistors and / or one or more capacitors). The term "backplane" may include all components of an integrated circuit deposited on the optoelectronic device for controlling the functions of the optoelectronic device. The backplane may include, for example, one or more thin film transistors and capacitors.
[0015] The light emitting optoelectronic device preferably comprises several semiconductor layers deposited sequentially, and the thin film transistor comprises a plurality of layers deposited sequentially over the optoelectronic device.
[0016] The integrated circuit may also include a substrate having a top surface and an opposite bottom surface, wherein the optoelectronic device is formed on the top surface of the substrate, and the reflective layer is arranged so that the reflected light is emitted through the bottom surface of the substrate. In this way, the substrate provides a base layer on which multiple integrated circuits can be formed, thereby simplifying the manufacture of flat panel displays. Specifically, the integrated circuit is formed in a monomeric form, wherein the light-emitting optoelectronic device is deposited on the substrate and the thin film transistor is deposited on the light-emitting device, and the reflective layer is deposited between the two. Unlike conventional upward-emitting monomer LED displays, the light of the present invention is reflected so that it is emitted through the substrate. Therefore, the substrate is at least partially transparent while the substrate remains in the integrated device. Advantageously, the substrate can be removed from the rest of the integrated circuit (and the flat panel display) so that the LED and the integrated circuit can be transferred to a flexible substrate to manufacture a flexible display.
[0017] The substrate may be a sapphire wafer substrate, preferably a bottom-polished sapphire wafer substrate. After manufacturing the integrated circuit, the substrate may be thinned by back grinding or chemical thinning. The substrate preferably has a transparency of at least 70%. The top surface of the substrate may be patterned, which may reduce stress on any layer subsequently grown on the substrate.
[0018] The integrated circuit may also include one or more color filters on the bottom surface of the substrate. In this way, a flat panel display with color pixels can be easily provided without the need to provide different types of optoelectronic devices for the integrated circuit. The integrated circuit may also include one or more lenses located below the bottom surface of the substrate, the one or more lenses being arranged to collimate light passing through the substrate.
[0019] The thin film transistor may be operatively connected to the optoelectronic device via one or more interlayer connections, such as via one or more through holes through the reflective layer. Specifically, the integrated circuit may include a cathode layer and an anode layer. The cathode layer may be located below the bottom surface of the optoelectronic device, and the anode layer may be located on the top surface of the optoelectronic device. The integrated circuit may include a first through hole connecting the thin film transistor to the cathode layer and a second through hole connecting the thin film transistor to the anode layer. Alternatively, the thin film transistor may be located between the reflective layer and the optoelectronic device.
[0020] The thin film transistor may comprise an organic thin film transistor. Advantageously, the organic thin film transistor may be deposited onto the integrated circuit at a much lower temperature than the inorganic thin film transistor. By forming the organic thin film transistor at a lower temperature, the reflective layer and / or optoelectronic device is not damaged by the high temperature process. Therefore, the use of an organic thin film transistor is particularly suitable for the present invention, since the higher deposition temperature required to form the inorganic TFT may cause part of the reflective layer material to migrate out of the intended location.
[0021] The organic thin film transistor preferably includes an organic semiconductor layer arranged between a source electrode and a drain electrode, and a gate electrode arranged to control the current in the organic semiconductor layer when a voltage is applied. The organic thin film transistor may be as described in WO 2022 / 101644, which may include a front gate electrode and a back gate electrode, or only a single gate electrode. The organic semiconductor layer preferably includes a small molecule organic semiconductor and an organic binder. The organic binder preferably includes a semiconductor binder, and the dielectric constant k of the semiconductor binder is in the range of 3.4≤k≤8.0.
[0022] The organic semiconductor layer of the organic thin film transistor (OTFT) preferably includes a small molecule organic semiconductor and an organic binder. The term "small molecule" has the common meaning in the art, i.e., an organic compound of low molecular weight, for example, a molecular weight not higher than 900 Dalton. The organic semiconductor (OSC) layer of the OTFT preferably includes at least one semiconductor ink, the semiconductor ink including a small molecule organic semiconductor and an organic binder. Preferably, the OSC layer includes a polycrystalline small molecule organic semiconductor, preferably a polycrystalline small molecule organic semiconductor combined with an organic binder. Preferably, the polycrystalline small molecule organic semiconductor includes a polyacetylene compound. Preferably, the organic binder is an organic semiconductor binder, and the organic semiconductor binder preferably includes a triarylamine group.
[0023] Preferably, the semiconductor ink of the organic semiconductor layer comprises a formulation of discrete polyacetylene molecules and / or an organic (oligomer / polymer) binder. More preferably, the semiconductor ink forming the OSC layer comprises polyacene and a polymer binder, wherein the polymer binder comprises at least one triarylamine group. The triarylamine group preferably comprises one or more functional groups selected from the group comprising CN and C1-4 alkoxy. Preferably, the ink comprises a formulation of small molecule polystyrene and / or a polytriarylamine binder. Preferably, the semiconductor ink comprises the following as described in WO2010 / 0020329, WO2012 / 003918, WO2012 / 164282, WO2013 / 000531, WO2013 / 124682, WO2013 / 124683, WO2013 / 124684, WO2013 / 124685, WO2013 / 124686, WO2013 / 124687, WO201 3 / 124688, WO2013 / 159863, WO2014 / 083328, WO2015 / 028768, WO2015 / 058827, WO2014 / 005667, WO2012 / 160383, WO2012 / 160382, WO2016 / 015804, WO2017 / 0141317, and semiconductor inks described in WO2018 / 078080.
[0024] The reflective layer may be a metal layer, preferably comprising one or more of Al, Ag, Mo and / or Au. Alternatively, the reflective layer may comprise a distributed Bragg reflector. A distributed Bragg reflector is particularly advantageous when the integrated circuit is used as part of a liquid crystal display, as the Bragg reflector can provide polarization for the reflected light.
[0025] The integrated circuit may comprise an anode layer deposited above the optoelectronic device and below the reflective layer, wherein the anode layer preferably has a transparency of at least 70%.Preferably, the anode comprises indium tin oxide (ITO).
[0026] The integrated circuit may include one or more additional transistors formed above the optoelectronic device. The integrated circuit may include a capacitor formed above the optoelectronic device. Specifically, the integrated circuit according to the present invention may include an optoelectronic device and a backplane formed above the optoelectronic device and operatively connected to the optoelectronic device, wherein the backplane includes at least one transistor. The backplane may include a single transistor and a single capacitor for each LED, thereby forming a 1T-1C backplane arrangement, or include two transistors and a single capacitor (e.g., a switching TFT and a driving TFT) for each LED, thereby forming a 2T-1C backplane arrangement. In the present invention, the backplane is directly processed above the optoelectronic device on the substrate wafer, and the reflective layer is located between the optoelectronic device and the backplane component to reflect the light emitted upward to a downward direction.
[0027] The reflective layer preferably covers at least 50% of the area of the optoelectronic device. More specifically, the surface of the reflective layer parallel to the plane of the substrate (and normal to the growth direction) covers at least 50% of the area of the optoelectronic device. In other words, the reflective layer is offset from the optoelectronic device in the vertical direction and overlaps with the optoelectronic device so that at least 50% of the area of the optoelectronic device in a plane parallel to the substrate is positioned below the reflective layer. By providing a reflective layer that covers a larger proportion of the optoelectronic device, more of the upward light from the optoelectronic device is reflected in a downward direction, thereby further improving the efficiency of the integrated circuit.
[0028] The reflective layer can provide a gate electrode for the thin film transistor. Specifically, the reflective layer can include a reflective material and a conductive material, so that it can provide both a reflective function (reflecting light emitted upward by the optoelectronic device) and an electrical contact for connecting the thin film transistor. Specifically, the reflective layer can include a surface that can provide a back gate electrode contact for the thin film transistor. In this way, the structure of the integrated circuit can be simplified and the manufacturing time can be shortened.
[0029] The optoelectronic device may include an LED. The optoelectronic device is preferably a micro-LED. Alternatively, the optoelectronic device may also include a QD-LED, an organic LED or any other type of LED of suitable size.
[0030] The optoelectronic device may be configured to emit light having a predetermined wavelength or a predetermined wavelength bandwidth. In this way, a plurality of integrated circuits may be provided, each of which emits light at a different wavelength or wavelength band, thereby providing a colored display. For example, the optoelectronic device may be configured to emit red, green, or blue light for an RGB display.
[0031] According to another aspect of the present invention, there is provided a flat panel display component comprising an array of integrated circuits as described above. In particular, the flat panel display component may comprise a single flat panel display component. The flat panel display component may comprise processing a plurality of integrated circuits as defined in the appended claims on a single substrate. In particular, the display component may comprise a substrate and a plurality of sequentially deposited layers, the plurality of sequentially deposited layers being processed to form an array of integrated circuits as defined in the appended claims. The flat panel display component may comprise a single reflective layer deposited on an array of optoelectronic devices.
[0032] An array of integrated circuits can be deposited on a single substrate to form a unitary display. After fabrication is complete, the integrated circuits can be removed from the substrate.
[0033] The flat panel display assembly may also include circuitry coupled to the top surface of the flat panel display assembly for driving the electronic components of the display. The circuitry may include additional transistors, capacitors, and / or other circuitry for independently addressing each integrated circuit. The circuitry may be referred to as the "backplane" of the flat panel display.
[0034] According to another aspect of the present invention, a method for manufacturing a flat panel display component is provided, comprising: depositing an array of light-emitting optoelectronic devices on the top surface of a substrate; placing a reflective layer above the array of optoelectronic devices; and depositing an array of thin-film transistors above the reflective layer, each thin-film transistor being operatively connected to a corresponding optoelectronic device.
[0035] By providing a reflective layer between the optoelectronic device and the thin film transistor, the reflective layer is capable of reflecting the upward light from the optoelectronic device in a downward direction. In this way, the display component can be arranged so that the lower side of the display component faces the display direction, rather than the upper side of the component (including the TFT) facing the display direction as in a conventional single device. The reflective layer directs most of the light from the optoelectronic device to be emitted in a downward direction, thereby improving the efficiency of the flat panel display. The improved efficiency of the integrated circuit enables the optoelectronic device to operate at a lower temperature to achieve the same light output, thereby improving the performance and service life of the flat panel display. In addition, since the light from each optoelectronic device is emitted in a downward direction, the thin film transistor does not absorb or scatter any light emitted from the optoelectronic device; this also reduces the chance of high-intensity light damaging the thin film transistor. This also means that the area of each integrated circuit does not need to be shared by the corresponding thin film transistor and optoelectronic device; in this way, the thin film transistor can cover a larger area of each integrated circuit without blocking the light emitted from the optoelectronic device, which enables the thin film transistor to provide more current for the flat panel display.
[0036] The deposition may be performed using chemical vapor deposition techniques or vapor phase epitaxy techniques.
[0037] The method also includes separating the substrate from the layers above the substrate. This can be achieved by using a laser. Advantageously, this enables the LEDs and integrated circuits to be transferred to another substrate (e.g., a flexible substrate) to make a flexible display.
[0038] The method also includes etching a plurality of vias through the reflective layer to provide an electrical path from each thin film transistor to the corresponding anode and cathode layers.
[0039] Although the aspects described above relate to integrated circuits for flat panel displays, flat panel display components, and methods for manufacturing flat panel display components, it will be understood that the optoelectronic device may be a light-sensing optoelectronic device rather than a light-emitting optoelectronic device. In this way, an optical sensor such as a CCD array may be provided. For example, an integrated circuit for an optical sensor is provided, the integrated circuit comprising: a light-sensing optoelectronic device having a top surface and an opposing bottom surface; a thin film transistor formed on the top surface of the light-sensing optoelectronic device, the thin film transistor being operatively connected to the optoelectronic device; a reflective layer formed between the top surface of the optoelectronic device and the thin film transistor, the reflective layer being arranged to reflect light toward the thin film transistor in a direction toward the optoelectronic device.
[0040] The light-sensing optoelectronic device may be a photodiode.
[0041] It will be understood by the skilled person that any device feature described herein can be provided as a method feature, and vice versa. It will also be understood that the specific combination of various features described and defined in any aspect described herein can be implemented and / or provided and / or used independently.
[0042] Moreover, it will be understood that the invention herein described is in the form of embodiments, details of which may be modified within the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] One or more embodiments will now be described by way of example with reference to the accompanying drawings, in which:
[0044] Figure 1 A schematic diagram showing a display component formed of a plurality of pixels;
[0045] Figure 2A and Figure 2B A transistor array for a display backplane, and an integrated circuit that may form a portion of the transistor array are shown;
[0046] Figure 3 A typical integrated circuit in a top emission configuration is shown;
[0047] Figure 4An embodiment of an integrated circuit for a monolithic display is shown, the integrated circuit being configured for bottom emission;
[0048] Figure 5 An embodiment of a color pixel composed of three integrated circuits having separate color LEDs is shown; and
[0049] Figure 6 An alternative embodiment of a color pixel combined from three integrated circuits with separate color filters is shown. DETAILED DESCRIPTION
[0050] In the following description and drawings, corresponding features may preferably be identified using corresponding reference numerals, so that the common features do not need to be described for each embodiment.
[0051] For the sake of clarity and brevity, the terms "top", "bottom", "above", and "below" refer to directions and relative positions described in the figures. It will be understood that these terms do not require that the embodiments described herein can only operate in a specific orientation. In addition, unless otherwise expressly provided, terms such as "positioned", "located", "placed", etc. are intended only to indicate the relative position of two components or layers, and do not exclude that other elements are positioned between the two components.
[0052] Figure 1 A schematic diagram of a display element 1 is shown, comprising an array of pixels 5. Although Figure 1 Only an array with 40 pixels 5 is depicted, but it will be understood that any number of pixels 5 may be included in the array to provide a particular resolution. As described in detail later, the pixels 5 may include sub-pixels configured to emit light in predetermined colors, such as to provide an RGB display. In addition, the pixels may be arranged at a certain pixel density and / or pixel pitch to provide a display suitable for a variety of devices. For example, a high density of pixels 5 may be particularly suitable for displays of VR headsets or AR headsets. Other components may be combined with the display component 1 to provide a display device. For example, a protective layer, a frame, an electrical connection and / or any other applicable components may be combined with the display component 1.
[0053] Each pixel 5 (or sub-pixel) of the display component 1 can be addressed independently, and the state of each pixel 5 is controlled by one or more thin film transistors (TFTs). The TFT is used as a switching device to control the operation of each pixel, and / or as a driver device to drive the pixel. For example, the TFT can be used as a switch and current driver for a micro LED display, an organic LED (OLED) display, or a quantum dot light emitting diode (QD-LED) display. Each pixel of the display component 1 is provided by one or more integrated circuits 10 arranged on a substrate 12. For example, one integrated circuit 10 can provide one pixel 5 of the display component 1, or multiple integrated circuits 10 can be used to provide multiple sub-pixels of the display component 1. Figure 1 As shown in the exemplary pixel 5 in FIG. 1 , each pixel 5 is provided with three integrated circuits 10 . Figure 5 and Figure 6 Two ways of configuring the integrated circuit 10 for a color display will be discussed in more detail. TFTs can also be used to operate LEDs that provide backlight zones for a liquid crystal display (LCD), where each LED provides backlight for multiple LCD pixels. By dividing the backlight into multiple backlight zones (where each of the backlight zones is controlled by a separate TFT), the energy efficiency and contrast of the LCD can be improved because the zones can be completely turned off when not needed. For example, one TFT can be used to switch the LED backlight for a region having approximately 100 LCD pixels. Therefore, the term "integrated circuit 10" as used herein can refer to a single pixel 5 of a display, and can also refer to a backlight zone provided by an LED, where each backlight zone corresponds to multiple LCD pixels.
[0054] Figure 1 The display component 1 in is a single display component 1, in which the integrated circuit 10 is deposited (or "grown") on the substrate 12, rather than being transferred to the substrate 12 from another location ("source wafer"). In this way, the substrate 12 of the display component 1 can also be called a source wafer. In a single display, the integrated circuit 10 can be produced by forming several layers on the substrate 12. The formation of the layers can be achieved by using chemical vapor deposition (CVD) technology (such as plasma enhanced chemical vapor deposition (PECVD) technology or metal organic chemical vapor deposition (MOCVD) technology) or epitaxial technology (such as metal organic vapor phase epitaxy (MOVPE) technology or molecular beam epitaxy (MBE) technology). These technologies deposit a thin film (or "layer") of material on the substrate 12 to form each integrated circuit 10. Subsequently, the selective removal of parts of the layer is achieved by (dry) etching in a process called patterning. In this way, adjacent integrated circuits can be electrically isolated from each other, and channels are formed as electrical paths through each layer.
[0055] Now refer to Figure 2A and Figure 2BThe process of individually addressing the pixels 5 is described in more detail. Figure 2A A transistor array 100 for a backplane of a display is shown, wherein the transistor array 100 includes a plurality of integrated circuits 102 arranged in a conventional array of rows and columns. Each integrated circuit 102 includes a thin film transistor (TFT) 108. Similar to a conventional active matrix display, each TFT acts as a switch for controlling the current applied to a corresponding pixel capacitor 101, wherein each integrated circuit 102 may include 1T-1C, 2T-1C, or other combinations of transistors and capacitors.
[0056] The backplane includes a series of row lines (scanning lines or gate lines) 103 connected to the gate electrodes of each TFT 108 in a common row, wherein each row line 103 is connected to a row driver 104 for applying a voltage to the gate electrode of each TFT in a particular row. The source or drain of each TFT 108 in a particular column is connected to a column line (or data line) 105. A row driver 106 is connected to each gate line 105, and a column driver 106 is connected to each data line 105. Each integrated circuit 102 can be addressed independently by providing a voltage pulse with the row driver 104, thereby turning on each TFT 108 in a row and providing the required data voltage to the source or drain of each TFT 108. By scanning each row in turn and applying a data voltage to each data line 105, a data signal can be written to the pixel capacitor 101 of the matrix. In this way, the transistors and capacitors of each integrated circuit 102 can maintain the state of this pixel when other pixels are addressed.
[0057] Figure 2B An embodiment of a 2T-1C integrated circuit 102 is described, comprising: a selection or switching TFT 108, a drive TFT 20, and a storage capacitor 101. When a row line (scan line) is turned on, a data signal (V Data ) can write a voltage into the storage capacitor 101, which is also connected to the gate electrode of the driving TFT 20. If V DD and V SS If a voltage is applied to the gate electrode of the drive TFT 20, then a change in the resistance of the drive TFT 20 will cause a current to flow through the LED 15 relative to the voltage applied to the gate electrode of the drive TFT 20, thereby adjusting the amount of light emitted by the display.
[0058] Figure 3 An embodiment of a typical integrated circuit 10' is described which may form part of a monolithic display component 1 as described above. The integrated circuit 10' comprises a substrate layer 12' having a top surface 12a' and a bottom surface 12b'.
[0059] An optoelectronic device, such as a micro-LED 15', is disposed on the top surface 12a' of the substrate 12' and outputs light from the display in the direction of the arrow. The optoelectronic device 15' is positioned between a cathode layer 16' and an anode layer 18'. In the present embodiment, the cathode layer 16' is deposited directly on the top surface 12a' of the substrate 12', while the anode layer 18' is deposited on top of the optoelectronic device 15'. A thin film transistor (TFT) 20' is disposed on the substrate 12' and acts as a switch and / or driver for controlling the operation of the optoelectronic device 15'. It will be appreciated that other components may also be present in the integrated circuit 10', such as Figure 2B For example, although Figure 3 Only a single TFT is depicted in FIG. 1 , but it will be appreciated that any number of TFTs may be present in the integrated circuit 10 ′ to provide appropriate switching and driving for the optoelectronic device 15 ′. In addition, additional components such as storage capacitors may also be included.
[0060] The TFT 20' is connected to the cathode layer 16' through the first through hole 22a' and to the anode layer 18' through the second through hole 22b'. The layers and through holes described above can be embedded in the base layer 11', thereby providing physical integrity to the display component 1. In a single display device, the layers forming the micro-LEDs 15' are deposited on the substrate 12' and patterned to form an array of multiple (possibly millions) of micro-LEDs 15' arranged in an array on the substrate 12'. Subsequent layers are deposited and patterned to form an array of TFTs 20', each TFT 20' being operatively connected to a corresponding micro-LED 15'.
[0061] As used herein, the term "integrated circuit" may refer to an integrated circuit Figure 3 All of the features described above are related, including optoelectronic devices and thin film transistors. It will be understood that the term "integrated circuit" may also refer to a subset of these features, or may refer to a circuit with any number of additional components, such as other thin film transistors and / or one or more capacitors.
[0062] Since the TFT 20' and the through hole 22' are substantially opaque to light, the area of the integrated circuit 10' needs to be shared between the TFT 20' and the optoelectronic device 15' so that the TFT 20' and the through hole 22' do not block the light from the optoelectronic device 15'. This reduces the available output area of the optoelectronic device 15' and also reduces the current that can be driven through the TFT 20'. In addition, the optoelectronic device 15' will also emit light in directions other than the direction of the arrow, and this light will be wasted. Therefore, Figure 3 The circuit 10 ′ described in is representative of a prior art monolithic micro-LED display which has limited efficiency.
[0063] Figure 4 An embodiment of an integrated circuit 10 is shown, which may constitute a single display component 1 (such as Figure 1 The integrated circuit 10 is a part of the display unit 1). Figure 3 The integrated circuit 10' in FIG. 1 has some common features; for example, the integrated circuit 10 includes a substrate layer 12 having a top surface 12a and a bottom surface 12b. However, Figure 4 The integrated circuit 10 shown is configured to emit light downward. Therefore, the substrate layer 12 is at least partially transparent, preferably at least 70% transparent. A suitable material for the substrate layer 12 is sapphire, but other materials such as zinc oxide or silicon carbide can also be used. The substrate layer 12 is preferably polished on the bottom surface 12b so that the image quality from the display component 1 is not affected. The substrate layer 12 can be polished on the top surface 12a and the bottom surface 12b, or can be patterned on the top surface 12a to reduce the stress in the layer grown on the top of the substrate 12. More specifically, the substrate 12 can be a c-oriented conical patterned sapphire substrate (CPSS), or can be a traditional unpatterned flat sapphire substrate (USS). Optionally, one or more lenses (not shown) and / or color filters can be provided on the bottom surface 12b of the substrate 12 to collimate or focus light or adjust the wavelength of light leaving the substrate 12. Optionally, the substrate layer 12 can be thinned by background grinding or chemical etching before polishing to reduce the distance between the LED and the optical element. In certain embodiments, substrate 12 may be removed from integrated circuit 10 at a later stage of the manufacturing process.
[0064] An optoelectronic device such as a micro-LED 15 is placed on the top surface 12a of the substrate layer 12. Alternatively, the optoelectronic device may include an OLED or a QD-LED or any other suitable light-emitting device. The micro-LED 15 may include several layers, such as a multi-quantum well (MQW) structure of an InGan / Gan layer. The optoelectronic device 15 is located between a cathode layer 16 and an anode layer 18. In the present embodiment, the cathode layer 16 is deposited directly on the top surface 12a of the substrate layer 12, and the anode layer 18 is deposited on the optoelectronic device 15, but it will be understood that these layers can be exchanged. The materials of the cathode layer 16 and the anode layer 18 are preferably transparent, more preferably having a transparency of 70%, so as to maximize the light output from the optoelectronic device 15. The cathode layer 16 may include gallium nitride (n-GaN), which can be grown on the sapphire wafer 12 due to the lattice matching of gallium nitride and sapphire crystal. The anode layer 18 may include indium tin oxide (ITO).
[0065] The reflective layer 30 is located above the optoelectronic device 15. The reflective layer 30 is arranged to reflect the uplink light emitted from the optoelectronic device 15 so that the light passes downward through the substrate 12 and leaves from the bottom surface 12b of the substrate 12. The reflective layer 30 preferably covers at least 50% of the area of the optoelectronic device 15. The reflective layer 30 can be a metal layer and can include Al, Ag, Mo and / or Au. Alternatively, the reflective layer 30 can include a distributed Bragg reflector having polarization characteristics and can be used to illuminate a liquid crystal display (LCD) positioned below the LED display device.
[0066] A thin film transistor (TFT) 20 is disposed on the optoelectronic device 15 and the substrate 12, and acts as a switch and / or a driver for controlling the operation of the optoelectronic device 15. It will be understood that other components may also be present in the integrated circuit 10, such as Figure 2B For example, although Figure 4 Only a single TFT is depicted in the figure, but it will be understood that any number of TFTs may be present in the integrated circuit 10 to provide appropriate switching and driving for the optoelectronic device 15. In addition, additional components such as storage capacitors may also be included. Additional components (such as additional TFTs and capacitors) may be deposited on the optoelectronic device 15 in a similar manner to the TFT 20 shown.
[0067] The TFT may include a semiconductor layer arranged between a source electrode and a drain electrode. The TFT may include a gate electrode for controlling the current flowing in the semiconductor layer. As described in WO 2022 / 101644, the TFT may be a dual-gate electrode device, wherein the front gate electrode is on one side of the semiconductor layer, and the back gate electrode is arranged on the opposite side of the semiconductor layer, and the current flowing in the semiconductor layer between the source electrode and the drain electrode can be controlled by applying an appropriate voltage to the front gate electrode and / or the back gate electrode. The back gate electrode is defined as an electrode under the semiconductor layer and closest to the substrate.
[0068] The TFT is deposited directly on the optoelectronic device 15. More specifically, the layers forming the optoelectronic device 15 and the TFT 20 are deposited sequentially on the same substrate 12 to form a single device. In some embodiments, the reflective layer 30 can also provide a back gate electrode contact for the TFT. Specifically, the reflective layer can be a metal layer that is not only suitable for reflecting light, but also provides electrical contact for the TFT. In this case, the reflective layer 30 can be connected to the TFT by, for example, a through hole.
[0069] In the present embodiment, the TFT 20 is connected to the cathode layer 16 through the first through hole 22a, and is connected to the anode layer 18 through the second through hole 22b. The layers and through holes described above can be embedded in the base layer 11 to provide physical integrity for the display component 1. Suitable materials for the base layer 11 can be silicon nitride, silicon oxide, or can be organic polymers, which can be cross-linked with ultraviolet light or heat. Examples of suitable cross-linked organic polymers include polymers with acrylate functional groups, such as the polymers in WO2020 / 002914. The through hole 22 can be patterned by photolithography and chemical development processes, or patterned using a combination of dry etching and a patterned protective layer (such as a photoresist).
[0070] The TFT is preferably deposited on top of the reflective layer 30 so that the reflective layer 30 is positioned between the TFT 20 and the optoelectronic device 15. This is because the TFT is generally opaque, so it is best to reflect toward the substrate 12 before the light is blocked or scattered by the TFT. In addition, it is also preferred to protect the TFT from the influence of light, because light will degrade the performance of the TFT over time. This degradation may be caused by the photogenerated effect of high-intensity light in the organic semiconductor, which causes the turn-on voltage of the device to change, thereby affecting the current driving behavior of the device. This may cause unpredictable display performance and ghosting effects. In this configuration, the reflective layer 30 may have openings, thereby allowing the through holes 22a and 22b to be connected to the cathode layer 16 and the anode layer 18. Alternatively, the reflective layer 30 may be positioned on top of the TFT, which simplifies the connection between the TFT and the optoelectronic device 15, but may make it impossible to effectively reflect light toward the substrate 12.
[0071] As used herein, the term "integrated circuit" may refer to Figure 4 All features related to the invention include optoelectronic devices and thin film transistors. It will be understood that the term "integrated circuit" may also refer to a subset of these features, or may refer to a circuit with any number of additional components, such as other thin film transistors and / or one or more capacitors.
[0072] The embodiment described above provides several advantages. Firstly, the use of a reflective layer 30 to direct the light emitted upwards through the substrate means that the TFT 20 can cover a larger area of each pixel without obstructing the optoelectronic device 15. Therefore, the TFT 20 of the present invention can provide more current for each pixel than a single device with a limited TFT area in the prior art. Secondly, light emitted in a direction opposite to the intended emission direction is no longer wasted, but reflected, which allows a larger portion of the light emitted by the LED 15 to be emitted in the intended emission direction, thereby producing a more efficient display component 1. This means that the optoelectronic device can operate at a lower temperature to produce the same light output; this reduces the stress on the TFT, thereby improving the performance and service life of the integrated circuit 10.
[0073] A problem associated with the manufacture of a single display is that the metals used in the reflective layer 30 and the optoelectronic device 15 may be damaged by high temperatures (e.g., temperatures exceeding 150° C.). For inorganic TFTs, such as amorphous silicon (a-Si), low temperature polycrystalline silicon (LTPS), and / or indium gallium zinc oxide (IGZO), a PECVD process can be used to deposit a high-quality SiNx dielectric layer. However, the above process is only effective at temperatures above 300° C., which can damage the optoelectronic device 15 and / or the reflective layer 30 already present in the integrated circuit 10.
[0074] For these reasons, it is particularly advantageous when the TFT is an organic TFT (OTFT). OTFTs are deposited onto the display element 1 at a much lower temperature than when inorganic TFTs are deposited, so damage to the reflective layer 30 and / or optoelectronic device 15 can be avoided. For example, OTFTs can be processed at temperatures as low as 80°C, as they only need to be heated to remove the coating solvent in the formulated ink. The low temperature deposition process of OTFTs ensures that the reflective layer and LED are not damaged, so it is particularly advantageous to use OTFTs to form a single device.
[0075] Suitable structures and materials for OTFTs are described in WO2022 / 101644 and WO2020 / 002914. For example, the OTFT may include: an organic semiconductor (OSC) layer, an organic gate insulator (OGI) layer, a sputtered resistor layer (SRL), a substrate, and a base layer. The OSC layer may include at least one semiconductor ink, the semiconductor ink including a small molecule organic semiconductor and an organic binder. The OGI layer of the OTFT may include a material as described in WO2020 / 002914. The SRL may include a cross-linked organic layer as described in WO2020 / 002914. The cross-linked organic layer is preferably obtainable by a polymerization solution, wherein the solution includes: at least one non-fluorinated multifunctional acrylate, a non-acrylate organic solvent, a cross-linkable fluorinated surfactant, and a silicone surfactant, wherein the silicone surfactant is preferably a cross-linkable silicone surfactant, and may also be a non-fluorinated surfactant. The silicone surfactant may be an acrylate silicone surfactant and / or a methacrylate functionalized silicone surfactant. The substrate may include glass or a polymer. The base layer may comprise an organic crosslinked layer, with suitable materials being described in WO2020 / 002914.
[0076] Contact now Figure 5 and Figure 6 An integrated circuit 10 such as described above is described which may be used to provide colour sub-pixels to produce a colour display element 1 .
[0077] Figure 5 Three integrated circuits 10 are described, wherein each optoelectronic device 15 is configured to emit light of a predetermined color, such as light of a specific wavelength or within a specific wavelength bandwidth. For example, the first optoelectronic device 15-1 emits red light, the second optoelectronic device 15-2 emits green light, and the third optoelectronic device 15-3 emits blue light, but each optoelectronic device 15 may also have other colors. The layers required for each optoelectronic device may be deposited sequentially. The first optoelectronic device 15-1 is controlled by a first TFT 20-1 (preferably a first OTFT 20-1). The second optoelectronic device 15-2 is controlled by a second TFT 20-2 (preferably a second OTFT 20-2). The third optoelectronic device 15-3 is controlled by a third TFT 20-3 (preferably a third OTFT 20-3). In this way, the brightness of each of the three integrated circuits 10 can be individually controlled by the OTFT 20, so that the pixel formed by the three sub-pixels can display a wide range of colors. The three integrated circuits 10 can be deposited on the substrate 12 in sequence and patterned to the desired size. A through hole can be formed between the TFT and the anode contact.
[0078] Figure 6Three integrated circuits 10 are described, wherein each optoelectronic device 15 is configured to emit light of substantially the same color. Advantageously, this can simplify the manufacturing process of the display because all integrated circuits 10 can be deposited on substrate 12 using the same process. For example, all optoelectronic devices can emit blue light. In order to provide colored sub-pixels, one or more color filters 35 can be disposed on the lower surface 12a of substrate 12. In this embodiment, a red filter 35-1 is disposed below the first optoelectronic device 15-1, and a green filter 35-2 is disposed below the second optoelectronic device 15-2. Although no filter is disposed below the third optoelectronic device 15-3, it will be understood that a filter can be disposed there. In addition, the filters 35 can be of different colors. The color filters 35 can be made by light patterning or by inkjet printing. Because the lower surface 12b of substrate 12 is flat and polished, it is much simpler to place the filters 35 on substrate 12 than to place the filters 35 on top of the backplane array (as required for top-emitting displays). The first optoelectronic device 15-1 is controlled by a first TFT 20-1 (preferably a first OTFT 20-1). The second optoelectronic device 15-2 is controlled by a second TFT 20-2 (preferably a second OTFT 20-2). The third optoelectronic device 15-3 is controlled by a third TFT 20-3 (preferably a third OTFT 20-3). In this way, the brightness of each of the three integrated circuits 1 can be controlled individually by the (O)FT20, so that the pixel 5 formed by the three sub-pixels can display a wide range of colors. In some embodiments, the filter 35 and the color optoelectronic device 15 can be used simultaneously.
[0079] exist Figure 5 and Figure 6 In the embodiment, a common cathode layer 16 is shared between the three sub-pixels, and it will be understood that a separate through hole can connect each TFT 20 to a separate cathode layer 12. The entire display component 1 can share a cathode layer 16, which can simplify the manufacture of the display component 1. In other embodiments, the cathode layer 16 can be patterned to provide a separate cathode layer 16 for each (sub) pixel. This is beneficial because it can allow the optoelectronic devices 15 to be arranged in series, thereby improving current efficiency.
[0080] A method for manufacturing a flat panel display component 1 will now be described in detail. The display component 1 includes a plurality of components such as Figure 4 The integrated circuit 10.
[0081] First, a substrate 12 is provided, such as a sapphire wafer as described above. Patterning can be performed on the top surface 12a of the substrate 12 to reduce stress in the layer that will subsequently grow on the substrate 12. For example, a CPSS can be prepared by using a thermal photoresist (PR) reflow method and a dry etching method, which provides a conical convex pattern. The substrate 12 can be polished at its bottom surface 12b at any stage in the manufacture of the flat panel display component.
[0082] In order to provide an electrode contact for the optoelectronic device 15, a cathode layer 16 may be deposited on the substrate 12 using a chemical vapor deposition (CVD) technique such as PECVD or MOCVD. In an exemplary MOCVD process, trimethylgallium, trimethylindium, and ammonia may be used as precursors of gallium, indium, and nitrogen. Biscyclopentadienylmagnesium and disilane may be used as p-type doping sources and n-type doping sources, respectively, and hydrogen may be used as a carrier gas.
[0083] The cathode layer 16 may include n-GaN that can be grown directly on the top surface 12a of the substrate 12 due to lattice matching with the sapphire wafer. A common cathode layer 16 can be arranged across the entire flat panel display component 1. If a separate portion of the cathode layer 16 corresponds to each optoelectronic device 15, the cathode layer 16 may be patterned to provide the separate portions. The patterning step may be performed before depositing the optoelectronic device 15, but is preferably performed after the optoelectronic device is deposited and patterned.
[0084] Subsequently, an array of optoelectronic devices 15 is deposited on top of the cathode layer 16, which deposition may be performed in multiple deposition stages. For example, a micro-LED may include a GaN nucleation layer (e.g., 25 nm thick), an undoped GaN layer (e.g., 2.5 μm thick), a highly doped n-type GaN layer (e.g., 2 μm thick), multiple pairs (e.g., 13 pairs) of InGaN (4.6 nm) / GaN (5.2 nm) MQWs, a p-type AlGaN electron blocking layer (e.g., 25 nm thick), and a Mg-doped GaN layer (e.g., 100 nm thick).
[0085] The optoelectronic devices 15 can be patterned by dry etching, such as using an inductively coupled plasma (ICP) dry etching technique. The dry etching technique can be used to etch through the p-GaN layer and the MQW active area until the n-GaN layer is exposed. Subsequently, an anode layer 18 is deposited on top of the p-GaN layer of the array of optoelectronic devices 15 using an electron beam evaporator. The anode layer may include indium tin oxide (ITO). A base layer 11 may be deposited around the above layers to provide physical integrity to the display component 1. A separate patterning step may then be performed to isolate each optoelectronic device 15 from its neighboring devices.
[0086] A reflective layer 30 is also deposited over the array or optoelectronic device 15, such as over the anode layer 18. The reflective layer 30 may be a metal layer and may include Al, Ag, Mo, and / or Au.
[0087] The via 22 is formed by etching through the base layer 11 and / or the reflective layer 30 to provide a passage between the cathode layer 16 and the anode layer 18. A metal layer is then deposited, patterned, and etched over the path in order to provide electrical contact between the cathode layer 16 and the anode layer 18. The via 22 may be etched in stages in the steps described above.
[0088] A TFT array is deposited on the reflective layer, wherein each TFT in the array corresponds to an optoelectronic device 15. Each TFT is operatively connected to the corresponding optoelectronic device 15, such as through a through hole 22. The deposition of the TFT array may include several steps. For example, a method for depositing an OTFT having a front gate electrode and a back gate electrode will now be described, although it is also applicable to a single gate electrode OTFT. First, a back gate electrode is deposited, which may include a metal layer similar to the reflective layer 30. In certain embodiments, the reflective layer 30 may serve as a back gate electrode for the TFT. Then, a dielectric base layer is deposited on the back gate electrode, and a source and drain electrode are patterned on top of the base layer. Subsequently, an organic semiconductor (OSC) layer is deposited to cover the source and drain electrodes, and fill the space between the source and drain electrodes, thereby providing an active channel for the device. One or more organic dielectric layers are then deposited on the OSC layer, and the front gate electrode layer is patterned to form a front gate electrode. Dry etching may then be used to further pattern the OSC layer, the dielectric layer, and the gate electrode layer, thereby removing the organic layer outside the TFT device. A passivation layer is then deposited to surround the previously deposited layers, and several vias are then patterned in the passivation layer to access the required electrodes in a similar manner as described above. A final metal layer interconnect is then applied and patterned to join the OTFT layer to the LED layer.
[0089] Optionally, the substrate 12 can be separated from the layers thereon, such as the cathode layer 16 and the optoelectronic device 15. The substrate can be removed by any suitable etching technique or by using a laser, such as laser ablation. In this way, the integrated circuit 10 can be separated from the substrate so that the light emitted downward does not have to pass through the substrate, further improving efficiency.
[0090] Although the above description is directed to exemplary embodiments of the present invention, it will be understood that the present invention described herein is in the form of pure embodiments and that its details can be modified within the scope of the present invention. In addition, it will be understood by those skilled in the art that the present invention is not limited to the details shown in the embodiments disclosed herein and the accompanying drawings that are not described in detail herein or are not limited in the claims. In fact, even if such redundant features are removed, the present invention will not be affected.
[0091] In addition, those skilled in the art will be able to understand other embodiments of the present invention after reading this specification, and those skilled in the art will be able to conceive other embodiments of the present invention without departing from the basic scope of the present invention, which is defined by the following claims.
Claims
1. An integrated circuit for a flat panel display, the integrated circuit comprising: a light emitting optoelectronic device having a top surface and an opposing bottom surface; a thin film transistor formed on a top surface of the light-emitting optoelectronic device, the thin film transistor being operatively connected to the optoelectronic device; A reflective layer is formed between the top surface of the optoelectronic device and the thin film transistor, and is arranged to reflect light emitted from the optoelectronic device so that the reflected light is emitted from the integrated circuit in a direction corresponding to the bottom surface of the light-emitting optoelectronic device.
2. The integrated circuit of claim 1 further comprising a substrate having a top surface and an opposite bottom surface, wherein the optoelectronic device is formed on the top surface of the substrate and the reflective layer is arranged such that the reflected light is emitted through the bottom surface of the substrate. 3 . The integrated circuit according to claim 2 , wherein the substrate is a sapphire wafer substrate, preferably a bottom-polished sapphire wafer substrate.
4. An integrated circuit according to claim 2 or 3, further comprising one or more color filters on the bottom surface of the substrate.
5. An integrated circuit according to any one of claims 2 to 4, further comprising one or more lenses located below a bottom surface of the substrate, the one or more lenses being arranged to collimate light passing through the substrate.
6. An integrated circuit as claimed in any preceding claim, wherein the thin film transistor is operatively connected to the optoelectronic device via one or more vias passing through the reflective layer.
7. An integrated circuit as claimed in any preceding claim, wherein the thin film transistor comprises an organic thin film transistor.
8. An integrated circuit according to any of the preceding claims, wherein the reflective layer is a metal layer, preferably comprising one or more of Al, Ag, Mo and / or Au.
9. The integrated circuit of any one of claims 1 to 7, wherein the reflective layer comprises a distributed Bragg reflector.
10. An integrated circuit according to any of the preceding claims, comprising an anode layer deposited above the optoelectronic device and below the reflective layer, wherein the anode layer preferably has a transparency of at least 70% 11. An integrated circuit according to any one of the preceding claims, wherein the reflective layer covers at least 50% of the area of the optoelectronic device 12. An integrated circuit as claimed in any preceding claim, wherein the reflective layer comprises a surface providing a back gate electrode contact for the thin film transistor.
13. An integrated circuit as claimed in any preceding claim, wherein the optoelectronic device comprises an LED.
14. An integrated circuit as claimed in any preceding claim, wherein the optoelectronic device is configured to emit light having a predetermined wavelength or having a predetermined wavelength bandwidth.
15. A flat panel display component comprising an array of integrated circuits according to any preceding claim.
16. The flat panel display component of claim 15, wherein the array of integrated circuits is deposited on a single substrate to form a monolithic display.
17. A flat panel display assembly according to claim 15 or 16, further comprising circuitry coupled to a top surface of the flat panel display assembly for driving electronic components of the display.
18. A method for manufacturing a flat panel display component, comprising: depositing an array of light emitting optoelectronic devices on a top surface of the substrate; placing a reflective layer on top of the optoelectronic device array; and An array of thin film transistors is deposited over the reflective layer, each thin film transistor being operatively connected to a corresponding optoelectronic device.
19. The method of claim 18, further comprising separating the substrate from a layer above the substrate.
20. The method of claim 18 or 19, further comprising etching a plurality of vias through the reflective layer to provide electrical paths from each thin film transistor to the corresponding anode and cathode layers.
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