Chip testing method and device, equipment and storage medium

Abstract

The invention is suitable for the technical field of chips, and provides a chip testing method, device and equipment and a storage medium, the method is applied to a temperature transmitter chip, and the method comprises the following steps: obtaining direct current parameters of a chip to be tested, the direct current parameters comprising at least one of a current parameter and a voltage parameter; performing a direct current parameter test according to the direct current parameter of the to-be-tested chip to obtain a first test result; acquiring a temperature parameter of the to-be-tested chip; performing a temperature parameter test according to the temperature parameter of the to-be-tested chip to obtain a second test result; and when the first test result or the second test result does not meet the preset condition, determining that the to-be-tested chip is an unqualified chip. According to the scheme, through combination of direct current parameter detection and temperature parameter detection, unqualified chips can be effectively identified and screened out, and the quality and performance of final products are guaranteed.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a chip testing method, device, equipment and storage medium. Background Art

[0002] Chip testing refers to the process of evaluating and verifying chips (integrated circuits) during the production of semiconductor devices to ensure that their performance and functions meet design specifications. Chip testing can be divided into multiple stages, including design verification, functional testing, parameter testing, reliability testing, etc.

[0003] A temperature transmitter chip is an electronic component used to measure temperature and convert it into a standard signal (usually a voltage or current signal). These chips are often used in industrial automation, environmental monitoring, HVAC (heating, ventilation and air conditioning) systems, automobiles, home appliances, and other applications that require temperature monitoring and control. Temperature transmitter chips can process the temperature data collected by temperature sensors (such as thermocouples or thermistors) and output them as standardized instrument signals.

[0004] Traditional temperature transmitter chip testing methods only test at specific temperature points and cannot fully reflect the performance of the device in actual applications. Especially when the temperature changes frequently, it is difficult to obtain accurate chip test results. Summary of the invention

[0005] The embodiments of the present application provide a chip testing method, device, equipment and storage medium, which can solve the technical problem of how to accurately test whether a temperature transmitter chip is qualified.

[0006] In a first aspect, an embodiment of the present application provides a chip testing method, which is applied to a temperature transmitter chip, comprising:

[0007] The DC parameters of the chip to be tested are obtained, where the DC parameters include at least one of the following: a current parameter and a voltage parameter.

[0008] A DC parameter test is performed according to the DC parameters of the chip to be tested to obtain a first test result.

[0009] Get the temperature parameters of the chip to be tested.

[0010] A temperature parameter test is performed according to the temperature parameter of the chip to be tested to obtain a second test result.

[0011] When the first test result or the second test result does not meet the preset condition, the chip to be tested is determined to be a failed chip.

[0012] In one implementation, performing a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result includes:

[0013] Set the voltage of all pins of the chip to be tested to 0 volts;

[0014] A power management device is used to apply a preset current to a preset pin, and a voltage of the preset pin is detected to obtain a first test result.

[0015] In one implementation, detecting a voltage of a preset pin to obtain a first test result includes:

[0016] detecting a first voltage when a negative current flows through a diode connected to ground;

[0017] If the first voltage is lower than a first preset threshold, the preset pin is deemed to be open circuit;

[0018] If the first voltage is higher than the second preset threshold, the preset pin is determined to be short-circuited.

[0019] In one implementation, detecting a voltage of a preset pin to obtain a first test result includes:

[0020] detecting a second voltage when a forward current flows through a diode connected to a power source;

[0021] If the second voltage is higher than a third preset threshold, the preset pin is deemed to be open circuit;

[0022] If the second voltage is lower than a fourth preset threshold, the preset pin is determined to be short-circuited.

[0023] In one implementation, performing a temperature parameter test according to a temperature parameter of a chip to be tested to obtain a second test result includes:

[0024] Acquire temperature values ​​of the chip to be tested twice to obtain a first temperature value and a second temperature value;

[0025] Calculate the temperature difference between the first temperature value and the second temperature value;

[0026] When the temperature difference satisfies the preset temperature difference, the temperature is dynamically written into the chip to be tested to obtain a second test result.

[0027] In one implementation, the temperature value of the chip to be tested is calculated according to the level width of the temperature signal collected by the temperature sensor. The relationship between the level width and the temperature value of the chip to be tested is:

[0028]

[0029] Wherein, Temp represents the temperature value of the chip to be tested, T represents the level width of the temperature signal; and T1 represents the level width of the temperature signal.

[0030] In one implementation, the first temperature value and / or the second temperature value is converted into binary code and written into the chip to be tested to obtain binary data;

[0031] The binary data is read and verified. If the read and verification fails, the chip to be tested is deemed to be a failed chip.

[0032] In a second aspect, an embodiment of the present application provides a chip testing device, which has the function of implementing the method in the first aspect or any possible implementation thereof. Specifically, the device includes a unit for implementing the method in the first aspect or any possible implementation thereof.

[0033] In one embodiment, the device comprises:

[0034] The acquisition unit is used to acquire the DC parameters of the chip to be tested, where the DC parameters include at least one of the following: a current parameter and a voltage parameter.

[0035] The processing unit is used to perform a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result.

[0036] The acquisition unit is also used to acquire the temperature parameters of the chip to be tested.

[0037] The processing unit is further used to perform a temperature parameter test according to the temperature parameter of the chip to be tested to obtain a second test result.

[0038] The processing unit is further configured to determine that the chip to be tested is a failed chip when the first test result or the second test result does not meet a preset condition.

[0039] In a third aspect, an embodiment of the present application provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the computer device implements a method according to any one of the implementation modes of the first aspect.

[0040] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a computer device, the computer device implements the method of any one of the implementation methods of the first aspect above.

[0041] In a fifth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on a computer device, the computer device executes a method of any one of the implementation modes of the first aspect above.

[0042] Compared with the prior art, the embodiments of the present application have the following beneficial effects: by obtaining the DC parameters (current parameters and voltage parameters) of the chip to be tested and performing a DC parameter test, the electrical characteristics of the chip in actual work can be tested to ensure that it operates within the specified voltage and current range; by obtaining different temperature parameters of the chip and performing a temperature parameter test, the operating range and tolerance of the chip under different temperature conditions can be understood to ensure that the chip can still maintain stable performance under changes in ambient temperature and avoid failures caused by temperature fluctuations; by combining these two detection processes, unqualified chips can be effectively identified and screened out, the quality and performance of the final product can be guaranteed, and the cost of subsequent maintenance and replacement can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 This is a chip testing system framework diagram provided in an embodiment of the present application.

[0044] Figure 2 It is a flowchart of a chip testing method provided in an embodiment of the present application.

[0045] Figure 3 This is a pin structure diagram of a chip provided in an embodiment of the present application.

[0046] Figure 4 This is a test schematic diagram of a ground diode provided in an embodiment of the present application.

[0047] Figure 5 This is a schematic diagram of a test for a power diode provided in an embodiment of the present application.

[0048] Figure 6 It is a schematic diagram of a level width provided in an embodiment of the present application.

[0049] Figure 7 It is a flowchart of a chip testing method provided in an embodiment of the present application.

[0050] Figure 8 It is a structural schematic diagram of a chip testing device provided in an embodiment of the present application.

[0051] Fig. 9 It is a schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] The temperature transmitter chip is usually an integrated circuit (IC) that is specifically used for temperature measurement and signal conversion. Its functions include receiving data from the temperature sensor, performing signal processing (such as amplification, filtering, and linearization), and then outputting a standardized voltage or current signal for easy transmission and further processing.

[0053] Combine the following Figure 1 Let's explain the test scenario of the temperature transmitter chip in detail.

[0054] Figure 1 This is a chip testing system framework diagram provided in an embodiment of the present application.

[0055] like Figure 1 As shown, Figure 1 The probe and external temperature sensor module are used to feed back the real-time temperature signal of the chip to the tester through the temperature sensor during IC testing. The tester collects the temperature signal and performs subsequent tests.

[0056] TR6836 tester is a 384-pin digital logic tester. It takes FPGA components as the core of the design. SEQ, timing generator and format are designed in different FPGAs. SEQ controls 8 8-pin waveform FPGAs, and the highest test frequency can reach 33MHz. The system has level setting for each pin, 16 groups of timing settings, timing generator for each pin, 4 groups of drive / compare marks and 4 to 8M pattern storage. Based on the concept of distributed control system, an independently usable pin electrical board (PEB) is developed. Every 8 pins can be used for one test bit. The system supports parallel testing of 8 test bits at the same time. The system is connected to the board under test (DUT Board) or probe card through a cable. The host uses Windows XP operating system. The programming adopts graphical user interface (GUI) and C++ language in parallel. The PC and the tester are connected through the PCI INF interface for transmission. It is a 32-bit parallel port with a 50MHz / 100MHz system clock.

[0057] This application mainly uses the TRI tester TR6836 to implement direct current (DC) parameter testing and temperature parameter testing of IC.

[0058] In order to further illustrate the technical solution of the present application, specific embodiments are provided below.

[0059] Figure 2 It is a flowchart of a chip testing method provided in an embodiment of the present application.

[0060] like Figure 2 As shown, the above method is applied to a temperature transmitter chip, and includes the following steps S201 to S205.

[0061] S201. Obtain direct current parameters of the chip to be tested, where the direct current parameters include at least one of the following: a current parameter and a voltage parameter.

[0062] It can be understood that the DC voltage and current of the chip to be tested are measured by connecting the corresponding pins of the chip to be tested. For example, according to the specific function of the chip, the data sheet is consulted to determine the DC parameters to be measured (such as the power supply voltage, input current or output current of the chip), and the measured current and voltage values ​​are measured and recorded.

[0063] Accurate current and voltage readings ensure that the basic operating status of the chip meets the expected conditions.

[0064] S202 , performing a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result.

[0065] It can be understood that the acquired DC parameters are checked according to the preset corresponding qualified threshold value, whether the measured DC parameters are within the allowable range is determined, and the first test result is recorded.

[0066] Automated testing reduces human intervention, improves test efficiency and accuracy, reduces measurement errors, and can quickly identify unqualified chips.

[0067] S203: Obtain temperature parameters of the chip to be tested.

[0068] It is understood that a temperature sensor or a dedicated temperature monitoring device (such as a thermocouple or an infrared thermometer) is used to measure on or near the chip to obtain the operating temperature of the chip to be tested. The temperature parameters can also be obtained according to environmental conditions (such as the temperature of the test room), or the temperature information can be directly read by a specific monitoring pin of the chip (if the chip provides this function). The specific method for obtaining the temperature parameters can be selected according to the actual situation and is not limited here.

[0069] Testing the operating temperature of a chip helps evaluate its performance under actual working conditions and ensure the quality of the chip.

[0070] S204 , performing a temperature parameter test according to the temperature parameters of the chip to be tested to obtain a second test result.

[0071] The acquired temperature parameters are compared with the preset temperature standards to confirm the performance of the chip at a specific temperature (for example, whether there is a problem of overheating or loss of low-temperature characteristics), and the second test results are recorded, similar to the DC parameter test, to give a qualification judgment and specific temperature value.

[0072] The results of temperature testing can help detect the impact of the environment on chip performance, thereby ensuring the reliability and stability of the chip under extreme conditions.

[0073] S205: When the first test result or the second test result does not meet the preset condition, the chip to be tested is determined to be a failed chip.

[0074] Compare the first test result and the second test result with the preset qualified conditions. If any test result does not meet the conditions, mark the chip as unqualified and record the reason for subsequent analysis. Generate a detailed record in the test report, including all test parameters and results.

[0075] This testing method can quickly determine which chips do not meet quality control standards. This systematic evaluation method enhances the reliability of mass production and reduces the risk of unqualified chips entering the market.

[0076] In one implementation, a DC parameter test is performed based on the DC parameters of the chip to be tested to obtain a first test result, including: setting the voltage of all pins of the chip to be tested to 0 volts; using a power management device to apply a preset current to a preset pin, detecting the voltage of the preset pin, and obtaining the first test result.

[0077] It can also be understood that this step is mainly to perform an open / short circuit (OS) test, which is measured by a TR6836 test machine DC module.

[0078] The PMU-based Open-Short test is a serial static DC test. First, pull all the pins of the device, including the power supply and ground, down to 0V, then connect the PMU to a single DUT pin and drive the current through the protection diode of the pin in the bias direction. A negative current will flow through the diode connected to the ground, and a positive current will flow through the diode connected to the power supply. The current is generally between 100uA and 500uA. When the current flows through the diode, it will cause a voltage drop of about 0.65V on its PN junction. The voltage at the connection point is detected to get the test result.

[0079] Combine the following Figure 3 Let me introduce it in detail.

[0080] Figure 3 This is a pin structure diagram of a chip provided in an embodiment of the present application.

[0081] like Figure 3 As shown, the chip includes 31 pins available for testing.

[0082] First, build a chip test platform, including the chip to be tested, connecting leads, power management devices (such as programmable power supplies), and measuring instruments (such as digital multimeters or oscilloscopes). Make sure the power supply of the test equipment is stable, all connections are correct, and set all pin voltages to 0 volts.

[0083] In one example, all pins of the chip under test are programmed to be in a so-called "safe mode" to ensure that all pins output 0 volts.

[0084] It can be understood that at the beginning of the test, setting all pin voltages to 0 volts can ensure that there is no interference from other signals, provide a clean environment for subsequent current application and voltage measurement, and ensure that the test results are accurate and not affected by other signals or voltage fluctuations.

[0085] If the chip has internal registers to control the pin status, it can be controlled by sending instructions (for example, through I2C or SPI protocol) to ensure that no pin outputs a signal.

[0086] Input the preset pin and the current value to be applied to the power management device to ensure that the power management device can provide accurately controlled voltage and current outputs and select the voltage value suitable for the pin to be tested.

[0087] The power management device is activated to apply a preset current to the specified test pin. At this time, the voltage of this pin changes due to the flow of current.

[0088] For example, after a preset current is applied, the voltage at a pin may rise to a certain value, which is related to the value of the resistor connected to the pin and the current.

[0089] Use a measuring instrument (such as a digital multimeter) to monitor the voltage value of the pin in real time after the current is applied, and record the voltage results of each pin.

[0090] Pay special attention to determine which pins are functioning properly with current applied and which pins are experiencing abnormal voltages (such as excessive or unstable).

[0091] The measured voltage value is compared with the preset standard to analyze whether it is within the required range. If the voltage of some pins fails to meet expectations or exceeds the safe range, it may indicate that the pin is faulty or there are other health problems with the chip.

[0092] By applying a preset current and measuring the reaction voltage, the integrity of the chip's internal circuits and pin connections can be effectively verified to ensure that they do not suffer from short circuits, overvoltage or other faults, thereby improving the chip's production quality.

[0093] In one implementation, the voltage of a preset pin is detected to obtain a first test result, including: when a negative current flows through a diode connected to ground, a first voltage is detected; if the first voltage is lower than a first preset threshold, the preset pin is determined to be open; if the first voltage is higher than a second preset threshold, the preset pin is determined to be short.

[0094] Combine the following Figure 4To explain in detail.

[0095] Figure 4 This is a test schematic diagram of a ground diode provided in an embodiment of the present application.

[0096] like Figure 4 As shown, test the diode connected to the ground below, use the PMU to draw a reverse current of about -100uA, set the voltage lower limit to -1.5V (i.e., the first preset threshold), and if it is lower than -1.5V (such as -3V), it is an open circuit; set the voltage upper limit to -0.2V (i.e., the second preset threshold), and if it is higher than -0.2V (such as -0.1V), it is a short circuit.

[0097] It is understandable that users can set specific voltage values ​​differently according to different chips. This is just an example and not a limitation.

[0098] In one implementation, the voltage of a preset pin is detected to obtain a first test result, including: when a forward current flows through a diode connected to a power supply, a second voltage is detected; if the second voltage is higher than a third preset threshold, the preset pin is determined to be open; if the second voltage is lower than a fourth preset threshold, the preset pin is determined to be short.

[0099] Combine the following Figure 5 To explain in detail.

[0100] Figure 5 This is a schematic diagram of a test for a power diode provided in an embodiment of the present application.

[0101] Test the diode connected to the power supply above, and use the PMU to drive a forward current of about 100uA; set the voltage upper limit to 1.5V (i.e. the third preset threshold), and any value above 1.5V (such as 3V) is an open circuit; set the voltage lower limit to 0.2V (i.e. the fourth preset threshold), and any value below 0.2V (such as 0.1V) is a short circuit.

[0102] It is understandable that users can set specific voltage values ​​differently according to different chips. This is just an example and not a limitation.

[0103] The above OS testing process can be expressed in code as follows:

[0104] void OS(void)

[0105] {

[0106] ur.SetUR("Pullup_UR",false);

[0107] ur.SetUR("Func_UR",false);

[0108] ur.SetUR("UR1",false);

[0109] dps.FI("VDD",-300e-6,2,CDPS::V_RNG_4V,CDPS::I_RNG_2MA,true,15);

[0110] dps.MV("VDD",2);

[0111] double vdd_os[8];

[0112] util.GetMeasValue("VDD",vdd_os);

[0113] util.TestLog("VDD",vdd_os);

[0114] / / <---POWER ON

[0115] dps.FV("VDD",0.0,19e-3,dps.V_RNG_4V,dps.I_RNG_20MA,true,0);

[0116] util.dlyms(5);

[0117] / / <--PPMU FI=100uA

[0118] peb.ppmu.FISetting("OS_P_PINS",100e-6,CPmu::I_RNG_400UA,2,-2,2);

[0119] peb.ppmu.MVSetting("OS_P_PINS",1);

[0120] peb.ppmu.Trig();

[0121] PG_VALUE os_p_pins_val;

[0122] util.GetMeasValue("OS_P_PINS",os_p_pins_val);

[0123] util.TestLog("OS_P_PINS",os_p_pins_val);

[0124] / / <--PPMU FI=-100uA

[0125] peb.ppmu.FISetting("OS_N_PINS",-100e-6,CPmu::I_RNG_400UA,2,-2,2);

[0126] peb.ppmu.MVSetting("OS_N_PINS",1);

[0127] peb.ppmu.Trig();

[0128] PG_VALUE os_n_pins_val;

[0129] util.GetMeasValue("OS_N_PINS",os_n_pins_val);

[0130] util.TestLog("OS_N_PINS",os_n_pins_val);

[0131] / / <---POWER OFF

[0132] dps.FV("VDD",0.0,19e-3,dps.V_RNG_4V,dps.I_RNG_20MA,false,0);

[0133] peb.SetPMURelay("ALL_PINS",false);

[0134] peb.SetDCLRelay("ALL_PINS",false);

[0135] util.dlyms(1);

[0136] }

[0137] In one implementation, a temperature parameter test is performed based on the temperature parameters of the chip to be tested to obtain a second test result, including: obtaining the temperature values ​​of the chip to be tested twice to obtain a first temperature value and a second temperature value; calculating the temperature difference between the first temperature value and the second temperature value; when the temperature difference meets a preset temperature difference, dynamically writing the temperature into the chip to be tested to obtain a second test result.

[0138] Combination Figure 1 The temperature sensor is connected to the IC through the probe card, which tests the real-time temperature of the IC and outputs a voltage signal that changes with the temperature. The ADC converts the signal into a digital signal and performs PWM modulation conversion, and finally outputs it in the form of PWM pulses.

[0139] The pulse width acquisition program of the test machine can be expressed as:

[0140] peb.TMU_MeasT("TempOut",peb.TF_MEASURE_PERIOD,peb.TF_SEL_PEL,peb.TF_MT_CLOCK_320NS);

[0141] peb.TMU_GetMeasValueT("TempOut",Tout_s);

[0142] util.dlyms(5);

[0143] peb.TMU_MeasT("TempOut",peb.TF_MEASURE_HIGH_PULSE,peb.TF_SEL_PEL,peb.TF_MT_CLOCK_320NS);

[0144] peb.TMU_GetMeasValueT("TempOut",HTout_s);

[0145] After the test machine collects the waveform fed back by the temperature sensor, it takes the level width of the temperature signal.

[0146] Figure 6 It is a schematic diagram of a level width provided in an embodiment of the present application.

[0147] like Figure 6 As shown, Figure 6 The temperature signal level width T and T 1 , according to T and T 1 The real-time temperature of the chip can be calculated.

[0148] It can be understood that after obtaining two temperature readings, the temperature change can be calculated to detect whether the chip can remain stable during transient temperature changes.

[0149] In one implementation, the temperature value of the chip to be tested is calculated according to the level width of the temperature signal collected by the temperature sensor. The relationship between the level width and the temperature value of the chip to be tested is:

[0150]

[0151] Wherein, Temp represents the temperature value of the chip to be tested, T represents the level width of the temperature signal; and T1 represents the level width of the temperature signal.

[0152] The procedure for converting the level width into temperature can be expressed as: temp1_gongyong=235-80*((Tout_s[site_flag]+0.000000001) / (HTout_s[site_flag]+0.000000001)).

[0153] After the tester uses the TMU function of the PEB board to collect T and T1, the tester calculates the real-time temperature of the chip according to the above-mentioned correspondence between the level width and temperature. The IC temperature is obtained again in the same way as the temperature is obtained, and the difference between the two temperatures is calculated. If the difference is within the range of (-1°C, 1°C), the next step of testing is carried out.

[0154] In one implementation, the first temperature value and / or the second temperature value are converted into binary code and written into the chip to be tested to obtain binary data; the binary data is read and verified, and when the read verification fails, the chip to be tested is determined to be an unqualified chip.

[0155] Reading and verifying the written data is an important step to ensure the normal function of the chip. If the read verification fails, it means that the chip is faulty and may affect its normal operation. Therefore, it needs to be eliminated or further tested.

[0156] In one example, the test machine converts the temperature data into binary code and writes it into the chip, and then performs a read verification after writing. The corresponding relationship is shown in Table 1 below.

[0157] Table 1

[0158] Temperature(℃) Binary Data Hexadecimal data -25 1110 0111 0000 0000 E700H -0.0625 1111 1111 1111 0000 FFF0H 0 0000 0000 0000 0000 0000H 0.0625 0000 0000 0001 0000 0010H 25 0001 1001 0000 0000 1900H 75 0100 1011 0000 0000 4B00H

[0159] After the verification is passed, the corresponding status of the chip is detected to see if it meets the expected status. If the chip status meets the expected status, the test passes.

[0160] The program for dynamically writing temperature can be expressed as:

[0161] Temperature data: temp_site[O], temp_site[1], temp_site[2], temp_site[3]

[0162] void CHANGE_MEMORE_WRITE_DATA(void)

[0163] {

[0164] line_x = WRITE_TEMP_ST + 220;

[0165] for(j=7; j>=0; j--) / / low 8bites

[0166] {

[0167] sum_h=sum_h+temp_site[j];

[0168] if(temp_site[j]==0)

[0169] {

[0170] / / P28,T175,T191,T207,T223,T239,T255,T15,T31,peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0171] szPtn

[254] ='0'; / / site1

[0172] szPtn

[238] ='0'; / / site2

[0173] szPtn

[222] ='0'; / / site3

[0174] szPtn

[206] ='0'; / / site4

[0175] peb.SetPtnMemData(line_x+(7-j)*2,szPtn);

[0176] peb.GetPtnMemData(line_x+(7-j)*2+1,szPtn);szPtn

[254] ='0'; / / site1

[0177] szPtn

[238] ='0'; / / site2

[0178] szPtn

[222] ='0'; / / site3

[0179] szPtn

[206] ='0'; / / site4

[0180] peb.SetPtnMemData(line_x+(7-j)*2+1,szPtn);

[0181] }

[0182] else

[0183] {

[0184] peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0185] szPtn

[254] ='1'; / / site1

[0186] szPtn

[238] ='1'; / / site2

[0187] szPtn

[222] ='1'; / / site3

[0188] szPtn

[206] ='1'; / / site4

[0189] peb.SetPtnMemData(line_x+(7-j)*2,szPtn);

[0190] peb.GetPtnMemData(line_x+(7-j)*2+1,szPtn);szPtn

[254] ='1'; / / site1

[0191] szPtn

[238] ='1'; / / site2

[0192] szPtn

[222] ='1'; / / site3

[0193] szPtn

[206] ='1'; / / site4

[0194] peb.SetPtnMemData(line_x+(7-j)*2+1,szPtn);

[0195] }

[0196] }

[0197] }

[0198] three.SetPinLevel("WT_PINS","3.3V");

[0199] three.SetPinLevel("P10","6.75V");

[0200] we.SetPinMode("WT_PINS","NF");

[0201] we.SetPinMode("P29","RZ");

[0202] we.SetPinMode("P31","NRZ");

[0203] three.SetTimingSetPeriod("4",500);

[0204] three.SetTimingSetPinEdge("4","WT_PINS","TS4_NF");

[0205] peb.SetTimingSetPinEdge("4","P29","TS4_RZ");

[0206] peb.SetTimingSetPinEdge("4","P31","TS4_NRZ");

[0207] CHANGE_MEMORE_WRITE_DATA();

[0208] peb.SetPMURelay("WT_PINS",false);

[0209] peb.SetDCLRelay("WT_PINS",true);

[0210] dps.FV("VDD",3.3,150e - 3,dps.V_RNG_4V,dps.I_RNG_200MA,true,0);util.dlyms(5);

[0211] peb.SetTestPatternOption(WRITE_TEMP_ST,WRITE_TEMP_ST,1,false);peb.TestPattern(WRITE_TEMP_ST,WRITE_TEMP_SP,bPass);

[0212] util.FuncLog(true,bPass);

[0213] dps.FV("VDD",0.0,150e - 3,dps.V_RNG_4V,dps.I_RNG_200MA,true,0);util.dlyms(5);

[0214] dps.FV("VDD",0.0,150e - 3,dps.V_RNG_4V,dps.I_RNG_200MA,false,0);peb.SetDCLRelay("WT_PINS",false).

[0215] The program for dynamic verification can be expressed as:

[0216] void CHANGE_MEMORE_READ_DATA(void)

[0217] {

[0218] line_x = READ_TEMP_ST + 222;

[0219] for(int j=7;j>=0;j--) / / LOW 8BIT

[0220] {

[0221] sum_h=sum_h+temp_site[j];

[0222] if(temp_site[j]==0)

[0223] {

[0224] peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0225] / / P26,T173,T189,T205,T221,T237,T253,T13,T29,

[0226] szPtn

[252] ='L'; / / site1

[0227] szPtn

[236] ='L'; / / site2

[0228] szPtn

[220] ='L'; / / site3

[0229] szPtn

[204] ='L'; / / site4

[0230] peb.SetPtnMemData(line_x+(7-j)*2,szPtn);

[0231] }

[0232] else

[0233] {

[0234] peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0235] szPtn

[252] ='H'; / / site1

[0236] szPtn

[236] ='H'; / / site2

[0237] szPtn

[220] ='H'; / / site3

[0238] szPtn

[204] ='H'; / / site4

[0239] peb.SetPtnMemData(line_x+(7-j)*2,szPtn);

[0240] }

[0241] }

[0242] }

[0243] peb.SetPinLevel("WT_PINS","3.3V");

[0244] peb.SetPinLevel("P10","6.75V");

[0245] peb.SetPinMode("WT_PINS","NF");

[0246] peb.SetPinMode("P29","RZ");

[0247] peb.SetPinMode("P31","NRZ");

[0248] peb.SetTimingSetPeriod("4",500);

[0249] peb.SetTimingSetPinEdge("4","WT_PINS","TS4_NF");

[0250] peb.SetTimingSetPinEdge("4","P29","TS4_RZ");

[0251] peb.SetTimingSetPinEdge("4","P31","TS4_NRZ");

[0252] CHANGE_MEMORE_READ_DATA();

[0253] peb.SetDCLRelay("WT_PINS",true);

[0254] util.dlyms(2);

[0255] dps.FV("VDD",3.3,150e-3,dps.V_RNG_4V,dps.I_RNG_200MA,true,0);

[0256] util.dlyms(5);

[0257] peb.SetTestLogOption(false);

[0258] peb.SetTestPatternOption(READ_TEMP_ST,READ_TEMP_ST,1,false);

[0259] peb.TestPattern(READ_TEMP_ST,READ_TEMP_SP,bPass);

[0260] util.FuncLog(true,bPass);

[0261] dps.FV("VDD",0.0,150e-3,dps.V_RNG_4V,dps.I_RNG_200MA,true,0);

[0262] util.dlyms(5);

[0263] dps.FV("VDD",0.0,150e-3,dps.V_RNG_4V,dps.I_RNG_200MA,false,0);

[0264] peb.SetDCLRelay("WT_PINS",false).

[0265] Combine the following Figure 7 To give an overall introduction to the chip testing method mentioned above.

[0266] Figure 7 It is a flowchart of a chip testing method provided in an embodiment of the present application.

[0267] like Figure 7 As shown, Figure 7 The process includes the following steps S701 to S705.

[0268] S701: Program initialization.

[0269] For example, loading necessary configurations and parameter settings; clearing any residual data or state from previous tests.

[0270] Prepare the test environment, including setting up the communication interface, memory, and hardware components, so that subsequent DC parameter and temperature parameter tests can be carried out smoothly.

[0271] S702: Whether the DC parameter test is passed.

[0272] DC (direct current) parameter testing is an evaluation of chip performance under DC conditions, including key performance indicators such as voltage, current, and power consumption. Test and determine whether the chip's performance under different DC conditions meets the design specifications. Provide basic data on the chip's electrical performance to ensure that it can work stably in a normal working environment. If the test fails, further troubleshooting or redesign may be required to improve performance.

[0273] S703: Check whether the temperature parameter test is passed.

[0274] Temperature parameter testing evaluates the functionality and stability of the chip under different temperature conditions to ensure that it can work normally within the specified temperature range.

[0275] Measure the performance of the chip at high and low temperatures and their temperature variations. If the test passes, it can be confirmed that the chip can adapt to temperature changes in actual applications. Avoid chip failures caused by temperature extremes and ensure product reliability and durability.

[0276] S704: End the test.

[0277] If both the DC parameter test and the temperature parameter test are passed, the test can be ended and the chip is deemed qualified.

[0278] S705, bin failure.

[0279] Failure binning is a step to classify and manage chip performance after testing, dividing chips into different groups according to performance standards. Compare test results with preset standards to distinguish qualified from unqualified chips. Establish more detailed classification information to help identify chips that need further evaluation or repair.

[0280] For qualified chips, it facilitates subsequent production, delivery and use; for unqualified chips, it provides fault analysis and improvement directions.

[0281] In combination with the above, it should be noted that the capacitor connected between the power pin of the temperature sensor and the ground of the Probe card should be as close to the temperature sensor as possible to ensure that the temperature signal output by the temperature sensor is smoother.

[0282] In addition, shielded cables should be used as much as possible during the test to reduce interference between signals.

[0283] The above mainly introduces the method of the embodiment of the present application in conjunction with the accompanying drawings. It should be understood that although the various steps in the flowcharts involved in the embodiments described above are shown in sequence, these steps are not necessarily performed in sequence in the order shown in the figure. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be performed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the embodiments described above may include multiple steps or multiple stages, and these steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with other steps or at least a part of the steps or stages in other steps. A device of an embodiment of the present application is introduced below in conjunction with the accompanying drawings. For simplicity, when introducing the device below, it will be appropriately omitted, and the relevant content can refer to the relevant description in the method above, and will not be repeated.

[0284] Figure 8 It is a structural schematic diagram of a chip testing device provided in an embodiment of the present application.

[0285] like Figure 8 As shown, the device 1000 includes the following units.

[0286] The acquisition unit 1001 is used to acquire the DC parameters of the chip to be tested, where the DC parameters include at least one of the following: a current parameter and a voltage parameter.

[0287] The processing unit 1002 is used to perform a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result.

[0288] The acquisition unit 1001 is also used to acquire the temperature parameters of the chip to be tested.

[0289] The processing unit 1002 is further configured to perform a temperature parameter test according to the temperature parameter of the chip to be tested to obtain a second test result.

[0290] The processing unit 1002 is further configured to determine that the chip to be tested is a failed chip when the first test result or the second test result does not meet a preset condition.

[0291] In one implementation, the device 1000 further includes a storage unit 1003, which can be used to store instructions and / or data, so as to implement the method in the above embodiment.

[0292] It should be noted that the information interaction, execution process and other contents between the above-mentioned units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0293] Fig. 9 Schematic diagram of the structure of the computer device provided in the embodiment of the present application. Fig. 9 As shown, the computer device 3000 of this embodiment includes: at least one processor 3100 ( Fig. 9 Only one) processor, memory 3200, and a computer program 3210 stored in the memory 3200 and executable on at least one processor 3100 are shown. When the processor 3100 executes the computer program 3210, the computer device implements the steps in the above embodiments.

[0294] The processor 3100 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.

[0295] The memory 3200 may be an internal storage unit of the computer device 3000 in some embodiments, such as a hard disk or memory of the computer device 3000. The memory 3200 may also be an external storage device of the computer device 3000 in other embodiments, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the computer device 3000. Further, the memory 3200 may also include both an internal storage unit of the computer device 3000 and an external storage device. The memory 3200 is used to store an operating system, an application program, a boot loader (Boot Loader) data, and other programs, such as a program code of a computer program, etc. The memory 3200 may also be used to temporarily store data that has been output or is to be output.

[0296] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, only the division of the above-mentioned functional units is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units in the embodiment can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0297] The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a computer device, the computer device can implement the steps in the above-mentioned method embodiments.

[0298] The embodiment of the present application provides a computer program product. When the computer program product is executed on a computer device, the computer device can implement the above-mentioned methods.

[0299] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the computer device can implement the steps of the above-mentioned various method embodiments. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may at least include: any entity or device that can carry the computer program code to the camera / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electric carrier signal, a telecommunication signal, and a software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0300] It should be understood that the size of the sequence number of each step in the above-described embodiment does not mean the order of execution, and the order of execution of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiment of the present application. In the description, for the purpose of explanation rather than for limitation, specific details such as specific system structure, technology and the like are proposed, so as to thoroughly understand the embodiment of the present application. However, it should be clear to those skilled in the art that the present application can also be implemented in other embodiments without these specific details. In other cases, the detailed description of well-known systems, devices, circuits and methods is omitted to prevent unnecessary details from hindering the description of the present application.

[0301] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0302] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0303] Additionally, in the specification of the present application and the description of the appended claims, the terms “include,” “comprise,” “have,” and their variations all mean “including but not limited to,” unless otherwise specifically emphasized.

[0304] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0305] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0306] In the embodiments provided in the present application, it should be understood that the disclosed devices, computer equipment and methods can be implemented in other ways. For example, the device and computer equipment embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0307] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A chip testing method, characterized in that: Applied to temperature transmitter chips, including: Acquire direct current parameters of the chip to be tested, wherein the direct current parameters include at least one of the following: a current parameter and a voltage parameter; Perform a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result; Obtain the temperature parameters of the chip to be tested; Performing a temperature parameter test according to the temperature parameter of the chip to be tested to obtain a second test result; When the first test result or the second test result does not meet a preset condition, the chip to be tested is determined to be a failed chip.

2. The method according to claim 1, characterized in that The step of performing a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result includes: Set the voltage of all pins of the chip to be tested to 0 volts; A power management device is used to apply a preset current to a preset pin, and a voltage of the preset pin is detected to obtain the first test result.

3. The method according to claim 2, characterized in that The detecting the voltage of the preset pin to obtain the first test result includes: detecting a first voltage when a negative current flows through a diode connected to ground; If the first voltage is lower than a first preset threshold, the preset pin is deemed to be open circuit; If the first voltage is higher than a second preset threshold, the preset pin is determined to be short-circuited.

4. The method according to claim 2, characterized in that: The detecting the voltage of the preset pin to obtain the first test result includes: detecting a second voltage when a forward current flows through a diode connected to a power source; If the second voltage is higher than a third preset threshold, the preset pin is deemed to be open circuit; If the second voltage is lower than a fourth preset threshold, the preset pin is determined to be short-circuited.

5. The method according to claim 1, characterized in that The step of performing a temperature parameter test according to the temperature parameter of the chip to be tested to obtain a second test result includes: Acquire the temperature value of the chip to be tested twice to obtain a first temperature value and a second temperature value; Calculating a temperature difference between the first temperature value and the second temperature value; When the temperature difference satisfies the preset temperature difference, the temperature is dynamically written into the chip to be tested to obtain the second test result.

6. The method according to claim 5, characterized in that The method further comprises: The temperature value of the chip to be tested is calculated according to the level width of the temperature signal collected by the temperature sensor. The relationship between the level width and the temperature value of the chip to be tested is: Wherein, Temp represents the temperature value of the chip to be tested, T represents the level width of the temperature signal; and T1 represents the level width of the temperature signal.

7. The method according to claim 5, characterized in that The method further comprises: Converting the first temperature value and / or the second temperature value into binary code and writing it into the chip to be tested to obtain binary data; The binary data is read and verified, and when the read and verification fails, the chip to be tested is determined to be a failed chip.

8. A chip testing device, characterized in that: include: An acquisition unit, used for acquiring a DC parameter of the chip to be tested, wherein the DC parameter includes at least one of the following: a current parameter and a voltage parameter; A processing unit, configured to perform a DC parameter test according to the DC parameters of the chip to be tested to obtain a first test result; The acquisition unit is also used to acquire the temperature parameters of the chip to be tested; The processing unit is further used to perform a temperature parameter test according to the temperature parameter of the chip to be tested to obtain a second test result; The processing unit is further configured to, when the first test result or the second test result does not meet a preset condition, determine that the chip to be tested is a failed chip.

9. A computer device, characterized in that: The computer device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the computer device implements the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a computer device, the method according to any one of claims 1 to 7 is implemented.

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