Structure and method for adjusting current response time of voltage-controlled constant current source

Abstract

The invention aims to provide a structure and method for adjusting the current response time of a voltage-controlled constant current source, and the structure comprises an error amplifier, a power amplifier, an in-phase amplifier, an instrument amplifier, an operational amplifier and an MCU (Microprogrammed Control Unit) control unit, the reverse input end of the error amplifier is connected with the output end of the error amplifier through a capacitor, a first resistor is connected between the reverse input end of the error amplifier and the in-phase amplifier, and the input end of the in-phase amplifier serves as a current sampling end and is connected into the MCU control unit through the instrument amplifier and the operational amplifier in sequence. The MCU control unit is connected with the positive input end of the error amplifier, the drain electrode of the power amplifier serves as an input current end, and the source electrode of the power amplifier serves as an output current end. The voltage-controlled constant current source circuit is applied to the technical field of voltage-controlled constant current source circuits.

Description

Technical Field

[0001] The present invention is applied to the technical field of voltage-controlled constant current source circuits, and particularly relates to a structure and method for a voltage-controlled constant current source with adjustable current response time. Background Art

[0002] A constant current source is a power source that can provide a constant current to a load. Therefore, the application range of a constant current source is very wide and it is indispensable in many scenarios. For example, when charging a battery with a conventional charger, as the battery terminal voltage gradually increases, the charging current will decrease accordingly. In order to ensure constant current charging, the output voltage of the charger must be increased at any time, but after charging with a constant current source, it is not necessary to adjust its output voltage, thereby reducing labor intensity and improving production efficiency. Constant current sources are also widely used in measuring circuits, such as measuring and grading resistor values, measuring cable resistance, etc., and the more stable the current, the more accurate the measurement.

[0003] The circuit of the existing voltage-controlled constant current source mainly includes a DAC control part, an error amplifier, a power MOS, an external voltage source, a feedback loop, etc. Taking the pload circuit as an example, Figure 8 and Fig. 9 As shown in the figure, the main factors affecting the current output response time include: 1. The size of the DAC setting current; 2. The size of the feedback loop RC; 3. The DAC response time; 4. The parameters of the power MOS itself; Theoretically calculate the time from DAC setting current to current output: Assuming that the output of the error amplifier is V1 after the constant current source stabilizes the output current, the main factor affecting the current output time is the charging time of the integral capacitor C1 from the initial voltage V0 to the final voltage V1. According to the capacitor constant current charging and discharging formula ⊿Vc=I*⊿t / C, it can be obtained: ⊿t=(V1-V0)*C1 / Ic, Ic is the constant current charging current, Ic=Vdac / R4, it can be obtained: ⊿t=(V1-V0)*C1*R4 / Vdac, Vdac is the set voltage value, according to the circuit: Vdac=IL*R5*25, IL is the set current value, and the final current output response time formula is: ⊿t=(V1-V0)*C1*R4 / (IL*R5*25), Where ⊿t is the charging time of capacitor C1 voltage from V0-V1, V1 is the output voltage of the error amplifier after the constant current source stabilizes the output current, V0 is the initial voltage of C1 capacitor, and IL is the set current value; Take C1=10nF, R4=10K, V1=2.5V, IL=1mA, R5=33mR, and calculate the output response time from 0-1mA: ⊿t=(V1-V0)*C1*R4 / (IL*R5*25)=2.5V*10nF*10K / (1mA*33mR*25)=0.303s According to the schematic diagram, the simulation results are obtained using LTspice. Fig.10 and Fig.11 : According to the simulation results, it can be seen that the time required from Vdac output to C1 capacitor charging to 2.5V is about 0.303s, which is consistent with the theoretical calculation results. When outputting 2A, the phase margin of the entire voltage-controlled constant current source system is about 84°.

[0004] Currently, the main way to change the current response time is to adjust C1 or R4, and adjust the current output speed by adjusting the feedback loop response speed; A. Reduce C1 or R4 to speed up the response of the feedback loop; Adjust C1 to 2.2nF, R4 to 4.7K, V1=2.5V, IL=1mA, R5=33mR, and calculate the output response time of 0-1mA: ⊿t=(V1-V0)*C1*R4 / (IL*R5*25)=2.5V*2.2nF*4.7K / (1mA*33mR*25)=31.3ms The simulation results are as follows Fig.12 and Fig.13 :From the simulation results, it can be seen that reducing C1 or R4 significantly speeds up the current response time, but when outputting 2A, the phase margin of the entire system is only about 51°; similarly, if the current response time needs to be extended, C1 or R4 can be increased, but at the same time, the loop stability of the entire system will also be affected. In summary, the main means of changing the current response time in the prior art is to modify the value of the loop feedback RC. For example, the Chinese patent with the publication number CN221303897U discloses a voltage-controlled constant current source circuit structure. Under the demand of current response time, the response time can only be adjusted by adjusting the RC of the loop feedback, which will affect the stability of the entire loop, and it is easy to have the problem that small current and large current cannot be taken into account. For example, when the small current is output quickly, the large current will produce current oscillation, or when the large current loop is stable, the small current response speed is slow, and in practical applications, the existing technology cannot realize the real-time adjustable current response time, and the method of changing the hardware often has hysteresis, and brings unnecessary troubles, which is not convenient for development and debugging. Therefore, it is necessary to provide a structure and method for the adjustable current response time of a voltage-controlled constant current source, which is safe and reliable, will not affect the stability of the existing hardware, can realize the real-time adjustment of the current response time, can take into account the response speed of large current and small current at the same time, and is suitable for the development and debugging with requirements for timing. Summary of the invention

[0005] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a structure and method for a voltage-controlled constant current source with adjustable current response time, which is safe and reliable, will not affect the stability of existing hardware, can realize real-time adjustment of current response time, can take into account the response speed of large current and small current at the same time, and is suitable for development and debugging with timing requirements.

[0006] The technical solution adopted by the present invention is: the present invention includes an error amplifier, a power amplifier, a common-phase amplifier, an instrument amplifier, an operational amplifier and an MCU control unit, the gate of the power amplifier is connected to the output end of the error amplifier, the reverse input end of the error amplifier is connected to the output end of the error amplifier via a capacitor, a first resistor is connected between the reverse input end of the error amplifier and the common-phase amplifier, the input end of the common-phase amplifier serves as a current sampling end, and is connected to the MCU control unit via the instrument amplifier and the operational amplifier in sequence, the MCU control unit is connected to the positive input end of the error amplifier, the drain of the power amplifier serves as an input current end, and the source of the power amplifier serves as an output current end.

[0007] It can be seen from the above scheme that compared with the prior art, the present application adds an ADC measurement module of the MCU control unit to realize software control of the current response time. The testing method of the present application is safe and reliable and will not affect the stability of the existing hardware. The present application can adjust the current response time in real time, break through the hardware limitations, and take into account the response speed of large current and small current at the same time. It is also suitable for development and debugging with timing requirements; the current response time can be arbitrarily adjusted while ensuring the stability of the hardware, which is flexible, and ADC control is added to achieve safety and reliability. The circuit of the application is convenient for early development and debugging in terms of power-on timing and other aspects.

[0008] A preferred solution is that the output end of the common-phase amplifier is connected to the first resistor, the input end of the common-phase amplifier is connected to the second resistor, the IN+ end and the IN- end of the instrument amplifier are respectively connected to the input end of the common-phase amplifier, the VOUT end of the instrument amplifier is connected to the IN+ end of the operational amplifier, the IN- end and the VOUT end of the operational amplifier are both connected to the ADC end of the MCU control unit, and the DAC end of the MCU control unit is connected to the positive input end of the error amplifier.

[0009] A preferred solution is that the positive input terminal of the error amplifier is divided into two paths, one path is connected to PN5V through a third resistor, and the other path is connected to the DAC terminal of the MCU control unit through a fourth resistor, and the output terminal of the error amplifier is connected to the gate of the power amplifier through a fifth resistor.

[0010] A preferred solution is that the VOUT terminal of the instrumentation amplifier is connected to the IN+ terminal of the operational amplifier via a sixth resistor.

[0011] A preferred embodiment is that the method comprises the following steps: Step S1, assuming that Vdac is the DAC output voltage, I is the output current, Vs is the source voltage of the power amplifier, Vg is the gate voltage of the power amplifier, Vf is the feedback voltage after in-phase amplification, and Vadc is the voltage value of the power amplifier source voltage measured by ADC and amplified by 20 times. According to the characteristics of virtual short and virtual open of the operational amplifier, using Kirchhoff's current law and Kirchhoff's voltage law, the circuit node equation group can be listed: Vdac=Vf=25*Vs, I=Vs / R5=Vdac / (25*R5), Vadc=20*Vs, At the same time, for the N-channel enhancement type power amplifier, when Vgs>Vgs(th), the power amplifier will start to conduct; if a certain voltage is added between the drain and the source, a current Id will be generated. When Vgs≥Vgs(th) and Vds≥Vgs-Vgs(th) are satisfied, the power amplifier enters the constant current region. At this time, the drain current Id is approximately the current I controlled by the voltage Vgs, that is, when Vd is a constant, it satisfies: Id≈I=F(Vgs). As long as Vgs does not change, Id does not change. When Vgs increases, it can be seen from the transfer characteristics that Id also increases linearly; Step S2: Assume the output current response time requirement t0, and calculate the corresponding DAC initial setting value Vdac0 by the capacitor charging time formula ⊿t=(V1-V0)*C1*R4 / Vdac: Vdac0=(V1-V0)*C1*R4 / t0 The final output voltage Vdac of the DAC is obtained based on the current demand I and the transfer function: Vdac=I*R5*25 Step S2, the MCU control unit records the initial current value I0 through ADC; Step S3, the MCU control unit sets Vdac0 through DAC, and the capacitor starts charging, and the charging speed is related to the value of Vdac0; Step S4, the output current is output after the capacitor is charged. Since the output current has a rising process, and the ADC samples the current It in real time, when It-I0 is greater than a set threshold, the MCU control unit can determine that the capacitor is fully charged, and adjust the DAC setting value to the voltage value Vdac corresponding to the required current value I. When the ADC sampling rate is fast enough, the threshold can be made small enough, and the current response time is controlled by controlling the charging time of the capacitor. It can be obtained from the formula ⊿t=(V1-V0)*C1*R4 / Vdac that the current response time changes with the change of Vdac. The larger the Vdac, the shorter the current response time, and the smaller the Vdac, the longer the current response time. Therefore, before the capacitor is charged, that is, before the current is output, different Vdac is set by the MCU control unit to adjust the current response time. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a functional block diagram of the present invention; Figure 2 It is a circuit schematic diagram of the present invention; Figure 3 It is a flowchart of the steps of adjusting the current response time of the present invention; Figure 4This is a 1mA current response waveform diagram before using the present invention; Figure 5 This is a 1mA current response waveform diagram after using the present invention; Figure 6 This is a waveform diagram of repeatedly pulling 1mA at intervals of 100ms without using the present invention; Figure 7 The waveform diagram of the invention is a 1mA load repeatedly at an interval of 20ms; Figure 8 It is the principle diagram of the voltage-controlled constant current source circuit in the prior art; Fig. 9 It is a block diagram of a voltage-controlled constant current source in the prior art; Fig.10 This is a simulation diagram of the response time of the existing voltage-controlled constant current source outputting 1mA; Fig.11 It is the Bode diagram of the voltage-controlled constant current source of the prior art; Fig.12 It is a simulation diagram of the response time of changing the current output in the prior art; Fig.13 It is the Bode diagram after the current output response time is changed by the prior art. DETAILED DESCRIPTION

[0013] like Figures 1 to 2 As shown, in this embodiment, the present invention includes an error amplifier U1, a power amplifier Q1, a common-mode amplifier U2, an instrumentation amplifier U3, an operational amplifier U5 and an MCU control unit U4. The gate of the power amplifier Q1 is connected to the output end of the error amplifier U1, the reverse input end of the error amplifier U1 is connected to the output end of the error amplifier U1 via a capacitor C1, a first resistor R4 is connected between the reverse input end of the error amplifier U1 and the common-mode amplifier U2, the input end of the common-mode amplifier U2 serves as a current sampling end, and is connected to the MCU control unit U4 via the instrumentation amplifier U3 and the operational amplifier U5 in sequence, the MCU control unit U4 is connected to the positive input end of the error amplifier U1, the drain of the power amplifier Q1 serves as an input current end, and the source of the power amplifier (Q1) serves as an output current end.

[0014] The input stage refers to the DAC input for setting the current; the power amplifier Q1 is used for power expansion; the common-mode amplifier U2 is used as a feedback network; the first resistor R4, the capacitor C1 and the error amplifier U1 form an integral operation circuit used for loop compensation; the capacitor C1 is a feedback capacitor, and the first resistor R4 limits the charging current of the feedback capacitor. By controlling the charging time of the capacitor C1, the current response time is controlled. It can be concluded from the formula ⊿t=(V1-V0)*C1*R4 / Vdac that the current response time changes with the change of Vdac. The larger the Vdac, the shorter the current response time, and the smaller the Vdac, the longer the current response time. Therefore, before the capacitor C1 completes charging, that is, before the current is output, different Vdac can be set by the MCU control unit U4 to adjust the current response time.

[0015] like Figure 2 As shown, in this embodiment, the output end of the common-phase amplifier U2 is connected to the first resistor R4, the input end of the common-phase amplifier U2 is connected to the second resistor R5, the IN+ end and IN- end of the instrument amplifier U3 are respectively connected to the input end of the common-phase amplifier U2, the VOUT end of the instrument amplifier U3 is connected to the IN+ end of the operational amplifier U5, the IN- end and VOUT end of the operational amplifier U5 are both connected to the ADC end of the MCU control unit U4, and the DAC end of the MCU control unit U4 is connected to the positive input end of the error amplifier U1. The model of the common-phase amplifier U2 is INA191A1IYFDR, the model of the instrument amplifier U3 is INA826AIDRGR, the model of the MCU control unit U4 is STM32F051K4U6TR, the model of the operational amplifier U5 is OPA188AIDBVR, and the second resistor R5 is used as a sampling resistor to measure the current of the load.

[0016] like Figure 2 As shown, in this embodiment, the positive input terminal of the error amplifier U1 is divided into two paths, one path is connected to PN5V through the third resistor R1, and the other path is connected to the DAC terminal of the MCU control unit U4 through the fourth resistor R2. The output terminal of the error amplifier U1 is connected to the gate of the power amplifier Q1 through the fifth resistor R3. The model of the error amplifier U1 is OPA188AIDBVR. The third resistor R1 is used to pull down -5V to prevent false triggering and accelerate the shutdown of the load; the fifth resistor R3 is used for current limiting and loop stabilization.

[0017] like Figure 2 As shown, in this embodiment, the VOUT terminal of the instrument amplifier U3 is connected to the IN+ terminal of the operational amplifier U5 via the sixth resistor R9.

[0018] The instrument amplifier U3 is a 20X voltage amplifier. The RG terminal of the instrument amplifier U3 is connected to the seventh resistor R6. The instrument amplifier U3 adjusts the amplification factor by adjusting the seventh resistor R6. The sixth resistor R9 is used for current limiting. The operational amplifier U5 is a voltage follower and plays an isolation role.

[0019] like Figure 3 As shown, in this embodiment, the method includes the following steps: Step S1, assuming that Vdac is the DAC output voltage, I is the output current, Vs is the source voltage of the power amplifier Q1, Vg is the gate voltage of the power amplifier Q1, Vf is the feedback voltage after in-phase amplification, and Vadc is the voltage value of the source voltage of the power amplifier Q1 measured by the ADC and amplified by 20 times. According to the characteristics of virtual short and virtual open of the operational amplifier, using Kirchhoff's current law and Kirchhoff's voltage law, the circuit node equation group can be listed: Vdac=Vf=25*Vs, I=Vs / R5=Vdac / (25*R5), Vadc=20*Vs, At the same time, for the N-channel enhancement type power amplifier Q1, when Vgs>Vgs(th), the power amplifier Q1 will start to conduct; if a certain voltage is added between the drain and the source, a current Id will be generated. When Vgs≥ Vgs(th) and Vds≥ Vgs-Vgs(th) are satisfied, the power amplifier Q1 enters the constant current region. At this time, the drain current Id is approximately the current I controlled by the voltage Vgs, that is, when Vd is a constant, it satisfies: Id≈I=F(Vgs). As long as Vgs does not change, Id does not change. When Vgs increases, it can be seen from the transfer characteristics that Id also increases linearly; Step S2, assuming the output current response time requirement t0, calculate the corresponding DAC initial setting value Vdac0 through the capacitor C1 charging time formula ⊿t=(V1-V0)*C1*R4 / Vdac: Vdac0=(V1-V0)*C1*R4 / t0 The final output voltage Vdac of the DAC is obtained based on the current demand I and the transfer function: Vdac=I*R5*25 Step S2, the MCU control unit U4 records the initial current value I0 through ADC; Step S3, the MCU control unit U4 sets Vdac0 through DAC, and the capacitor C1 starts charging, and the charging speed is related to the value of Vdac0; Step S4, the capacitor C1 outputs current after charging is completed. Since the output current has a rising process, and the ADC samples the current It in real time, when It-I0 is greater than a set threshold, the MCU control unit U4 can determine that the capacitor C1 is fully charged, and adjust the DAC setting value to the voltage value Vdac corresponding to the required current value I. When the ADC sampling rate is fast enough, the threshold can be made small enough, and the current response time can be controlled by controlling the charging time of the capacitor C1. It can be obtained from the formula ⊿t=(V1-V0)*C1*R4 / Vdac that the current response time changes with the change of Vdac. The larger the Vdac, the shorter the current response time, and the smaller the Vdac, the longer the current response time. Therefore, before the capacitor C1 is charged, that is, before the current is output, different Vdacs are set by the MCU control unit U4 to adjust the current response time.

[0020] In this embodiment, when the nload circuit is required to output 1 mA current within 150 ms, the original circuit response time is 900 ms. Figure 4 As shown, after using the structure of the present application, 10mA is first set, the ADC records the initial I0 and samples It in real time, and when It-I0>0.001mA, 1mA is set again, and the current response time of 1mA can be adjusted to a response time close to 10mA, which is about 120ms. Figure 5 As shown, in the waveform diagram, EN is the current enable signal, G is the integral capacitor voltage, and CUR is the output current. Obviously, the application can ensure that the current response time can be adjusted arbitrarily under the condition of hardware stability, has flexibility, adds ADC control, and has safety and reliability.

[0021] If you only add a fixed delay between setting two currents without adding ADC sampling control, there will be risks, such as Figure 6 As shown in the figure, only adding a delay between setting 10mA and 1mA will cause the output of 10mA to appear when the current is repeatedly pulled within an interval of 100ms, which is greater than the required 1mA. There will be certain risks. However, this application adds ADC real-time sampling control, and there will be no situation where other currents are pulled out, such as Figure 7 As shown, after using this application, 1mA is repeatedly loaded at intervals of 20ms, and there is no moment when 10mA is output. However, in the waveform, EN is the current enable signal, G is the integral capacitor voltage, and CUR is the output current. Obviously, the circuit designed using this application is convenient for early development and debugging in terms of power-on timing and other aspects.

[0022] Although the embodiments of the present invention are described with practical solutions, they do not constitute limitations on the meaning of the present invention. For those skilled in the art, it is obvious to modify the implementation scheme and combine it with other solutions based on this description.

Claims

1. A voltage-controlled constant current source with adjustable current response time, characterized in that: It comprises an error amplifier (U1), a power amplifier (Q1), a common-phase amplifier (U2), an instrumentation amplifier (U3), an operational amplifier (U5) and an MCU control unit (U4); the gate of the power amplifier (Q1) is connected to the output end of the error amplifier (U1); the reverse input end of the error amplifier (U1) is connected to the output end of the error amplifier (U1) via a capacitor (C1); a first resistor (R4) is connected between the reverse input end of the error amplifier (U1) and the common-phase amplifier (U2); the input end of the common-phase amplifier (U2) is used as a current sampling end and is connected to the MCU control unit (U4) via the instrumentation amplifier (U3) and the operational amplifier (U5) in sequence; the MCU control unit (U4) is connected to the positive input end of the error amplifier (U1); the drain of the power amplifier (Q1) is used as an input current end; and the source of the power amplifier (Q1) is used as an output current end.

2. The structure of a voltage-controlled constant current source with adjustable current response time according to claim 1, characterized in that: The output end of the common-phase amplifier (U2) is connected to the first resistor (R4), the input end of the common-phase amplifier (U2) is connected to the second resistor (R5), the IN+ end and IN- end of the instrument amplifier (U3) are respectively connected to the input end of the common-phase amplifier (U2), the VOUT end of the instrument amplifier (U3) is connected to the IN+ end of the operational amplifier (U5), the IN- end and VOUT end of the operational amplifier (U5) are both connected to the ADC end of the MCU control unit (U4), and the DAC end of the MCU control unit (U4) is connected to the positive input end of the error amplifier (U1).

3. The structure of a voltage-controlled constant current source with adjustable current response time according to claim 1, characterized in that: The positive input end of the error amplifier (U1) is divided into two paths, one path is connected to PN5V via a third resistor (R1), and the other path is connected to the DAC end of the MCU control unit (U4) via a fourth resistor (R2); the output end of the error amplifier (U1) is connected to the gate of the power amplifier (Q1) via a fifth resistor (R3).

4. The structure of a voltage-controlled constant current source with adjustable current response time according to claim 3, characterized in that: The VOUT terminal of the instrument amplifier (U3) is connected to the IN+ terminal of the operational amplifier (U5) via a sixth resistor (R9).

5. A method for a voltage-controlled constant current source structure with adjustable current response time as claimed in claim 4, characterized in that: The method comprises the following steps: Step S1, assuming that Vdac is the DAC output voltage, I is the output current, Vs is the source voltage of the power amplifier (Q1), Vg is the gate voltage of the power amplifier (Q1), Vf is the feedback voltage after in-phase amplification, and Vadc is the voltage value of the source voltage of the power amplifier (Q1) measured by the ADC and amplified by 20 times. According to the characteristics of virtual short and virtual open of the operational amplifier, using Kirchhoff's current law and Kirchhoff's voltage law, the circuit node equation group can be listed: Vdac=Vf=25*Vs, I=Vs / R5=Vdac / (25*R5), Vadc=20*Vs, At the same time, for the N-channel enhancement type power amplifier (Q1), when Vgs>Vgs(th), the power amplifier (Q1) will start to conduct; if a certain voltage is added between the drain and the source, a current Id will be generated. When Vgs≥ Vgs(th) and Vds≥ Vgs-Vgs(th) are satisfied, the power amplifier (Q1) enters the constant current region. At this time, the drain current Id is approximately the current I controlled by the voltage Vgs, that is, when Vd is a constant, it satisfies: Id≈I=F(Vgs). As long as Vgs does not change, Id does not change. When Vgs increases, it can be seen from the transfer characteristics that Id also increases linearly; Step S2, assuming the output current response time requirement t0, calculate the corresponding DAC initial setting value Vdac0 through the capacitor (C1) charging time formula ⊿t=(V1-V0)*C1*R4 / Vdac: Vdac0=(V1-V0)*C1*R4 / t0 The final output voltage Vdac of the DAC is obtained based on the current demand I and the transfer function: Vdac=I*R5*25 Step S2, the MCU control unit (U4) records the initial current value I0 through ADC; Step S3, the MCU control unit (U4) sets Vdac0 through the DAC, and the capacitor (C1) starts to charge, and the charging speed is related to the value of Vdac0; Step S4, the capacitor (C1) outputs current after charging is completed. Since the output current has a rising process, and the ADC samples the current It in real time, when It-I0 is greater than a set threshold, the MCU control unit (U4) can determine that the capacitor (C1) is fully charged, and adjust the DAC setting value to the voltage value Vdac corresponding to the required current value I. When the ADC sampling rate is fast enough, the threshold can be made small enough. By controlling the charging time of the capacitor (C1), the current response time is controlled. It can be obtained from the formula ⊿t=(V1-V0)*C1*R4 / Vdac that the current response time changes with the change of Vdac0. The larger the Vdac0, the shorter the current response time, and the smaller the Vdac0, the longer the current response time. Therefore, before the capacitor (C1) is charged, that is, before the current is output, different Vdac0 is set by the MCU control unit (U4) to adjust the current response time.

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