Low-voltage high-precision linear calibration circuit, current source and electric equipment

Abstract

The invention provides a low-voltage high-precision linear calibration circuit, a current source and electric equipment, the circuit comprises N negative feedback circuits, a calibration unit with the same structure and N reference units, two input ends of the negative feedback circuits and two input ends of the reference units are respectively connected to a first output node and a second output node, two input ends of the negative feedback circuit are respectively connected with the first output node and the second output node, and the output end of the negative feedback circuit acts on the back gate of the first MOS switch tube in the corresponding reference unit so as to modulate the voltage on the first output node; and the output result of the low-voltage high-precision linear calibration circuit is more accurate and reliable.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a low-voltage high-precision linear calibration circuit, a current source and an electrical device. Background Art

[0002] The low voltage high precision linear calibration circuit is a circuit specially designed to achieve high precision linear calibration in a low voltage environment. This type of circuit has a wide range of applications in electronic measurement, control systems, instrumentation and other fields.

[0003] In existing solutions, the output voltage of the low-voltage high-precision linear calibration circuit may drift with changes in temperature, making the output of the current source inaccurate. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a low-voltage high-precision linear calibration circuit, a current source and an electrical device to provide a current source capable of precise output.

[0005] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:

[0006] A low voltage high precision linear calibration circuit, comprising:

[0007] N negative feedback circuits, and calibration units and N reference units having the same structure, wherein N is a positive integer not less than 1;

[0008] The calibration unit and the reference unit include: a first control switch, a first MOS switch tube, a second MOS switch tube, a third MOS switch tube, and a fourth MOS switch tube;

[0009] The first control switch has a static contact, a first moving contact and a second moving contact, the static contact is connected to the control end of the first MOS switch tube, the first moving contact is used to be connected to a first power supply, and the second moving contact is used to obtain a first control signal;

[0010] The first end of the first MOS switch tube is used to be connected to the first power supply;

[0011] The first end of the second MOS switch tube is used to be connected to the second end of the first MOS switch tube, the control end of the second MOS switch tube is used to obtain a second control signal, and the back gate of the second MOS switch tube is used to be connected to the first power supply;

[0012] The control end of the third MOS switch tube is used to obtain a third control signal, the first end of the third MOS switch tube is connected to the second end of the second MOS switch tube, the back gate of the third MOS switch tube is used to be connected to the second power supply, and the second end of the third MOS switch tube is connected to the first output node;

[0013] The control end of the fourth MOS switch tube is used to obtain a fourth control signal, the first end of the fourth MOS switch tube is connected to the second end of the second MOS switch tube, the back gate of the fourth MOS switch tube is used to be connected to the second power supply, and the second end of the fourth MOS switch tube is connected to the second output node;

[0014] N negative feedback circuits correspond one-to-one to the reference units, a first input end of the negative feedback circuit is connected to the first output node, a second input end of the negative feedback circuit is connected to the second output node, and an output end of each negative feedback circuit is connected to a back gate of a first MOS switch tube in the corresponding reference unit.

[0015] Optionally, in the above-mentioned low-voltage high-precision linear calibration circuit, the second MOS switch tube is a cascode cascade structure.

[0016] Optionally, in the above-mentioned low-voltage high-precision linear calibration circuit, the third MOS switch tube and the fourth MOS switch tube are switch tubes implemented based on a reverse well process with an ultra-low threshold voltage.

[0017] Optionally, in the above-mentioned low-voltage high-precision linear calibration circuit, the negative feedback circuit includes:

[0018] A load capacitor, a second control switch, a differential input pair, a current mirror load circuit, a current mirror load and a tail current source switch tube;

[0019] A first end of the load capacitor is connected to the output end of the negative feedback circuit, and a second end of the load capacitor is grounded;

[0020] The second control switch has a static contact, a first moving contact and a second moving contact, the first moving contact of the second control switch is connected to the output end of the operational amplifier, and the static and moving contacts of the second control switch are connected to the first output end of the current mirror load circuit;

[0021] The input end of the current mirror load circuit is connected to the third power supply, the first output end of the current mirror load circuit is connected to the first input end of the current mirror load, and the fourth output end of the current mirror load circuit is connected to the second input end of the current mirror load;

[0022] The first input end of the differential input pair is connected to the second output end of the current mirror load circuit, the second input end of the differential input pair is connected to the third output end of the current mirror load circuit, the first control end of the differential input pair serves as the first input end of the negative feedback circuit, and the second control end of the differential input pair serves as the second input end of the negative feedback circuit;

[0023] The input end of the tail current source switch tube is connected to the output end of the differential input pair, the output end of the tail current source switch tube is grounded, and the control end of the tail current source switch tube is used to obtain a preset voltage preamplifier.

[0024] Optionally, in the above low-voltage high-precision linear calibration circuit, the current mirror load circuit includes:

[0025] a fifth MOS switch tube, a sixth MOS switch tube, a seventh MOS switch tube and an eighth MOS switch tube;

[0026] The first ends of the fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube and the eighth MOS switch tube serve as input ends of the current mirror load circuit;

[0027] The gates of the fifth MOS switch tube and the sixth MOS switch tube are interconnected, the gate of the sixth MOS switch tube is also connected to the second end of the sixth MOS switch tube, the second end of the fifth MOS switch tube serves as the first output end of the current mirror load circuit, and the second end of the sixth MOS switch tube serves as the second output end of the current mirror load circuit;

[0028] The gates of the seventh MOS switch tube and the eighth MOS switch tube are interconnected, the gate of the seventh MOS switch tube is also connected to the second end of the seventh MOS switch tube, the second end of the seventh MOS switch tube serves as the third output end of the current mirror load circuit, and the second end of the eighth MOS switch tube serves as the fourth output end of the current mirror load circuit;

[0029] The differential input pair comprises:

[0030] a ninth MOS switch tube and a tenth MOS switch tube;

[0031] The output ends of the ninth MOS switch tube and the tenth MOS switch tube serve as the output ends of the differential input pair;

[0032] The first end of the ninth MOS switch tube serves as the first input end of the differential input pair, and the control end of the ninth MOS switch tube serves as the first control end;

[0033] The first end of the tenth MOS switch tube serves as the first input end of the differential input pair, and the control end of the tenth MOS switch tube serves as the second control end;

[0034] The current mirror load comprises:

[0035] an eleventh MOS switch tube and a twelfth MOS switch tube;

[0036] The second ends of the eleventh MOS switch tube and the twelfth MOS switch tube serve as output ends of the current mirror load;

[0037] The gates of the eleventh MOS switch tube and the twelfth MOS switch tube are interconnected, the first end of the eleventh MOS switch tube serves as the first input end of the current mirror load, and the first end of the twelfth MOS switch tube serves as the second input end of the current mirror load.

[0038] Optionally, in the above-mentioned low-voltage high-precision linear calibration circuit, the first MOS switch tube and the second MOS switch tube are PMOS switch tubes, and the third MOS switch tube and the fourth MOS switch tube are NMOS switch tubes.

[0039] Optionally, in the above-mentioned low-voltage high-precision linear calibration circuit, the fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube and the eighth MOS switch tube are PMOS switch tubes;

[0040] The ninth MOS switch tube, the tenth MOS switch tube, the eleventh MOS switch tube, the twelfth MOS switch tube and the tail current source switch tube are NMOS switch tubes.

[0041] Optionally, the above low-voltage high-precision linear calibration circuit further includes:

[0042] a first output resistor and a second output resistor;

[0043] The first end of the first output resistor is connected to the first output node;

[0044] The first input of the second output resistor is connected to the second output node;

[0045] At this time, the second ends of the first output resistor and the second output resistor serve as output ends of the low-voltage high-precision linear calibration circuit.

[0046] A current source comprises any one of the low-voltage and high-precision linear calibration circuits described above.

[0047] An electrical device comprises the current source mentioned above.

[0048] Based on the above technical solution, when the above scheme circuit provided by the embodiment of the present invention is working: the first control switch in the calibration unit has its static contact and the second moving contact turned on under the action of the control signal, and under the control of the third control signal and the fourth control signal, the fourth MOS switch tube in the calibration unit is turned on, and the calibration unit generates a calibration voltage on the second output node. When the first control switch in one of the reference units is closed, the third control signal in the reference power supply controls its third MOS switch tube to be turned on. At this time, the reference unit generates a waiting calibration voltage on the first output node. At this time, the negative feedback circuit outputs a modulation voltage based on the voltage values ​​of the first output node and the second output node. The modulation voltage will be applied to the back gate of the first MOS switch tube in the reference unit corresponding to the negative feedback structure. The voltage is used as the bias voltage of the first MOS switch tube, and then the voltage on the first output node is modulated, so that the output result of the low-voltage and high-precision linear calibration circuit is more accurate and reliable. As a result, the current generated by the calibration power supply and the reference unit generates a voltage difference on the first output node / the second output node, thereby realizing the function of DAC. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0050] Figure 1 A schematic diagram of the circuit structure of a low-voltage high-precision linear calibration circuit disclosed in an embodiment of the present application;

[0051] Figure 2 Schematic diagram of the circuit structure of the negative feedback circuit disclosed in the embodiment of the present application. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0053] The present application discloses a low voltage high precision linear calibration circuit capable of providing multiple output voltages from low to high, see Figure 1 , the circuit comprises:

[0054] A calibration unit 100, N negative feedback circuits S&H and N reference units 200, wherein N is a positive integer not less than 1; wherein the circuit structures of the calibration unit 100 and each reference unit 200 are the same.

[0055] The calibration unit 100 and the reference unit 200 include: a first control switch SC1, a first MOS switch tube P00, a second MOS switch tube P01, a third MOS switch tube N01, and a fourth MOS switch tube N02;

[0056] The first control switch SC1 has a static contact, a first moving contact and a second moving contact, the static contact is connected to the control end of the first MOS switch tube P00, the first moving contact is used to be connected to the first power supply VCC, and the second moving contact is used to obtain a first control signal BIAS0, and the magnitude of the current flowing through the first MOS switch tube P00 is controlled by the first control signal BIAS0;

[0057] The first end of the first MOS switch tube P00 is used to be connected to the first power supply; wherein the back gate of the first MOS switch tube P00 in the calibration unit 100 is connected to the first power supply VCC, and the back gate of the first MOS switch tube P00 in the reference unit 200 is connected to the output end of the corresponding negative feedback circuit S&H;

[0058] The first end of the second MOS switch tube P01 is used to be connected to the second end of the first MOS switch tube P00, the control end of the second MOS switch tube P01 is used to obtain the second control signal VCAS, the back gate of the second MOS switch tube P01 is used to be connected to the first power supply, and the gate of the second MOS switch tube P01 is controlled by the second control signal VCAS to form a cascode current mirror to increase impedance. The cascode current mirror is a high-performance current mirror structure widely used in analog integrated circuit design. It forms a common source and common gate (Cascode) structure by introducing additional transistors, significantly improving the impedance of the output end, thereby reducing the impact of load changes on the output current, and reducing the interference of the channel length modulation effect on the accuracy of current replication. This structure enables the cascode current mirror to have the advantages of high output impedance and high current replication accuracy, and is suitable for multiple functions such as differential pair loads, dual-end input and single-end output. Although it may bring challenges such as reduced output swing and stability issues, its performance and stability can be further improved by optimizing parameters such as transistor size and gate length and adopting advanced technologies such as gain enhancement. Therefore, cascode current mirror plays an important role in analog integrated circuit design, providing reliable technical support for current replication and signal processing.

[0059] The control end of the third MOS switch tube N01 is used to obtain the third control signal OFF, the first end of the third MOS switch tube N01 is connected to the second end of the second MOS switch tube P01, the back gate of the third MOS switch tube N01 is used to be connected to the second power supply, and the second end of the third MOS switch tube N01 is connected to the first output node; when the third control signal OFF=1, the third MOS switch tube N01 is turned on;

[0060] The control end of the fourth MOS switch tube N02 is used to obtain the fourth control signal ON, the first end of the fourth MOS switch tube N02 is connected to the second end of the second MOS switch tube P01, the back gate of the fourth MOS switch tube N02 is used to be connected to the second power supply, and the second end of the fourth MOS switch tube N02 is connected to the second output node; when the fourth control signal ON=1, the fourth MOS switch tube N02 is turned on, and the third control signal OFF and the fourth control signal ON are non-overlapping control signals.

[0061] The N negative feedback circuits S&H correspond one to one with the reference unit 200, the first input end of the negative feedback circuit S&H is connected to the first output node, the second input end of the negative feedback circuit S&H is connected to the second output node, and each output end of the negative feedback circuit S&H is connected to the back gate of the first MOS switch tube P00 in the corresponding reference unit 200.

[0062] In the above circuit, the control signal at the control end of the first control switch SC1 can be a high level signal. When the control signal is a high level signal, the second moving contact of the first control switch SC1 is connected to the BIAS0 node to obtain the first control signal, and the second moving contact is conducted with the static contact. At this time, the first control signal BIAS0 is applied to the first MOS switch tube P00 through the first control switch SC1. When the control signal at the control end of the first control switch SC1 is a low level, the first moving contact of the first control switch SC1 is connected to the first power supply, the first moving contact is conducted with the static contact, and the voltage of the first voltage source VCC is applied to the control end of the first MOS switch tube P00.

[0063] At the calibration moment, the first control switch SC1 in the calibration unit 100 is connected to the second moving contact by the control signal, and the fourth MOS switch tube N02 in the calibration unit 100 is turned on under the control of the third control signal OFF and the fourth control signal ON, and the calibration unit 100 generates a calibration voltage on the second output node. When the first control switch SC1 in one of the reference units 200 is closed, the third control signal OFF in the reference power supply controls the third MOS switch tube N01 to be turned on. At this time, the reference unit 200 generates a waiting calibration voltage on the first output node. At this time, the negative feedback circuit S&H outputs a modulation voltage latch based on the voltage values ​​of the first output node and the second output node. The modulation voltage is applied to the back gate of the first MOS switch tube P00 in the reference unit 200 corresponding to the negative feedback structure. The voltage is used as the bias voltage of the first MOS switch tube P00, and then the voltage on the first output node is modulated. As a result, the current generated by the calibration power supply and the reference unit 200 generates a voltage difference on the first output node / the second output node, thereby realizing the function of DAC. The working principles of other reference units 200 are similar. Therefore, by controlling the number of reference units 200 that enter the working state through the controller, a calibrated reference current of 1 times, 2 times...N times can be obtained, making the output result of the low-voltage high-precision linear calibration circuit more accurate and reliable.

[0064] In the technical solution disclosed in this embodiment, the second MOS switch tube P01 can be a cascode cascade structure, the purpose of which is to eliminate the high-frequency interference generated by the parasitic capacitance and improve the output resistance of the current mirror formed by the third MOS switch tube N01 and the fourth MOS switch tube N02. The third MOS switch tube N01 and the fourth MOS switch tube N02 are switch tubes implemented by the reverse well process based on the ultra-low threshold voltage (SLVT), and the third MOS switch tube N01 and the fourth MOS switch tube N02 are connected to the second power supply VCC2 by connecting their back gates to reduce the gate threshold voltage (threshold voltage) VTH of the switch tube.

[0065] The structure of the negative feedback circuit S&H is a sampling structure, and its purpose is to generate a bias signal matching the voltage difference between the first output node and the second output node to the back gate of the first MOS switch tube P00. The specific structure of the negative feedback circuit S&H can be selected according to user needs, for example, see Figure 2 The negative feedback circuit S&H disclosed in the embodiment of the present application includes:

[0066] Load capacitor C11, second control switch SC2, differential input pair 001, current mirror load 003, current mirror load 003 circuit 002, current mirror load 003 and tail current source switch tube M15;

[0067] The first end of the load capacitor C11 is used to be connected to the output end of the negative feedback circuit S&H, and the second end of the load capacitor C11 is grounded;

[0068] The second control switch SC2 has a static contact, a first moving contact and a second moving contact, the first moving contact of the second control switch SC2 is connected to the output terminal of the operational amplifier, and the static and moving contacts of the second control switch SC2 are connected to the first output terminal of the current mirror load 003 current mirror load 003 circuit 002;

[0069] The input end of the current mirror load circuit is connected to the third power supply, the first output end of the current mirror load circuit is connected to the first input end of the current mirror load 003, and the fourth output end of the current mirror load circuit is connected to the second input end of the current mirror load 003;

[0070] The first input end of the differential input pair 001 is connected to the second output end of the current mirror load circuit, the second input end of the differential input pair 001 is connected to the third output end of the current mirror load circuit, the first control end of the differential input pair 001 serves as the first input end of the negative feedback circuit S&H, and the second control end of the differential input pair 001 serves as the second input end of the negative feedback circuit S&H;

[0071] The input end of the tail current source switch tube M15 is connected to the output end of the differential input pair 001, the output end of the tail current source switch tube M15 is grounded, and the control end of the tail current source switch tube M15 is used to obtain a preset voltage bias so that the tail current source switch tube M15 provides a stable current.

[0072] During the calibration phase of the low-voltage high-precision linear calibration circuit: the second control switch SC2 is closed (the static contact of the second switch SC2 is connected to the first moving contact), the first output terminal VON of the current mirror load 003 current mirror load 003 circuit 002 is connected to the load capacitor C11 and the output terminal of the negative feedback circuit S&H, the first control terminal INP of the differential input pair 001 is connected to the second output node, and the second control terminal INN of the differential input pair 001 is connected to the first output node. When the reference current on the first output node is less than the calibration current on the second output node, the voltage collected by the first control terminal INP of the differential input pair 001 is lower than the voltage collected by the second control terminal INN of the differential input pair 001. At this time, the output voltage of the output terminal VO of the negative feedback circuit S&H is low level, which is applied to the back gate of the first MOS switch tube P00 of the corresponding reference unit 200, thereby increasing the current source of the first MOS switch tube P00, thereby increasing the reference current on the first output node, and causing the reference current to be equal to the calibration current.

[0073] When the low-voltage high-precision linear calibration circuit is calibrating the order, the second control switch SC2 is turned on (the static contact of the second control switch SC2 is disconnected from the first moving contact), and the load capacitor C11 provides a voltage to the output terminal VO of the negative feedback circuit S&H, and the voltage is applied to the back gate of the corresponding first MOS switch tube P00. When the low-voltage high-precision linear calibration circuit is in the normal working stage, the voltage across the load capacitor C11 is maintained at a stable voltage value.

[0074] The present application also discloses the specific circuit structure of the differential input pair 001, the current mirror load 003, the current mirror load 003 circuit 002, and the current mirror load 003, see Figure 2 , the current mirror load 003 current mirror load 003 circuit 002 includes:

[0075] a fifth MOS switch tube PM11, a sixth MOS switch tube PM12, a seventh MOS switch tube PM13 and an eighth MOS switch tube PM14;

[0076] The first ends of the fifth MOS switch tube PM11, the sixth MOS switch tube PM12, the seventh MOS switch tube PM13 and the eighth MOS switch tube PM14 serve as the input end of the current mirror load 003 current mirror load 003 circuit 002;

[0077] The gates of the fifth MOS switch tube PM11 and the sixth MOS switch tube PM12 are interconnected, the gate of the sixth MOS switch tube PM12 is also connected to the second end of the sixth MOS switch tube PM12, the second end of the fifth MOS switch tube PM11 serves as the first output end of the current mirror load 003 current mirror load 003 circuit 002, and the second end of the sixth MOS switch tube PM12 serves as the second output end of the current mirror load 003 current mirror load 003 circuit 002;

[0078] The gates of the seventh MOS switch tube PM13 and the eighth MOS switch tube PM14 are interconnected, the gate of the seventh MOS switch tube PM13 is also connected to the second end of the seventh MOS switch tube PM13, the second end of the seventh MOS switch tube PM13 serves as the third output end of the current mirror load 003 current mirror load 003 circuit 002, and the second end of the eighth MOS switch tube PM14 serves as the fourth output end of the current mirror load 003 current mirror load 003 circuit 002;

[0079] The differential input pair 001 includes:

[0080] A ninth MOS switch tube M11 and a tenth MOS switch tube M12;

[0081] The output ends of the ninth MOS switch tube M11 and the tenth MOS switch tube M12 serve as the output ends of the differential input pair 001;

[0082] The first end of the ninth MOS switch tube M11 serves as the first input end of the differential input pair 001, and the control end of the ninth MOS switch tube M11 serves as the first control end;

[0083] The first end of the tenth MOS switch tube M12 serves as the first input end of the differential input pair 001, and the control end of the tenth MOS switch tube M12 serves as the second control end;

[0084] The current mirror load 003 includes:

[0085] an eleventh MOS switch tube M13 and a twelfth MOS switch tube M14;

[0086] The second ends of the eleventh MOS switch tube M13 and the twelfth MOS switch tube M14 serve as output ends of the current mirror load 003;

[0087] The gates of the eleventh MOS switch tube M13 and the twelfth MOS switch tube M14 are interconnected, the first end of the eleventh MOS switch tube M13 serves as the first input end of the current mirror load 003 , and the first end of the twelfth MOS switch tube M14 serves as the second input end of the current mirror load 003 .

[0088] In the above scheme disclosed in the embodiment of the present application, the type of each switch tube can be selected according to user needs. For example, in this scheme, the first MOS switch tube P00 and the second MOS switch tube P01 are PMOS switch tubes, and the third MOS switch tube N01 and the fourth MOS switch tube N02 are NMOS switch tubes.

[0089] The fifth MOS switch tube PM11, the sixth MOS switch tube PM12, the seventh MOS switch tube PM13 and the eighth MOS switch tube PM14 are PMOS switch tubes; the ninth MOS switch tube M11, the tenth MOS switch tube M12, the eleventh MOS switch tube M13 and the twelfth MOS switch tube M14 and the tail current source switch tube M15 are NMOS switch tubes.

[0090] In the technical solution disclosed in this embodiment, in order to prevent the circuit output from being too large and causing damage to the subsequent circuit, the above circuit also includes: a first output resistor RP and a second output resistor RN, wherein the first end of the first output resistor RP is connected to the first output node; the first input of the second output resistor RN is connected to the second output node; the second ends of the first output resistor RP and the second output resistor RN are grounded. At this time, the output voltage of the first output node is the voltage across the first output resistor RP, and the output voltage of the second output node is the voltage across the second output resistor RN.

[0091] Corresponding to the above scheme, the present application also discloses a current source, which includes the low-voltage and high-precision linear calibration circuit described in any one of the above items.

[0092] Corresponding to the above solution, the present application also discloses an electrical device, which may include the above current source.

[0093] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0094] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A low voltage high precision linear calibration circuit, characterized in that: include: N negative feedback circuits, and calibration units and N reference units having the same structure, wherein N is a positive integer not less than 1; The calibration unit and the reference unit include: a first control switch, a first MOS switch tube, a second MOS switch tube, a third MOS switch tube, and a fourth MOS switch tube; The first control switch has a static contact, a first moving contact and a second moving contact, the static contact is connected to the control end of the first MOS switch tube, the first moving contact is used to be connected to a first power supply, and the second moving contact is used to obtain a first control signal; The first end of the first MOS switch tube is used to be connected to the first power supply; The first end of the second MOS switch tube is used to be connected to the second end of the first MOS switch tube, the control end of the second MOS switch tube is used to obtain a second control signal, and the back gate of the second MOS switch tube is used to be connected to the first power supply; The control end of the third MOS switch tube is used to obtain a third control signal, the first end of the third MOS switch tube is connected to the second end of the second MOS switch tube, the back gate of the third MOS switch tube is used to be connected to the second power supply, and the second end of the third MOS switch tube is connected to the first output node; The control end of the fourth MOS switch tube is used to obtain a fourth control signal, the first end of the fourth MOS switch tube is connected to the second end of the second MOS switch tube, the back gate of the fourth MOS switch tube is used to be connected to the second power supply, and the second end of the fourth MOS switch tube is connected to the second output node; N negative feedback circuits correspond one-to-one to the reference units, a first input end of the negative feedback circuit is connected to the first output node, a second input end of the negative feedback circuit is connected to the second output node, and an output end of each negative feedback circuit is connected to a back gate of a first MOS switch tube in the corresponding reference unit.

2. The low voltage high precision linear calibration circuit according to claim 1, characterized in that: The second MOS switch tube is a cascode cascade structure.

3. The low voltage high precision linear calibration circuit according to claim 1, characterized in that: The third MOS switch tube and the fourth MOS switch tube are switch tubes implemented based on an inverted well process with an ultra-low threshold voltage.

4. The low voltage high precision linear calibration circuit according to claim 1, characterized in that: The negative feedback circuit comprises: A load capacitor, a second control switch, a differential input pair, a current mirror load circuit, a current mirror load and a tail current source switch tube; A first end of the load capacitor is connected to the output end of the negative feedback circuit, and a second end of the load capacitor is grounded; The second control switch has a static contact, a first moving contact and a second moving contact, the first moving contact of the second control switch is connected to the output end of the operational amplifier, and the static and moving contacts of the second control switch are connected to the first output end of the current mirror load circuit; The input end of the current mirror load circuit is connected to the third power supply, the first output end of the current mirror load circuit is connected to the first input end of the current mirror load, and the fourth output end of the current mirror load circuit is connected to the second input end of the current mirror load; The first input end of the differential input pair is connected to the second output end of the current mirror load circuit, the second input end of the differential input pair is connected to the third output end of the current mirror load circuit, the first control end of the differential input pair serves as the first input end of the negative feedback circuit, and the second control end of the differential input pair serves as the second input end of the negative feedback circuit; The input end of the tail current source switch tube is connected to the output end of the differential input pair, the output end of the tail current source switch tube is grounded, and the control end of the tail current source switch tube is used to obtain a preset voltage preamplifier.

5. The low voltage high precision linear calibration circuit according to claim 4, characterized in that: The current mirror load circuit comprises: a fifth MOS switch tube, a sixth MOS switch tube, a seventh MOS switch tube and an eighth MOS switch tube; The first ends of the fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube and the eighth MOS switch tube serve as input ends of the current mirror load circuit; The gates of the fifth MOS switch tube and the sixth MOS switch tube are interconnected, the gate of the sixth MOS switch tube is also connected to the second end of the sixth MOS switch tube, the second end of the fifth MOS switch tube serves as the first output end of the current mirror load circuit, and the second end of the sixth MOS switch tube serves as the second output end of the current mirror load circuit; The gates of the seventh MOS switch tube and the eighth MOS switch tube are interconnected, the gate of the seventh MOS switch tube is also connected to the second end of the seventh MOS switch tube, the second end of the seventh MOS switch tube serves as the third output end of the current mirror load circuit, and the second end of the eighth MOS switch tube serves as the fourth output end of the current mirror load circuit; The differential input pair includes: a ninth MOS switch tube and a tenth MOS switch tube; The output ends of the ninth MOS switch tube and the tenth MOS switch tube serve as the output ends of the differential input pair; The first end of the ninth MOS switch tube serves as the first input end of the differential input pair, and the control end of the ninth MOS switch tube serves as the first control end; The first end of the tenth MOS switch tube serves as the first input end of the differential input pair, and the control end of the tenth MOS switch tube serves as the second control end; The current mirror load comprises: an eleventh MOS switch tube and a twelfth MOS switch tube; The second ends of the eleventh MOS switch tube and the twelfth MOS switch tube serve as output ends of the current mirror load; The gates of the eleventh MOS switch tube and the twelfth MOS switch tube are interconnected, the first end of the eleventh MOS switch tube serves as the first input end of the current mirror load, and the first end of the twelfth MOS switch tube serves as the second input end of the current mirror load.

6. The low voltage high precision linear calibration circuit according to claim 1, characterized in that: The first MOS switch tube and the second MOS switch tube are PMOS switch tubes, and the third MOS switch tube and the fourth MOS switch tube are NMOS switch tubes.

7. The low voltage high precision linear calibration circuit according to claim 5, characterized in that: The fifth MOS switch tube, the sixth MOS switch tube, the seventh MOS switch tube and the eighth MOS switch tube are PMOS switch tubes; The ninth MOS switch tube, the tenth MOS switch tube, the eleventh MOS switch tube, the twelfth MOS switch tube and the tail current source switch tube are NMOS switch tubes.

8. The low voltage high precision linear calibration circuit according to claim 1, characterized in that: Also includes: a first output resistor and a second output resistor; The first end of the first output resistor is connected to the first output node; The first input of the second output resistor is connected to the second output node; At this time, the second ends of the first output resistor and the second output resistor serve as output ends of the low-voltage high-precision linear calibration circuit.

9. A current source, characterized in that: The invention comprises the low-voltage high-precision linear calibration circuit as described in any one of claims 1 to 8.

10. An electrical device, characterized in that: Comprising the current source as claimed in claim 9.

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