Chip testing method and device and storage medium

Abstract

The embodiment of the invention discloses a chip testing method and device and a storage medium. The method comprises the following steps: acquiring a target test item with a delayed classification mark in a plurality of test items, wherein the plurality of test items are used for testing a to-be-tested object; for target test items with the delayed classification marks, testing the to-be-tested object based on any target test item to obtain a target test result; and in response to the target test result corresponding to the last target test item obtained by the test, classifying the to-be-tested object based on the plurality of target test results corresponding to the plurality of target test items to obtain a classification result of the to-be-tested object, so that the accuracy of classifying the to-be-tested object can be improved, a more flexible and detailed classification result is obtained, and the user experience is improved. And the accuracy of screening the to-be-detected object can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of chip testing technology, and in particular to a chip testing method, device and storage medium. Background Art

[0002] During the chip testing process, the tester will screen, classify and grade the chips by binning according to some specific parameters of the chip test data, such as power consumption, frequency, temperature, etc. Binning means dividing the test data of a chip into several groups according to certain rules, and each group represents a "bin" to facilitate more detailed analysis of the chip. During a test, the tester needs to perform multiple test items on the chip, including parameter measurement and functional testing.

[0003] In the related art, after obtaining the chip test result corresponding to any test item, the chip is binned based on the chip test result corresponding to the test item to obtain the chip binning result. However, the above method limits the chip binning result and affects the precision of chip screening. Summary of the invention

[0004] The embodiments of the present disclosure provide a chip testing method, device and storage medium to improve the accuracy of binning.

[0005] One aspect of an embodiment of the present disclosure provides a chip testing method, including:

[0006] Obtaining a target test item with a delay classification mark from a plurality of test items, wherein the plurality of test items are used to test an object to be tested;

[0007] For the target test items with the delay classification mark, testing the object to be tested based on any one of the target test items to obtain a target test result;

[0008] In response to obtaining a target test result corresponding to the last target test item in the test, the object to be tested is classified based on a plurality of the target test results corresponding to a plurality of the target test items to obtain a classification result of the object to be tested.

[0009] Another aspect of the embodiments of the present disclosure provides a chip testing device, including:

[0010] a tag setting module, configured to set a delay classification tag for a target test item among a plurality of test items in response to a delay classification configuration operation for the target test item, wherein the plurality of test items are test items for testing an object to be tested;

[0011] A chip testing module, configured to test the object to be tested based on any target test item having the delay classification mark to obtain a target test result;

[0012] The chip classification module is used to classify the object to be tested based on multiple target test results corresponding to multiple target test items in response to the target test result corresponding to the last target test item in the test to obtain the classification result of the object to be tested.

[0013] Another aspect of the embodiments of the present disclosure provides an electronic device, comprising: a memory for storing a computer program; a processor for executing the computer program stored in the memory, and when the computer program is executed, the chip testing method described in any of the above embodiments is implemented.

[0014] Another aspect of the embodiments of the present disclosure provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the chip testing method described in any of the above embodiments is implemented.

[0015] Another aspect of the embodiments of the present disclosure provides a computer program product, including a computer program, which, when executed by a processor, implements the chip testing method described in any of the above embodiments.

[0016] In the disclosed embodiment, for target test items with delayed classification marks, the target test result is obtained by testing the object to be tested based on any target test item. After the target test result corresponding to the last target test item is obtained, the object to be tested is comprehensively classified based on multiple target test results corresponding to multiple target test items to obtain the classification result of the object to be tested. The target test results corresponding to multiple target test items can be collected to classify the object to be tested, so that the classification result of the object to be tested can integrate the test data of multiple test items, thereby improving the accuracy of the classification of the object to be tested, and obtaining a more flexible and detailed classification result, which helps to improve the accuracy of the screening of the object to be tested.

[0017] The technical solution of the present disclosure is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0019] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0020] Figure 1 is a flow chart of a chip testing method provided by an exemplary embodiment of the present disclosure;

[0021] Figure 2is a flowchart of a process of obtaining a target test result by testing an object to be tested based on a target test item provided by an exemplary embodiment of the present disclosure;

[0022] Figure 3 is a flow chart of a chip testing method provided by another exemplary embodiment of the present disclosure;

[0023] Figure 4 is a flowchart of a process for determining a classification result based on a target test result provided by an exemplary embodiment of the present disclosure;

[0024] Figure 5 is a flow chart of a chip testing method provided by another exemplary embodiment of the present disclosure;

[0025] Figure 6 is a schematic structural diagram of a chip testing device provided by an exemplary embodiment of the present disclosure;

[0026] Figure 7 It is a schematic diagram of the structure of an electronic device provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless otherwise specifically stated.

[0028] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0029] It should also be understood that in the embodiments of the present disclosure, “plurality” may refer to two or more than two, and “at least one” may refer to one, two, or more than two.

[0030] It should also be understood that any component, data or structure mentioned in the embodiments of the present disclosure can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0031] In addition, the term "and / or" in the present disclosure is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present disclosure generally indicates that the associated objects before and after are in an "or" relationship.

[0032] It should also be understood that the description of the various embodiments in the present disclosure focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0033] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0034] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0035] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0036] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0037] The disclosed embodiments can be applied to electronic devices such as terminal devices, computer systems, servers, etc., which can operate with many other general or special computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, servers, etc. include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems, etc.

[0038] Electronic devices such as terminal devices, computer systems, servers, etc. can be described in the general context of computer system executable instructions (such as program modules) executed by computer systems. Generally, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media including storage devices.

[0039] In the related art, after executing a test item, the test machine performs binning (also referred to as classification in the disclosed embodiment) according to the test result of the test item. The binning result only reflects the test result corresponding to one type of test item, and the binning accuracy is low.

[0040] In an embodiment of the present disclosure, a chip testing method is provided, which can bin an object to be tested based on the test results of multiple test items, thereby improving binning accuracy.

[0041] Figure 1 A flowchart of a chip testing method provided by an exemplary embodiment of the present disclosure, the method can be used for electronic equipment, exemplarily, can be used for testing a test machine of an object to be tested, the method comprising steps 110-130:

[0042] Step 110, obtaining a target test item with a delay classification mark from a plurality of test items, wherein the plurality of test items are used to test the object to be tested.

[0043] The object to be tested may be a semiconductor device to be tested, such as a chip, a wafer, etc. When testing the object to be tested, multiple test items for testing the object to be tested are pre-configured to implement testing of different aspects of the object to be tested. Optionally, the multiple test items may include different types of test items, for example, parameter testing, functional testing, performance testing, etc., and may also include multiple different test items of the same type, for example, multiple test items for testing frequency.

[0044] The delayed classification mark is used to mark the target test items that need delayed classification, wherein delayed classification means delaying the timing of classification based on the test results corresponding to the target test items, so that the test machine can classify the object to be tested based on the test results of multiple delayed classified target test items. The target test items are the test items with delayed classification marks.

[0045] In one possible implementation, the delayed classification mark can be pre-configured by the user, and the delayed classification mark can be added to the test items that need delayed classification. In another possible implementation, the delayed classification mark can be automatically configured by the test machine, for example, some or all test items can be selected from different types of test items to configure the delayed classification mark.

[0046] Illustratively, the delay classification tag may be TestDelayLimits.

[0047] Step 120 , for the target test items with the delay classification mark, test the object to be tested based on any target test item to obtain a target test result.

[0048] For the target test items with delay classification marks, after obtaining any target test item, the object to be tested is tested based on the target test item to obtain the target test result. In a possible implementation, multiple test items can be monitored, and when a target test item with a delay classification mark is monitored, the object to be tested is tested based on the target test item to obtain the corresponding target test result, and the target test result is stored.

[0049] Optionally, the process of testing the object to be tested based on multiple target test items can be executed in parallel or in series. When executed in series, after obtaining the test result of one test item, the test process corresponding to the next test item is continued. When executed in parallel, the test data calculation process of one test item can be executed in parallel with the test process of the next test item.

[0050] Step 130 , in response to obtaining a target test result corresponding to the last target test item through the test, classify the object to be tested based on multiple target test results corresponding to multiple target test items to obtain a classification result of the object to be tested.

[0051] After the target test result corresponding to the last target test item is obtained, multiple target test results obtained by testing based on multiple target test items can be obtained to classify the object to be tested and obtain the classification result of the object to be tested. By combining the target test results of multiple target test items, the object to be tested is classified, making the classification result more detailed and accurate.

[0052] In one possible implementation, all test results included in the multiple target test results may be integrated to classify the object to be tested to obtain a classification result. In another possible implementation, some test results in the multiple target test results may be integrated to classify the object to be tested to obtain a classification result.

[0053] In the disclosed embodiment, for target test items with delayed classification marks, the target test result is obtained by testing the object to be tested based on any target test item. After the target test result corresponding to the last target test item is obtained, the object to be tested is comprehensively classified based on multiple target test results corresponding to multiple target test items to obtain the classification result of the object to be tested. The target test results corresponding to multiple target test items can be collected to classify the object to be tested, so that the classification result of the object to be tested integrates the test data of multiple test items, thereby improving the accuracy of the classification of the object to be tested, obtaining a more flexible and detailed classification result, and helping to improve the accuracy of the screening of the object to be tested.

[0054] In a possible implementation, the last target test item may be a target test item with a comprehensive classification mark. The above step 130 may include steps 1301-1302:

[0055] Step 1301 , in response to monitoring a target test item with a comprehensive classification mark, testing the object to be tested based on the target test item with the comprehensive classification mark, and obtaining a target test result corresponding to the last target test item.

[0056] When a target test item with a comprehensive classification mark is detected, the target test item is confirmed as the last target test item. The object to be tested is tested based on the target test item with a comprehensive classification mark to obtain a target test result corresponding to the last target test item.

[0057] Illustratively, the comprehensive classification tag may be a LimitAll tag.

[0058] Step 1302 , classify the object to be tested based on the target test results corresponding to the last target test item and the target test items with delayed classification marks, and obtain a classification result of the object to be tested.

[0059] After obtaining the target test result of the last target test item, the target test result of the last target test item and the target test results corresponding to the target test items before the last test item and with delayed classification marks are combined to classify the object to be tested to obtain the classification result of the object to be tested.

[0060] Optionally, comprehensive classification tags can be pre-configured by the user or automatically configured by the test machine.

[0061] In a possible implementation, the multiple target test items may include multiple target test items with comprehensive classification marks, and the object to be tested may be comprehensively classified multiple times to obtain multiple comprehensive classification results.

[0062] In response to monitoring the i-th target test item with a comprehensive classification tag, the object to be tested is tested based on the i-th target test item to obtain a target test result corresponding to the last target test item in the i-th delayed classification test item set.

[0063] The i-th target test item refers to the i-th target test item with a comprehensive classification mark. The i-th delayed classification test item set includes multiple target test items on which the i-th comprehensive classification depends. The last target test item in the i-th delayed classification test item set can be the i-th target test item.

[0064] By testing the object to be tested based on the i-th target test item, a target test result corresponding to the i-th target test item can be obtained, and the target test result corresponding to the i-th target test item is the target test result corresponding to the last target test item in the i-th delay classification test item set.

[0065] After obtaining the target test result corresponding to the last target test item in the i-th delay classification test item set, the object to be tested is classified based on the target test results corresponding to the last target test item in the i-th delay classification test item set and the target test items between the i-1th target test item and the i-th target test item to obtain the i-th classification result of the object to be tested.

[0066] The i-th delay classification test item set includes multiple target test items after the i-1th target test item and up to the i-th target test item, and classification is performed based on the target test results of the multiple target test items in the i-th delay classification test item set, that is, a process of classification based on the target test result corresponding to the i-th target test item and the target test results corresponding to the target test items between the i-1th target test item and the i-th target test item, the multiple test items have a pre-configured test order, and the target test items between the i-1th target test item and the i-th target test item refer to target test items located after the i-1th target test item and before the i-th target test item (excluding the i-1th target test item and the i-th target test item).

[0067] Schematically, when the target test items with delayed classification marks include test item 1, test item 2, test item 3, test item 4 and test item 5 in order, and test item 2 and test item 5 have comprehensive classification marks, test item 2 is the first target test item, and test item 5 is the second target test item. The object to be tested is tested based on test item 1, test item 2, test item 3, test item 4 and test item 5, respectively. When the object to be tested is tested based on test item 2, it can be monitored that test item 2 is the first target test item with a comprehensive classification mark. After obtaining test result 2 corresponding to test item 2, the object to be tested can be first comprehensively classified based on test result 1 and test result 2 corresponding to test item 1 to obtain a first classification result. The first classification result is the classification result obtained based on the first delayed classification test item set, and the first delayed classification test item set includes test item 1 and test item 2.

[0068] When testing the object to be tested based on test item five, it can be monitored that test item five is the second target test item with a comprehensive classification mark. After obtaining test result five corresponding to test item five, the object to be tested can be subjected to a second comprehensive classification based on the test results of each target test item between the second target test item and the first target test item (i.e., test result three corresponding to test item three and test result four corresponding to test item four) and test result five corresponding to test item five to obtain a second classification result. The second classification result is the classification result obtained based on the second delayed classification test item set, and the second delayed classification test item set includes test item three, test item four and test item five.

[0069] In the disclosed embodiment, a comprehensive classification mark can be set for the last target test item. When a target test item with a comprehensive classification mark is monitored, the object to be tested is comprehensively classified based on the target test results corresponding to each target test item. By setting multiple comprehensive classification marks, the test machine can combine different types of test item combinations (i.e., different delay classification test item sets) to classify the object to be tested multiple times, which helps to improve classification accuracy.

[0070] In a possible implementation manner, the delayed classification mark used to mark the target test item and the comprehensive classification mark used to mark the last target test item may be manually configured by a tester.

[0071] In the process of configuring the target test item, in response to the delay classification configuration operation on the target test item, the delay classification mark is set for the target test item, and the delay classification configuration operation is used to configure the test item to be delayed and classified. In one example, a delay classification test item configuration page can be provided for the user to select the test item to be delayed and classified. After the delay classification test item configuration page receives the selection operation on the target test item, it is determined that the delay classification configuration operation on the target test item is received, and the delay classification mark can be added to the selected target test item.

[0072] In the process of configuring the last target test item, in response to the comprehensive classification configuration operation of the last target test item, a comprehensive classification mark can be set for the last target test item. In a possible implementation, comprehensive classification marks can be configured for multiple target test items, that is, multiple delay classification test item sets are configured, so that the tester can perform multiple classifications based on multiple delay classification test item sets. Optionally, different delay classification test item sets are composed of different test items, and the number of test items included in different delay classification test item sets can also be different, which can be freely configured by the tester according to the test requirements.

[0073] During the test process, the delayed classification mark and the comprehensive classification mark can be monitored. When the delayed classification mark is monitored, the target test result is obtained based on the corresponding target test item and the target test result is temporarily stored. When the comprehensive classification mark is monitored, the object to be tested can be comprehensively classified based on the aforementioned temporarily stored target test result and the target test result of the last target test item.

[0074] In the disclosed embodiment, the tester can select different test item combinations according to the required configuration, so that the testing machine can classify the object to be tested based on the test result combination of the configured test item combination, so that the classification result matches the test requirement, thereby ensuring the validity of the classification result.

[0075] The process of testing the object to be tested based on the target test item includes multiple stages: setting test parameters based on the target test item (Setup), testing the object to be tested based on the test parameters (Measure), obtaining test data (Upload), and calculating test data based on the test data (Calculation). In a possible implementation, the multiple stages included in the test process are executed through multi-threading, so as to perform parallel calculation through multi-threading. Figure 2 As shown, the process of testing the object to be tested based on any target test item to obtain the target test result includes steps 210-230:

[0076] Step 210, starting a multithread for executing the test process, the multithread including a main thread and a sub-thread.

[0077] In one possible implementation, the main thread and the sub-thread may be started when executing the test process, and the test may be executed based on the main thread and the sub-thread. The main thread and the sub-thread are respectively used to execute different stages of the test process. In another possible implementation, the main thread may be started first, and when the test stage to be executed by the sub-thread is reached, the sub-thread may be started.

[0078] Step 220 , executing the process of setting test parameters on the main thread based on the target test item, testing the object to be tested based on the test parameters, and obtaining test data.

[0079] Optionally, the Setup, Measure, and Upload stages are executed on the main thread. For any target test item, after obtaining the target test item, the main thread sets test parameters based on the target test item, and then tests the object to be tested based on the set test parameters. After the test is completed, the test data is obtained.

[0080] Step 230, a process of executing test data calculation on a child thread based on the acquired test data to obtain a target test result.

[0081] Optionally, the Calculation phase is performed on the child thread. In one possible implementation, after the main thread obtains the test data, the child thread can be started, and the test data can be sent to the child thread, and the child thread performs the test data calculation to obtain the target test result. In the disclosed embodiment, multi-threading technology is used to hide a large amount of complex and time-consuming test data calculations on the background child thread, which helps to reduce the time for testing the object to be tested, thereby improving the efficiency of chip testing.

[0082] The main thread executes the Setup, Measure, and Upload phases, and the child thread executes the Calculation phase. When the child thread executes the Calculation, the main thread executes the Setup, Measure, and Upload phases corresponding to the next test item based on the next test item, thereby realizing parallel execution of different test items.

[0083] Step 240 , executing the process of setting the next test parameter on the main thread based on the next target test item, performing the next test on the object to be tested based on the next test parameter, and obtaining the next test data.

[0084] After obtaining the test data of a target test item in the above step 230, the next test parameter can be set based on the next target test item, the next test can be performed on the object to be tested based on the next test parameter, and the next test data can be obtained. The multiple target test items have a pre-configured execution order, and the execution order of the next target test item is located next to the corresponding order of the above target test item.

[0085] Step 250, based on the acquired next test data, execute the test data calculation process on the idle sub-thread to obtain the next target test result, where the idle sub-thread is a sub-thread that does not execute the test data calculation process.

[0086] In a possible implementation, the acquired next test data may be sent to the child thread, and the child thread performs test data calculation based on the next test data.

[0087] like Figure 3 As shown, in the case where the target test items include test item one and test item two, the main thread 301 first sets test parameters based on test item one, tests the object to be tested based on the test parameters, and obtains test data. Thereafter, the test data calculation corresponding to the test item one is executed on the child thread 302. The main thread 301 can set test parameters based on test item two, test the object to be tested based on the test parameters, and obtain test data in parallel, and then the child thread 302 executes the test data calculation corresponding to the test two. After the test result of the test item two is calculated, the main thread can obtain the test result corresponding to the test item one and the test result corresponding to the test item two from the child thread 302, and classify the object to be tested based on the test result corresponding to the test item one and the test result corresponding to the test item two.

[0088] In a possible implementation, the number of sub-threads is an integer greater than or equal to 1. When one sub-thread is included, the sub-thread may sequentially execute the test data calculation process corresponding to each test item; when multiple sub-threads are included, different sub-threads may execute the test data calculation process corresponding to different test items. Schematically, the test data calculation process of test item one may be executed on the first sub-thread, the test data calculation process of test item two may be executed on the second sub-thread, and the test data calculation process of test item three may be executed on the third sub-thread, wherein the first sub-thread, the second sub-thread, and the third sub-thread are used to indicate different sub-threads.

[0089] After obtaining the next test data, an idle sub-thread can be started, and the next test data can be sent to the idle sub-thread, and the idle sub-thread can calculate the test data based on the next test data. The idle sub-thread is a sub-thread that has not executed the test data calculation process, including each sub-thread that is not currently executing the test data calculation process. In combination with the above example, after obtaining the test data corresponding to test item three, if the first sub-thread has completed the test data calculation process of test item one, and the first sub-thread is also a sub-thread that is not currently executing the test data calculation process, a sub-thread can be selected from the first sub-thread and the third sub-thread to execute the test data calculation process corresponding to test item three.

[0090] In the case that there is no idle sub-thread, a sub-thread with a low task load may be selected to execute the calculation process of the test data.

[0091] In the disclosed embodiment, the test data calculation process is hidden in the background sub-thread for execution, and the sub-thread executes the test data calculation process with relatively large time overhead during the test process, so that the main thread and the sub-thread can execute the test process in parallel, which helps to improve the test efficiency.

[0092] In a possible implementation, when the objects to be tested are classified based on multiple target test results, the classification results can be determined according to the standard result ranges corresponding to different target test items, such as Figure 4 As shown, the process includes steps 410-430:

[0093] Step 410, obtaining multiple standard result ranges corresponding to multiple target test items.

[0094] In a possible implementation, different standard result ranges are pre-configured for different target test items. Optionally, the standard result range may be the result range corresponding to the qualified test result data, and also the result range expected to be achieved by the test data. When the test data is qualified, it is determined that the object to be tested is qualified. Schematically, the target test items include test item 1 and test item 2. Test item 1 is a test item for testing frequency, and test item 2 is a test item for testing temperature. Test item 1 corresponds to a standard frequency range, and test item 2 corresponds to a standard temperature range.

[0095] In one possible implementation, there may be different test items of the same type, such as different test items that are all used to test frequency, but the expected test results may be different. Different standard result ranges may also be configured for test items of the same type, and each target test item is set with a corresponding standard result range.

[0096] Step 420, matching the multiple target test results with their corresponding standard result ranges to obtain multiple matching results.

[0097] After obtaining the pre-configured multiple standard result ranges, the target test result is matched with the corresponding standard result range to obtain multiple matching results. In a possible implementation, each matching result corresponding to each target test result and the standard result range can be obtained.

[0098] Step 430: Determine a classification result of the object to be tested based on the multiple matching results.

[0099] In one possible implementation, the classification results may include qualified products and unqualified products. When multiple matching results indicate that each target test result is within the corresponding standard result range, the classification result of the object to be tested is determined to be a qualified product. When there is a target test result in multiple matching results that exceeds or is lower than the standard result range, the classification result of the result to be tested is determined to be an unqualified product.

[0100] In another possible implementation, the classification results may be further divided into different performance levels, and the performance level to which the object to be tested belongs may be determined according to multiple target test results. The process may include the following steps 4101, 4201, 4301:

[0101] Step 4101, obtaining multiple standard result ranges corresponding to multiple target test items at different classification levels.

[0102] In a possible implementation, for a target test item, a standard result range corresponding to different classification levels is pre-set, and different classification levels are pre-divided. Schematically, different classification levels include Class I products and Class II products, and the quality of Class I products is better than that of Class II products. In combination with the above example, for test item 1 for testing frequency, a Class I standard frequency range and a Class II standard frequency range can be set respectively; for test item 2 for testing temperature, a Class I standard temperature range and a Class II standard temperature range can be set respectively.

[0103] When determining the classification results, obtain the standard result ranges corresponding to the different classification levels corresponding to each target test item.

[0104] Step 4201, respectively matching multiple target test results with their corresponding standard result ranges of different levels to obtain level matching results.

[0105] Each target test result is matched with its corresponding standard result range of different levels to obtain the level matching result corresponding to each target test result.

[0106] In combination with the above example, the frequency obtained based on the test item one is 2.8 GHz, the temperature obtained based on the test item two is 92°C, the preset Class I standard frequency range is 2.5-3.0 GHz, the Class I standard temperature frequency range is 90-95°C, the Class II standard frequency range is 2.0-2.5 GHz, and the Class II standard temperature range is 80-90°C. The frequency obtained from the test item one can be compared with the Class I standard frequency range and the Class II standard frequency range respectively to determine that the grade matching result corresponding to the test item one is a Class I product, and the temperature obtained from the test item two can be compared with the Class I standard temperature range and the Class II standard temperature range respectively to determine that the grade matching result corresponding to the test item two is a Class I product.

[0107] Step 4301, determining the classification result of the object to be tested based on multiple level matching results.

[0108] After obtaining multiple level matching results obtained by matching multiple target test results, the classification results of the object to be tested can be determined based on the multiple level matching results. In one possible implementation, when multiple level matching results are the same, the performance level indicated by the multiple level matching results is determined as the level of the object to be tested. In combination with the above example, the level matching results corresponding to test item one and test item two are both Class I products, and the object to be tested can be determined as a Class I product. When there are different performance levels in multiple level matching results, the level matching result with the highest proportion in the multiple level matching results can be determined as the classification result of the object to be tested. In the case where the level matching results with the highest proportion include multiple, the classification result of the object to be tested can be determined by combining the test data trend of the corresponding test items of the lower level. Exemplarily, when the frequency tested by test item one is 2.8GHz and the temperature tested by test item two is 89°C, they are matched as Class I products and Class II products respectively, wherein the temperature 89°C measured by test item two corresponding to Class II products tends to be Class I products, then the object to be tested can be determined as a Class I product.

[0109] In another possible implementation, the different classification levels may also include multi-level levels. Combined with the above example, the first-class product level can be further divided into first-class excellent products and first-class substandard products, and the second-class product level can be further divided into second-class excellent products and second-class substandard products, etc. When determining the classification result of the object to be tested, the performance level of the object to be tested is determined based on the matching result between the test result and the first-class standard range and the second-class standard range.

[0110] Exemplarily, when the grade matching results corresponding to each test item are all Class I products, the object to be tested can be classified as Class I excellent products; when most of the grade matching results are Class I products and a few are Class II products, the object to be tested can be classified as Class I substandard products; when a few of the grade matching results are Class I products and most of the grade matching results are Class II products, the object to be tested can be classified as Class II excellent products; when the grade matching results corresponding to each test item are all Class II products, the object to be tested can be classified as Class II excellent products; when most of the grade matching results are Class II products and a few of the grade matching results belong neither to Class I products nor to Class II products, the object to be tested can be classified as Class II substandard products.

[0111] The classification of the products to be tested into different classification levels and the classification results of the objects to be tested according to the matching results of multiple levels can be adjusted according to the needs, and this embodiment does not limit this.

[0112] In the embodiments of the present disclosure, corresponding standard result ranges are set for different target test items. The target test results of each target test item can be compared with the corresponding standard result range. The classification result of the object to be tested can be determined based on the multiple matching results obtained by comparison. The object to be tested can be classified by combining the multiple target test results to improve the classification accuracy.

[0113] like Figure 5 As shown, it shows a flow chart of a chip testing method provided by another exemplary embodiment of the present disclosure. Taking the case where the target test items include test item 1, test item 2, test item 3, and test item 3 has a comprehensive classification tag as an example, the method includes:

[0114] When executing test item one, the Setup, Measure and Upload processes of test item one are executed on the main thread based on test item one. Afterwards, sub-thread 1 is started to execute the test calculation of test item one, and test data one corresponding to test item one can be sent to sub-thread 1. Sub-thread 1 executes the test calculation process of test item one based on test data one. When sub-thread 1 executes the test calculation process of test item one, the main thread can execute the Setup, Measure and Upload processes of test item two in parallel based on test item two. Afterwards, sub-thread 2 is started to execute the test calculation of test item two, and test data two corresponding to test item two can be sent to sub-thread 2. Sub-thread 2 executes the test calculation process of test item three based on test data two. The main thread can execute the Setup, Measure and Upload processes of test item three in parallel based on test item three. Afterwards, sub-thread 3 is started to execute the test calculation of test item three, and test data three corresponding to test item three can be sent to sub-thread 3. Sub-thread 3 executes the test calculation process of test item three based on test data three.

[0115] When executing test item three, a comprehensive classification mark is detected, and the main thread can obtain test result one corresponding to test item one from child thread 1, test result two corresponding to test item two from child thread 2, and test result three corresponding to test item three from child thread 3, and comprehensively classify the object to be tested based on test result one, test result two and test result three, thereby improving the accuracy of classification of the object to be tested.

[0116] Figure 6 : is a schematic diagram of a chip testing device provided by an exemplary embodiment of the present disclosure, the device comprising:

[0117] A tag setting module 610, configured to set a delay classification tag for a target test item among a plurality of test items in response to a delay classification configuration operation for the target test item, wherein the plurality of test items are test items for testing an object to be tested;

[0118] A chip testing module 620 is configured to test the object to be tested based on any target test item having the delay classification mark to obtain a target test result;

[0119] The chip classification module 630 is used to classify the object to be tested based on multiple target test results corresponding to multiple target test items in response to the target test result corresponding to the last target test item in the test to obtain a classification result of the object to be tested.

[0120] In an exemplary embodiment, the chip classification module 630 is further configured to:

[0121] In response to monitoring a target test item with a comprehensive classification mark, testing the object to be tested based on the target test item with the comprehensive classification mark to obtain a target test result corresponding to the last target test item;

[0122] Based on the target test results corresponding to the last target test item and the target test items with the delayed classification mark, the object to be tested is classified to obtain a classification result of the object to be tested.

[0123] In an exemplary embodiment, the plurality of target test items include a plurality of target test items with comprehensive classification marks;

[0124] The chip classification module 630 is further used for:

[0125] In response to monitoring the i-th target test item with the comprehensive classification mark, testing the object to be tested based on the i-th target test item to obtain a target test result corresponding to the last target test item in the i-th delayed classification test item set;

[0126] Based on the target test results corresponding to the last target test item in the i-th delay classification test item set and the target test items between the i-1th target test item and the i-th target test item, the object to be tested is classified to obtain the i-th classification result of the object to be tested.

[0127] In an exemplary embodiment, the chip testing module 620 is further configured to:

[0128] Start a multithread for executing a test process, wherein the multithread includes a main thread and a subthread;

[0129] A process of setting test parameters on the main thread based on the target test item, testing the object to be tested based on the test parameters, and acquiring test data;

[0130] A process of performing test data calculation on the sub-thread based on the acquired test data to obtain the target test result.

[0131] In an exemplary embodiment, the number of sub-threads is an integer greater than or equal to 1. After acquiring the test data, the chip test module 620 is further used to:

[0132] A process of setting a next test parameter on the main thread based on a next target test item, performing a next test on the object to be tested based on the next test parameter, and obtaining next test data;

[0133] A process of performing test data calculation on an idle sub-thread based on the acquired next test data to obtain a next target test result, wherein the idle sub-thread is a sub-thread that does not perform the test data calculation process.

[0134] In an exemplary embodiment, the chip classification module 630 is further configured to:

[0135] Obtaining multiple standard result ranges corresponding to each of the multiple target test items;

[0136] Matching the multiple target test results with the respective corresponding standard result ranges to obtain multiple matching results;

[0137] A classification result of the object to be detected is determined based on the multiple matching results.

[0138] In an exemplary embodiment, the chip classification module 630 is further configured to:

[0139] Obtaining multiple standard result ranges corresponding to multiple target test items at different classification levels;

[0140] Matching the multiple target test results with the corresponding standard result ranges of different levels respectively to obtain level matching results;

[0141] A classification result of the object to be detected is determined based on the multiple level matching results.

[0142] In an exemplary embodiment, the apparatus further comprises:

[0143] The tag setting module is used to set the delay classification tag for the target test item in response to a delay classification configuration operation for the target test item, wherein the delay classification configuration operation is used to configure the test item to be delayed classified.

[0144] The chip testing device in the embodiment of the present disclosure corresponds to the embodiment of the chip testing method in the present disclosure, and the relevant contents can be referenced to each other, which will not be repeated here. The beneficial technical effects corresponding to the chip testing device in the embodiment of the present disclosure can refer to the corresponding beneficial technical effects of the corresponding exemplary method part above, which will not be repeated here.

[0145] In addition, an embodiment of the present disclosure further provides an electronic device, including:

[0146] Memory for storing computer programs;

[0147] The processor is used to execute the computer program stored in the memory, and when the computer program is executed, the chip testing method described in any of the above embodiments of the present disclosure is implemented.

[0148] Figure 7 is a schematic diagram of the structure of an electronic device provided by an exemplary embodiment of the present disclosure, such as Figure 7 As shown, the electronic device includes one or more processors and memory.

[0149] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0150] The memory may store one or more computer program products, and the memory may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program products may be stored on the computer-readable storage medium, and the processor may run the computer program product to implement the chip testing method of each embodiment of the present disclosure described above and / or other desired functions.

[0151] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0152] In addition, the input device may also include, for example, a keyboard, a mouse, and the like.

[0153] The output device can output various information to the outside, including determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0154] Of course, to simplify, Figure 7 Only some of the components related to the present disclosure in the electronic device are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device may further include any other appropriate components.

[0155] In addition to the above-mentioned methods and devices, an embodiment of the present disclosure may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the chip testing method according to various embodiments of the present disclosure described in the above part of this specification.

[0156] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the disclosed embodiments, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0157] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, enables the processor to execute the steps of the chip testing method according to various embodiments of the present disclosure described in the above part of this specification.

[0158] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0159] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0160] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0161] The block diagrams of the devices, apparatuses, equipment, and systems involved in this disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including," "comprising," "having," and the like are open words, referring to "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or," and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0162] The method and apparatus of the present disclosure may be implemented in many ways. For example, the method and apparatus of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of steps for the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above, unless otherwise specifically stated. In addition, in some embodiments, the present disclosure may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0163] It should also be noted that in the apparatus, device and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0164] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0165] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A chip testing method, characterized in that: The method comprises: Acquire a target test item with a delay classification mark from a plurality of test items, wherein the plurality of test items are used to test an object to be tested; For the target test items with the delay classification mark, testing the object to be tested based on any one of the target test items to obtain a target test result; In response to obtaining a target test result corresponding to the last target test item in the test, the object to be tested is classified based on a plurality of the target test results corresponding to a plurality of the target test items to obtain a classification result of the object to be tested.

2. The method according to claim 1, characterized in that: The step of obtaining a target test result corresponding to the last target test item in response to the test, and classifying the object to be tested based on a plurality of the target test results corresponding to a plurality of the target test items to obtain a classification result of the object to be tested includes: In response to monitoring a target test item with a comprehensive classification mark, testing the object to be tested based on the target test item with the comprehensive classification mark to obtain a target test result corresponding to the last target test item; Based on the target test results corresponding to the last target test item and the target test items with the delayed classification mark, the object to be tested is classified to obtain a classification result of the object to be tested.

3. The method according to claim 2, characterized in that The plurality of target test items include a plurality of target test items with comprehensive classification marks; In response to monitoring a target test item with a comprehensive classification mark, testing the object to be tested based on the target test item with the comprehensive classification mark to obtain a target test result corresponding to the last target test item includes: In response to monitoring the i-th target test item with the comprehensive classification mark, testing the object to be tested based on the i-th target test item to obtain a target test result corresponding to the last target test item in the i-th delayed classification test item set; The classifying the object to be tested based on the target test results corresponding to the last target test item and the target test items with the delayed classification mark to obtain the classification result of the object to be tested includes: Based on the target test results corresponding to the last target test item in the i-th delay classification test item set and the target test items between the i-1th target test item and the i-th target test item, the object to be tested is classified to obtain the i-th classification result of the object to be tested.

4. The method according to any one of claims 1 to 3, characterized in that: The step of testing the object to be tested based on any one of the target test items to obtain a target test result includes: Start a multithread for executing a test process, wherein the multithread includes a main thread and a subthread; A process of setting test parameters on the main thread based on the target test item, testing the object to be tested based on the test parameters, and acquiring test data; A process of executing test data calculation on the sub-thread based on the acquired test data to obtain the target test result.

5. The method according to claim 4, characterized in that The number of sub-threads is an integer greater than or equal to 1. After acquiring the test data, the method further includes: A process of setting a next test parameter on the main thread based on a next target test item, performing a next test on the object to be tested based on the next test parameter, and obtaining next test data; A process of performing test data calculation on an idle sub-thread based on the acquired next test data to obtain a next target test result, wherein the idle sub-thread is a sub-thread that does not perform the test data calculation process.

6. The method according to any one of claims 1 to 3, characterized in that: The classifying the object to be tested based on the multiple target test results corresponding to the multiple target test items to obtain the classification result of the object to be tested includes: Obtaining multiple standard result ranges corresponding to each of the multiple target test items; Matching the multiple target test results with the respective corresponding standard result ranges to obtain multiple matching results; A classification result of the object to be detected is determined based on the multiple matching results.

7. The method according to claim 6, characterized in that The obtaining of multiple standard result ranges corresponding to the multiple target test items includes: Obtaining multiple standard result ranges corresponding to multiple target test items at different classification levels; The matching of the multiple target test results with the respective corresponding standard result ranges to obtain multiple matching results includes: Matching the multiple target test results with the corresponding standard result ranges of different levels respectively to obtain level matching results; The determining the classification result of the object to be detected based on the multiple matching results includes: A classification result of the object to be detected is determined based on the multiple level matching results.

8. The method according to any one of claims 1 to 3, characterized in that: Before obtaining the target test item with the delay classification mark from the multiple test items, the method further includes: In response to a delay classification configuration operation on the target test item, the delay classification flag is set for the target test item, wherein the delay classification configuration operation is used to configure the test item to be delayed classified.

9. A chip testing device, characterized in that: The device comprises: a tag setting module, configured to set a delay classification tag for a target test item among a plurality of test items in response to a delay classification configuration operation for the target test item, wherein the plurality of test items are test items for testing an object to be tested; A chip testing module, configured to test the object to be tested based on any target test item having the delay classification mark to obtain a target test result; The chip classification module is used to classify the object to be tested based on multiple target test results corresponding to multiple target test items in response to the target test result corresponding to the last target test item in the test to obtain the classification result of the object to be tested.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the chip testing method described in any one of claims 1 to 8 is implemented.

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