Transaction processing method and device based on page mapping and rotation, chip and medium

Abstract

The embodiment of the invention discloses a transaction processing method and device based on page mapping and rotation, a chip and a medium. The method comprises the following steps: determining a page backup area according to a preset page mapping range, and sending an instruction for establishing a page mapping management table to a chip; wherein the page mapping management table comprises a mapping relationship between a physical address and a logic address of the physical page; when physical page access is carried out, a physical address is determined according to the logical address query mapping relation; in response to a data updating instruction of a target page, querying the page mapping management table, and determining a target backup page for backup; according to the data updating instruction, updating data are written into the target backup page, and physical addresses of the target page and the target backup page in the page mapping management table are exchanged. Through page mapping exchange, the data erasing frequency in transaction processing can be reduced, especially when a chip is powered off and then powered on for recovery, only one-time erasing is needed, and the transaction processing speed can be greatly improved.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a transaction processing method, device, chip and medium based on page mapping and rotation. Background Art

[0002] Security chips or security units are usually used in smart cards to achieve secure data storage, mutual authentication between users and entities, and cryptographic operations. In data storage, it involves the erasing and writing operations of non-volatile memory (NVM) storage media and the anti-power-off mechanism.

[0003] The transaction processing mechanism of the prior art adopts pure software backup, and has low execution performance. Taking a page of data as an example, each time a page of data is backed up, the old data needs to be written into the backup area, and then the new data of the destination address needs to be updated, and at least two pages of data need to be erased. When the chip is powered off and then powered on again, when the transaction is restored, the valid data is rolled back, and restoring one page triggers an erase. Therefore, the transaction processing mechanism of the prior art has the problem of many erases in the backup and recovery stages, which reduces the efficiency of transaction execution.

[0004] With the development of technology, the performance of NVM operations in chips directly affects the user experience in the application scenarios. For example, in application scenarios such as swiping buses, subways, and opening access control, the existing transaction processing mechanism restricts the performance of the chip due to the high number of erase and write times. Summary of the invention

[0005] The present invention provides a transaction processing method, device, chip and medium based on page mapping and rotation, so as to reduce the number of erasures and writes in transaction processing and improve transaction processing efficiency.

[0006] According to one aspect of the present invention, a transaction processing method based on page mapping and rotation is provided, the method comprising:

[0007] According to the preset page mapping range, determine the page backup area, and send a page mapping management table creation instruction to the chip;

[0008] The page mapping management table includes a mapping relationship between a physical address and a logical address of a physical page; when accessing a physical page, the mapping relationship is queried according to the logical address to determine the physical address;

[0009] In response to a data update instruction of a target page, querying the page mapping management table to determine a target backup page for backup;

[0010] According to the data update instruction, the update data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged.

[0011] According to another aspect of the present invention, a transaction processing device based on page mapping and rotation is provided, the device comprising:

[0012] A page mapping management table establishment instruction sending module is used to determine the page backup area according to the preset page mapping range and send a page mapping management table establishment instruction to the chip;

[0013] The page mapping management table includes a mapping relationship between a physical address and a logical address of a physical page; when accessing a physical page, the physical address is determined according to the mapping relationship through the logical address;

[0014] A target backup page determination module, configured to query the page mapping management table in response to a target page data update instruction, and determine a target backup page for backup;

[0015] The page mapping management table information exchange module is used to write the update data to the target backup page according to the data update instruction, and exchange the physical addresses of the target page and the target backup page in the page mapping management table.

[0016] According to another aspect of the present invention, a chip is provided, the chip comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the transaction processing method based on page mapping and rotation described in any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the transaction processing method based on page mapping and rotation described in any embodiment of the present invention when executed.

[0021] According to another aspect of the present invention, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the transaction processing method based on page mapping and rotation described in any embodiment of the present invention is implemented.

[0022] The technical solution of the embodiment of the present invention determines the page backup area according to a preset page mapping range, and sends a page mapping management table establishment instruction to the chip; wherein the page mapping management table includes a mapping relationship between a physical address of a physical page and a logical address; when accessing a physical page, the physical address is determined according to the logical address query mapping relationship; in response to a data update instruction of a target page, the page mapping management table is queried to determine a target backup page for backup; according to the data update instruction, the updated data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged, thereby solving the problem of a large number of data erasure times caused by data backup in transaction processing. By exchanging the physical addresses of the target page and the backup page, the number of data erasure times in transaction processing can be reduced, especially when the chip is powered off and then powered on to recover, only one erasure is required, thereby greatly improving the transaction processing speed.

[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 is a flow chart of a transaction processing method based on page mapping and rotation provided according to an embodiment of the present invention;

[0026] Figure 2 A page mapping management representation is provided according to an embodiment of the present invention;

[0027] Figure 3 is a schematic diagram of a process of an atomic write operation provided according to an embodiment of the present invention;

[0028] Figure 4 is a flowchart of a non-atomic write operation provided according to an embodiment of the present invention;

[0029] Figure 5 This is a schematic diagram of a transaction submission process provided according to an embodiment of the present invention;

[0030] Figure 6 is a schematic diagram of a marking page provided according to an embodiment of the present invention;

[0031] Figure 7This is a schematic diagram of a transaction abort process provided according to an embodiment of the present invention;

[0032] Figure 8 This is a schematic diagram of a data recovery process after power failure provided by an embodiment of the present invention;

[0033] Fig. 9 It is a structural schematic diagram of a transaction processing device based on page mapping and rotation provided according to an embodiment of the present invention;

[0034] Fig.10 It is a schematic diagram of the structure of a chip that implements the transaction processing method based on page mapping and rotation according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] Figure 1 This is a flow chart of a transaction processing method based on page mapping and rotation provided according to an embodiment of the present invention. This embodiment can be applied to the transaction process processing of services based on security chips in smart cards, including but not limited to subway and bus swiping and door opening. This method can be executed by a transaction processing device based on page mapping and rotation, which can be implemented in the form of hardware and / or software, and can be configured in the security chip or security unit of the smart card. Figure 1 As shown, the method includes:

[0038] Step 110: Determine the page backup area according to the preset page mapping range, and send a page mapping management table creation instruction to the chip.

[0039] Figure 2 This is a page mapping management representation provided according to an embodiment of the present invention. Figure 2 As shown in FIG. 1 , the page mapping management table includes the mapping relationship between the physical address of the physical page and the logical address. The mapping relationship can be queried through the mapping table index number (index). When accessing a physical page, the physical address is determined by querying the mapping relationship based on the logical address. In the page mapping table, the data storage area can be divided into two categories, one category (such as Figure 2 The page mapping range from 0 to n in the figure is shown) is used to store data in transactions, and the other type (such as Figure 2 The page mapping range from n+1 to m is shown in FIG. 1 ) and is used to back up data in a transaction, that is, the backup area.

[0040] like Figure 2 As shown, the page mapping management table includes: an atomic backup area and a non-atomic backup area. The atomic backup area is used for atomic backup write and transaction backup (such as Figure 2 The non-atomic backup area is used for non-atomic backup writing; the non-atomic backup area is fixed to 1 page (such as Figure 2 The non-atomic backup area is fixed to 1 page to ensure the atomicity of 1 page.

[0041] A page mapping management table is established through hardware to facilitate subsequent physical address queries based on the page mapping management table. After the mapping relationship is updated, the physical address can still be accurately accessed, thereby achieving data access and reducing the number of erase and write times in transaction processing.

[0042] Step 120 : In response to the data update instruction of the target page, query the page mapping management table to determine the target backup page for backup.

[0043] When updating the data of a target page, the target page can be specified by a logical address. The data update can be an atomic data update or a non-atomic data update in a transaction. An atomic data update is inseparable during the execution of a write operation, that is, the operation is either fully executed or not executed at all, ensuring data consistency and thread safety. Non-atomic writes may be interrupted by operations of other threads or processes during the execution of a write operation.

[0044] When updating data on the target page, the target backup page can be determined in the backup area of ​​the page mapping management table. If the target page is written atomically and the target page is not backed up in the atomic backup area, an idle atomic backup page can be determined in the backup area of ​​the page mapping management table as the target backup page. If the target page is written non-atomically, the non-atomic backup area can be used as the target backup page.

[0045] Step 130 : According to the data update instruction, the update data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged.

[0046] like Figure 2 As shown, if the target page at logical address 0 is updated, the target backup page such as logical address n+2 can be determined according to the page mapping management table. The updated data is written to the physical address corresponding to logical address n+2, that is, the physical address of n+2. At this time, only one write operation is performed. The physical addresses corresponding to logical address 0 and logical address n+2 in the page mapping management table are swapped, that is, Figure 2 In the example, logical address 0 corresponds to physical address n+2, and logical address n+2 corresponds to physical address 0. At this time, when data is accessed through logical address 0, the new data (data in physical address n+2) is accessed; when data is accessed through logical address n+2, the old data, i.e., the backup data (data in physical address 0) is accessed.

[0047] By exchanging the physical addresses of the target page and the target backup page in the page mapping management table, only one write operation is required during data backup, and no erase operation is required to achieve the update of new data and the backup of old data. Therefore, the technical solution provided by the embodiment of the present invention can ensure the correctness of transaction processing and improve transaction processing efficiency while reducing the number of data erases. In the transaction processing method provided by the embodiment of the present invention, since only one write operation is performed to back up a page of data during the backup process, only one erase operation is triggered when the transaction restores a page of data after a power outage.

[0048] Taking a page of data as an example, the transaction processing mechanism in the prior art needs to trigger at least three erases and writes in the process of backup->power off->power on recovery, while the technical solution provided by the embodiment of the present invention only needs to trigger one erase + one write, which greatly improves the transaction processing performance and meets more demanding business needs.

[0049] The technical solution of this embodiment determines the page backup area according to a preset page mapping range, and sends an instruction to establish a page mapping management table to the chip; wherein the page mapping management table includes a mapping relationship between a physical address of a physical page and a logical address; when accessing a physical page, the physical address is determined according to the logical address query mapping relationship; in response to a data update instruction of the target page, the page mapping management table is queried to determine a target backup page for backup; according to the data update instruction, the updated data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged, thereby solving the problem of a large number of data erase and write times caused by data backup in transaction processing. By exchanging the physical addresses of the target page and the backup page, the number of data erase and write times in transaction processing can be reduced, especially when the chip is powered off and then powered on to recover, only one erase and write is required, which can greatly improve the transaction processing speed.

[0050] In an optional implementation of an embodiment of the present invention, optionally, according to a data update instruction, the updated data is written to a target backup page, including: when the data update instruction is an atomic write, if the backup data of the target page does not exist in the target backup page, then when the updated data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page.

[0051] Based on the above implementation, optionally, the transaction processing method based on page mapping and rotation also includes: when the data update instruction is an atomic write, if the backup data of the target page already exists in the target backup page, then according to the data update instruction, the updated data is written to the target page, keeping the data version number unchanged.

[0052] Figure 3 FIG. 1 is a flow chart of an atomic write operation provided according to an embodiment of the present invention. Figure 3 As shown, when performing atomic write of the target page, it is possible to first determine whether the target page has been backed up in the atomic backup area. Specifically, the determination can be made by searching in the atomic backup area whether there is a virtual page corresponding to the target page. When the target page is not backed up through the atomic backup area, determine an idle atomic backup page as the target backup page. Write the updated data to the target backup page, and increase the version number by 1 based on the target page. Exchange the physical address corresponding to the target backup page and the target page in the page mapping management table. The page to which the new data is written is maintained in the valid page management table. The old data page is managed and maintained in the backup area.

[0053] When multiple write operations are performed on the same virtual page in one processing instruction, only the most original data can be backed up during backup. Therefore, when the target page is backed up through the atomic backup area, the updated data can be directly written to the target page. At this time, the data version number of the target page remains unchanged.

[0054] After the current target page is processed, the next page can be processed until the data update is completed. Figure 3 In the atomic write operation process shown, when the target page is not backed up through the atomic backup area, only one write operation is required to implement data backup; when the target page is backed up through the atomic backup area, only one write operation is required to implement data update, which reduces the number of erases and writes in transaction processing and improves transaction processing efficiency. The version number can be used to compare the new and old data, and the version number can be used to erase or retain data during data recovery.

[0055] Figure 4 1 is a flow chart of a non-atomic write operation provided according to an embodiment of the present invention. Figure 4 As shown, when a non-atomic write is performed on the target page, the target page can be divided into multiple pages of data according to the logical address of the target page. When the current page is processed, the non-atomic backup area is used as the target backup page. If the non-atomic write is not in a transaction, or the non-atomic write occurs in a transaction but the transaction backup is not performed in the atomic backup area, the new non-atomic data in the update data can be written to the non-atomic backup area, and the physical addresses of the non-atomic backup area and the target page in the page mapping management table are exchanged.

[0056] If a non-atomic write occurs in a transaction and the transaction has been backed up in the atomic backup area, the specific write operation needs to be implemented based on the old data that has been backed up, updating the non-atomic data to be updated to the old data that has been backed up; then rewriting the data of the actual target page.

[0057] like Figure 4 As shown, in an optional implementation of an embodiment of the present invention, when the data update instruction is to perform non-atomic write in a transaction, the target backup page is a non-atomic backup area; according to the data update instruction, the updated data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged, including: according to the data update instruction, when it is determined that the target page has been backed up in the atomic backup area, the new non-atomic data in the updated data is written to the non-atomic backup area; the physical addresses of the non-atomic backup area in the page mapping management table and the atomic backup area are exchanged; the new atomic data and the new non-atomic data in the updated data are written to the target page; and the non-atomic backup area is erased.

[0058] Based on the above implementation, a version number can be set for the page in order to distinguish the new and old data. Figure 4 As shown, writing the new non-atomic data in the update data into the non-atomic backup area includes: adding 1 to the backed-up version number in the atomic backup area and the new version number in the version number of the target page as the version number of the non-atomic backup area. Figure 4 As shown, writing the new atomic data and the new non-atomic data in the update data into the target page includes: adding 1 to the backed-up version number in the atomic backup area and the new version number in the version number of the target page, and updating them to the version number of the target page.

[0059] like Figure 4 As shown, when a non-atomic write is not in a transaction, or a non-atomic write occurs in a transaction but the transaction is not backed up in the atomic backup area, a version number can also be set to distinguish between new and old data.

[0060] Optionally, when the updated data is written to the target backup page according to the data update instruction, it also includes: when the data update instruction is to perform a non-atomic write in a transaction, and when it is determined that the target page is not backed up in the atomic backup area, when the updated data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page.

[0061] When the updated data is written to the target backup page according to the data update instruction, it also includes: when the data update instruction is a non-atomic write in a non-transaction, when the updated data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page.

[0062] like Figure 4 As shown, when the execution of the current page is completed, it can return to determine whether there is any data update. If there is data update, the next page is processed. If there is no data update, the process ends. The page written with new data is maintained in the valid page management table. The old data page is managed and maintained in the backup area.

[0063] In the embodiment of the present invention, at the beginning of a transaction, a temporary mark (such as a RAM mark) can be set for the transaction processing. The RAM mark is automatically cleared when power is off. Whether the current stage has a RAM mark can be used to determine whether the current stage is in a transaction.

[0064] In such Figure 4In the non-atomic write process shown, when the data update instruction is to perform non-atomic write in a transaction, and when it is determined that the target page is not backed up in the atomic backup area, or when the data update instruction is to perform non-atomic write in a non-transaction, only one write operation is performed. When the data update instruction is to perform non-atomic write in a transaction, and when it is determined that the target page is already backed up in the atomic backup area, two write operations and one erase operation are performed. Compared with the prior art, the number of data erases is reduced, and the transaction processing efficiency is improved.

[0065] After the data is updated, the transaction commit process will begin. Figure 5 The following is a schematic diagram of a transaction submission process provided according to an embodiment of the present invention. When a transaction is submitted, the transaction completion status may be updated.

[0066] In the embodiment of the present invention, optionally, the page mapping management table further includes: a marking page; a marking page for recording whether the transaction process is completed. Figure 2 As shown, the position corresponding to m+1 can be used as a mark page. The mark page is a fixed page and does not participate in page rotation. Figure 6 is a schematic diagram of a marking page provided according to an embodiment of the present invention. Figure 6 As shown, the mark page may include a completion mark and a control mark. The control mark indicates that the transaction process is not completed. The completion mark indicates that the transaction process is completed. The initial state of the transaction is that the control mark is valid. In the embodiment of the present invention, in order to reduce the number of erasures, the mark can be written in the mark page by appending without erasing the data. When determining the transaction status, the most recently written mark (such as Figure 6 The last marker in ) is used as the transaction completion status of the current transaction.

[0067] like Figure 5 As shown, the transaction processing method based on page mapping and rotation also includes: in response to the commit instruction of the current transaction process, writing a completion mark in the mark page; and deleting the data in the current backup page; writing a control mark in the mark page to record that the next transaction process is in an unfinished state. Among them, deleting the data in the current backup page can be deleting the backup page in the backup management table. When writing the control mark in the mark page, the control mark can be written in the next position in the mark page.

[0068] During the data update process, the user can initiate an abort command for the transaction, and then enter the transaction abort process. When the transaction is aborted, the data in the updated page needs to be erased and the data in the backup area is used. Figure 7 FIG. 1 is a schematic diagram of a transaction abort process provided according to an embodiment of the present invention. Figure 7As shown, optionally, the transaction processing method based on page mapping and rotation also includes: in response to the abort instruction of the current transaction process, determining whether the current backup page is valid; when the current backup page is valid, erasing the valid page with the same page number as the current backup page in the current transaction process; and maintaining the erased data in the valid page in the backup page, and continuing to maintain the data in the valid page for the retained valid page. When a transaction is aborted, the backup pages in the backup area can be traversed and each backup page can be processed. If there is data in the backup page and it is not in an erased state, the backup page can be considered valid. When performing data maintenance, the erased data can be maintained in the backup page management table through hardware, and the retained valid pages can be maintained in the valid page management table through hardware.

[0069] During the transaction execution process, there may be a power outage and then recovery, at which time the data recovery process begins. Figure 8 FIG. 1 is a schematic diagram of a data recovery process after power failure provided according to an embodiment of the present invention. Figure 8 As shown, the transaction processing method based on page mapping and rotation also includes: when the chip is powered on again for data recovery after power failure, determining whether the current transaction process is completed in the mark page; when the current transaction process is completed, erasing the valid page with the same page number as the current backup page in the current transaction process; and maintaining the erased data in the valid page in the backup page, and continuing to maintain the data in the valid page for the retained valid page; when the current transaction process is not completed, erasing the data in the backup page.

[0070] Specifically, when power is turned on, it can be determined whether the current transaction process is completed according to the last mark in the mark page. If the last mark is a control mark, the current transaction process is not completed, and the data in the backup page can be directly erased.

[0071] If the last mark is a completion mark, when the current transaction process is completed, the backup pages in the backup area are traversed, and the valid pages in the current transaction process with the same page number as the current backup page are erased. At this time, the completion mark can be written at the next position of the mark page to indicate that the current transaction process is completed. The erased data in the valid page is maintained in the backup page, and the data of the retained valid page continues to be maintained in the valid page. Specifically, the erased data can be maintained in the backup page management table through hardware, and the retained valid page can be maintained in the valid page management table through hardware.

[0072] When erasing a valid page with the same page number as the current backup page, the data can be judged according to the version number, and the old data can be deleted and the new data can be retained. Specifically, the logical address can correspond to two physical addresses, one in the valid page management table and the other in the backup page management table. By comparing the data version numbers, the old data with a lower version number can be deleted.

[0073] In the power-off transaction recovery process, taking a page of data as an example, only one erase operation is performed, which reduces the number of data erases and writes compared to the prior art and can improve transaction execution efficiency.

[0074] A specific application process of the embodiment of the present invention may be: select a mark page to mark the transaction process status. Define two backup areas, one is an atomic backup area and the other is a non-atomic backup area. Given a mapping range, specify a backup area, and establish a hardware-based backup area. Figure 2 The page mapping management table shown in the figure turns on the mapping function. At the beginning of a transaction, the RAM flag is set and automatically cleared after power failure. At the beginning of a transaction, multiple atomic writes or non-atomic writes can be started. The atomic write process is as follows Figure 3 As shown, the non-atomic write process is as follows Figure 4 As shown in the figure. When a transaction is executed, the transaction can be committed. The transaction commit process is as follows Figure 5 As shown in the figure. After the transaction is committed, all data is new data and the RAM mark is cleared. During the transaction execution, the transaction can be aborted. The transaction abort process is as follows Figure 7 After the transaction is terminated, except for the data written atomically, all data are rolled back to the data content before the transaction started. In the above process, if the chip loses power, the data will be restored after the next power-on. The data recovery process is as follows Figure 8 Through the above transaction processing flow, the number of erase and write times can be reduced and the transaction execution efficiency can be improved.

[0075] Fig. 9 FIG. 1 is a schematic diagram of a transaction processing device based on page mapping and rotation according to an embodiment of the present invention. Fig. 9 As shown, the device includes: a page mapping management table establishment instruction sending module 910, a target backup page determination module 920 and a page mapping management table information exchange module 930. Among them:

[0076] A page mapping management table establishment instruction sending module 910 is used to determine a page backup area according to a preset page mapping range and send an establishment page mapping management table instruction to the chip;

[0077] The page mapping management table includes a mapping relationship between a physical address and a logical address of a physical page; when accessing a physical page, the physical address is determined according to the mapping relationship through the logical address;

[0078] A target backup page determination module 920 is used to query the page mapping management table in response to a target page data update instruction to determine a target backup page for backup;

[0079] The page mapping management table information exchange module 930 is used to write the update data to the target backup page according to the data update instruction, and exchange the physical addresses of the target page and the target backup page in the page mapping management table.

[0080] Optionally, the page mapping management table includes: an atomic backup area and a non-atomic backup area, the atomic backup area is used for atomic backup writing and transaction backup; the non-atomic backup area is used for non-atomic backup writing; the non-atomic backup area is fixed to 1 page;

[0081] When the data update instruction is to perform non-atomic write in a transaction, the target backup page is the non-atomic backup area;

[0082] The page mapping management table information exchange module 930 includes:

[0083] The non-atomic write unit is specifically used for: according to the data update instruction, when it is determined that the target page has been backed up in the atomic backup area, writing the new non-atomic data in the update data into the non-atomic backup area; exchanging the physical address of the non-atomic backup area in the page mapping management table with the atomic backup page in the atomic backup area; writing the new atomic data and the new non-atomic data in the update data into the target page; erasing the non-atomic backup area.

[0084] Optionally, the page mapping management table further includes: a marking page; the marking page is used to record whether the transaction process is completed;

[0085] The device further comprises:

[0086] The data recovery module is specifically used for: when the chip is powered on again for data recovery after power failure, determining whether the current transaction process is completed in the mark page; when the current transaction process is completed, erasing the valid page with the same page number as the current backup page in the current transaction process; and maintaining the erased data in the valid page in the backup page, and continuing to maintain the data in the valid page for the retained valid page; when the current transaction process is not completed, erasing the data in the backup page.

[0087] Optionally, the device further includes:

[0088] The transaction abort module is specifically used to: respond to the abort instruction of the current transaction process, determine whether the current backup page is valid; when the current backup page is valid, erase the valid page with the same page number as the current backup page in the current transaction process; and maintain the erased data in the valid page in the backup page, and continue to maintain the data in the valid page for the retained valid page.

[0089] Optionally, the device further includes:

[0090] The transaction commit module is specifically used to: write a completion mark in the mark page in response to the commit instruction of the current transaction process; delete the data in the current backup page; write a control mark in the mark page to record that the next transaction process is in an unfinished state.

[0091] Optionally, the page mapping management table information exchange module 930 includes:

[0092] A version number determination unit, for, when the data update instruction is an atomic write, if the backup data of the target page does not exist in the target backup page, when writing the update data to the target backup page according to the data update instruction, adding 1 to the version number of the target page;

[0093] Optionally, the device further includes:

[0094] The target page data update module is used to write the updated data to the target page according to the data update instruction when the data update instruction is an atomic write, if the backup data of the target page already exists in the target backup page, and keep the data version number unchanged.

[0095] Optional, non-atomic write units, including:

[0096] The version number determination subunit is specifically used to: add 1 to the new version number in the backed-up version number in the atomic backup area and the version number of the target page, as the version number of the non-atomic backup area; add 1 to the new version number in the backed-up version number in the atomic backup area and the version number of the target page, and update it to the version number of the target page;

[0097] When the device executes the data update instruction and writes the update data to the target backup page, it also includes:

[0098] The version number determination module is specifically used for: when the data update instruction is to perform a non-atomic write in a transaction, and when it is determined that the target page is not backed up in the atomic backup area, when the update data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page; when the data update instruction is to perform a non-atomic write in a non-transaction, when the update data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page.

[0099] The transaction processing device based on page mapping and rotation provided in the embodiment of the present invention can execute the transaction processing method based on page mapping and rotation provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0100] Fig.10A schematic diagram of a chip 10 that can be used to implement an embodiment of the present invention is shown. The chip is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The chip can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0101] like Fig.10 As shown, the chip 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the chip 10 can also be stored. The processor 11, ROM 12 and RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0102] A number of components in the chip 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the chip 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0103] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a transaction processing method based on page mapping and rotation.

[0104] In some embodiments, the transaction processing method based on page mapping and rotation can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the chip 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the transaction processing method based on page mapping and rotation described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to execute the transaction processing method based on page mapping and rotation by any other appropriate means (for example, by means of firmware).

[0105] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0106] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0107] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0108] To provide interaction with a user, the systems and techniques described herein may be implemented on a chip having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the chip. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0109] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0110] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0111] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0112] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A transaction processing method based on page mapping and rotation, characterized in that: include: According to the preset page mapping range, determine the page backup area, and send a page mapping management table creation instruction to the chip; The page mapping management table includes a mapping relationship between a physical address and a logical address of a physical page; when accessing a physical page, the mapping relationship is queried according to the logical address to determine the physical address; In response to a data update instruction of a target page, querying the page mapping management table to determine a target backup page for backup; According to the data update instruction, the update data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged.

2. The method according to claim 1, characterized in that The page mapping management table includes: an atomic backup area and a non-atomic backup area, the atomic backup area is used for atomic backup writing and transaction backup; the non-atomic backup area is used for non-atomic backup writing; the non-atomic backup area is fixed to 1 page; When the data update instruction is to perform non-atomic write in a transaction, the target backup page is a non-atomic backup area; According to the data update instruction, the update data is written to the target backup page, and the physical addresses of the target page and the target backup page in the page mapping management table are exchanged, including: According to the data update instruction, when it is determined that the target page has been backed up in the atomic backup area, writing new non-atomic data in the update data into the non-atomic backup area; Exchanging the physical addresses of the non-atomic backup area in the page mapping management table with the atomic backup page in the atomic backup area; Writing new atomic data and new non-atomic data in the update data into the target page; The non-atomic backup area is erased.

3. The method according to claim 1 or 2, characterized in that: The page mapping management table also includes: a marking page; the marking page is used to record whether the transaction process is completed; The transaction processing method based on page mapping and rotation also includes: When the chip is powered on again for data recovery after power failure, determining in the mark page whether the current transaction process is completed; When the current transaction process is completed, the valid page with the same page number as the current backup page in the current transaction process is erased; and the erased data in the valid page is maintained in the backup page, and the data in the retained valid page continues to be maintained in the valid page; When the current transaction process is not completed, erase the data in the backup page.

4. The method according to claim 1 or 2, characterized in that: Also includes: In response to an abort instruction of the current transaction flow, determining whether the current backup page is valid; When the current backup page is valid, the valid page with the same page number as the current backup page in the current transaction process is erased; and the erased data in the valid page is maintained in the backup page, and the data in the retained valid page continues to be maintained in the valid page.

5. The method according to claim 1 or 2, characterized in that: The page mapping management table also includes: a marking page; The transaction processing method based on page mapping and rotation also includes: In response to a commit instruction of the current transaction flow, a completion mark is written in the mark page; and data in the current backup page is deleted; A control mark is written in the mark page to record that the next transaction flow is in an unfinished state.

6. The method according to claim 1, characterized in that Writing the updated data to the target backup page according to the data update instruction includes: When the data update instruction is an atomic write, if the backup data of the target page does not exist in the target backup page, when writing the update data to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page; The transaction processing method based on page mapping and rotation also includes: When the data update instruction is an atomic write, if the backup data of the target page already exists in the target backup page, the update data is written to the target page according to the data update instruction, keeping the data version number unchanged.

7. The method according to claim 2, characterized in that Writing new non-atomic data in the update data into the non-atomic backup area includes: adding 1 to the backed-up version number in the atomic backup area and the new version number in the version number of the target page to obtain the version number of the non-atomic backup area; Writing new atomic data and new non-atomic data in the update data into the target page includes: adding 1 to the backed-up version number in the atomic backup area and the new version number in the version number of the target page, and updating the version number of the target page; When writing the updated data to the target backup page according to the data update instruction, it also includes: When the data update instruction is to perform non-atomic write in a transaction and it is determined that the target page is not backed up in the atomic backup area, when writing the updated data to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page; When the data update instruction is to perform non-atomic write in a non-transaction, when the update data is written to the target backup page according to the data update instruction, the version number is increased by 1 based on the target page.

8. A transaction processing device based on page mapping and rotation, characterized in that: include: A page mapping management table establishment instruction sending module is used to determine the page backup area according to the preset page mapping range and send a page mapping management table establishment instruction to the chip; The page mapping management table includes a mapping relationship between a physical address and a logical address of a physical page; when accessing a physical page, the physical address is determined according to the mapping relationship through the logical address; A target backup page determination module, configured to query the page mapping management table in response to a target page data update instruction, and determine a target backup page for backup; The page mapping management table information exchange module is used to write the update data to the target backup page according to the data update instruction, and exchange the physical addresses of the target page and the target backup page in the page mapping management table.

9. A chip, characterized in that: The chip comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the transaction processing method based on page mapping and rotation according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the transaction processing method based on page mapping and rotation as described in any one of claims 1 to 7 when executed.

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