Circuit simulation method and device, equipment and storage medium

Abstract

The invention provides a circuit simulation method, device and equipment and a storage medium, and particularly relates to the technical field of circuit simulation, and the method comprises the steps that the simulation equipment obtains a sub-circuit layout in a first format according to a target circuit layout; determining a design requirement corresponding to the sub-circuit layout in the first format; generating a sub-circuit layout in a second format according to a design requirement corresponding to the sub-circuit layout in the first format; importing the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first to-be-simulated model; simulating the first to-be-simulated model to obtain a first simulation result; presenting the first simulation result to the user; receiving first feedback information input by the user based on the first simulation result; and generating a simulation report according to the first feedback information. According to the method, the simulation device simulates the first to-be-simulated model, the accuracy of the obtained first simulation result is high, and the simulation efficiency of the target circuit is improved.

Description

Technical Field

[0001] The present application relates to the field of circuit simulation technology, and in particular to a circuit simulation method, device, equipment and storage medium. Background Art

[0002] With the continuous improvement of 5G technology and the continuous development of automotive electronics, RF system circuits are gradually moving towards miniaturization and high integration. Traditional design methods based on simulation and debugging are increasingly incompatible with future design needs. The design of future RF system circuits will increasingly rely on the accuracy, speed, and flexibility of simulation design tools to meet the needs of fast iteration and high-precision design. Typical application scenarios include: integration of automotive millimeter-wave radars, modularization of 5G RF front-end chips, etc. These application scenarios have put forward new requirements for the modeling, simulation, and even the entire process of EDA (Electronic Design Automation) tools for RF system circuits.

[0003] Most existing RF system circuit designs require PDK (Process Design Kit) models, package libraries, and device behavior models provided by related third-party tool vendors. The above models construct an RF system circuit, module, or chip at the physical and logical levels through layout and corresponding netlist forms, extract the physical model of the RF system circuit, module, or chip through electromagnetic field simulation, and process the RF system circuit, module, or chip into a netlist form. The RF system circuit, module, or chip in netlist form is simulated by a third-party device model, and then the topology and physical structure of the required RF system circuit are debugged and iterated.

[0004] Existing EM (Electromagnetic) simulation engines use finite element method, moment method and time-domain finite difference method to simulate RF system circuits. Existing EM simulation engines have various S parameter cascades, spice (Simulation Program with Integrated Circuit Emphasis) netlist time domain simulation, frequency domain simulation and noise simulation functions. The design of RF system circuits is a systematic process, from model creation to layout drawing, to the call of various electromagnetic field and circuit simulation engines, to the result processing and layout file processing after the simulation, all require the support of various simulation tool function modules. In the simulation process of RF system circuits, each link of the above process is very important. However, the existing simulation tool function modules are relatively scattered, and most of them are not on a unified EM simulation platform (EM simulation engine). And each existing EM simulation platform only supports one simulation method.

[0005] Among them, the first method is to simulate the layout of the RF system circuit; the second method is to simulate the schematic diagram of the RF system circuit. These two methods can only obtain a single simulation result. Compared with the schematic diagram of the RF system circuit, the layout of the RF system circuit has more comprehensive circuit information. The first method can obtain more accurate simulation results, but compared with the second method, the first method will occupy a large amount of simulation device memory and the simulation speed is slower; and because the schematic diagram of the RF system circuit mostly lacks some circuit information in the layout of the RF system circuit, the simulation results obtained by the second method are less accurate than those of the first method.

[0006] Therefore, since most schematic diagrams of RF system circuits lack circuit information that is present in the layout of some RF system circuits, the simulation results of simulating the schematic diagrams of RF system circuits have poor accuracy, which is a problem that needs to be solved urgently. Summary of the invention

[0007] In view of this, the purpose of this application is to provide a circuit simulation method, device, equipment and storage medium to solve the above-mentioned problems, realize the joint simulation of the schematic diagram and layout of the RF system circuit, and improve the accuracy of the simulation results.

[0008] In a first aspect, an embodiment of the present application provides a circuit simulation method, which is applied to a simulation device, and the method includes: The simulation device draws a target circuit schematic and a target circuit layout according to the design requirements of the target circuit; The simulation device obtains a sub-circuit layout in a first format according to the target circuit layout; The simulation device determines the design requirements corresponding to the sub-circuit layout in the first format; The simulation device generates a sub-circuit layout in a second format according to the design requirements corresponding to the sub-circuit layout in the first format; The simulation device imports the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated; The simulation device simulates the first to-be-simulated model to obtain a first simulation result; The simulation device presents the first simulation result to the user; The simulation device receives first feedback information input by the user based on the first simulation result; The simulation device generates a simulation report according to the first feedback information.

[0009] Preferably, the method further comprises: The simulation device obtains a sub-circuit schematic diagram in a second format according to the target circuit schematic diagram; The simulation device determines the design requirements corresponding to the sub-circuit schematic diagram in the second format; The simulation device generates a sub-circuit schematic diagram in the first format according to the design requirements corresponding to the sub-circuit schematic diagram in the second format; The simulation device imports the sub-circuit schematic diagram in the first format into the target circuit layout to obtain a second model to be simulated; The simulation device simulates the second to-be-simulated model to obtain a second simulation result; The simulation device presents the second simulation result to the user; The simulation device receives second feedback information input by the user based on the second simulation result; The simulation device generates a simulation report according to the first feedback information and the second feedback information.

[0010] Preferably, the step of generating a simulation report by the simulation device according to the first feedback information and the second feedback information includes: If the first feedback information indicates that the design requirement of the target circuit is met and the second feedback information indicates that the design requirement of the target circuit is met, a simulation success report is generated.

[0011] Preferably, the method further comprises: If the first feedback information representation does not meet the design requirements of the target circuit and / or the second feedback information representation does not meet the design requirements of the target circuit, a simulation failure report is generated.

[0012] Preferably, the method further comprises: The simulation device draws an internal schematic diagram of the target RF chip according to the design requirements of the target RF chip; wherein the internal schematic diagram of the target RF chip is used to characterize the connection relationship between each transistor in the target RF chip; The simulation device imports the internal schematic diagram of the target radio frequency chip into the target circuit schematic diagram to obtain a third model to be simulated; The simulation device simulates the third model to be simulated to obtain a third simulation result; The simulation device presents the third simulation result to the user; The simulation device receives third feedback information input by the user based on the third simulation result; The simulation device generates a third simulation report according to the third feedback information.

[0013] Preferably, the method further comprises: The simulation device obtains the target circuit schematic and the target circuit layout from a preset library.

[0014] The application provides the following beneficial effects: The present application provides a circuit simulation method, in which a simulation device obtains a subcircuit layout in a first format according to a target circuit layout, determines the design requirements corresponding to the subcircuit layout in the first format, generates a subcircuit layout in a second format according to the design requirements corresponding to the subcircuit layout in the first format, imports the subcircuit layout in the second format into the target circuit schematic, obtains a first model to be simulated, simulates the first model to be simulated, and obtains a first simulation result. In this method, the simulation device simulates the first model to be simulated, and the obtained first simulation result has a high accuracy, which makes up for the error caused by the information of the design requirements of the target circuit that is not available in the target circuit schematic, and improves the simulation efficiency of the target circuit.

[0015] In a second aspect, the present application further provides a circuit simulation device, the device comprising: A drawing module, used for drawing a target circuit schematic and a target circuit layout according to the design requirements of the target circuit; A simulation module, used for obtaining a sub-circuit layout in a first format according to the target circuit layout; The simulation module is further used to determine the design requirements corresponding to the sub-circuit layout in the first format; generate the sub-circuit layout in the second format according to the design requirements corresponding to the sub-circuit layout in the first format; import the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated; simulate the first model to be simulated to obtain a first simulation result; and present the first simulation result to a user; A receiving module, configured to receive first feedback information input by the user based on the first simulation result; A processing module is used to generate a simulation report according to the first feedback information.

[0016] The circuit simulation device provided in the embodiment of the present application has the same technical features as the circuit simulation method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects.

[0017] In a third aspect, the present application provides a computing device, including a memory and a processor; One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as described in any one of the first aspects.

[0018] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method as described in any one of the first aspects.

[0019] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by practicing the present application. The purpose and other advantages of the present application are realized and obtained by the structures particularly pointed out in the description and the drawings.

[0020] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 A schematic diagram of a circuit simulation method flow chart provided in an embodiment of the present application; Figure 2 A sub-circuit layout provided in an embodiment of the present application; Figure 3 A schematic diagram of a first matching model provided in an embodiment of the present application; Figure 4 A schematic diagram of a first model to be simulated provided in an embodiment of the present application; Figure 5 A schematic diagram of a second model to be simulated provided in an embodiment of the present application; Figure 6 A schematic diagram of the structure of a circuit simulation device provided in an embodiment of the present application; Figure 7 A schematic diagram of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution of the present application will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0024] To facilitate understanding of this embodiment, the embodiments of the present application are described in detail below.

[0025] The present application embodiment provides a circuit simulation method, which is applied to a simulation device, such as Figure 1 As shown, Figure 1 A schematic diagram of a circuit simulation method provided in an embodiment of the present application. The method comprises the following steps: S101, the simulation device draws a target circuit schematic and a target circuit layout according to the design requirements of the target circuit.

[0026] Specifically, the above-mentioned simulation equipment draws the target circuit schematic and target circuit layout according to the design requirements of the target circuit through the XSPIE simulation software. The staff configures the parameters of the XSPIE simulation software according to the design requirements of the target circuit; wherein the design requirements of the target circuit include: the connection relationship between each component, the properties of each component, the signal flow direction and signal type between each component, the size of each component, the electromagnetic characteristics of each component, the wire size of the target circuit board, the wiring rules of the wire of the target circuit board, the through-hole specifications of the target circuit board, and the size of the target circuit board.

[0027] S102, the simulation device obtains a sub-circuit layout in a first format according to the target circuit layout.

[0028] Specifically, the target circuit layout contains various information in the design requirements of the target circuit. The subcircuit layout is a part of the target circuit layout that needs to be focused on for simulation testing. The information contained in the subcircuit layout, such as Figure 2 As shown, Figure 2 In a subcircuit layout provided in an embodiment of the present application, the information of parasitic resistance and parasitic capacitance of the wires (interconnects) connecting the components in the target circuit layout, or the interference information between the high-speed signal lines on the circuit board of the target circuit, is not available in the target circuit schematic. Among them, the first format is the display format of the target circuit layout specified by the XSPIE simulation software. It should be noted that, if Figure 2 As shown, the sub-circuit layout in the first format obtained by the above-mentioned simulation device needs to be divided into an outer expansion area 200 to improve the accuracy of the subsequent simulation process and avoid the loss of main data during the simulation process.

[0029] S103, the simulation device determines the design requirements corresponding to the sub-circuit layout in the first format.

[0030] Specifically, the design requirements of the target circuit are pre-stored in the XSPIE simulation software, and the staff only needs to select the design requirements corresponding to the sub-circuit layout in the visual interface of the XSPIE simulation software.

[0031] Such an arrangement improves the work efficiency of the staff, reduces the time for selecting the design requirements corresponding to the sub-circuit layout, and improves the flexibility of selecting the design requirements corresponding to the sub-circuit layout.

[0032] S104: The simulation device generates a sub-circuit layout in a second format according to the design requirements corresponding to the sub-circuit layout in the first format.

[0033] Specifically, the simulation device determines the pin numbers of each component in the sub-circuit layout and the connection relationship between each component pin number according to the design requirements corresponding to the sub-circuit layout in the first format, and matches each component pin corresponding to each component pin number according to the connection relationship between each component pin number to obtain a first matching model. Figure 3 As shown, Figure 3 The first matching model schematic diagram provided in the embodiment of the present application, the first inductor 301, the first through hole 302, and the first capacitor 303 are matched with each other to obtain the first matching model. The first matching model is simulated to obtain the sub-circuit layout in the second format. The second format is the display format of the target circuit schematic diagram specified by the XSPIE simulation software.

[0034] Such an arrangement can adapt the display format of the above sub-circuit layout to the target circuit schematic diagram, so that the sub-circuit layout can be subsequently imported into the target circuit schematic diagram.

[0035] S105, the simulation device imports the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated.

[0036] Specifically, the first to-be-simulated model is a combination of a sub-circuit layout in the second format and a target circuit schematic diagram, such as Figure 4 As shown, Figure 4 The first to-be-simulated model schematic diagram provided in the embodiment of the present application, wherein the first inductor 301 is connected to the first capacitor 303 through the first through hole 302 to form the first to-be-simulated model. The sub-circuit layout includes information of the design requirements of the target circuit that is not available in the target circuit schematic diagram, and the sub-circuit layout is imported into the target circuit schematic diagram to compensate for the defects caused by the information of the design requirements of the target circuit that is not available in the target circuit schematic diagram when the first to-be-simulated model is subsequently simulated.

[0037] S106: The simulation device simulates the first model to be simulated to obtain a first simulation result.

[0038] Specifically, the first to-be-simulated model contains all the information of the design requirements of the target circuit, and the information is relatively comprehensive. The accuracy of the first simulation result obtained according to the first simulation model is higher than that of the simulation result obtained from the single schematic diagram of the target circuit.

[0039] S107: The simulation device presents a first simulation result to the user.

[0040] Specifically, the XSPIE simulation software in the above-mentioned simulation device has a visual display interface, which can present the first simulation result to the user; wherein the presentation method is simulation parameters. The user can compare the simulation parameters with the design requirements of the target circuit to determine whether the target circuit corresponding to the first to-be-simulated model meets the design requirements of the target circuit, so as to obtain the first feedback information according to the judgment result.

[0041] S108: The simulation device receives first feedback information input by the user based on the first simulation result.

[0042] Specifically, the first feedback information represents the degree of matching between the first simulation result and the design requirements of the target circuit. If the first simulation result contains a circuit portion that does not meet the design requirements of the target circuit, the user will mark the circuit portion that does not meet the design requirements of the target circuit so as to modify the target circuit layout and the target circuit schematic diagram later; if the first simulation result meets the design requirements of the target circuit, the user will write the information that meets the design requirements of the target circuit into the first feedback information.

[0043] S109: The simulation device generates a simulation report according to the first feedback information.

[0044] Specifically, after receiving the first feedback information fed back by the user, the simulation device displays the first feedback information on a visual interface.

[0045] The embodiment of the present application provides a circuit simulation method, in which a simulation device obtains a sub-circuit layout in a first format according to a target circuit layout, determines the design requirements corresponding to the sub-circuit layout in the first format, generates a sub-circuit layout in a second format according to the design requirements corresponding to the sub-circuit layout in the first format, imports the sub-circuit layout in the second format into the target circuit schematic diagram, obtains a first model to be simulated, and simulates the first model to be simulated to obtain a first simulation result. The above-mentioned target circuit layout contains various information in the design requirements of the target circuit, and has some information not included in the target circuit schematic diagram. Therefore, a part of the layout that needs to be focused on simulation testing in the above-mentioned target circuit layout is imported into the target circuit schematic diagram, and together with the target circuit schematic diagram, it constitutes the first model to be simulated. Compared with the prior art, in which the target circuit schematic diagram is simulated alone, the simulation device in this method simulates the first model to be simulated, and the first simulation result obtained has a higher accuracy, which makes up for the error caused by the information of the design requirements of the target circuit that is not available in the target circuit schematic diagram, and improves the simulation efficiency of the target circuit. The first simulation result obtained by this method has high accuracy, and can enable the user to more accurately judge whether the target circuit layout meets the design requirements of the target circuit based on the first simulation result, so as to subsequently modify the target circuit layout and the target circuit schematic, thereby ensuring that the target circuit realizes normal function and reducing the number of design iterations of the target circuit.

[0046] In one embodiment, a simulation device obtains a sub-circuit schematic in a second format based on a target circuit schematic; determines a design requirement corresponding to the sub-circuit schematic in the second format; generates a sub-circuit schematic in a first format based on the design requirement corresponding to the sub-circuit schematic in the second format; imports the sub-circuit schematic in the first format into a target circuit layout to obtain a second model to be simulated; simulates the second model to be simulated to obtain a second simulation result; presents the second simulation result to a user; receives second feedback information input by the user based on the second simulation result; and generates a simulation report based on the second feedback information and the second feedback information.

[0047] Specifically, Figure 5 As shown, Figure 5A schematic diagram of a second model to be simulated provided in an embodiment of the present application, wherein a second inductor 501 is connected to a second capacitor 503 via a second through hole 502 to form a second model to be simulated. If the information possessed by the sub-circuit schematic diagram is the same as the information possessed by the above-mentioned sub-circuit layout, then the sub-circuit schematic diagram is a part of the target circuit schematic diagram that needs to be simplified for simulation testing. The simulation device determines the pin numbers of each component in the sub-circuit schematic diagram and the connection relationship between the pin numbers of each component according to the design requirements corresponding to the sub-circuit schematic diagram in the second format, matches the pin numbers of each component corresponding to the pin numbers of each component according to the connection relationship between the pin numbers of each component, obtains a second matching model, simulates the second matching model, and obtains the sub-circuit schematic diagram in the first format. The above-mentioned second model to be simulated is a combination of the sub-circuit schematic diagram in the first format and the target circuit layout.

[0048] In this method, since the sub-circuit schematic diagram is a part of the target circuit schematic diagram that needs to be simplified for simulation testing, the second model to be simulated obtained by importing the sub-circuit schematic diagram into the target circuit layout is relatively simple. The simulation device can quickly obtain the second simulation result while ensuring accuracy by simulating the second simulation model, greatly improving the simulation efficiency, avoiding the situation where the memory of the simulation device is occupied in large quantities during the simulation process, and improving the simulation speed.

[0049] The following is an introduction to the way in which the simulation device generates a simulation report based on the first feedback information and the second feedback information. If the first feedback information indicates that the design requirements of the target circuit are met and the second feedback information indicates that the design requirements of the target circuit are met, a simulation success report is generated; if the first feedback information indicates that the design requirements of the target circuit are not met and / or the second feedback information indicates that the design requirements of the target circuit are not met, a simulation failure report is generated.

[0050] Specifically, the first feedback information is obtained by comparing the first simulation result with the design requirements of the target circuit by the user, and the second feedback information is obtained by comparing the second simulation result with the design requirements of the target circuit by the user. If both simulation results meet the design requirements of the target circuit, it means that the design of the target circuit schematic and the target circuit layout meet the design requirements of the target circuit; if one of the two simulation results does not meet the design requirements of the target circuit, it means that the design of the target circuit schematic and the target circuit layout does not meet the design requirements of the target circuit.

[0051] In this method, the simulation success report can clearly show that the design of the target circuit schematic and the target circuit layout meets the design requirements of the target circuit; the simulation failure report can clearly show that the design of the target circuit schematic and the target circuit layout does not meet the design requirements of the target circuit. The simulation device can accurately determine whether to modify the target circuit schematic and the target circuit layout based on the two simulation reports, thereby ensuring that the target circuit produced in the future meets the design requirements of the target circuit and can be used normally.

[0052] In one embodiment, a simulation device draws an internal schematic diagram of a target RF chip according to design requirements of the target RF chip; wherein the internal schematic diagram of the target RF chip is used to characterize the connection relationship between each transistor in the target RF chip; the internal schematic diagram of the target RF chip is imported into the target circuit schematic diagram to obtain a third model to be simulated; the third model to be simulated is simulated to obtain a third simulation result; the third simulation result is presented to a user; third feedback information input by the user based on the third simulation result is received; and a third simulation report is generated according to the third feedback information.

[0053] Specifically, the simulation device can jointly simulate the logic circuit in a single component with the target circuit schematic diagram through Hspice software. The target RF chip internal schematic diagram includes the connection relationship between each transistor in the target RF chip. The target RF chip internal schematic diagram is imported into the target circuit schematic diagram to form a third model to be simulated together with the target circuit schematic diagram.

[0054] In this method, the simulation device simulates the third model to be simulated, and the obtained third simulation result has high accuracy and can accurately simulate the performance of the transistor under different working conditions, including key parameters such as current, voltage, and power consumption, providing accurate data support for the design of the target circuit.

[0055] In one implementation, the simulation device obtains the target circuit schematic and the target circuit layout from a preset library.

[0056] Specifically, the simulation device is provided with a preset library, which stores a large number of component models of the target circuit schematic and target circuit layout. Before the simulation process starts, the pre-stored component models can be called from the preset library according to the design requirements of the target circuit and imported into the simulation device to generate the target circuit schematic and target circuit layout.

[0057] This method improves the flexibility of the generation method of the target circuit schematic and the target circuit layout, and the setting of the preset library improves the selection diversity of components constituting the target circuit schematic and the target circuit layout.

[0058] Based on the above method embodiment, the present application embodiment also provides a circuit simulation device, such as Figure 6 As shown, Figure 6 A schematic diagram of the structure of a circuit simulation device provided in an embodiment of the present application. The device includes: a drawing module 61, a simulation module 62, a receiving module 63 and a processing module 64. The functions of each module are as follows: A drawing module 61 is used to draw a target circuit schematic and a target circuit layout according to the design requirements of the target circuit; A simulation module 62, configured to obtain a sub-circuit layout in a first format according to a target circuit layout; The simulation module 62 is further used to determine the design requirements corresponding to the sub-circuit layout in the first format; generate the sub-circuit layout in the second format according to the design requirements corresponding to the sub-circuit layout in the first format; import the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated; simulate the first model to be simulated to obtain a first simulation result; and present the first simulation result to the user; A receiving module 63, configured to receive first feedback information input by a user based on a first simulation result; The processing module 64 is used to generate a simulation report according to the first feedback information.

[0059] Preferably, the simulation module 62 is further used to obtain a subcircuit schematic diagram in a second format according to the target circuit schematic diagram; determine the design requirements corresponding to the subcircuit schematic diagram in the second format; generate a subcircuit schematic diagram in the first format according to the design requirements corresponding to the subcircuit schematic diagram in the second format; import the subcircuit schematic diagram in the first format into the target circuit layout to obtain a second model to be simulated; simulate the second model to be simulated to obtain a second simulation result; and present the second simulation result to the user; The receiving module 63 is further used to receive second feedback information input by the user based on the second simulation result; The processing module 64 is further configured to generate a simulation report according to the first feedback information and the second feedback information.

[0060] Preferably, the processing module 64 is specifically configured to generate a simulation success report if the first feedback information representation meets the design requirements of the target circuit and the second feedback information representation meets the design requirements of the target circuit.

[0061] Preferably, the processing module 64 is further configured to generate a simulation failure report if the first feedback information representation does not meet the design requirements of the target circuit and / or the second feedback information representation does not meet the design requirements of the target circuit.

[0062] Preferably, the drawing module 61 is further used to draw an internal schematic diagram of the target RF chip according to the design requirements of the target RF chip; wherein the internal schematic diagram of the target RF chip is used to characterize the connection relationship between each transistor in the target RF chip; The simulation module 62 is further used to import the internal schematic diagram of the target RF chip into the target circuit schematic diagram to obtain a third model to be simulated; simulate the third model to be simulated to obtain a third simulation result; and present the third simulation result to the user; The receiving module 63 is further configured to receive third feedback information input by the user based on the third simulation result; The processing module 64 is further configured to generate a third simulation report according to the third feedback information.

[0063] Preferably, the receiving module 63 is further used to obtain the target circuit schematic and the target circuit layout from a preset library.

[0064] The circuit simulation device provided in the embodiment of the present application has the same technical features as the circuit simulation method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects.

[0065] The present application also provides a computing device. Figure 7 As shown, this figure is a schematic diagram of a computing device provided in an embodiment of the present application, and the computing device 400 includes a bus 401, a processor 402, a communication interface 403 and a memory 404. The processor 402, the memory 404 and the communication interface 403 communicate with each other through the bus 401.

[0066] The bus 401 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 7 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0067] The processor 402 may be any one or more of a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).

[0068] The communication interface 403 is used for external communication. For example, when the computing device is a first switch, the communication interface 403 can be used for the first switch to communicate with the first user terminal, or for the first switch to communicate with the second switch.

[0069] The memory 404 may include a volatile memory, such as a random access memory (RAM). The memory 404 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid state drive (SSD).

[0070] The memory 404 stores executable codes, and the processor 402 executes the executable codes to perform the aforementioned circuit simulation method.

[0071] The embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to execute the above-mentioned circuit simulation method.

[0072] The embodiment of the present application further provides a computer program product, which includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the process or function described in the embodiment of the present application is generated in whole or in part.

[0073] The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer or data center to another website, computer or data center via wired (e.g., coaxial cable, optical fiber) or wireless (e.g., infrared, wireless, microwave, etc.) means.

[0074] When the computer program product is executed by a computer, the computer executes any of the aforementioned circuit simulation methods. The computer program product may be a software installation package, and when any of the aforementioned circuit simulation methods is required, the computer program product may be downloaded and executed on a computer.

[0075] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0076] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application.

Claims

1. A circuit simulation method, characterized in that: Applied to a simulation device, the method comprises: The simulation device draws a target circuit schematic and a target circuit layout according to the design requirements of the target circuit; The simulation device obtains a sub-circuit layout in a first format according to the target circuit layout; The simulation device determines the design requirements corresponding to the sub-circuit layout in the first format; The simulation device generates a sub-circuit layout in a second format according to the design requirements corresponding to the sub-circuit layout in the first format; The simulation device imports the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated; The simulation device simulates the first to-be-simulated model to obtain a first simulation result; The simulation device presents the first simulation result to the user; The simulation device receives first feedback information input by the user based on the first simulation result; The simulation device generates a simulation report according to the first feedback information.

2. The circuit simulation method according to claim 1, characterized in that: The method further comprises: The simulation device obtains a sub-circuit schematic diagram in a second format according to the target circuit schematic diagram; The simulation device determines the design requirements corresponding to the sub-circuit schematic diagram in the second format; The simulation device generates a sub-circuit schematic diagram in the first format according to the design requirements corresponding to the sub-circuit schematic diagram in the second format; The simulation device imports the sub-circuit schematic diagram in the first format into the target circuit layout to obtain a second model to be simulated; The simulation device simulates the second to-be-simulated model to obtain a second simulation result; The simulation device presents the second simulation result to the user; The simulation device receives second feedback information input by the user based on the second simulation result; The simulation device generates a simulation report according to the first feedback information and the second feedback information.

3. The circuit simulation method according to claim 2, characterized in that: The step of generating a simulation report according to the first feedback information and the second feedback information by the simulation device includes: If the first feedback information indicates that the design requirement of the target circuit is met and the second feedback information indicates that the design requirement of the target circuit is met, a simulation success report is generated.

4. The circuit simulation method according to claim 3, characterized in that: The method further comprises: If the first feedback information representation does not meet the design requirements of the target circuit and / or the second feedback information representation does not meet the design requirements of the target circuit, a simulation failure report is generated.

5. The circuit simulation method according to claim 1, characterized in that: The method further comprises: The simulation device draws an internal schematic diagram of the target RF chip according to the design requirements of the target RF chip; wherein the internal schematic diagram of the target RF chip is used to characterize the connection relationship between each transistor in the target RF chip; The simulation device imports the internal schematic diagram of the target radio frequency chip into the target circuit schematic diagram to obtain a third model to be simulated; The simulation device simulates the third model to be simulated to obtain a third simulation result; The simulation device presents the third simulation result to the user; The simulation device receives third feedback information input by the user based on the third simulation result; The simulation device generates a third simulation report according to the third feedback information.

6. The circuit simulation method according to claim 1, characterized in that: The method further comprises: The simulation device obtains the target circuit schematic and the target circuit layout from a preset library.

7. A circuit simulation device, characterized in that: The device comprises: A drawing module, used for drawing a target circuit schematic and a target circuit layout according to the design requirements of the target circuit; A simulation module, used for obtaining a sub-circuit layout in a first format according to the target circuit layout; The simulation module is further used to determine the design requirements corresponding to the sub-circuit layout in the first format; generate the sub-circuit layout in the second format according to the design requirements corresponding to the sub-circuit layout in the first format; import the sub-circuit layout in the second format into the target circuit schematic diagram to obtain a first model to be simulated; simulate the first model to be simulated to obtain a first simulation result; and present the first simulation result to a user; A receiving module, configured to receive first feedback information input by the user based on the first simulation result; A processing module is used to generate a simulation report according to the first feedback information.

8. A computing device, characterized in that including memory and processor; One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as claimed in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The computer program product comprises one or more computer instructions. When the computer instructions are executed by a computer, the computer performs the method according to any one of claims 1 to 6.

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