Design method for USB circuit EMC (Electro Magnetic Compatibility)

Abstract

The invention discloses a design method for EMC (Electro Magnetic Compatibility) of a USB (Universal Serial Bus) circuit. A positive polarity port and a negative polarity port of the USB interface are connected to the IC chip through a USB differential signal transmission data line; the number of the USB differential signal transmission data lines is two, the two USB differential signal transmission data lines correspond to a positive polarity port and a negative polarity port of the USB interface respectively, the ends, close to the IC chip, of the two USB differential signal transmission data lines are each provided with a current-limiting resistor, and the two USB differential signal transmission data lines penetrate through a common-mode filter inductor L1A at the same time; the USB interface has the beneficial effects that the anti-interference capability of the USB interface is improved, and the reliability of the USB interface is enhanced.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitive touch IC chip circuits, and in particular to a design method for USB circuit EMC. Background Art

[0002] Due to the high speed of the USB interface, it is easy for the high-frequency radiation to exceed the standard through the USB connection cable. At the same time, due to hot plugging under power, it is easy to be affected by instantaneous voltage shock and electrostatic interference. Therefore, when designing the product interface, we need to focus on electromagnetic compatibility design from multiple aspects such as interface filtering design, protection design, PCB design, and structural cable.

[0003] The electromagnetic compatibility solution in this article mainly combines the characteristics of USB2.0 interface circuit, starting from the interface circuit of the product schematic diagram, and provides a specific EMC design (electromagnetic compatibility design) solution that meets the actual design requirements of the product, so that the product can meet the electromagnetic compatibility standards and specifications, obtain good EMC quality, and improve product reliability. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art; to this end, the present invention proposes a design method for USB circuit EMC, which is used to solve the technical problem that the prior art only considers the clock problem without introducing other factors.

[0005] To achieve the above object, the present invention provides a design method for USB circuit EMC, the design of EMC includes: a USB interface;

[0006] The positive polarity port and the negative polarity port of the USB interface are connected to the IC chip via a USB differential signal transmission data line;

[0007] There are two USB differential signal transmission data lines, which correspond to the positive polarity port and the negative polarity port of the USB interface respectively. A current limiting resistor is set at one end of the two USB differential signal transmission data lines close to the IC chip, and a common mode filter inductor L1A passes through the two USB differential signal transmission data lines at the same time.

[0008] Furthermore: the two USB differential signal transmission data lines are also connected to capacitor C1 and capacitor C2 respectively, and capacitor C1, capacitor C2 and a grounding wire GND of the USB port are simultaneously connected to the ground in parallel;

[0009] Its function is to achieve low-pass filtering of the signal.

[0010] Furthermore: the two USB differential signal transmission data lines are also connected to TVS diodes D1 and D2 respectively, and the TVS diodes D1 and D2 are connected in parallel while a TVS diode D3 is also connected in parallel, and the other end of the TVS diode D3 is connected to the 5V port of the USB interface, thereby forming a USB interface protection circuit;

[0011] Its function is to prevent instantaneous high voltage from breaking down subsequent components.

[0012] Further: the 5V port of the USB interface is connected to the power supply via a filter bead L2, and a power supply filter circuit is also connected between the filter bead L2 and the power supply;

[0013] The power supply filter circuit is composed of a capacitor C3 and a capacitor C4 connected in parallel and then grounded.

[0014] Furthermore: the capacitor C1 and the capacitor C2 are both small capacitors ranging from 0.1 pF to 10 pF.

[0015] Furthermore: D1, D2, and D3 are all TVS diodes, and the reverse shutdown voltage of the TVS diode is 5V;

[0016] Among them, D1, D2, and D3 form a USB interface protection circuit, which can quickly discharge electrostatic interference and prevent the internal circuit from being interfered by static electricity.

[0017] Further: the capacitor C3 and the capacitor C4 are respectively a large capacitor and a small capacitor, and when the capacitor C3 and the capacitor C4 are selected, the values ​​of the two capacitors need to differ by 100 times, specifically including: 1000pF: 0.1uF, 2000pF: 0.2uF, 3000pF: 0.3nF;

[0018] Its function is to filter out interference on the power supply.

[0019] Further: the common mode inductor impedance selection range of the common mode filter inductor L1A is 60Ω / 100MHz to 120Ω / 100MHz;

[0020] Its function is to filter out common-mode interference on differential signals.

[0021] Further: the impedance range of the filter bead L2 is 100Ω / 100MHz to 1000Ω / 100MHz;

[0022] Its function is to further filter out interference on the power supply.

[0023] Furthermore: the USB interface also includes a protective ground PGND, and there is a voltage-resistant area formed by parallel connection of jumper capacitors C5 and C6 between the protective ground PGND and the digital ground, and the values ​​of the jumper capacitors C5 and C6 are both 1000pF.

[0024] The invention has the beneficial effects of improving the anti-interference capability of the USB interface and enhancing the reliability of the USB interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention and the technical solutions in the prior art, the drawings required for use in the embodiments and the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some implementation methods recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 It is the principle diagram of the present invention;

[0027] Figure 2 It is a schematic diagram of the pressure-resistant area of ​​the present invention. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0029] Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can be applied to other similar scenarios based on these drawings without any creative work.

[0030] In addition, it can be understood that although the efforts made in this development process may be complex and lengthy, for ordinary technicians in the field related to the contents disclosed in this application, some design, manufacturing or production changes based on the technical contents disclosed in this application are just conventional technical means and should not be understood as the contents disclosed in this application are insufficient.

[0031] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0032] See also Figure 1-2, the principle diagram of the present invention and the schematic diagram of the pressure-resistant area of ​​the present invention;

[0033] Figure 1 The schematic diagram includes: a USB interface, the positive and negative poles of the USB interface are respectively connected to two USB differential signal transmission data lines, and the other ends of the two USB differential signal transmission data lines are connected to an IC chip. Since the coupling between the differential lines will affect the external impedance of the signal lines, a current limiting resistor R1 and a current limiting resistor R2 are respectively set at one end of the two USB differential signal transmission data lines close to the IC chip; and in order to filter out common-mode interference on the USB differential signal transmission data lines, a common-mode filter inductor L1A (SMD) is passed through the two USB differential signal transmission data lines at the same time.

[0034] Specifically:

[0035] In order to achieve low-pass filtering of the signal, the two USB differential signal transmission data lines are also connected to capacitors C1 and C2 respectively. Capacitors C1, C2 and the ground wire GND of the USB port are connected to the ground in parallel at the same time, and capacitors C1 and C2 are both small capacitors, with a selection range of 0.1pF-10pF.

[0036] In order to prevent the instantaneous high voltage from breaking down the subsequent components, the two USB differential signal transmission data lines are also connected to TVS diodes D1 and D2 respectively. When TVS diodes D1 and D2 are connected in parallel, a TVS diode D3 is also connected in parallel. The other end of TVS diode D3 is connected to the 5V port of the USB interface, thus forming a USB interface protection circuit; D1, D2, and D3 are all TVS diodes (transient voltage suppression diodes), and the reverse shutdown voltage of the TVS diode is 5V; transient voltage suppression diode (TVS) is an electronic protection device used to quickly discharge electrostatic interference; its main function is to quickly change the high resistance state to the low resistance state when a transient overvoltage occurs in the circuit, thereby absorbing the excess energy of the overvoltage event and clamping the voltage within a safe level to protect sensitive semiconductors and circuits from damage; since the power input port of the USB interface is a 5V port, the voltage detected by the transient voltage suppression diode (TVS) in reverse is whether it exceeds 5V.

[0037] In order to filter the power supply and eliminate power supply interference, the 5V port of the USB interface is connected to the power supply (VCC 5V) through a filter bead L2, and a power supply filter circuit is also connected between the filter bead L2 and the power supply; the power supply filter circuit is composed of capacitors C3 and C4 connected in parallel and then grounded. Capacitors C3 and C4 are large capacitors and small capacitors respectively. When selecting capacitors C3 and C4, in order to ensure that the circuit has suitable capacitance values ​​at low frequencies and high frequencies to provide effective filtering effects, the values ​​of the two capacitors need to differ by 100 times, including: 1000pF: 0.1uF, 2000pF: 0.2uF, 3000pF: 0.3nF. The small capacitor is used to filter out high-frequency interference on the power supply, and the large capacitor is used to filter out high-frequency interference on the power supply. Ripple interference on the power line; in order to filter out high-frequency noise and spike interference and improve the electromagnetic compatibility of the power line, a filter bead L2 is set between the power line and the 5V port of the USB interface, and its impedance value changes with the frequency. The impedance value measured at 100MHz is usually used as a reference. Generally speaking, the larger the impedance value, the better the suppression effect of the bead on high-frequency noise. However, the filter bead L2 in the present invention can be selected from magnetic beads with an impedance range of 100Ω / 100MHz to 1000Ω / 100MHz, which can meet the requirements, and the flow rate of the magnetic beads when selected should meet the requirements of the circuit current, and the magnetic beads use power supply magnetic beads.

[0038] In order to suppress the high-frequency noise of the common-mode current brought by the two USB differential signal transmission data lines, a common-mode filter inductor L1A is passed through the two USB differential signal transmission data lines at the same time; when selecting the impedance of the common-mode filter inductor L1A, it is necessary to consider the specific requirements of the circuit and the frequency range of the noise; generally speaking, the greater the impedance of the common-mode inductor, the better its filtering effect; however, too high impedance may also lead to increased insertion loss and affect signal transmission. In the common-mode filter inductor L1A of the present invention, the common-mode inductor impedance selection range is 60Ω / 100MHz to 120Ω / 100MHz.

[0039] See also Figure 2 The USB interface also includes a protective ground PGND. There is a voltage-resistant area formed by parallel connection of jumper capacitors C5 and C6 between the protective ground PGND and the digital ground GND. The values ​​of the jumper capacitors C5 and C6 are both 1000pF, and the voltage resistance value is at least 2KV.

[0040] In actual layout, the IC chip should be placed on the signal layer closest to the ground layer and as close to the USB socket as possible to shorten the routing distance of the differential line; the layout of components should be arranged according to the signal flow direction; the protection device should be placed as close to the interface as possible to ensure that the lead inductance is minimized to ensure that the protection device can perform protection actions normally; other signal lines cannot be placed under the common-mode filter inductor L1A; when the IC chip needs to be connected in series with the terminal resistor or the D line is connected to the pull-up resistor, these resistors need to be placed as close to the IC chip as possible; the USB differential signal line needs to be laid on the signal layer closest to the ground layer, and the USB The integrity of the lower end ground layer of the differential signal transmission data line. If the lower end ground layer of the differential line is split, it will cause discontinuity in the impedance of the differential line and increase the impact of external noise on the differential line. During the wiring process of the USB differential signal line, avoid placing vias on the USB differential signal transmission data line. Vias will cause differential line impedance mismatch. It is also necessary to ensure the consistency of the line spacing of the USB differential signal transmission data line during the routing process. If the spacing of the USB differential signal transmission data line changes during the routing process, it will cause discontinuity in the impedance of the USB differential signal transmission data line.

[0041] The above is a very detailed description of one or more embodiments of the present invention, but the content is only a specific example of the present invention and cannot be considered to limit the scope of application of the present invention. Any other methods and changes proposed based on the content of the present invention should fall within the scope of patent protection of the present invention.

Claims

1. A design method for USB circuit EMC, characterized in that: include: USB interface; The positive polarity port and the negative polarity port of the USB interface are connected to the IC chip via a USB differential signal transmission data line; There are two USB differential signal transmission data lines, which correspond to the positive polarity port and the negative polarity port of the USB interface respectively. A current limiting resistor is set at one end of the two USB differential signal transmission data lines close to the IC chip, and a common mode filter inductor L1A passes through the two USB differential signal transmission data lines at the same time.

2. A USB circuit EMC design method according to claim 1, characterized in that: The two USB differential signal transmission data lines are also connected to capacitor C1 and capacitor C2 respectively, and capacitor C1, capacitor C2 and a grounding line GND of the USB port are simultaneously connected to the ground in parallel.

3. A USB circuit EMC design method according to claim 1, characterized in that: The two USB differential signal transmission data lines are also connected to TVS diodes D1 and D2 respectively. When the TVS diodes D1 and D2 are connected in parallel, a TVS diode D3 is also connected in parallel. The other end of the TVS diode D3 is connected to the 5V port of the USB interface, thereby forming a USB interface protection circuit.

4. A USB circuit EMC design method according to claim 1, characterized in that: The 5V port of the USB interface is connected to the power supply via a filter bead L2, and a power supply filter circuit is also connected between the filter bead L2 and the power supply; The power supply filter circuit is composed of a capacitor C3 and a capacitor C4 connected in parallel and then grounded.

5. A USB circuit EMC design method according to claim 2, characterized in that: The capacitor C1 and the capacitor C2 are both small capacitors ranging from 0.1 pF to 10 pF.

6. A USB circuit EMC design method according to claim 3, characterized in that: The D1, D2, and D3 are all TVS diodes, and the reverse shutdown voltage of the TVS diode is 5V.

7. A USB circuit EMC design method according to claim 4, characterized in that: The capacitor C3 and the capacitor C4 are respectively a large capacitor and a small capacitor, and when the capacitor C3 and the capacitor C4 are selected, the values ​​of the two capacitors need to differ by 100 times, specifically including: 1000pF: 0.1uF, 2000pF: 0.2uF, 3000pF: 0.3nF.

8. A USB circuit EMC design method according to claim 1, characterized in that: The common mode inductor impedance selection range of the common mode filter inductor L1A is 60Ω / 100MHz to 120Ω / 100MHz.

9. A USB circuit EMC design method according to claim 4, characterized in that: The impedance range of the filter magnetic bead L2 is 100Ω / 100MHz to 1000Ω / 100MHz.

10. A USB circuit EMC design method according to claim 1, characterized in that: The USB interface further includes a protection ground PGND. Between the protection ground PGND and the digital ground, there is a voltage-resistant region formed by parallel connection of jumper capacitors C5 and C6. The values ​​of the jumper capacitors C5 and C6 are both 1000 pF.

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