Lee filtering method, system and device realized based on heterogeneous computing platform

By calculating the sliding window and noise variance on a heterogeneous computing platform, the problem of high computational complexity in high resolution image processing is solved, and more efficient calculations and lower calculations are achieved memory footprint.

CN119444550AInactive Publication Date: 2025-02-14SEA EAGLE DEEP SEA TECH CO LTD +1
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Patent Information

Application Number
CN202510042092.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-10
Publication Date
2025-02-14
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

When processing high-resolution images and large-scale image data, Lee filtering algorithm has high computational complexity and high memory requirements, resulting in low computational efficiency.

Method used

Using a heterogeneous computing platform-based method, the CPU and GPU processor are used to simultaneously calculate the variance and mean of the sliding window, as well as the noise variance of the sonar image, to reduce memory copy through a shared DRAM memory pool, and optimize data transmission and calculation process.

Benefits of technology

It significantly improves the computing speed and efficiency of Lee filtering algorithm, reduces the memory usage ratio of CPU and GPU, and is suitable for low-power and embedded devices, achieving better performance scheduling.

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Abstract

The invention discloses an Lee filtering method, system and device realized based on a heterogeneous computing platform, and relates to the technical field of signal processing, the Lee filtering method comprises the following steps: defining and dividing a memory pool in a shared DRAM (Dynamic Random Access Memory); calculating and applying for a memory pool with a matched size according to the size of the sonar image to be filtered; loading the to-be-filtered image data to a memory pool; image data to be filtered are loaded to a processor core of the CPU processor from the shared DRAM memory by using an SIMD instruction set of the CPU processor; calculating a variance and a mean value in a sliding window on a processor core of the CPU processor by using an SIMD instruction set of the CPU processor; loading the sonar image to be filtered to a GPU processor to calculate the noise variance of the global sonar image; performing Lee filtering operation on the sonar image on the GPU processor according to the variance and the mean value of the sliding window in combination with the noise variance so as to realize data filtering of the sliding window; and splicing the data of each sliding window into filtered sonar image data.
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Description

Technical Field

[0001] The present invention relates to the field of signal processing technology, and in particular to a Lee filtering method, system and device implemented based on a heterogeneous computing platform. Background Art

[0002] The Lee filter algorithm is an adaptive filtering denoising algorithm based on statistical principles. It is widely used in the fields of signal processing and image analysis because it can effectively reduce the noise in sonar images and improve the quality and readability of sonar images, especially in processing noisy signal remote sensing imaging images. However, as an adaptive filtering algorithm, the three main steps of the Lee filter algorithm: calculation of local statistical characteristics of the sliding window, calculation of filter coefficients, and filtering operations all need to be performed on each pixel in the image. Therefore, when processing high-resolution images and large-scale image data, the computational complexity of the Lee filter algorithm will increase significantly as the number of local images sampled by the sliding window increases, resulting in high computational complexity, large computational memory requirements, and low computational efficiency. Summary of the invention

[0003] An object of the present invention is to provide a Lee filtering method, system and device implemented based on a heterogeneous computing platform, wherein the Lee filtering method of the present invention can simultaneously calculate the variance and mean of a sliding window and the noise variance of a sonar image, with faster calculation speed and shorter time.

[0004] One object of the present invention is to provide a Lee filtering method, system and device implemented based on a heterogeneous computing platform, wherein the Lee filtering method of the present invention can utilize the CPU processor and the GPU processor to participate in the calculation at the same time, which can effectively reduce the memory usage ratio of the CPU processor and the GPU processor, further reduce the requirements for device performance, and is more suitable for the application environment of low-power and embedded devices, thereby achieving better performance scheduling of the device.

[0005] An object of the present invention is to provide a Lee filtering method, system and device implemented based on a heterogeneous computing platform, wherein the Lee filtering method can make full use of the computing performance of a CPU processor and simultaneously perform a method for calculating the noise of a global sonar image using a GPU processor, thereby shortening the overall processing time and improving the utilization rate of the CPU processor, thereby greatly improving the filtering efficiency.

[0006] According to one aspect of the present invention, the technical solution provided by the present invention is: a Lee filtering method implemented based on a heterogeneous computing platform, wherein the Lee filtering method comprises the following steps: S1, define a memory pool in the shared DRAM memory and divide the memory pool in the shared DRAM; S2, calculates and applies for a memory pool of matching size according to the size of the sonar image to be filtered; S3, loading the image data to be filtered into the memory pool; S4, using OpenMP to plan the processor cores of the CPU processor, and using the SIMD instruction set of the CPU processor to load the image data to be filtered from the shared DRAM memory to the processor core of the corresponding CPU processor; S5, using the SIMD instruction set of the CPU processor to respectively calculate the variance and the mean in each sliding window on the processor core of the CPU processor; S6, loading the sonar image to be filtered into the GPU processor, and calculating the noise variance of the global sonar image on the GPU processor; S7, performing a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, so as to implement data filtering on the sliding window; S8, splicing the data of each sliding window into filtered sonar image data.

[0007] As a further improvement to the technical solution of the present invention, the step S4 further comprises the steps of: S4.1, read the number of processor cores of the CPU processor, and calculate the amount of data copied in each step of the asynchronous copy according to the number of processor cores; S4.2, according to the amount of data copied in each step and the size of the sliding window, calculate the amount of data in the sliding window of the asynchronous single copy; S4.3, according to the data size of the sliding window, use the SIMD instruction set to load the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core; The step S5 further comprises the steps of: S5.1, using a SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; S5.2, calculating the mean of the sliding window according to the summation result; S5.3, use the SIMD instruction set to load the image data to be filtered from the vectorized register in batches and calculate the variance in combination with the mean.

[0008] As a further improvement to the technical solution of the present invention, the calculation formula in step S7 satisfies: ,in is the global sonar image noise variance, is the variance within the sliding window, and the parameter is the total number of pixels in the sliding window.

[0009] As a further improvement to the technical solution of the present invention, in step S4, thread indexes in the width and height directions are constructed according to the sizes of the sonar image in the width and height directions to mark each sliding window, and step S8 further includes the steps of: S8.1, judging whether the sliding window belongs to an edge position according to the thread index in the width and height directions marked by each sliding window, if the sliding window does not belong to an edge position, locally overlapping the data of adjacent edges of two adjacent sliding windows, taking the average of the overlapped data and loading it into a new shared memory, if the sliding window belongs to an edge position, directly loading the data of the sliding window into the new shared memory; S8.2, according to the thread indexes in the width and height directions marked by each sliding window, the data of the new shared memory is spliced ​​along the width and height directions of the sonar image, and the splicing results are loaded into the memory pool to obtain the filtered sonar image data.

[0010] According to another aspect of the present invention, the present invention further provides a Lee filtering system implemented based on a heterogeneous computing platform, comprising: A memory pool division unit, used for defining a memory pool in a shared DRAM memory and dividing the memory pool in the shared DRAM; A memory pool application unit is used to calculate and apply for a memory pool of matching size according to the size of the sonar image to be filtered; A first data loading unit, used for loading the image data to be filtered into a memory pool; A second data loading unit is used to load the image data to be filtered from the shared DRAM memory to the corresponding processor core of the CPU processor using the SIMD instruction set of the CPU processor after using OpenMP to plan the processor core of the CPU processor; A first computing unit, configured to respectively compute the variance and the mean in each sliding window on a processor core of the CPU processor using a SIMD instruction set of the CPU processor; A second calculation unit is used to calculate, on the GPU processor, a noise variance of a global sonar image of the image data to be filtered that is loaded into the GPU processor; A third calculation unit is used to perform a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, so as to achieve data filtering of the sliding window; The splicing unit is used to splice the data of each sliding window into filtered sonar image data.

[0011] As a further improvement to the technical solution of the present invention, the process of recording data by the second data loading unit is: reading the number of processor cores of the CPU processor, and calculating the amount of data copied in each step of the asynchronous copy according to the number of processor cores; calculating the amount of data of the sliding window of the asynchronous single copy according to the amount of data copied in each step and the size of the sliding window; and loading the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core using the SIMD instruction set according to the amount of data in the sliding window; The process of the first computing unit calculating the variance and mean in the sliding window is: using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; calculating the mean of the sliding window based on the summation result; using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches and calculate the variance in combination with the mean.

[0012] As a further improvement to the technical solution of the present invention, the formula for the third computing unit to perform Lee filtering operation on the sonar image on the GPU processor satisfies: ,in is the global sonar image noise variance, is the variance within the sliding window, and the parameter is the total number of pixels in the sliding window.

[0013] As a further improvement to the technical solution of the present invention, the stitching process of the stitching unit stitching the data of each sliding window into the filtered sonar image data is: According to the thread index in the width and height directions marked by each sliding window, it is determined whether the sliding window belongs to the edge position. If the sliding window does not belong to the edge position, the data of the adjacent edges of two adjacent sliding windows are partially overlapped, and the overlapped data is averaged and loaded into the new shared memory. If the sliding window belongs to the edge position, the data of the sliding window is directly loaded into the new shared memory; According to the thread index in the width and height directions marked by each sliding window, the data in the new shared memory is spliced ​​along the width and height directions of the sonar image, and the splicing result is loaded into the memory pool to obtain the filtered sonar image data.

[0014] According to another aspect of the present invention, the present invention further provides a computing device, comprising a processor and a memory coupled to the processor, wherein the memory is used to store program instructions, and the processor is used to execute the program instructions. When the program instructions are executed, the computing device executes the Lee filtering method, wherein the Lee filtering method comprises the following steps: Define memory pools in shared DRAM memory and divide memory pools in shared DRAM; Calculate and apply for a memory pool of matching size according to the size of the sonar image to be filtered; Load the image data to be filtered into the memory pool; Use OpenMP to plan the processor cores of the CPU processor, and use the SIMD instruction set of the CPU processor to load the image data to be filtered from the shared DRAM memory to the processor core of the corresponding CPU processor; The variance and mean in each sliding window are calculated respectively on the processor core of the CPU processor using the SIMD instruction set of the CPU processor; The sonar image to be filtered is loaded into the GPU processor, and the noise variance of the global sonar image is calculated on the GPU processor; According to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, a Lee filtering operation is performed on the sonar image on the GPU processor to achieve data filtering of the sliding window; The data of each sliding window is concatenated into filtered sonar image data.

[0015] Compared with the prior art, the present invention has at least the following beneficial effects: the Lee filtering method of the present invention can simultaneously calculate the variance and mean of the sliding window and the noise variance of the sonar image, with faster calculation speed and shorter time. In addition, the Lee filtering method can simultaneously utilize the CPU processor and the GPU processor to effectively reduce the memory usage ratio of the CPU processor and the GPU processor, further reduce the requirements for device performance, and is more suitable for the application environment of low-power and embedded devices, so as to achieve better performance scheduling of the device.

[0016] Other beneficial effects of the Lee filtering method and Lee filtering system of the present invention will be further disclosed in the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a flow chart of a GPU-based Lee filtering method according to a preferred embodiment of the present invention.

[0018] Figure 2 It is a schematic diagram of the application environment of the Lee filtering method according to the above preferred embodiment of the present invention.

[0019] Figure 3 It is a block diagram of a GPU-based Lee filtering system according to a preferred embodiment of the present invention.

[0020] Figure 4 It is a block diagram of a computing device according to a preferred embodiment of the present invention.

[0021] In the figure: 300, Lee filter system; 310, memory pool division unit; 320, memory pool application unit; 330, first data loading unit; 340, second data loading unit; 350, first calculation unit; 360, second calculation unit; 370, third calculation unit; 380, splicing unit; 400, computing device; 410, processor; 420, memory; 430, input device; 440, output device. DETAILED DESCRIPTION

[0022] Before describing in detail any embodiment of the present invention, it should be understood that the present invention is not limited in its application to the construction and arrangement details of the components described below or illustrated in the following figures. The present invention can have other embodiments and can be practiced or carried out in various ways. In addition, it should be understood that the words and terms used here are for descriptive purposes and should not be considered restrictive. The use of "including" or "having" and its variations herein is intended to cover the items and their equivalents and additional items displayed below. Unless otherwise specified or limited, the terms "install", "connect", "support" and "couple" and their variations are widely used and cover direct installation and indirect installation, connection, support and connection. In addition, "connect" and "couple" are not limited to physical or mechanical connections or connections.

[0023] Furthermore, on the first aspect, in the disclosure of the present invention, the orientations or positional relationships indicated by terms such as “longitudinal”, “transverse”, “upper”, “lower”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside” and “outside” are based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore the above terms cannot be understood as limitations on the present invention; on the second aspect, the term “one” should be understood as “at least one” or “one or more”, that is, in one embodiment, the number of an element may be one, while in another embodiment, the number of the element may be multiple, and the term “one” cannot be understood as a limitation on the quantity.

[0024] The basic concept of the present invention is to design and develop a heterogeneous computing version of the Lee filter algorithm with high computing efficiency and low memory consumption based on the characteristics of the heterogeneous computing platform. The Lee filter algorithm mainly relies on the advantages of the heterogeneous computing platform and splits the computing process into CPU processors and GPU processors to complete it. Figure 2 shown.

[0025] In terms of the physical characteristics of the heterogeneous computing platform, the 12-core A78AE CPU and the Ampere GPU with 2048 CUDA cores are linked through a set of 64GB-256bit LPDDR5 DRAM. By reducing the traditional deep copy mode of data transmission from the CPU processor to the GPU processor to a shallow copy mode of pointer and ownership transfer in the same memory, the time cost of multiple memory application allocations during data transmission and the memory usage ratio during calculation can be reduced, thereby reducing device performance requirements.

[0026] On this basis, the Lee filtering algorithm of the present invention has the following main steps.

[0027] Step 1, pre-allocate the memory for loading the sonar image to be filtered. Specifically, load the sonar image data to be filtered into the shared memory DRAM memory. At the same time, the memory capacity required by the intermediate parameters can be calculated according to the formula, and the memory of the specified size is applied in the stack area. In this part, the memory pool mechanism is designed from the code level. The original data (for example, the sonar image to be filtered) and the intermediate parameters are stored in a unified memory opened up by the memory pool. On the one hand, it can save the time cost waste caused by the secondary memory application during the calculation process. On the other hand, when the data in the unified memory is passed to the GPU processor, an implicit copy of the GPU processor will be realized. Compared with other methods, implicit copying can transfer data to the GPU processor faster.

[0028] Step 2, the CPU processor and the GPU processor simultaneously calculate the intermediate parameters. Specifically, considering the particularity of the physical architecture, a memory pool mechanism based on unified memory is further designed, which allows the GPU processor and the CPU processor to access the same address reference without adding new memory to achieve the same sonar image data transmission to the CPU processor and the GPU processor respectively, thereby reducing the overhead of memory copying and new memory application. In this step, for the original sonar image data used by the CPU processor, the original data divided by the sliding window is constructed by slicing. For the data calculation on the CPU processor, OpenMP is used for core division, and SIMD optimization is combined to achieve efficient parallelization. Specifically, OpenMP is used to divide the total data into N groups (N is the number of cores), and then the ARM SIMD instruction set is used in each group of data for optimization processing. OpenMP can easily distribute tasks to multiple cores to achieve parallel processing of data. This makes full use of the resources of the CPU processor in a multi-core environment and improves computing efficiency. SIMD instruction sets (such as NEON / SVE) can operate on multiple data elements in a single instruction, significantly improving data processing speed. Using both at the same time can optimize the computing speed at the processor core level, thereby improving the efficiency of parallel computing.

[0029] Step 3, the GPU processor calculates the Lee filter algorithm. Specifically, after the CPU processor is used to calculate the intermediate parameters of each sliding window, the data will be returned and saved in the memory pool implemented with unified memory. At this time, the GPU processor can be used to load the original sonar image and the intermediate parameters to calculate the Lee filter. The steps in this part mainly include the following three parts: loading the intermediate parameters and the original sonar image, calculating the weighting coefficients, and calculating the Lee filter of the original sonar image. The multi-core physical structure of the GPU processor enables it to have a single-threaded multi-data processing feature, which enables the GPU processor to process image data. Compared with the CPU processor, it not only has a faster processing speed, but also can support the processing of larger images. In this part, the Lee filtering method of the present invention relies on the physical structure characteristics and programming model of the GPU processor, and the above steps can be optimized.

[0030] First, in the step of loading intermediate parameters and original sonar images, according to the programming model of the GPU processor, the original sonar images and intermediate parameters are re-divided using thread indexes, and the entire original sonar image is divided into multiple thread blocks in the width and height directions. At this stage, it is calculated whether the original sonar image can be completely processed by the sliding window. If it cannot be completely processed, the edge will be filled in this part; the method of establishing access to the original sonar image and intermediate parameters through thread indexes can provide fast access to the original sonar image. The GPU processor can support operations on a maximum number of threads of 1024 pixels per clock cycle, which is much higher than the maximum number of pixels that can be processed in the same clock cycle of the CPU processor vectorized instruction set. Therefore, the time cost required for the GPU processor to load and process the original sonar image and intermediate parameters can be much lower than the time cost of the CPU processor.

[0031] Secondly, in the step of calculating the weighted coefficients, after using the thread index to index the original sonar image and the intermediate parameters, the calculation of the weighted coefficients can be optimized through shared memory. Shared memory can save local data more efficiently. In terms of data loading, it can reduce the number of accesses to the slow-access global memory. In terms of data utilization, the calculated results can be stored in the local memory of the stream processor (SM), which can provide faster access speed than through the cache, thereby reducing the calculation time.

[0032] Third, in the calculation of the Lee filter of the original sonar image, after using shared memory to calculate the intermediate parameters and the original sonar image to obtain the weighted coefficient, the cooperative-group can be used to calculate the final Lee filter process. Compared with the traditional thread bundle, the cooperative group can provide a more flexible thread cooperation mechanism, which can transfer data between multiple thread blocks and reduce synchronization overhead. This method is combined with the shared memory method to maximize the efficiency of calculating the weighted coefficient and the variance in the sliding window and reduce its memory usage ratio.

[0033] like Figure 1 As shown, it shows a Lee filtering method implemented based on a heterogeneous computing platform according to a preferred embodiment of the present invention, which is used to filter sonar images, wherein the Lee filtering method includes the following steps: S1, define a memory pool in the shared DRAM memory and divide the memory pool in the shared DRAM; S2, calculates and applies for a memory pool of matching size according to the size of the sonar image to be filtered; S3, loading the image data to be filtered into the memory pool; S4, using OpenMP to plan the processor cores of the CPU processor, and using the SIMD instruction set of the CPU processor to load the image data to be filtered from the shared DRAM memory to the processor core of the corresponding CPU processor; S5, using the SIMD instruction set of the CPU processor to respectively calculate the variance and the mean in each sliding window on the processor core of the CPU processor; S6, loading the sonar image to be filtered into the GPU processor, and calculating the noise variance of the global sonar image on the GPU processor; S7, performing a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, so as to implement data filtering on the sliding window; S8, splicing the data of each sliding window into filtered sonar image data.

[0034] Through the above steps, while the CPU processor calculates the variance and mean of the sliding window, the Lee filtering method can calculate the noise variance of the global sonar image on the GPU processor, which makes the calculation speed of the invented Lee filtering method faster and takes less time. Since the Lee filtering method of the present invention utilizes both the CPU processor and the GPU processor, it can reduce the memory usage ratio of the CPU processor and the GPU processor, further reduce the performance requirements, and is more suitable for the application environment of low-power and embedded devices, achieving better performance scheduling of the device.

[0035] In a specific example of the Lee filtering method of the present invention, in step S2, the Lee filtering method calculates and applies for a memory pool according to twice the size of the sonar image to be filtered to meet the needs of subsequent calculation processes. Optionally, in other examples of the Lee filtering method of the present invention, in step S2, the filtering method may also calculate and apply for a memory pool according to other multiples of the sonar image to be filtered.

[0036] Furthermore, in a specific example of the Lee filtering method of the present invention, the step S4 further includes the steps of: S4.1, reading the number of processor cores of the CPU processor, and calculating the amount of data copied in each step of the asynchronous copy according to the number of processor cores; S4.2, calculating the amount of data of the sliding window of the asynchronous single copy according to the amount of data copied in each step and the size of the sliding window; S4.3, using the SIMD instruction set to load the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core according to the amount of data in the sliding window. The step S5 further includes the steps of: S5.1, using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; S5.2, calculating the mean of the sliding window according to the summation result; S5.3, using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; S5.2, calculating the mean of the sliding window according to the summation result; S5.3, using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for calculating the variance in combination with the mean.

[0037] In this way, the Lee filtering method can make full use of the computing performance of the CPU processor, and the GPU calculates the global sonar image noise method at the same time, which is beneficial to shorten the overall processing time, improve the utilization rate of the CPU processor, and greatly improve the filtering efficiency.

[0038] Preferably, in step 7, the Lee filtering method performs Lee filtering on the sonar image on the GPU processor to achieve a formula for filtering the data of the sliding window that satisfies ,in is the global sonar image noise variance, is the variance within the sliding window, and the parameter is the total number of pixels in the sliding window.

[0039] Further, the step S4 includes the following steps: S4.1, dividing the data range of each sliding window according to the GPU thread index; S4.2, using the data loading instruction in the PTX instruction set to load each sliding window into each shared memory of the GPU; S4.3, using the combined calculation and summation formula in the PTX instruction set to respectively calculate the mean in each shared memory; S4.4, using the PTX instruction set to square the difference between the pixel data and the mean in the shared memory to obtain the variance. Through such steps, the design and development of the Lee filtering method of the present invention has high computational efficiency, low memory consumption, and supports the calculation of large-scale data volumes, which can reach a single sonar image of 5GB. In addition, by relying on the PTX instruction set to achieve this, the Lee filtering method of the present invention has higher versatility, can achieve higher computing performance on GPU processors of different architectures, and is conducive to improving computing speed and memory utilization. Moreover, by relying on the PTX instruction set to achieve this, the Lee filtering method of the present invention has a shorter compilation process and a faster compilation speed.

[0040] Attached Figure 3 A block diagram of a GPU-based Lee filtering system 300 of a preferred embodiment of the present invention is shown, wherein the Lee filtering system 300 includes a memory pool partitioning unit 310, a memory pool application unit 320, a first data loading unit 330, a second data loading unit 340, a first computing unit 350, a second computing unit 360, a third computing unit 370 and a splicing unit 380.

[0041] In the process of filtering the sonar image, each unit of the Lee filter system 300 has different functions. Specifically, the memory pool division unit 310 is used to define the memory pool in the shared DRAM memory and divide the memory pool in the shared DRAM; the memory pool application unit 320 is used to calculate and apply for a memory pool of matching size according to the size of the sonar image to be filtered; the first data loading unit 330 is used to load the image data to be filtered into the memory pool; the second data loading unit 340 is used to load the image data to be filtered from the shared DRAM memory to the corresponding processor core of the CPU processor using the SIMD instruction set of the CPU processor after using OpenMP to plan the processor core of the CPU processor; the first calculation unit 350 is used to calculate the variance and mean in each sliding window on the processor core of the CPU processor using the SIMD instruction set of the CPU processor; The second calculation unit 360 is used to calculate the noise variance of the global sonar image of the image data to be filtered loaded into the GPU processor on the GPU processor; the third calculation unit 370 is used to perform Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor combined with the noise variance calculated by the GPU processor, so as to realize the data filtering of the sliding window; the splicing unit 380 is used to splice the data of each sliding window into the filtered sonar image data; in this way, while the CPU processor calculates the variance and mean of the sliding window, the Lee filtering system 300 can calculate the noise variance of the global sonar image on the GPU processor, which makes the calculation speed of the invented Lee filtering system 300 faster and the time is shorter. Since the Lee filtering system 300 of the present invention uses the CPU processor and the GPU processor at the same time, it can reduce the memory usage ratio of the CPU processor and the GPU processor, further reduce the performance requirements, and is more suitable for the application environment of low power consumption and embedded devices, and realizes better performance scheduling of the device.

[0042] Preferably, the process of loading data by the second data loading unit 340 is: reading the number of processor cores of the CPU processor, and calculating the amount of data copied in each step of the asynchronous copy according to the number of processor cores; calculating the amount of data of the sliding window of the asynchronous single copy according to the amount of data copied in each step and the size of the sliding window; using the SIMD instruction set to load the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core according to the amount of data in the sliding window; the process of calculating the variance and mean in the sliding window by the first calculation unit 350 is: using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; calculating the mean of the sliding window according to the summation result; using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches and calculate the variance in combination with the mean. In this way, the Lee filtering system 300 can make full use of the computing performance of the CPU processor, and the GPU processor can calculate the noise method of the global sonar image at the same time, which is conducive to shortening the overall processing time, improving the utilization rate of the CPU processor, and greatly improving the filtering efficiency.

[0043] like Figure 4 As shown, a computing device 400 according to a preferred embodiment of the present invention includes one or more processors 410 and one or more memories 420 connected to the processors 410 .

[0044] The processor 410 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the computing device 400 to perform desired functions.

[0045] The memory 420 may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 410 may execute the program instructions to implement the optimization method of the present invention described above and / or other desired functions.

[0046] Specifically, when the processor 410 executes the program instructions stored in the memory 420, the computing device 400 executes the Lee filtering method, which includes the following steps: defining a memory pool in a shared DRAM memory and dividing the memory pool in the shared DRAM; calculating and applying for a memory pool of matching size according to the size of the sonar image to be filtered; loading the image data to be filtered into the memory pool; using OpenMP to plan the processor core of the CPU processor, and using the SIMD instruction set of the CPU processor to load the image data to be filtered from the shared DRAM memory to the corresponding processor core of the CPU processor; using the SIMD instruction set of the CPU processor to calculate the variance and mean in each sliding window on the processor core of the CPU processor respectively; loading the sonar image to be filtered into the GPU processor, and calculating the global noise variance of the sonar image on the GPU processor; performing a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor combined with the noise variance calculated by the GPU processor to achieve data filtering of the sliding window; and splicing the data of each sliding window into filtered sonar image data.

[0047] In a specific example of the computing device 400 of the present invention, the computing device 400 may further include an input device 430 and an output device 440, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown). The input device 430 may include, for example, a keyboard, a mouse, etc. The output device 440 may output various information to the outside. The output device 440 may include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, etc.

[0048] It should be understood by those skilled in the art that the embodiments of the present invention described above and shown in the accompanying drawings are only examples and do not limit the present invention. The purpose of the present invention has been fully and effectively achieved. The functional and structural principles of the present invention have been demonstrated and explained in the embodiments, and the embodiments of the present invention may be modified or altered in any way without departing from the principles.

Claims

1. The Lee filtering method implemented on a heterogeneous computing platform is characterized by: The Lee filtering method comprises the following steps: S1, define a memory pool in the shared DRAM memory and divide the memory pool in the shared DRAM; S2, calculates and applies for a memory pool of matching size according to the size of the sonar image to be filtered; S3, loading the image data to be filtered into the memory pool; S4, using OpenMP to plan the processor cores of the CPU processor, and using the SIMD instruction set of the CPU processor to load the image data to be filtered from the shared DRAM memory to the processor core of the corresponding CPU processor; S5, using the SIMD instruction set of the CPU processor to respectively calculate the variance and the mean in each sliding window on the processor core of the CPU processor; S6, loading the sonar image to be filtered into the GPU processor, and calculating the noise variance of the global sonar image on the GPU processor; S7, performing a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, so as to implement data filtering on the sliding window; S8, splicing the data of each sliding window into filtered sonar image data.

2. The Lee filtering method according to claim 1, characterized in that: The step S4 further comprises the steps of: S4.1, read the number of processor cores of the CPU processor, and calculate the amount of data copied in each step of the asynchronous copy according to the number of processor cores; S4.2, according to the amount of data copied in each step and the size of the sliding window, calculate the amount of data in the sliding window of the asynchronous single copy; S4.3, according to the data size of the sliding window, use the SIMD instruction set to load the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core; The step S5 further comprises the steps of: S5.1, using a SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; S5.2, calculating the mean of the sliding window according to the summation result; S5.3, use the SIMD instruction set to load the image data to be filtered from the vectorized register in batches and calculate the variance in combination with the mean.

3. The Lee filtering method according to claim 2, characterized in that: The calculation formula in step S7 satisfies: ,in is the global sonar image noise variance, is the variance within the sliding window, and the parameter is the total number of pixels in the sliding window.

4. The Lee filtering method according to claim 3, characterized in that: In the step S4, thread indexes in the width and height directions are constructed according to the sizes of the sonar image in the width and height directions, for marking each sliding window, and the step S8 further comprises the steps of: S8.1, judging whether the sliding window belongs to an edge position according to the thread index in the width and height directions marked by each sliding window, if the sliding window does not belong to an edge position, locally overlapping the data of adjacent edges of two adjacent sliding windows, taking the average of the overlapped data and loading it into a new shared memory, if the sliding window belongs to an edge position, directly loading the data of the sliding window into the new shared memory; S8.2, according to the thread indexes in the width and height directions marked by each sliding window, the data of the new shared memory is spliced ​​along the width and height directions of the sonar image, and the splicing results are loaded into the memory pool to obtain the filtered sonar image data.

5. The Lee filter system implemented on a heterogeneous computing platform is characterized by: include: A memory pool division unit, used for defining a memory pool in a shared DRAM memory and dividing the memory pool in the shared DRAM; A memory pool application unit is used to calculate and apply for a memory pool of matching size according to the size of the sonar image to be filtered; A first data loading unit, used for loading the image data to be filtered into a memory pool; A second data loading unit is used to load the image data to be filtered from the shared DRAM memory to the corresponding processor core of the CPU processor using the SIMD instruction set of the CPU processor after using OpenMP to plan the processor core of the CPU processor; A first computing unit, configured to respectively compute the variance and the mean in each sliding window on a processor core of the CPU processor using a SIMD instruction set of the CPU processor; A second calculation unit is used to calculate, on the GPU processor, a noise variance of a global sonar image of the image data to be filtered that is loaded into the GPU processor; A third calculation unit is used to perform a Lee filtering operation on the sonar image on the GPU processor according to the variance and mean of the sliding window calculated by the CPU processor and the noise variance calculated by the GPU processor, so as to achieve data filtering of the sliding window; The splicing unit is used to splice the data of each sliding window into filtered sonar image data.

6. The Lee filter system according to claim 5, characterized in that: The process of recording data by the second data loading unit is: reading the number of processor cores of the CPU processor, and calculating the amount of data copied in each step of the asynchronous copy according to the number of processor cores; calculating the amount of data in the sliding window of the asynchronous single copy according to the amount of data copied in each step and the size of the sliding window; and using the SIMD instruction set to load the image data to be filtered from the shared DRAM memory to the vectorized register on the processor core according to the amount of data in the sliding window; The process of the first computing unit calculating the variance and mean in the sliding window is: using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches for summing; calculating the mean of the sliding window based on the summation result; using the SIMD instruction set to load the image data to be filtered from the vectorized register in batches and calculate the variance in combination with the mean.

7. The Lee filter system according to claim 6, characterized in that: The formula for the third computing unit to perform Lee filtering on the sonar image on the GPU processor satisfies: ,in is the global sonar image noise variance, is the variance within the sliding window, and the parameter is the total number of pixels in the sliding window.

8. The Lee filter system according to claim 7, characterized in that: The stitching process of the stitching unit stitching the data of each sliding window into the filtered sonar image data is: According to the thread index in the width and height directions marked by each sliding window, it is determined whether the sliding window belongs to the edge position. If the sliding window does not belong to the edge position, the data of the adjacent edges of two adjacent sliding windows are partially overlapped, and the overlapped data is averaged and loaded into the new shared memory. If the sliding window belongs to the edge position, the data of the sliding window is directly loaded into the new shared memory; According to the thread index in the width and height directions marked by each sliding window, the data in the new shared memory is spliced ​​along the width and height directions of the sonar image, and the splicing result is loaded into the memory pool to obtain the filtered sonar image data.

9. A computing device, characterized in that It comprises a processor and a memory coupled to the processor, wherein the memory is used to store program instructions, and the processor is used to execute the program instructions. When the program instructions are executed, the computing device executes the Lee filtering method according to any one of claims 1 to 4.

Citation Information

Patent Citations

  • Apparatus and method for performing non-local means filtering using motion estimation circuitry of a graphics processor

    CN113409435A

  • Real-time image noise reduction method based on GPU

    CN115984127A

  • Tiling format for convolutional neural networks

    US20200202180A1