Package structure and electronic package and manufacturing method thereof

By using a silicon nitride protective layer to fill the holes of the packaging layer in the semiconductor package, the problem of uneven heat dissipation caused by poor thermal conductivity and difference in thermal expansion coefficient of the thermal conductivity layer is solved, and a more efficient heat dissipation and a more stable package structure are achieved.

CN119447052APending Publication Date: 2025-02-14SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
CN202310985408.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-31
Filing Date
2023-08-07
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

The thermal conductivity coefficient of the thermal layer materials of existing semiconductor packaging is poor, and the large difference in thermal expansion coefficient leads to uneven transmission of heat energy, and the surface of the packaging layer is prone to moisture absorption, resulting in poor binding force, and easy delamination.

Method used

Silicon nitride is used as the protective layer material, and is formed between the encapsulation layer and the thermal conductivity layer, filling the holes on the surface of the encapsulation layer to improve the thermal conductivity and bonding force.

Benefits of technology

It improves overall heat dissipation uniformity, avoids poor bonding and delamination problems caused by moisture absorption on the surface of the encapsulation layer, and improves heat conduction efficiency.

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Abstract

The invention discloses a packaging structure, an electronic packaging part and a manufacturing method thereof. The packaging structure comprises an electronic module; the packaging layer is provided with a first surface and a second surface which are opposite to each other, and wraps the electronic module; a protection layer formed on the second surface of the encapsulation layer; and a thermally conductive layer formed on the protective layer.
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Description

Technical Field

[0001] The invention relates to a semiconductor device, in particular to a packaging structure and an electronic packaging component and a manufacturing method thereof. Background Art

[0002] As the demand for electronic products in terms of functions and processing speed increases, semiconductor chips, as core components of electronic products, need to have higher density electronic components and electronic circuits, which means that semiconductor chips will generate more heat energy during operation.

[0003] In order to quickly dissipate the heat energy into the atmosphere, Figure 1 As shown, the manufacturing method of the conventional semiconductor package 1 is to first place the semiconductor chip 11 on the package substrate 10, and then form the package layer 12 on the package substrate 10 to cover the semiconductor chip 11. Then, the heat sink 14 (heat spreader) is combined with the semiconductor chip 11 and the package layer 12 through the heat conductive layer 13, so as to dissipate the heat energy generated by the semiconductor chip 11 through the heat conductive layer 13 and the heat sink 14. That is, the heat conductive layer 13 is formed on the composite surface formed by the semiconductor chip 11 and the package layer 12, and the heat conductive layer 13 can be a thermal interface material (TIM) or a backside metal.

[0004] However, the thermal conductivity of the conventional packaging layer 12 covering the semiconductor chip 11 is generally 0.8W / mk, which is a poor heat transfer material. In addition, the difference in the coefficient of thermal expansion (CTE) between the semiconductor chip 11 and the packaging layer 12 is too large, which will cause the heat energy to be unable to be uniformly transferred to the heat sink 14 through the thermal conductive layer 13, resulting in poor heat dissipation effect. Furthermore, during the manufacturing process of the semiconductor package 1, the surface of the packaging layer 12 is easy to absorb moisture, which leads to poor bonding between the thermal conductive layer 13 and the packaging layer 12, and the problem of delamination is easy to occur.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Summary of the invention

[0006] In view of the various defects of the above-mentioned prior art, the present invention provides a packaging structure, including: an electronic module; a packaging layer having a first surface and a second surface opposite to each other, covering the electronic module and allowing the electronic module to be exposed on the second surface of the packaging layer; and a protective layer formed on the electronic module and the second surface of the packaging layer.

[0007] The present invention also provides a method for manufacturing a packaging structure, comprising: setting an electronic module and a packaging layer covering the electronic module on a carrier, wherein the packaging layer has a first surface and a second surface opposite to each other, and the electronic module is exposed on the second surface of the packaging layer; forming a protective layer on the second surface of the packaging layer and the electronic module; and removing the carrier.

[0008] In the aforementioned packaging structure and its manufacturing method, the material forming the protection layer is silicon nitride.

[0009] The aforementioned packaging structure and its manufacturing method further include a heat-conducting element stacked on the electronic module and covered by the packaging layer, and the heat-conducting element is exposed on the second surface of the packaging layer so that the protective layer covers the heat-conducting element and the second surface of the packaging layer.

[0010] In the aforementioned packaging structure and its manufacturing method, the electronic module is a semiconductor chip or a multi-chip package with a telecommunication processing function.

[0011] In the aforementioned packaging structure and its manufacturing method, the first surface of the packaging layer is sunken with a plurality of holes, and the protection layer partially fills the plurality of holes to have a plurality of concave portions corresponding to the plurality of holes.

[0012] The aforementioned packaging structure and its manufacturing method further include a heat conducting layer formed on the protective layer.

[0013] In the aforementioned packaging structure and its manufacturing method, the thermal conductivity of the protective layer is greater than 4W / cm-k.

[0014] The present invention further provides an electronic package, comprising: a supporting structure; and the aforementioned packaging structure, which is arranged on the supporting structure.

[0015] The invention also provides a method for manufacturing an electronic package, providing a bearing structure; and arranging the package structure manufactured by the above-mentioned method on the bearing structure.

[0016] The aforementioned electronic package and its manufacturing method further include combining a heat dissipation structure onto the packaging structure through the heat conductive layer.

[0017] As can be seen from the above, the packaging structure and its electronic packaging and manufacturing method of the present invention can improve the overall heat dissipation uniformity through the design that the protective layer is formed between the packaging layer and the heat-conducting layer, and can avoid the problem of poor bonding and easy delamination caused by the direct exposure of the pores on the surface of the packaging layer to absorb moisture. In addition, the protective layer can also increase the bonding between the packaging layer and the heat-conducting layer and improve the heat conduction efficiency. In addition, the packaging structure and its electronic packaging and manufacturing method of the present invention can be completed with existing processes and equipment without a large amount of additional cost expenditure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0019] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of the method for manufacturing the packaging structure of the present invention.

[0020] Figure 2A-1 FIG. 4 is a cross-sectional schematic diagram of another embodiment of an electronic module in the packaging structure of the present invention.

[0021] FIG. 2E to FIG. 2F It is a cross-sectional schematic diagram of the method for manufacturing the electronic package of the present invention.

[0022] FIG. 3A to FIG. 3D FIG. 4 is a cross-sectional schematic diagram of another embodiment of a method for manufacturing a packaging structure of the present invention.

[0023] FIG. 3E to FIG. 3F FIG. 4 is a cross-sectional schematic diagram of another embodiment of a method for manufacturing an electronic package of the present invention.

[0024] Main component symbols

[0025] 1 Semiconductor Package

[0026] 10 Package substrate

[0027] 11. Semiconductor Chip

[0028] 12 Encapsulation layer

[0029] 13. Thermal Conductive Layer

[0030] 14 Heat sink

[0031] 2a,2a' Package Structure

[0032] 21 Electronic modules

[0033] 21a Action surface

[0034] 21b Non-active surface

[0035] 22 Encapsulation layer

[0036] 22a First surface

[0037] 22b Second surface

[0038] 221 Hole

[0039] 23 Protective layer

[0040] 231 concavity

[0041] 24 Thermal Conductive Layer

[0042] 25 Thermal Conductive Components

[0043] 3,3' Electronic packaging

[0044] 31 Load-bearing structure

[0045] 32 Heat dissipation structure

[0046] 321 Heat sink

[0047] 322 Support feet

[0048] 8 Bearing

[0049] 80 bonding layer. DETAILED DESCRIPTION

[0050] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0051] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment in size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "upper", "first", and "second" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0052] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of a method for manufacturing a packaging structure 2a of the present invention.

[0053] like Figure 2A As shown, a carrier 8 is provided, and an electronic module 21 and a packaging layer 22 are disposed on the carrier 8 .

[0054] In this embodiment, the carrier 8 is, for example, a plate of semiconductor material (such as silicon or glass), on which a bonding layer 80 of a release film or other adhesive film is formed by coating, wherein the bonding layer 80 serves as a sacrificial release layer.

[0055] The electronic module 21 may be an electronic component, such as an active component, wherein the active component is, for example, a semiconductor chip having a telecommunication processing function. In this embodiment, the electronic module 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other, and the electronic module 21 is coupled to the carrier 8 at its active surface 21a side.

[0056] In other embodiments, the electronic module 21 may be Figure 2A-1 The multi-chip package is shown, but the present invention is not limited thereto.

[0057] The packaging layer 22 is formed on the carrier 8 to cover the electronic module 21. In this embodiment, the packaging layer 22 is made of an insulating material, such as polyimide (PI) or epoxy, which can be formed by molding, lamination or coating.

[0058] Furthermore, the packaging layer 22 has a first surface 22a and a second surface 22b opposite to each other, and the first surface 22a is combined with the carrier 8. The inactive surface 21b of the electronic module 21 is flush with the second surface 22b of the packaging layer 22, so that the inactive surface 21b of the electronic module 21 is exposed on the second surface 22b of the packaging layer 22. In one embodiment, the packaging layer 22 can first cover the inactive surface 21b of the electronic module 21, and then the packaging layer 22 is flattened by grinding or other methods to obtain Figure 2A An embodiment of the encapsulation layer 22 is shown.

[0059] like Figure 2B As shown, a protective layer 23 is formed on the second surface 22b of the packaging layer 22 and the inactive surface 21b of the electronic module 21 to obtain the packaging structure 2a of the present invention.

[0060] In this embodiment, for example, silicon nitride (SiN) can be formed by chemical vapor deposition (CVD) to serve as the protective layer 23. The protective layer 23 can prevent the surface of the packaging layer 22 from being directly exposed and causing moisture absorption, and can ensure that subsequent processes will not cause delamination due to moisture, resulting in product defects, thereby improving product reliability. In addition, the protective layer 23 can solve the problem that the thermal expansion coefficient of the existing semiconductor chip and the packaging layer is too different, resulting in the inability to uniformly transfer heat energy to the heat sink through the heat conductive layer, resulting in poor heat dissipation effect.

[0061] In addition, the first surface 22b of the packaging layer 22 may be recessed with a plurality of voids 221 of different sizes, and a protective layer 23 of a certain thickness is formed on the second surface 22b of the packaging layer 22 and the inactive surface 21b of the electronic module 21, so that part of the protective layer 23 will be filled with the plurality of voids 221, so that the protective layer 23 has a plurality of recesses 231 corresponding to the plurality of voids 221.

[0062] In addition, the thermal conductivity of the protective layer 23 is greater than 4 W / cm-k.

[0063] like Figure 2C As shown, a heat-conducting layer 24 may be formed on the protective layer 23. In this embodiment, the heat-conducting layer 24 partially fills the plurality of recesses 231, and its upper surface maintains a coplanar surface. In addition, the heat-conducting layer 24 is a thermal interface material (TIM) or a backside metal, such as a high thermal conductivity metal glue, a solder material, or a metal material (which may be a multi-layer metal material).

[0064] like Figure 2D As shown, the carrier 8 and the bonding layer 80 thereon are removed.

[0065] FIG. 2E to FIG. 2F It is a cross-sectional schematic diagram of the method for manufacturing the electronic package of the present invention.

[0066] like Figure 2E As shown, Figure 2D (or as Figure 2B ) is provided on a supporting structure 31.

[0067] The carrier structure 31 may be, for example, a circuit structure with a core layer (e.g., a hard substrate in which a dielectric layer and a circuit layer formed on the dielectric layer are stacked on the core layer), a circuit structure without a core layer (e.g., a soft substrate in which a dielectric layer and a circuit layer formed on the dielectric layer are stacked), a silicon interposer (TSI) with conductive through-silicon vias (TSV), or other board types. In addition, the electrode pads of the active surface 21a of the electronic module 21 may be disposed on the carrier structure 31 in a flip-chip manner through a plurality of conductive bumps such as solder balls, metal pillars, or others, and electrically connected to the circuit layer in the carrier structure 31; or, the electronic module 21 may directly contact the circuit layer of the carrier structure 31 (e.g., Cu-Cu heterogeneous bonding technology; Cu-Cu hybrid bonding). Therefore, when manufacturing the packaging structure 2a, the type and quantity of the electronic modules 21 mounted on the supporting structure 31 can be determined in advance to enhance its electrical function. There are many ways to electrically connect the electronic modules 21 to the supporting structure 31, which are not limited to the above.

[0068] like Figure 2F As shown, the heat dissipation structure 32 is bonded to the packaging structure 2 a through the heat conductive layer 24 to obtain the electronic package 3 of the present invention.

[0069] In addition, in other embodiments, the heat conducting layer 24 may not be disposed on the packaging structure 2a first (eg, Figure 2BAs shown in FIG. 1 , before the heat dissipation structure 32 is combined with the packaging structure 2a, the heat conducting layer 24 and the heat dissipation structure 32 are sequentially disposed on the packaging structure 2a.

[0070] The heat dissipation structure 32 has a heat sink 321 and a plurality of support legs 322 extending downward from the edge of the heat sink 321. The lower side of the heat sink 321 is bonded to the packaging structure 2a by a heat conductive layer 24, and the support legs 322 are bonded to the supporting structure 31 by, for example, adhesive to fix the heat dissipation structure 32. It should be understood that there are many types of heat dissipation structures 32, and they are not limited to the above.

[0071] FIG. 3A to FIG. 3D FIG. 4 is a cross-sectional schematic diagram of another embodiment of a method for manufacturing a packaging structure of the present invention. FIG. 3A to FIG. 3D The embodiment and the aforementioned FIG. 2A to FIG. 2D The difference between the embodiments is that there is an additional heat-conducting element 25. Only the difference is described below, and the same technical content is not repeated here.

[0072] like Figure 3A As shown, a carrier 8 is provided, an electronic module 21 is disposed on the carrier 8 , and a heat-conducting element 25 is stacked on the electronic module 21 , so that the packaging layer 22 covers the electronic module 21 and the heat-conducting element 25 .

[0073] In this embodiment, the upper surface of the heat-conducting element 25 is flush with the second surface 22 b of the packaging layer 22 , so that the heat-conducting element 25 is exposed on the second surface 22 b of the packaging layer 22 .

[0074] Alternatively, the thermally conductive element 25 may be a silicon chip, such as a dummy die, or a metal block.

[0075] like Figure 3B As shown, a protective layer 23 is formed on the second surface 22b of the packaging layer 22 and the heat-conducting element 25 to obtain the packaging structure 2a' of the present invention. In this embodiment, for example, silicon nitride (SiN) can be formed by chemical vapor deposition (CVD) to serve as the protective layer 23. The protective layer 23 can prevent the surface of the packaging layer 22 from being directly exposed and causing moisture absorption, and can ensure that subsequent processes will not cause delamination due to moisture, resulting in product defects, thereby improving product reliability. In addition, the protective layer 23 can solve the problem that the thermal expansion coefficients of the existing semiconductor chip and the packaging layer are too different, resulting in the inability to evenly transfer heat energy to the heat sink through the heat-conducting layer, resulting in poor heat dissipation.

[0076] In addition, the protection layer 23 formed on the second surface 22 b of the packaging layer 22 and the thermal conductive element 25 has a certain thickness, so part of the protection layer 23 will fill the plurality of holes 221 recessed on the second surface 22 b of the packaging layer 22, so that the protection layer 23 has a plurality of recesses 231 corresponding to the plurality of holes 221.

[0077] like Figure 3C As shown, a heat conducting layer 24 may then be formed on the protection layer 23. In this embodiment, the heat conducting layer 24 partially fills the plurality of recesses 231, and the upper surface thereof maintains a coplanar surface.

[0078] like Figure 3D As shown, the carrier 8 and the bonding layer 80 thereon are removed.

[0079] FIG. 3E to FIG. 3F FIG. 4 is a cross-sectional schematic diagram of another embodiment of a method for manufacturing an electronic package of the present invention.

[0080] like Figure 3E As shown, Figure 3D (or Figure 3B ) is provided on the supporting structure 31. Figure 3F As shown, the heat dissipation structure 32 is bonded to the packaging structure 2a' through the heat conductive layer 24 to obtain the electronic package 3' of the present invention. In addition, the heat conductive layer 24 may not be provided when the packaging structure 2a' is manufactured. Before the heat dissipation structure 32 is bonded to the packaging structure 2a', the heat conductive layer 24 and the heat dissipation structure 32 are sequentially provided on the packaging structure 2a'.

[0081] The present invention further provides a packaging structure 2 a , which includes: an electronic module 21 , a packaging layer 22 and a protective layer 23 .

[0082] The electronic module 21 may be an electronic component, such as an active component, wherein the active component is, for example, a semiconductor chip with a telecommunication processing function. In this embodiment, the electronic module 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other. In other embodiments, the electronic module 21 may also be a multi-chip package.

[0083] The packaging layer 22 covers the electronic module 21 and has a first surface 22a and a second surface 22b opposite to each other. The inactive surface 21b of the electronic module 21 is flush with the second surface 22b of the packaging layer 22 so that the inactive surface 21b of the electronic module 21 is exposed on the second surface 22b of the packaging layer 22.

[0084] In one embodiment, the second surface 22 b of the packaging layer 22 is recessed with a plurality of voids 221 of different sizes.

[0085] The protection layer 23 is formed on the second surface 22b of the packaging layer 22 and the inactive surface 21b of the electronic module 21. In this embodiment, for example, silicon nitride (SiN) may be formed by chemical vapor deposition (CVD) to serve as the protection layer 23.

[0086] In one embodiment, the protective layer 23 has sufficient thickness, so that part of the protective layer 23 will fill the plurality of holes 221, so that the protective layer 23 has a plurality of recesses 231 corresponding to the plurality of holes 221. In addition, the thermal conductivity of the protective layer 23 is greater than 4 W / cm-k.

[0087] In one embodiment, a heat-conducting layer 24 may be formed on the protective layer 23. In this embodiment, the heat-conducting layer 24 partially fills the plurality of recesses 231, and its upper surface maintains a coplanar surface. In addition, the heat-conducting layer 24 is a thermal interface material (TIM) or a backside metal, such as a high thermal conductivity metal glue material, a solder material, or a metal material (which may be a multi-layer metal material).

[0088] The present invention further provides a packaging structure 2a', which includes: an electronic module 21, a packaging layer 22, a protective layer 23 and a heat conducting element 25. The packaging structure 2a' of the present invention is different from the aforementioned packaging structure 2a in that the heat conducting element 25 is added. Only the difference is described below, and the same technical content is not repeated here.

[0089] The heat-conducting element 25 is stacked on the electronic module 21, so that the packaging layer 22 covers the electronic module 21 and the heat-conducting element 25. In this embodiment, the heat-conducting element 25 can be a silicon chip or a metal block.

[0090] In this embodiment, the upper surface of the thermal conductive element 25 is flush with the second surface 22b of the packaging layer 22, so that the thermal conductive element 25 is exposed on the second surface 22b of the packaging layer 22. In one embodiment, the second surface 22b of the packaging layer 22 is recessed with a plurality of voids 221 of different sizes.

[0091] A protection layer 23 is formed on the second surface 22b of the packaging layer 22 and the thermal conductive element 25. In this embodiment, the protection layer may be silicon nitride (SiN) formed by chemical vapor deposition (CVD).

[0092] In one embodiment, the protective layer 23 has a certain thickness, so part of the protective layer 23 will fill the plurality of holes 221, so that the protective layer 23 has a plurality of recesses 231 corresponding to the plurality of holes 221. The thermal conductive layer 24 is formed on the protective layer 23 and partially fills the plurality of recesses 231, and its upper surface maintains a coplanar surface.

[0093] The present invention further provides an electronic package 3 , 3 ′, wherein the aforementioned package structures 2 a , 2 a ′ are disposed on a supporting structure 31 , and a heat dissipation structure 32 is bonded to the package structures 2 a , 2 a ′ via a heat conductive layer 24 .

[0094] In summary, the packaging structure and its electronic packaging and manufacturing method of the present invention can improve the uniformity of overall heat dissipation through the design that the protective layer is formed between the packaging layer and the heat-conducting layer, and can avoid the problem of poor bonding and easy delamination caused by the direct exposure of the pores on the surface of the packaging layer to absorb moisture. In addition, the protective layer can also increase the bonding between the packaging layer and the heat-conducting layer and improve the heat conduction efficiency. In addition, the packaging structure and its electronic packaging and manufacturing method of the present invention can be completed with existing processes and equipment without a large amount of additional cost expenditure.

[0095] The above embodiments are used to illustrate the principles and effects of the present invention, but are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. A packaging structure, comprising: Electronic modules; A packaging layer having a first surface and a second surface opposite to each other and covering the electronic module, and allowing the electronic module to be exposed on the second surface of the packaging layer; and A protection layer is formed on the electronic module and the second surface of the packaging layer.

2. The packaging structure according to claim 1, wherein: The material forming the protection layer is silicon nitride.

3. The packaging structure according to claim 1, wherein: The packaging structure also includes a heat-conducting element stacked on the electronic module and covered by the packaging layer, wherein the heat-conducting element is exposed on the second surface of the packaging layer so that the protection layer covers the heat-conducting element and the second surface of the packaging layer.

4. The packaging structure according to claim 1, wherein: The electronic module is a semiconductor chip or a multi-chip package.

5. The packaging structure according to claim 1, wherein: The first surface of the packaging layer is recessed with a plurality of holes, and the protection layer partially fills the plurality of holes to have a plurality of concave portions corresponding to the plurality of holes.

6. The packaging structure according to claim 1, wherein: The packaging structure also includes a heat-conducting layer formed on the protection layer.

7. The packaging structure according to claim 1, wherein: The thermal conductivity of the protective layer is greater than 4 W / cm-k.

8. An electronic package, comprising: load-bearing structure; as well as The packaging structure according to any one of claims 1 to 7 is arranged on the supporting structure.

9. The electronic package of claim 8, wherein: The electronic package also includes a heat dissipation structure coupled to the packaging structure.

10. A method for making a packaging structure, comprising: An electronic module and a packaging layer covering the electronic module are arranged on the carrier, wherein the packaging layer has a first surface and a second surface opposite to each other, and the electronic module is exposed on the second surface of the packaging layer; forming a protective layer on the second surface of the packaging layer and the electronic module; and Remove the carrier.

11. The method for manufacturing a packaging structure according to claim 10, wherein: The material forming the protection layer is silicon nitride.

12. The method for manufacturing a package structure according to claim 10, wherein: The manufacturing method also includes stacking a heat-conducting element on the electronic module, and making the packaging layer cover the heat-conducting element, and making the heat-conducting element exposed on the second surface of the packaging layer, so that the protection layer covers the heat-conducting element and the second surface of the packaging layer.

13. The method for manufacturing a packaging structure according to claim 10, wherein: The electronic module is a semiconductor chip or a multi-chip package.

14. The method for manufacturing a package structure according to claim 10, wherein: The first surface of the packaging layer is recessed with a plurality of holes, and the protection layer partially fills the plurality of holes to have a plurality of concave portions corresponding to the plurality of holes.

15. The method for manufacturing a package structure according to claim 10, wherein: The manufacturing method also includes forming a heat conducting layer on the protective layer.

16. The method for manufacturing a package structure according to claim 10, wherein: The thermal conductivity of the protective layer is greater than 4 W / cm-k.

17. A method for manufacturing an electronic package, comprising: Provide a load-bearing structure; as well as The packaging structure manufactured by the method according to any one of claims 10 to 16 is arranged on the supporting structure.

18. The method for manufacturing an electronic package according to claim 17, wherein: The manufacturing method also includes combining a heat dissipation structure onto the packaging structure.