Defect detection method for semiconductor structure and semiconductor process machine

Abstract

The invention relates to a defect detection method for a semiconductor structure and a semiconductor process machine. The semiconductor structure comprises a substrate structure; the at least one pattern structure is arranged on the substrate structure; wherein the pattern structure comprises a detection ring, the orthographic projection shape of the detection ring on the substrate structure is a polygon, and the number of edges of the polygon is not less than five. Therefore, when defect detection is carried out on the semiconductor process machine, the semiconductor structure is placed in the cavity of the semiconductor process machine for simulation, so that the flow direction and / or track of the micro airflow can be simulated (or detected) by detecting the collapse direction of the edge of the ring, and the defect detection accuracy is improved. Equipment personnel can quickly determine the position of the micro-airflow defect of the semiconductor process machine table, so that the semiconductor process machine table can be adjusted in a targeted manner, and the yield of semiconductor products can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a defect detection method for a semiconductor structure and a semiconductor process machine. Background Art

[0002] The semiconductor integrated circuit industry has experienced exponential growth. As the complexity of semiconductor processes increases, the requirements for process particles are getting higher and higher. In the relevant defect detection method, the silicon wafer is first placed in the process machine to be tested for process processing, and then the silicon wafer is tested for particles. The health of the process machine is judged by the particle test results of the silicon wafer. However, how to detect or simulate the micro-airflow defects of the process machine has become an urgent problem to be solved in the industry. At the same time, the detection or simulation of the micro-airflow defects of the process machine is of great significance to the improvement of the yield of semiconductor products. Summary of the invention

[0003] Based on this, it is necessary to provide a defect detection method for a semiconductor structure and a semiconductor process machine to address the above problems.

[0004] In a first aspect, an embodiment of the present application provides a semiconductor structure for detecting defects in a semiconductor process tool, the semiconductor structure comprising:

[0005] Substrate structure;

[0006] At least one pattern structure is arranged on the substrate structure; wherein the pattern structure includes a detection ring, the orthographic projection shape of the detection ring on the substrate structure is a polygon, and the number of sides of the polygon is not less than five.

[0007] The semiconductor structure provided by the embodiment of the present application is provided with at least one pattern structure on the substrate structure, and the pattern structure includes a detection ring in the shape of a polygon. In this way, when performing defect detection on a semiconductor process machine, the semiconductor structure is placed in the cavity of the semiconductor process machine for simulation. Therefore, the flow direction and / or trajectory of the micro-airflow can be simulated (or detected) by the collapse direction of the edge of the detection ring. In this way, equipment personnel can quickly determine the location of the micro-airflow defect of the semiconductor process machine, which is convenient for targeted adjustment of the semiconductor process machine, thereby helping to improve the yield of semiconductor products.

[0008] In one embodiment, the pattern structure further includes at least one detection strip, and the detection ring is disposed around the periphery of the at least one detection strip.

[0009] In one embodiment, the pattern structure includes a plurality of detection bars, and the plurality of detection bars are arranged at intervals on the inner side of the detection ring;

[0010] Among the plurality of detection strips, extension directions of at least two of the detection strips intersect.

[0011] In one embodiment, the plurality of detection strips include two first detection strips and two second detection strips; the first detection strips extend along a first direction, and the second detection strips extend along a second direction; the first direction intersects with the second direction;

[0012] The two first detection strips are arranged at intervals along the second direction, and the two second detection strips are arranged at intervals along the first direction.

[0013] In one embodiment, the two first detection strips are located on both sides of the center of the detection ring along the second direction; the two second detection strips are located on both sides of the center of the detection ring along the first direction; and the first direction is perpendicular to the second direction.

[0014] The two first detection strips and the two second detection strips are arranged on the outer circumference of a virtual circle, the extension direction of the first detection strip is tangent to the virtual circle, the extension direction of the second detection strip is tangent to the virtual circle, and the center of the virtual circle coincides with the center of the detection ring.

[0015] In one of the embodiments, the dimension of the detection ring along the thickness direction of the substrate structure is a first dimension, and the ratio of the first dimension to the width of the detection ring is greater than 3;

[0016] The detection ring width is the dimension of the orthographic projection of the detection ring on the substrate structure in a direction perpendicular to the extension direction of the detection ring;

[0017] The dimension of the detection strip along the thickness direction of the substrate structure is a second dimension, and the ratio of the second dimension to the width of the detection strip is greater than 3:

[0018] The width of the detection strip is the dimension of the orthographic projection of the detection strip on the substrate structure in a direction perpendicular to the extension direction of the detection strip.

[0019] In one of the embodiments, the side length of the polygon is not less than the width of the detection ring;

[0020] And / or, the dimension of the detection strip along its own extension direction is a third dimension, and the third dimension is not less than the width of the detection strip; the side length of the polygon is greater than the third dimension;

[0021] and / or, the detection ring width is not less than the detection strip width;

[0022] and / or, the detection strip has a width greater than 1 μm;

[0023] And / or, the detection ring width is greater than 1 μm.

[0024] In one of the embodiments, the orthographic projection shape of the detection ring on the substrate structure is a regular polygon.

[0025] In one embodiment, the substrate structure includes a base and a dielectric layer which are stacked, and the pattern structure is arranged on a side of the dielectric layer away from the base.

[0026] In a second aspect, an embodiment of the present application provides a defect detection method for a semiconductor process tool, the defect detection method for a semiconductor process tool comprising:

[0027] Providing a semiconductor structure as claimed in any one of claims 1 to 12;

[0028] Placing the semiconductor structure in a chamber of the semiconductor process machine and adjusting the chamber environment according to preset process parameters so that the chamber environment acts on the semiconductor structure;

[0029] The performance parameters of the semiconductor process tool are determined based on the semiconductor structure after the action.

[0030] The defect detection method for a semiconductor process machine provided in the embodiment of the present application is carried out by placing the semiconductor structure in the embodiment of the first aspect in the cavity of the semiconductor process machine, and further adjusting the cavity environment according to preset process parameters so that the cavity environment acts on the semiconductor structure. When there is a micro-airflow defect in the cavity environment, the micro-airflow defect can act on the semiconductor structure, causing the detection ring of the semiconductor structure to collapse. Therefore, the flow direction and / or trajectory of the micro-airflow can be simulated (or detected) by the collapse direction of the edge of the detection ring. In this way, equipment personnel can quickly determine the location of the micro-airflow defect of the semiconductor process machine, which is convenient for targeted adjustment of the semiconductor process machine, thereby helping to improve the yield of semiconductor products. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the drawings required for use in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1A and Figure 1B A schematic diagram of a semiconductor intermediate product that has pattern damage defects caused by a micro-airflow provided in an embodiment of the present application.

[0033] Figure 2 A schematic diagram of the cross-sectional structure of a semiconductor structure provided in an embodiment of the present application.

[0034] Figure 3 for Figure 2 A schematic top view of the pattern structure of the semiconductor structure shown.

[0035] Figure 4 A schematic top view of another semiconductor structure provided by an embodiment of the present application.

[0036] Figure 5A for Figure 2 A schematic diagram of the collapse of the semiconductor structure shown.

[0037] Figure 5B for Figure 2 Another schematic diagram of the collapse of the semiconductor structure shown.

[0038] Figure 6 A schematic flow chart of a defect detection method for a semiconductor process tool provided in an embodiment of the present application.

[0039] Figure 7-Figure 11 for Figure 2 Schematic diagram of the structure of the semiconductor structure shown in the process of applying it to detect carbon-based particles.

[0040] Fig.12 for Figure 2 Schematic diagram of the principle of using the semiconductor structure shown to detect carbon-based particles.

[0041] Reference numerals:

[0042] 1', Graphic damage defect;

[0043] 10. Semiconductor structure; 11. Substrate structure; 111. Base; 112. Dielectric layer; 12. Pattern structure; 121. Detection ring; 122. Detection strip; 1221. First detection strip; 1222. Second detection strip; 20. Carbon-based particles. DETAILED DESCRIPTION

[0044] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0046] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type or part discussed below can be represented as a second element, component, region, layer or part.

[0047] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0048] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0049] Embodiments of the application are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the application, so that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the application should not be limited to the specific shapes of the zones shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the application.

[0050] As described in the background technology, the micro-airflow defects of semiconductor process equipment affect the product yield of semiconductors. After research, the applicant found that the cause of micro-airflow defects is that the performance of the semiconductor process equipment outlet deteriorates, resulting in concentrated airflow in some areas. Figure 1A and Figure 1B As shown, the micro-airflow acts on the semiconductor intermediate product, causing local pattern collapse and generating pattern damage defects 1'. The pattern damage defects 1' reduce the yield of the semiconductor product.

[0051] In view of the above problems, the embodiments of the present application provide a semiconductor structure and a semiconductor process machine. When performing defect detection on the semiconductor process machine, the semiconductor structure provided by the embodiments of the present application is placed in the cavity of the semiconductor process machine for simulation. Therefore, the flow direction and / or trajectory of the micro-airflow can be simulated (or detected) by detecting the collapse direction of the edge of the detection ring. In this way, equipment personnel can quickly determine the location of the micro-airflow defect of the semiconductor process machine, which is convenient for targeted adjustments to the semiconductor process machine, thereby helping to improve the yield of semiconductor products.

[0052] First, refer to Figure 2 and Figure 3 As shown, an embodiment of the present application provides a semiconductor structure 10 for detecting defects in a semiconductor process tool. The semiconductor structure 10 includes a substrate structure 11 and at least one pattern structure 12 .

[0053] Specifically, the at least one pattern structure 12 is disposed on the substrate structure 11. The pattern structure 12 includes a detection ring 121, and the orthographic projection shape of the detection ring 121 on the substrate structure 11 is a polygon, and the number of sides of the polygon is not less than five.

[0054] Here, "the shape of the positive projection of the detection ring 121 on the substrate structure 11 is a polygon" means that the shape of the detection ring 121 is a polygonal ring structure, for example: a pentagonal ring, a hexagonal ring, a heptagonal ring, an octagonal ring, etc. It should be noted that by setting the detection ring 121 as a polygonal ring structure, the force between adjacent sides of the ring structure can be made smaller, which is conducive to the collapse of a certain side. Exemplarily, when the micro-airflow flows along a certain direction and acts on a certain side of the detection ring 121, the side collapses, so that the flow direction and / or trajectory of the micro-airflow can be determined. It should also be noted that by making the number of sides of the polygon not less than five, the detection ring 121 can at least detect the flow of the micro-airflow in five directions, so that the detection (or simulation) of the micro-airflow is more accurate.

[0055] The semiconductor structure 10 provided in the embodiment of the present application is provided with at least one pattern structure 12 on the substrate structure 11, and the pattern structure 12 includes a detection ring 121 in the shape of a polygon. In this way, when performing defect detection on a semiconductor process machine, the semiconductor structure 10 is placed in the cavity of the semiconductor process machine for simulation, so that the flow direction and / or trajectory of the micro-airflow can be simulated (or detected) by the collapse direction of the edge of the detection ring 121. In this way, equipment personnel can quickly determine the location of the micro-airflow defect of the semiconductor process machine, which is convenient for targeted adjustment of the semiconductor process machine, thereby facilitating the improvement of the yield of semiconductor products.

[0056] Reference Figure 4 As shown, it can be understood that a plurality of pattern structures 12 can be provided on the same substrate structure 11, and the plurality of pattern structures 12 can be arranged on the substrate structure 11 according to actual conditions. The embodiment of the present application does not limit the number of pattern structures 12.

[0057] In one embodiment, referring to Figure 3 As shown, the pattern structure 12 also includes at least one detection strip 122, and the detection ring 121 is arranged around the periphery of the at least one detection strip 122. By setting the detection strip 122, the flow direction and / or trajectory of the micro-airflow inside the detection ring 121 can be further detected (or simulated) by the collapse direction of the detection strip 122, so that the detection (or simulation) of the micro-airflow is more accurate. It can be understood that since a detection strip 122 generally has two collapse directions, that is, the detection strip 122 collapses on both sides along its own width direction, a detection strip 122 can only detect the flow of the micro-airflow in two directions in a local area.

[0058] In one embodiment, referring to Figure 3As shown, the pattern structure 12 includes a plurality of detection bars 122, which are arranged at intervals inside a detection ring 121, that is, the detection ring 121 is arranged around the periphery of the plurality of detection bars 122. Among the plurality of detection bars 122 of the same pattern structure 12, the extension directions of at least two detection bars 122 intersect.

[0059] Here, by making the extension directions of at least two detection strips 122 intersect, the flow of the micro-airflow in at least four directions can be detected by the detection strips 122. In addition, by providing multiple detection strips 122, it is helpful to detect the flow of the micro-airflow in a larger area, which is conducive to more accurately detecting the flow of the micro-airflow inside the detection ring 121.

[0060] In one embodiment, referring to Figure 3 As shown, the plurality of detection strips 122 include two first detection strips 1221 and two second detection strips 1222. The first detection strip 1221 extends along a first direction X, and the second detection strip 1222 extends along a second direction Y. The first direction X intersects with the second direction Y. The two first detection strips 1221 are arranged at intervals along the second direction Y, and the two second detection strips 1222 are arranged at intervals along the first direction X. It is understandable that the shapes of the first detection strip 1221 and the second detection strip 1222 may be the same.

[0061] In the embodiment of the present application, the first detection strip 1221 can detect the flow of the micro-airflow in the local area along the second direction Y. By setting the two first detection strips 1221 at intervals, it is convenient to detect the flow of the micro-airflow in two different areas along the second direction Y. The second detection strip 1222 can detect the flow of the micro-airflow in the local area along the first direction X. By setting the two second detection strips 1222 at intervals, it is convenient to detect the flow of the micro-airflow in the first direction X in two different areas.

[0062] In one embodiment, along the second direction Y, the orthographic projections of the two first detection strips 1221 on the detection ring 121 do not overlap. It is understandable that, since the length of the first detection strips 1221 is limited, by making the orthographic projections of the two first detection strips 1221 along the second direction Y not overlap, the area of ​​the first detection strips 1221 detecting gas flow can be made larger.

[0063] In one embodiment, along the first direction X, the orthographic projections of the two second detection strips 1222 on the detection ring 121 do not overlap. It is understandable that, since the length of the second detection strips 1222 is limited, by making the orthographic projections of the two second detection strips 1222 along the first direction X not overlap, the area of ​​the second detection strips 1222 detecting gas flow can be made larger.

[0064] In one embodiment, the two first detection bars 1221 are located on both sides of the center of the detection ring 121 along the second direction Y. The two second detection bars 1222 are located on both sides of the center of the detection ring 121 along the first direction X, wherein the first direction X is perpendicular to the second direction Y. That is, the two first detection bars 1221 and the two second detection bars 1222 are arranged around the periphery of a virtual circle c, the extension direction of the first detection bars 1221 is tangent to the virtual circle c, the extension direction of the second detection bars 1222 is tangent to the virtual circle c, and the center of the virtual circle coincides with the center of the detection ring 121.

[0065] By arranging the detection strips 122 in the above manner, on the one hand, the arrangement of the detection strips 122 can be made more regular, reducing the difficulty of setting the detection strips 122; on the other hand, it is conducive to detecting the micro-airflow with eddy currents and improving the accuracy of micro-airflow detection.

[0066] Specifically, in one example, see Figure 5A As shown, the micro-airflow flows in the Z1 direction, and the edge of the detection ring 121, the first detection strip 1221 and the second detection strip 1222 in the Z1 flow direction all collapse. The process personnel can infer the flow trajectory of the micro-airflow through the collapse direction. In another example, please refer to Figure 5B As shown, the micro-airflow flows along the Z2 direction, and the edge of the detection ring 121 and the first detection strip 1221 in the Z2 flow direction collapse. The process personnel can infer the flow trajectory of the micro-airflow through the collapse direction.

[0067] In one embodiment, referring to Figure 2 As shown, the dimension of the detection ring 121 along the thickness direction of the substrate structure 11 is a first dimension H1, and the ratio of the first dimension H1 to the detection ring width W1 is greater than 3. The detection ring width W1 is the dimension of the orthographic projection of the detection ring 121 on the substrate structure 11 in a direction perpendicular to the extension direction of the detection ring 121.

[0068] Exemplarily, the ratio of the first size H1 to the detection ring width W1 may be 3.5, 4, 5, 6, 8 or 10.

[0069] By making the ratio of the first dimension H1 to the detection ring width W1 within the above range, the edge of the detection ring 121 is easily collapsed after being affected by the micro-airflow, so that the process personnel can infer the flow trajectory of the micro-airflow through the collapse direction.

[0070] Specifically, the dimension of the detection strip 122 along the thickness direction of the substrate structure 11 is a second dimension (not shown in the figure), and the ratio of the second dimension to the detection strip width W2 is greater than 3. The detection strip width is the dimension of the orthographic projection of the detection strip 122 on the substrate structure 11 in a direction perpendicular to the extension direction of the detection strip 122.

[0071] Exemplarily, the ratio of the second size to the detection strip width W2 may be 3.5, 4, 5, 6, 8 or 10.

[0072] By making the ratio of the second size to the detection strip width W2 within the above range, the detection strip 122 is prone to collapse after being affected by the micro-airflow, so that the process personnel can infer the flow trajectory of the micro-airflow through the collapse direction.

[0073] It can be understood that the first size H1 and the second size can be equal, and the embodiment of the present application does not limit the sizes of the first size H1 and the second size.

[0074] In one embodiment, the side length L1 of the polygon is not less than the detection ring width W1. In this way, the side of the detection ring 121 is easy to collapse after being affected by the micro-airflow, so that the process personnel can infer the flow trajectory of the micro-airflow through the collapse direction.

[0075] In one embodiment, the dimension of the detection strip 122 along its own extension direction is a third dimension L2, and the third dimension L2 is not less than the detection strip width W2. In this way, the edge of the detection strip 122 is easily collapsed after being affected by the micro-airflow, so that the process personnel can easily infer the flow trajectory of the micro-airflow through the collapse direction.

[0076] In one embodiment, the side length L1 of the polygon is greater than the third dimension L2. In this way, the detection strip 122 can be disposed in the space surrounded by the detection ring 121.

[0077] In one embodiment, the detection ring width W1 is not less than the detection strip width W2, that is, the detection ring width W1 is greater than or equal to the detection strip width W2.

[0078] In one embodiment, the detection strip width W2 is greater than 1 μm. For example, the detection strip width W2 may be 1.5 μm, 2 μm, 3 μm, or 3.5 μm.

[0079] In one embodiment, the detection ring width W1 is greater than 1 μm. For example, the detection ring width W1 may be 1.5 μm, 2 μm, 3 μm or 3.5 μm.

[0080] By making the values ​​of the detection ring width W1 and the detection strip width W2 within the above range, the graphic parameters of the pattern structure 12 can be made closer to the graphic parameters in the semiconductor product manufacturing process, thereby more accurately simulating the adverse effects of micro-airflow defects on the semiconductor product yield.

[0081] In one embodiment, the positive projection shape of the detection ring 121 on the substrate structure 11 is a regular polygon. In this way, the structural shape of the detection ring 121 can be made more regular, and the difficulty of manufacturing the detection ring 121 can be reduced.

[0082] In one embodiment, referring to Figure 3 As shown in FIG. 1 , the positive projection shape of the detection ring 121 on the substrate structure 11 is a regular octagon. In this way, the semiconductor structure 10 can detect the flow of micro-airflow in eight directions. Figure 3 Taking the directions in the figure as an example, each side represents a direction. Relative to the center of the regular octagon, the eight sides can be equivalent to the following directions: east, west, south, north, northeast, southeast, northwest and southwest. In this way, the semiconductor structure 10 can detect the flow of micro-airflow more precisely and accurately.

[0083] In one embodiment, referring to Figure 2 As shown, the substrate structure 11 includes a stacked base 111 and a dielectric layer 112, and the pattern structure 12 is disposed on a side of the dielectric layer 112 away from the base 111. By disposing the dielectric layer 112, the pattern structure 12 can be formed on the substrate structure 11 relatively easily.

[0084] In one embodiment, the material of the dielectric layer 112 includes silicon oxynitride. The semiconductor structure 10 can effectively evaluate the residual defects of invisible grease and volatile carbon-containing components, and can quickly determine the location of micro-airflow defects in semiconductor process equipment.

[0085] In one embodiment, the thickness of the dielectric layer 112 is between 0.2 nm and 0.4 nm. Here, the thickness of the dielectric layer 112 is the distance between the surface of the dielectric layer 112 away from the substrate 111 and the surface of the dielectric layer 112 close to the substrate 111. Exemplarily, the thickness of the dielectric layer 112 can be 0.2 nm, 0.25 nm, 0.3 nm, 0.35 nm or 0.4 nm.

[0086] In one example, the material of the pattern structure 12 can be photoresist or anti-reflection (ARC) material. Exemplarily, the anti-reflection (ARC) material can be a bottom anti-reflection (BARC) material or a top anti-reflection (TARC) material. In this way, the semiconductor structure 10 can not only quickly determine the location of micro-airflow defects in the semiconductor process machine, but also effectively evaluate the residual defects of invisible grease and volatile carbon-containing components.

[0087] In another example, the material of the pattern structure 12 may be silicon oxynitride. In this way, the semiconductor structure 10 can quickly determine the location of micro-gas flow defects in a semiconductor process tool.

[0088] In another example, the material of the pattern structure 12 can be a conductive material. For example, the conductive material can be a metal or polysilicon doped with impurities. In this way, the semiconductor structure 10 can quickly determine the location of micro-airflow defects in a semiconductor process tool.

[0089] Second, refer to Figure 6 As shown, an embodiment of the present application provides a defect detection method for a semiconductor process tool, and the defect detection method for a semiconductor process tool includes:

[0090] S100: Provide the semiconductor structure 10 described in any embodiment of the first aspect. It should be noted that the material of the pattern structure 12 of the semiconductor structure 10 can be photoresist, anti-reflection (ARC) material, silicon oxynitride or conductive material. Exemplarily, the anti-reflection (Anti-Reflection Coating, ARC) material can be a bottom anti-reflection (Bottom Anti-Reflection Coating, BARC) material or a top anti-reflection (Top Anti-Reflection Coating, TARC) material. Exemplarily, the conductive material can be metal or polysilicon doped with impurities.

[0091] Specifically, S100 includes the following steps:

[0092] S110: Provide a substrate 111. The substrate 111 may be made of single crystal silicon, polycrystalline silicon, amorphous silicon, germanium silicon compound, silicon-on-insulator (SOI) or low temperature polysilicon (LTPS).

[0093] S120: forming a dielectric layer 112 on the substrate 111. Exemplarily, the dielectric layer 112 is made of silicon oxynitride.

[0094] S130: forming a pattern structure 12 on the dielectric layer 112. In the embodiment of the present application, the material of the pattern structure 12 is photoresist, and the photoresist is exposed and developed to obtain the pattern structure 12. In this way, the manufacturing cost of the semiconductor structure 10 can be lowered.

[0095] S200: placing the semiconductor structure 10 in a cavity of a semiconductor process machine, and adjusting the cavity environment according to preset process parameters so that the cavity environment acts on the semiconductor structure 10. Here, it should be noted that the preset process parameters refer to the process parameters used by the semiconductor process machine when manufacturing semiconductor products. Exemplarily, the process parameters can make the cavity reach a specific vacuum pressure, or can make the cavity be filled with an inert gas of a specific pressure.

[0096] S300: Determine performance parameters of a semiconductor process tool based on the semiconductor structure 10 after the operation.

[0097] Specifically, the semiconductor structure 10 may be scanned by a scanning electron microscope to obtain a surface image of the semiconductor structure 10 , and the collapsed state of the pattern structure 12 may be obtained based on the surface image, thereby determining the flow direction and / or trajectory of the micro-airflow according to the collapse direction.

[0098] The defect detection method of the semiconductor process machine provided in the embodiment of the present application is to place the semiconductor structure 10 in the cavity of the semiconductor process machine, and further adjust the cavity environment according to the preset process parameters so that the cavity environment acts on the semiconductor structure 10. When there is a micro-airflow defect in the cavity environment, the micro-airflow defect can act on the semiconductor structure 10, causing the detection ring 121 of the semiconductor structure 10 to collapse. Therefore, the flow direction and / or trajectory of the micro-airflow can be simulated (or detected) by the collapse direction of the edge of the detection ring 121. In this way, the equipment personnel can quickly determine the location of the micro-airflow defect of the semiconductor process machine, which is convenient for targeted adjustment of the semiconductor process machine, thereby helping to improve the yield of semiconductor products. This method is applicable to all measurement machines, can quickly lock the problem, and provide engineers with a complete and comprehensive reference for engineering analysis.

[0099] It should be noted that, in combination with what is shown in Table 1, the inventors respectively used the semiconductor structure 10 in the embodiment of the present application and the semiconductor structure 10 in the related technology to conduct process tests on the micro-airflow defects of the semiconductor process machine. Through data analysis, it was found that the semiconductor structure 10 provided in the embodiment of the present application is more sensitive in detecting the direction of micro-airflow defects and has higher detection accuracy.

[0100] Table 1

[0101]

[0102] It should be understood that, in the embodiments of the present application, although the various steps in the flowchart of the accompanying drawings are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the accompanying drawings may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the steps or stages in other steps.

[0103] In a third aspect, the embodiments of the present application provide a method for detecting carbon-based defects in a semiconductor process tool using the semiconductor structure 10 described in the above embodiments.

[0104] Combination Figure 7-10 Specifically, the steps include:

[0105] S10: Provide a substrate 111. The substrate 111 may be made of single crystal silicon, polycrystalline silicon, amorphous silicon, germanium silicon compound, silicon-on-insulator (SOI) or low temperature polysilicon (LTPS).

[0106] S20: Depositing a dielectric layer 112 on the substrate 111 to form a substrate structure 11. Exemplarily, the dielectric layer 112 is made of silicon oxynitride. Figure 7-Figure 8 It is a schematic diagram of the cross-sectional structure during the formation of the substrate structure 11.

[0107] S30: placing the substrate structure 11 in a chamber of a semiconductor process machine, so that the substrate structure 11 is fully exposed to the environment of the chamber. Fig. 9 As shown, when there are free carbon-based particles 20 in the chamber of the semiconductor process tool, the free carbon-based particles 20 will adhere to the surface of the dielectric layer 112 .

[0108] S40: forming a pattern structure 12 on the surface of the dielectric layer 112. In the embodiment of the present application, the material of the pattern structure 12 is photoresist, and the photoresist is exposed and developed to obtain the pattern structure 12. In this way, the manufacturing cost of the semiconductor structure 10 can be lowered.

[0109] Reference Fig.10 and Fig.11 As shown, due to the adhesion force and surface tension between the carbon-based particles 20 and the pattern structure 12, the pattern structure 12 on the surface of the dielectric layer 112 where the carbon-based particles 20 exist collapses.

[0110] Specifically, refer to Fig.12 As shown, when the carbon-based particles 20 remain on the surface of the dielectric layer 112, the silicon bonds are bonded to the carbon bonds, resulting in that after the pattern structure 12 (photoresist) is coated, the carbon bonds in the pattern structure 12 cannot be bonded to the silicon bonds, forming hydrophobic silane ethers, causing the pattern structure 12 (photoresist) to collapse (PR Peeling).

[0111] S50: Acquire a surface image of the pattern structure 12 through a scanning electron microscope, and determine performance parameters of the semiconductor process tool based on the surface image.

[0112] Specifically, the number of defects on the semiconductor structure 10 can be obtained through the surface image, and the impact of the defects on the semiconductor product can be judged according to the number of defects, thereby determining whether the performance of the semiconductor process tool meets the requirements.

[0113] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0114] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A semiconductor structure for detecting defects in a semiconductor process machine, characterized in that: include: Substrate structure; At least one pattern structure is arranged on the substrate structure; wherein the pattern structure includes a detection ring, the orthographic projection shape of the detection ring on the substrate structure is a polygon, and the number of sides of the polygon is not less than five.

2. The semiconductor structure according to claim 1, characterized in that: The pattern structure further includes at least one detection strip, and the detection ring is disposed around the periphery of the at least one detection strip.

3. The semiconductor structure according to claim 2, characterized in that: The pattern structure includes a plurality of detection bars, and the plurality of detection bars are arranged at intervals on the inner side of the detection ring; Among the plurality of detection strips, extension directions of at least two of the detection strips intersect.

4. The semiconductor structure according to claim 3, characterized in that: The plurality of detection strips include two first detection strips and two second detection strips; the first detection strips extend along a first direction, and the second detection strips extend along a second direction; the first direction intersects with the second direction; The two first detection strips are arranged at intervals along the second direction, and the two second detection strips are arranged at intervals along the first direction.

5. The semiconductor structure according to claim 4, characterized in that: The two first detection bars are located on both sides of the center of the detection ring along the second direction; the two second detection bars are located on both sides of the center of the detection ring along the first direction; the first direction is perpendicular to the second direction; The two first detection strips and the two second detection strips are arranged on the outer circumference of a virtual circle, the extension direction of the first detection strip is tangent to the virtual circle, the extension direction of the second detection strip is tangent to the virtual circle, and the center of the virtual circle coincides with the center of the detection ring.

6. The semiconductor structure according to claim 2, characterized in that: The dimension of the detection ring along the thickness direction of the substrate structure is a first dimension, and the ratio of the first dimension to the width of the detection ring is greater than 3; The detection ring width is the dimension of the orthographic projection of the detection ring on the substrate structure in a direction perpendicular to the extension direction of the detection ring; The dimension of the detection strip along the thickness direction of the substrate structure is a second dimension, and the ratio of the second dimension to the width of the detection strip is greater than 3; The width of the detection strip is the dimension of the orthographic projection of the detection strip on the substrate structure in a direction perpendicular to the extension direction of the detection strip.

7. The semiconductor structure according to claim 2, characterized in that: The side length of the polygon is not less than the width of the detection ring; And / or, the dimension of the detection strip along its own extension direction is a third dimension, and the third dimension is not less than the width of the detection strip; the side length of the polygon is greater than the third dimension; and / or, the detection ring width is not less than the detection strip width; and / or, the detection strip has a width greater than 1 μm; And / or, the detection ring width is greater than 1 μm.

8. The semiconductor structure according to claim 1, characterized in that: The orthographic projection shape of the detection ring on the substrate structure is a regular polygon.

9. The semiconductor structure according to claim 1, characterized in that: The substrate structure comprises a base and a dielectric layer which are stacked, and the pattern structure is arranged on a side of the dielectric layer away from the base.

10. A defect detection method for a semiconductor process machine, characterized in that: include: Providing a semiconductor structure according to any one of claims 1 to 9; Placing the semiconductor structure in a chamber of the semiconductor process machine and adjusting the chamber environment according to preset process parameters so that the chamber environment acts on the semiconductor structure; The performance parameters of the semiconductor process tool are determined based on the semiconductor structure after the action.

Images