Driving circuit of insulated gate bipolar transistor

Abstract

The invention provides a driving circuit of an insulated gate bipolar transistor, and relates to the technical field of insulated gate bipolar transistors, a square wave signal is inverted and delayed through an inverted delay module, a processed signal is generated, then a first narrow pulse signal is generated through a first generation module according to the square wave signal and the processed signal, and a second narrow pulse signal is generated through a second generation module. A second narrow pulse signal is generated through a second generation module according to the square wave signal and the processed signal, the voltage of the first narrow pulse signal is boosted through an output module to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is boosted to generate a fourth narrow pulse signal; and generating a control signal for driving the insulated gate bipolar transistor according to the third narrow pulse signal and the fourth narrow pulse signal, and since the duty ratio of the narrow pulse signal is smaller than that of the square wave signal, compared with the voltage conversion realized through the square wave signal in the prior art, the voltage conversion realized through the narrow pulse signal has the advantage that the voltage conversion efficiency is improved. And heat loss generated by devices in the driving circuit is reduced.

Description

Technical Field

[0001] The present application belongs to the technical field of insulated gate bipolar transistors, and in particular relates to a driving circuit of an insulated gate bipolar transistor. Background Art

[0002] The insulated gate bipolar transistor (IGBT) is in the high voltage domain, and driving the IGBT requires a high voltage (e.g., 6-15 volts) control signal, while the microcontroller unit (MCU) is in the low voltage domain and provides a low voltage (e.g., 3.3 volts) pulse width modulation (PWM) square wave signal.

[0003] In the prior art, a low-voltage square wave signal output by a microcontroller unit is directly converted into a high-voltage control signal required to drive an insulated gate bipolar transistor through a voltage conversion circuit.

[0004] However, in the process of directly converting a low-voltage square wave signal into a high-voltage control signal required to drive an insulated gate bipolar transistor, a large amount of heat loss is generated by the devices in the voltage conversion circuit. Summary of the invention

[0005] The present application aims to provide a driving circuit for an insulated gate bipolar transistor, which at least solves the problem of large heat loss generated by devices in the voltage conversion circuit in the process of directly converting a low-voltage square wave signal into a high-voltage control signal required to drive the insulated gate bipolar transistor in the prior art.

[0006] In order to solve the above technical problems, this application is implemented as follows:

[0007] The embodiment of the present application provides a driving circuit of an insulated gate bipolar transistor, including an inverting delay module, a first generating module, a second generating module and an output module;

[0008] The inversion delay module is electrically connected to the first generation module and the second generation module respectively, and the inversion delay module is used to receive a square wave signal, and invert and delay the square wave signal to generate a processed signal;

[0009] The first generating module is electrically connected to the output module, and is used to receive the square wave signal, and generate a first narrow pulse signal for characterizing a rising edge of the square wave signal according to the square wave signal and the processed signal;

[0010] The second generating module is electrically connected to the output module, and is used to receive the square wave signal and generate a second narrow pulse signal for characterizing the falling edge of the square wave signal according to the square wave signal and the processed signal;

[0011] The output module is used to increase the voltage of the first narrow pulse signal to generate a third narrow pulse signal, and to increase the voltage of the second narrow pulse signal to generate a fourth narrow pulse signal, and to generate a control signal for driving an insulated gate bipolar transistor based on the third narrow pulse signal and the fourth narrow pulse signal.

[0012] In an embodiment of the present application, a square wave signal is received through an inverting delay module, and the square wave signal is inverted and delayed to generate a processed signal. Then, the square wave signal is received through a first generating module, and a first narrow pulse signal for characterizing the rising edge of the square wave signal is generated according to the square wave signal and the processed signal. The square wave signal is received through a second generating module, and a second narrow pulse signal for characterizing the falling edge of the square wave signal is generated according to the square wave signal and the processed signal. Then, the voltage of the first narrow pulse signal is increased through an output module to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal. In addition, a control signal for driving an insulated gate bipolar transistor is generated according to the third narrow pulse signal and the fourth narrow pulse signal. In this process, since the duty cycle of the narrow pulse signal is smaller than the duty cycle of the square wave signal, compared with the voltage conversion achieved by the square wave signal in the prior art, the voltage conversion achieved by the narrow pulse signal reduces the heat loss generated by the devices in the driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0014] Figure 1 is a schematic diagram of a driving circuit of an insulated gate bipolar transistor provided in an embodiment of the present application;

[0015] Figure 2 is a specific schematic diagram of a driving circuit of an insulated gate bipolar transistor provided in an embodiment of the present application;

[0016] Figure 3 is a specific schematic diagram of another driving circuit of an insulated gate bipolar transistor provided in an embodiment of the present application;

[0017] Figure 4is a timing diagram of a driving circuit of an insulated gate bipolar transistor provided in an embodiment of the present application;

[0018] Figure 5 It is a schematic diagram of the driving process of the insulated gate bipolar transistor provided in an embodiment of the present application.

[0019] Reference numerals:

[0020] 10-inverting delay module; 11-first inverting delay submodule; 111-first delay unit; 12-second inverting delay submodule; 121-second delay unit; 13-delay submodule; 20-first generation module; 30-second generation module; 40-output module; 41-voltage conversion submodule; 42-output submodule; F1-first inverter; F2-second inverter; F3-third inverter; R1-first resistor; R2-second resistor; R3-third resistor; C1-first capacitor; C2-second capacitor; C3-third capacitor; M1-AND gate device; M2-NOR gate device. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0023] Reference Figure 1The embodiment of the present application provides a driving circuit of an insulated gate bipolar transistor, including an inverting delay module 10, a first generating module 20, a second generating module 30 and an output module 40; the inverting delay module 10 is electrically connected to the first generating module 20 and the second generating module 30 respectively, the inverting delay module 10 is used to receive a square wave signal, and invert and delay the square wave signal to generate a processed signal; the first generating module 20 is electrically connected to the output module 40, the first generating module 20 is used to receive the square wave signal, and generate a signal for characterizing the square wave signal and the processed signal according to the square wave signal and the processed signal. The first narrow pulse signal of the rising edge of the square wave signal; the second generating module 30 is electrically connected to the output module 40, the second generating module 30 is used to receive the square wave signal, and generate a second narrow pulse signal for characterizing the falling edge of the square wave signal according to the square wave signal and the processed signal; the output module 40 is used to increase the voltage of the first narrow pulse signal to generate a third narrow pulse signal, and increase the voltage of the second narrow pulse signal to generate a fourth narrow pulse signal, and generate a control signal for driving an insulated gate bipolar transistor according to the third narrow pulse signal and the fourth narrow pulse signal.

[0024] It should be noted that the control signal for driving the insulated gate bipolar transistor is used to be input into the gate of the insulated gate bipolar transistor.

[0025] The voltage of the square wave signal, the voltage of the processed signal, the voltage of the first narrow pulse signal, and the voltage of the second narrow pulse signal are all the first voltage (for example, 15 volts), the voltage of the third narrow pulse signal, the voltage of the fourth narrow pulse signal, and the voltage of the control signal for driving the insulated gate bipolar transistor are all the second voltage (for example, 615 volts).

[0026] The duty cycle of the first narrow pulse signal, the duty cycle of the second narrow pulse signal, the duty cycle of the third narrow pulse signal and the duty cycle of the fourth narrow pulse signal are all the first duty cycle, the duty cycle of the square wave signal and the duty cycle of the control signal for driving the insulated gate bipolar transistor are all the second duty cycle, wherein the first duty cycle is smaller than the second duty cycle.

[0027] The square wave signal is a pulse width modulated signal; specifically, in some embodiments, the driving circuit of the insulated gate bipolar transistor also includes a filtering module and a voltage conversion module, the filtering module is used to be electrically connected to the micro control unit, the filtering module is electrically connected to the voltage conversion module, and the voltage conversion module is electrically connected to the inverting delay module 10, the first generating module 20 and the second generating module 30 respectively; the filtering module is used to filter the initial square wave signal output by the micro control unit to generate a filtered square wave signal, wherein the initial square wave signal is a pulse width modulated signal of a low voltage (for example, 3.3 volts); the voltage conversion module is used to increase the voltage of the filtered square wave signal to generate a square wave signal.

[0028] Since the larger the duty cycle of the signal in the circuit, the longer the time the current is generated in the circuit, the greater the heat loss caused by the signal current passing through the devices in the circuit. Therefore, compared with the square wave signal, since the duty cycle of the narrow pulse signal is smaller than the duty cycle of the square wave signal, the heat loss caused by the current of the narrow pulse signal passing through the devices in the circuit during the voltage conversion through the narrow pulse signal is smaller than the heat loss caused by the current of the square wave signal passing through the devices in the circuit during the voltage conversion through the square wave signal.

[0029] In the embodiment of the present application, a square wave signal is received through an inverting delay module 10, and the square wave signal is inverted and delayed to generate a processed signal. Then, the square wave signal is received through a first generating module 20, and a first narrow pulse signal for characterizing the rising edge of the square wave signal is generated according to the square wave signal and the processed signal. The square wave signal is received through a second generating module 30, and a second narrow pulse signal for characterizing the falling edge of the square wave signal is generated according to the square wave signal and the processed signal. Then, the voltage of the first narrow pulse signal is increased through an output module 40 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal. In addition, a control signal for driving an insulated gate bipolar transistor is generated according to the third narrow pulse signal and the fourth narrow pulse signal. In this process, since the duty cycle of the narrow pulse signal is smaller than the duty cycle of the square wave signal, compared with the voltage conversion achieved by the square wave signal in the prior art, the voltage conversion achieved by the narrow pulse signal reduces the heat loss generated by the devices in the driving circuit.

[0030] Optionally, refer to Figure 2In some embodiments, the inverting delay module 10 includes a first inverting delay submodule 11 and a second inverting delay submodule 12; the first inverting delay submodule 11 is electrically connected to the first generating module 20, and the first inverting delay submodule 11 is used to receive the square wave signal, and invert and delay the square wave signal to generate the processed signal; the second inverting delay submodule 12 is electrically connected to the second generating module 30, and the second inverting delay submodule 12 is used to receive the square wave signal, and invert and delay the square wave signal to generate the processed signal.

[0031] It should be noted that the signal generated by inverting and delaying the square wave signal by the first inversion and delay submodule 11 is the same as the signal generated by inverting and delaying the square wave signal by the second inversion and delay submodule 12 , and both are processed signals.

[0032] In an embodiment of the present application, a square wave signal is received by a first inversion delay submodule 11, and the square wave signal is inverted and delayed to generate a processed signal, so that the first generation module 20 can generate a first narrow pulse signal for characterizing the rising edge of the square wave signal based on the square wave signal and the processed signal; a square wave signal is received by a second inversion delay submodule 12, and the square wave signal is inverted and delayed to generate a processed signal, so that the second generation module 30 can generate a second narrow pulse signal for characterizing the falling edge of the square wave signal based on the square wave signal and the processed signal.

[0033] In this process, since the process in which the first inversion delay submodule 11 inverts and delays the square wave signal to generate a processed signal and the process in which the second inversion delay submodule 12 inverts and delays the square wave signal to generate a processed signal are independent of each other, the acquisition of the processed signal by the first generation module 20 and the acquisition of the processed signal by the second generation module 30 are independent of each other.

[0034] Optionally, in some embodiments, the first inversion delay submodule 11 includes a first inverter F1 and a first delay unit 111; the first inverter F1 is electrically connected to the first delay unit 111, and the first inverter F1 is used to receive the square wave signal and invert the square wave signal to generate a first inverted signal; the first delay unit 111 is electrically connected to the first generating module 20, and the first delay unit 111 is used to delay the first inverted signal to generate the processed signal.

[0035] In the embodiment of the present application, a square wave signal is received by the first inverter F1, and the square wave signal is inverted to generate a first inverted signal, and then the first inverted signal is delayed by the first delay unit 111 to generate a processed signal, so that the first generating module 20 can generate a first narrow pulse signal for characterizing the rising edge of the square wave signal based on the square wave signal and the processed signal.

[0036] Optionally, in some embodiments, the first delay unit 111 includes a first resistor R1 and a first capacitor C1; the input end of the first inverter F1 is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the first inverter F1 is electrically connected to the first end of the first resistor R1; the square wave signal receiving end is used to receive the square wave signal; the second end of the first resistor R1 is electrically connected to the first end of the first capacitor C1 and the first input end of the first generating module 20, respectively; the second end of the first capacitor C1 is grounded; the second input end of the first generating module 20 is electrically connected to the square wave signal receiving end.

[0037] It should be noted that the first resistor R1 and the first capacitor C1 form a resistor-capacitor (RC) filter, which is used to delay the first inverted signal to generate a processed signal.

[0038] In the embodiment of the present application, a square wave signal is received by a square wave signal receiving end, so that the first inverter F1 inverts the square wave signal to generate a first inverted signal, and then the first inverted signal is delayed by the cooperation of the first resistor R1 and the first capacitor C1 to generate a processed signal, so that the first generating module 20 can generate a first narrow pulse signal for characterizing the rising edge of the square wave signal based on the square wave signal and the processed signal.

[0039] Optionally, in some embodiments, the second inversion delay submodule 12 includes a second inverter F2 and a second delay unit 121; the second inverter F2 is electrically connected to the second delay unit 121, and the second inverter F2 is used to receive the square wave signal and invert the square wave signal to generate a second inverted signal; the second delay unit 121 is electrically connected to the second generating module 30, and the second delay unit 121 is used to delay the second inverted signal to generate the processed signal.

[0040] In the embodiment of the present application, a square wave signal is received by the second inverter F2, and the square wave signal is inverted to generate a second inverted signal, and then the second inverted signal is delayed by the second delay unit 121 to generate a processed signal, so that the second generating module 30 can generate a second narrow pulse signal for characterizing the falling edge of the square wave signal based on the square wave signal and the processed signal.

[0041] Optionally, in some embodiments, the second delay unit 121 includes a second resistor R2 and a second capacitor C2; the input end of the second inverter F2 is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the second inverter F2 is electrically connected to the first end of the second resistor R2; the square wave signal receiving end is used to receive the square wave signal; the second end of the second resistor R2 is electrically connected to the first end of the second capacitor C2 and the first input end of the second generating module 30 respectively; the second end of the second capacitor C2 is grounded; the second input end of the second generating module 30 is electrically connected to the square wave signal receiving end.

[0042] It should be noted that the second resistor R2 and the second capacitor C2 form a resistor-capacitor (RC) filter, which is used to delay the second inverted signal to generate a processed signal.

[0043] In the embodiment of the present application, a square wave signal is received by a square wave signal receiving end, so that the second inverter F2 inverts the square wave signal to generate a second inverted signal, and then the second inverted signal is delayed by the cooperation of the second resistor R2 and the second capacitor C2 to generate a processed signal, so that the second generating module 30 can generate a second narrow pulse signal for characterizing the falling edge of the square wave signal based on the square wave signal and the processed signal.

[0044] Optionally, refer to Figure 3 In some embodiments, the inversion delay module 10 includes a third inverter F3 and a delay submodule 13; the third inverter F3 is electrically connected to the delay submodule 13, and the third inverter F3 is used to receive the square wave signal and invert the square wave signal to generate a third inverted signal; the delay submodule 13 is electrically connected to the first generation module 20 and the second generation module 30 respectively, and the delay submodule 13 is used to delay the third inverted signal to generate the processed signal.

[0045] In an embodiment of the present application, a square wave signal is received by a third inverter F3, and the square wave signal is inverted to generate a third inverted signal, and then the third inverted signal is delayed by a delay submodule 13 to generate a processed signal, so that the first generating module 20 can generate a first narrow pulse signal for characterizing the rising edge of the square wave signal based on the square wave signal and the processed signal, and the second generating module 30 can generate a second narrow pulse signal for characterizing the falling edge of the square wave signal based on the square wave signal and the processed signal.

[0046] Optionally, in some embodiments, the delay submodule 13 includes a third resistor R3 and a third capacitor C3; the input end of the third inverter F3 is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the third inverter F3 is electrically connected to the first end of the third resistor R3; the square wave signal receiving end is used to receive the square wave signal; the second end of the third resistor R3 is electrically connected to the first end of the third capacitor C3, the first input end of the first generating module 20 and the first input end of the second generating module 30 respectively; the second end of the third capacitor C3 is grounded; the second input end of the first generating module 20 is electrically connected to the square wave signal receiving end; the second input end of the second generating module 30 is electrically connected to the square wave signal receiving end.

[0047] It should be noted that the third resistor R3 and the third capacitor C3 form a resistor-capacitor (RC) filter, which is used to delay the third inverted signal to generate a processed signal.

[0048] In an embodiment of the present application, a square wave signal is received by a square wave signal receiving end, so that the third inverter F3 inverts the square wave signal to generate a third inverted signal, and then the third inverted signal is delayed by the cooperation of the third resistor R3 and the third capacitor C3 to generate a processed signal, so that the first generating module 20 generates a first narrow pulse signal for characterizing the rising edge of the square wave signal according to the square wave signal and the processed signal, and the second generating module 30 generates a second narrow pulse signal for characterizing the falling edge of the square wave signal according to the square wave signal and the processed signal.

[0049] Optionally, in some embodiments, the first generating module 20 includes an AND gate device M1; the input end of the inverting delay module 10 is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the first output end of the inverting delay module 10 is electrically connected to the first input end of the AND gate device M1; the square wave signal receiving end is used to receive the square wave signal; the second input end of the AND gate device M1 is electrically connected to the square wave signal receiving end, and the output end of the AND gate device M1 is electrically connected to the first input end of the output module 40.

[0050] It should be noted that the AND gate device M1 has a high level threshold and a low level threshold. When the voltage of the input signal of the AND gate device M1 is greater than the high level threshold of the AND gate device M1, the level of the input signal of the AND gate device M1 is a high level; when the voltage of the input signal of the AND gate device M1 is less than the low level threshold of the AND gate device M1, the level of the input signal of the AND gate device M1 is a low level.

[0051] In an embodiment of the present application, a first narrow pulse signal for characterizing the rising edge of the square wave signal is generated according to the square wave signal and the processed signal by the AND gate device M1. Specifically, when the level of the square wave signal is high and the level of the processed signal is high, the level of the first narrow pulse signal is high; when the level of the square wave signal is high and the level of the processed signal is low, the level of the first narrow pulse signal is low; when the level of the square wave signal is low and the level of the processed signal is low, the level of the first narrow pulse signal is low; when the level of the square wave signal is low and the level of the processed signal is low, the level of the first narrow pulse signal is low; when the level of the square wave signal is low and the level of the processed signal is high, the level of the first narrow pulse signal is low.

[0052] Optionally, in some embodiments, the second generating module 30 includes an NOR gate device M2; the input end of the inverting delay module 10 is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the second output end of the inverting delay module 10 is electrically connected to the first input end of the NOR gate device M2; the square wave signal receiving end is used to receive the square wave signal; the second input end of the NOR gate device M2 is electrically connected to the square wave signal receiving end, and the output end of the NOR gate device M2 is electrically connected to the second input end of the output module 40.

[0053] It should be noted that the NOR gate device M2 has a high level threshold and a low level threshold. When the voltage of the input signal of the NOR gate device M2 is greater than the high level threshold of the NOR gate device M2, the level of the input signal of the NOR gate device M2 is a high level; when the voltage of the input signal of the NOR gate device M2 is less than the low level threshold of the NOR gate device M2, the level of the input signal of the NOR gate device M2 is a low level.

[0054] In an embodiment of the present application, a second narrow pulse signal for characterizing the falling edge of the square wave signal is generated according to the square wave signal and the processed signal through the NOR gate device M2. Specifically, when the level of the square wave signal is high and the level of the processed signal is high, the level of the second narrow pulse signal is low; when the level of the square wave signal is high and the level of the processed signal is low, the level of the first narrow pulse signal is low; when the level of the square wave signal is low and the level of the processed signal is low, the level of the first narrow pulse signal is high; when the level of the square wave signal is low and the level of the processed signal is low, the level of the first narrow pulse signal is low.

[0055] Optionally, in some embodiments, the output module 40 includes a voltage conversion submodule 41 and an output submodule 42; the voltage conversion submodule 41 is electrically connected to the first generation module 20 and the second generation module 30 respectively, and the voltage conversion submodule 41 is used to increase the voltage of the first narrow pulse signal to generate the third narrow pulse signal, and increase the voltage of the second narrow pulse signal to generate the fourth narrow pulse signal; the output submodule 42 is electrically connected to the voltage conversion submodule 41, and the output submodule 42 is used to generate the control signal according to the third narrow pulse signal and the fourth narrow pulse signal.

[0056] Specifically, in some embodiments, the output submodule 42 includes a generating unit and an output unit, the generating unit is electrically connected to the voltage conversion submodule 41 and the output unit, respectively, the generating unit is used to generate an initial control signal according to the third narrow pulse signal and the fourth narrow pulse signal, wherein the voltage of the initial control signal is the second voltage, and the duty cycle of the initial control signal is the second duty cycle; the output unit is used to increase the current of the initial control signal to generate a control signal.

[0057] In an embodiment of the present application, the voltage of the first narrow pulse signal is increased by the voltage conversion submodule 41 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal, and then the output submodule 42 generates a control signal based on the third narrow pulse signal and the fourth narrow pulse signal to drive the insulated gate bipolar transistor.

[0058] Optionally, in some embodiments, the driving circuit of the insulated gate bipolar transistor also includes a filtering module; the filtering module is electrically connected to the inverting delay module 10, the first generating module 20 and the second generating module 30 respectively, and the filtering module is used to receive an initial square wave signal and filter the initial square wave signal to generate the square wave signal.

[0059] Specifically, in some embodiments, the input end of the filter module is used to receive the initial square wave signal, and the output end of the filter module is electrically connected to the square wave signal receiving end.

[0060] In the embodiment of the present application, an initial square wave signal is received by a filtering module, and the initial square wave signal is filtered to generate a square wave signal, so as to input the square wave signal to the inverting delay module 10, the first generating module 20, and the second generating module 30.

[0061] In other embodiments, the driving circuit of the insulated gate bipolar transistor also includes a filtering module and a voltage conversion module, the input end of the filtering module is electrically connected to the output end of the micro control unit, the output end of the filtering module is electrically connected to the input end of the voltage conversion module, and the output end of the voltage conversion module is electrically connected to the square wave signal receiving end; the filtering module is used to filter the initial square wave signal output by the micro control unit to generate a filtered square wave signal, wherein the initial square wave signal is a pulse width modulation signal of a low voltage (for example, 3.3 volts); the voltage conversion module is used to increase the voltage of the filtered square wave signal to generate a square wave signal.

[0062] Optionally, in some embodiments, the duty cycle of the control signal is the same as the duty cycle of the square wave signal, and the voltage of the control signal is greater than the voltage of the square wave signal.

[0063] In the embodiment of the present application, since the duty cycle of the control signal is the same as the duty cycle of the square wave signal, the voltage of the control signal is greater than the voltage of the square wave signal, so that the control signal is used to drive the insulated gate bipolar transistor.

[0064] Specifically, in some embodiments, the driving circuit of the insulated gate bipolar transistor includes an inverting delay module 10, a first generating module 20, a second generating module 30 and an output module 40; the inverting delay module 10 includes a first inverting delay submodule 11 and a second inverting delay submodule 12; the first inverting delay submodule 11 includes a first inverter F1 and a first delay unit 111; the first delay unit 111 includes a first resistor R1 and a first capacitor C1; the second inverting delay submodule 12 includes a second inverter F2 and a second delay unit 121; the second delay unit 121 includes a second resistor R2 and a second capacitor C2; the first generating module 20 includes an AND gate device M1; the second generating module 30 includes a NOR gate device M2; the output module 40 includes a voltage conversion submodule 41 and an output submodule 42; the output submodule 42 includes a generating unit and an output unit; the driving circuit of the insulated gate bipolar transistor also includes a filtering module and a voltage conversion module;

[0065] The input end of the filter module is electrically connected to the output end of the micro control unit, the output end of the filter module is electrically connected to the input end of the voltage conversion module, and the output end of the voltage conversion module is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor; the input end of the first inverter F1 is electrically connected to the square wave signal receiving end, and the output end of the first inverter F1 is electrically connected to the first end of the first resistor R1; the square wave signal receiving end is used to receive the square wave signal; the second end of the first resistor R1 is electrically connected to the first end of the first capacitor C1 and the first input end of the AND gate device M1 respectively; the second end of the first capacitor C1 is grounded; the second input end of the AND gate device M1 is electrically connected to the square wave signal receiving end, and the output end of the AND gate device M1 is electrically connected to the first input end of the voltage conversion submodule 41, and the voltage conversion submodule The first output terminal of the block 41 is electrically connected to the first input terminal of the generating unit, the output terminal of the generating unit is electrically connected to the input terminal of the output unit, and the output terminal of the output unit is used to be electrically connected to the gate of the insulated gate bipolar transistor; the input terminal of the second inverter F2 is electrically connected to the square wave signal receiving terminal, and the output terminal of the second inverter F2 is electrically connected to the first terminal of the second resistor R2; the second terminal of the second resistor R2 is electrically connected to the first terminal of the second capacitor C2 and the first input terminal of the NOR gate device M2 respectively; the second terminal of the second capacitor C2 is grounded; the second input terminal of the NOR gate device M2 is electrically connected to the square wave signal receiving terminal, the output terminal of the NOR gate device M2 is electrically connected to the second input terminal of the voltage conversion submodule 41, and the second output terminal of the voltage conversion submodule 41 is electrically connected to the second input terminal of the generating unit;

[0066] The initial square wave signal output by the microcontroller unit is filtered through the filtering module to generate a filtered square wave signal; the voltage of the filtered square wave signal is increased through the voltage conversion module to generate a square wave signal; the square wave signal is received through the first inverter F1, and the square wave signal is inverted to generate a first inverted signal, and then the first inverted signal is delayed through the cooperation of the first resistor R1 and the first capacitor C1 to generate a processed signal, and then the first narrow pulse signal for characterizing the rising edge of the square wave signal is generated according to the square wave signal and the processed signal through the AND gate device M1; the square wave signal is received through the first inverter F1, and the square wave signal is inverted to generate a first inverted signal, and then The second resistor R2 cooperates with the second capacitor C2 to delay the second inverted signal to generate a processed signal, and then generates a second narrow pulse signal for characterizing the falling edge of the square wave signal according to the square wave signal and the processed signal through the NOR gate device M2; the voltage of the first narrow pulse signal is increased through the voltage conversion submodule 41 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal, and then the generation unit generates an initial control signal according to the third narrow pulse signal and the fourth narrow pulse signal, and then the current of the initial control signal is increased through the output unit to generate a control signal, so as to drive the insulated gate bipolar transistor through the control signal.

[0067] Specifically, in some other embodiments, the driving circuit of the insulated gate bipolar transistor includes an inverting delay module 10, a first generating module 20, a second generating module 30 and an output module 40; the inverting delay module 10 includes a third inverter F3 and a delay submodule 13; the delay submodule 13 includes a third resistor R3 and a third capacitor C3; the first generating module 20 includes an AND gate device M1; the second generating module 30 includes a NOR gate device M2; the output module 40 includes a voltage conversion submodule 41 and an output submodule 42; the output submodule 42 includes a generating unit and an output unit; the driving circuit of the insulated gate bipolar transistor also includes a filtering module and a voltage conversion module;

[0068] The input end of the filter module is electrically connected to the output end of the micro control unit, the output end of the filter module is electrically connected to the input end of the voltage conversion module, and the output end of the voltage conversion module is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor; the input end of the third inverter F3 is electrically connected to the square wave signal receiving end, and the output end of the third inverter F3 is electrically connected to the first end of the third resistor R3; the square wave signal receiving end is used to receive the square wave signal; the second end of the third resistor R3 is electrically connected to the first end of the third capacitor C3, the first input end of the AND gate device M1 and the first input end of the NOR gate device M2 respectively; the second end of the third capacitor C3 is grounded; the AND gate The second input terminal of the device M1 is electrically connected to the square wave signal receiving terminal, the output terminal of the AND gate device M1 is electrically connected to the first input terminal of the voltage conversion submodule 41, the first output terminal of the voltage conversion submodule 41 is electrically connected to the first input terminal of the generating unit, the output terminal of the generating unit is electrically connected to the input terminal of the output unit, and the output terminal of the output unit is used to be electrically connected to the gate of the insulated gate bipolar transistor; the second input terminal of the NOR gate device M2 is electrically connected to the square wave signal receiving terminal, the output terminal of the NOR gate device M2 is electrically connected to the second input terminal of the voltage conversion submodule 41, and the second output terminal of the voltage conversion submodule 41 is electrically connected to the second input terminal of the generating unit;

[0069] The initial square wave signal output by the microcontroller unit is filtered by the filtering module to generate a filtered square wave signal; the voltage of the filtered square wave signal is increased by the voltage conversion module to generate a square wave signal; the square wave signal is received by the third inverter F3, and the square wave signal is inverted to generate a third inverted signal, and then the third inverted signal is delayed by the third resistor R3 and the third capacitor C3 to generate a processed signal, and then the first narrow pulse signal for characterizing the rising edge of the square wave signal is generated by the AND gate device M1 according to the square wave signal and the processed signal, and the second narrow pulse signal for characterizing the falling edge of the square wave signal is generated by the NOR gate device M2 according to the square wave signal and the processed signal; the voltage of the first narrow pulse signal is increased by the voltage conversion submodule 41 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal, and then the initial control signal is generated by the generation unit according to the third narrow pulse signal and the fourth narrow pulse signal, and then the current of the initial control signal is increased by the output unit to generate a control signal, so as to drive the insulated gate bipolar transistor through the control signal.

[0070] Reference Figure 4 , in some embodiments, Figure 4 (a1) is a curve of a square wave signal in a coordinate system with voltage U on the vertical axis and time t on the horizontal axis. Figure 4 (a2) is a curve of the third inverted signal in a coordinate system with voltage U on the vertical axis and time t on the horizontal axis (same as the curve of the first inverted signal and the curve of the second inverted signal), Figure 4 (a3) is a curve of the processed signal in a coordinate system with the vertical axis being voltage U and the horizontal axis being time t, Figure 4 (a4) is a curve of the first narrow pulse signal in a coordinate system with the vertical axis being voltage U and the horizontal axis being time t, Figure 4 (a5) is a curve of the second narrow pulse signal in a coordinate system with the vertical axis being voltage U and the horizontal axis being time t;

[0071] At time t1, the curve of the square wave signal jumps from high level to low level, and the curve of the processed signal begins to rise; at time t2, the voltage of the processed signal reaches the low level threshold u2 of the NOR gate device M2; at time t3, the curve of the square wave signal jumps from low level to high level, and the curve of the processed signal begins to rise; at time t4, the voltage of the processed signal reaches the high level threshold u1 of the AND gate device M1;

[0072] In the time interval from t1 to t2, since the square wave signal is at a low level and the processed signal is at a low level, the first narrow pulse signal is at a low level and the second narrow pulse signal is at a high level; in the time interval from t2 to t3, since the square wave signal is at a low level and the processed signal is at a high level, the first narrow pulse signal is at a low level and the second narrow pulse signal is at a low level; in the time interval from t3 to t4, since the square wave signal is at a high level and the processed signal is at a high level, the first narrow pulse signal is at a high level and the second narrow pulse signal is at a low level.

[0073] Optionally, refer to Figure 5 In some embodiments, the inverting delay module 10, the first generating module 20 and the second generating module 30 form a pulse generating circuit, and the driving process of the insulated gate bipolar transistor includes: X1, start; X2, the micro control unit outputs an initial square wave signal; X3, the filtering module filters the initial square wave signal, that is, the noise in the initial square wave signal is filtered out by the filtering module to generate a filtered square wave signal; X4, the voltage conversion module performs voltage conversion, that is, the voltage of the filtered square wave signal is increased by the voltage conversion module to generate a square wave signal; X5, the pulse generating circuit generates a first narrow pulse signal and a second narrow pulse signal, that is, the square wave signal is received by the inverting delay module 10, and the square wave signal is inverted and delayed to generate a processed signal, and then the square wave signal is received by the first generating module 20, and a signal for characterizing the square wave is generated according to the square wave signal and the processed signal. The first narrow pulse signal of the rising edge of the signal, and the square wave signal is received through the second generating module 30, and the second narrow pulse signal for characterizing the falling edge of the square wave signal is generated according to the square wave signal and the processed signal; X6, the voltage conversion submodule 41 performs voltage conversion, that is, the voltage of the first narrow pulse signal is increased by the voltage conversion submodule 41 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal; X7, the generating unit performs square wave conversion, that is, the generating unit generates an initial control signal according to the third narrow pulse signal and the fourth narrow pulse signal; X8, the output unit outputs the control signal, that is, the current of the initial control signal is increased by the output unit to generate a control signal; X9, the insulated gate bipolar transistor is driven to work, that is, the insulated gate bipolar transistor is driven to work by the control signal; X10, end.

[0074] In summary, in the embodiment of the present application, a square wave signal is received through the inversion delay module 10, and the square wave signal is inverted and delayed to generate a processed signal, and then the square wave signal is received through the first generation module 20, and a first narrow pulse signal for characterizing the rising edge of the square wave signal is generated according to the square wave signal and the processed signal, and the square wave signal is received through the second generation module 30, and a second narrow pulse signal for characterizing the falling edge of the square wave signal is generated according to the square wave signal and the processed signal, and then the voltage of the first narrow pulse signal is increased through the output module 40 to generate a third narrow pulse signal, and the voltage of the second narrow pulse signal is increased to generate a fourth narrow pulse signal, and a control signal for driving an insulated gate bipolar transistor is generated according to the third narrow pulse signal and the fourth narrow pulse signal. In this process, since the duty cycle of the narrow pulse signal is smaller than the duty cycle of the square wave signal, compared with the voltage conversion achieved by the square wave signal in the prior art, the voltage conversion achieved by the narrow pulse signal reduces the heat loss generated by the devices in the driving circuit.

[0075] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0076] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A driving circuit of an insulated gate bipolar transistor, characterized in that: It includes an inverting delay module, a first generating module, a second generating module and an output module; The inversion delay module is electrically connected to the first generation module and the second generation module respectively, and the inversion delay module is used to receive a square wave signal, and invert and delay the square wave signal to generate a processed signal; The first generating module is electrically connected to the output module, and is used to receive the square wave signal, and generate a first narrow pulse signal for characterizing a rising edge of the square wave signal according to the square wave signal and the processed signal; The second generating module is electrically connected to the output module, and is used to receive the square wave signal and generate a second narrow pulse signal for characterizing the falling edge of the square wave signal according to the square wave signal and the processed signal; The output module is used to increase the voltage of the first narrow pulse signal to generate a third narrow pulse signal, and to increase the voltage of the second narrow pulse signal to generate a fourth narrow pulse signal, and to generate a control signal for driving an insulated gate bipolar transistor based on the third narrow pulse signal and the fourth narrow pulse signal.

2. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The inverting delay module includes a first inverting delay submodule and a second inverting delay submodule; The first inversion delay submodule is electrically connected to the first generation module, and the first inversion delay submodule is used to receive the square wave signal, and invert and delay the square wave signal to generate the processed signal; The second inversion delay submodule is electrically connected to the second generation module, and the second inversion delay submodule is used to receive the square wave signal, and invert and delay the square wave signal to generate the processed signal.

3. The driving circuit of the insulated gate bipolar transistor according to claim 2, characterized in that: The first inversion delay submodule includes a first inverter and a first delay unit; The first inverter is electrically connected to the first delay unit, and the first inverter is used to receive the square wave signal and invert the square wave signal to generate a first inverted signal; The first delay unit is electrically connected to the first generating module, and is used for delaying the first inverted signal to generate the processed signal.

4. The driving circuit of the insulated gate bipolar transistor according to claim 3, characterized in that: The first delay unit includes a first resistor and a first capacitor; The input end of the first inverter is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the first inverter is electrically connected to the first end of the first resistor; the square wave signal receiving end is used to receive the square wave signal; The second end of the first resistor is electrically connected to the first end of the first capacitor and the first input end of the first generating module respectively; The second end of the first capacitor is grounded; The second input terminal of the first generating module is electrically connected to the square wave signal receiving terminal.

5. The driving circuit of the insulated gate bipolar transistor according to claim 2, characterized in that: The second inversion delay submodule includes a second inverter and a second delay unit; The second inverter is electrically connected to the second delay unit, and the second inverter is used to receive the square wave signal and invert the square wave signal to generate a second inverted signal; The second delay unit is electrically connected to the second generating module, and is used for delaying the second inverted signal to generate the processed signal.

6. The driving circuit of the insulated gate bipolar transistor according to claim 5, characterized in that: The second delay unit includes a second resistor and a second capacitor; The input end of the second inverter is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the second inverter is electrically connected to the first end of the second resistor; the square wave signal receiving end is used to receive the square wave signal; The second end of the second resistor is electrically connected to the first end of the second capacitor and the first input end of the second generating module respectively; The second terminal of the second capacitor is grounded; The second input end of the second generating module is electrically connected to the square wave signal receiving end.

7. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The inversion delay module includes a third inverter and a delay submodule; The third inverter is electrically connected to the delay submodule, and is used to receive the square wave signal and invert the square wave signal to generate a third inverted signal; The delay submodule is electrically connected to the first generation module and the second generation module respectively, and the delay submodule is used to delay the third inverted signal to generate the processed signal.

8. The driving circuit of the insulated gate bipolar transistor according to claim 7, characterized in that: The delay submodule includes a third resistor and a third capacitor; The input end of the third inverter is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the output end of the third inverter is electrically connected to the first end of the third resistor; the square wave signal receiving end is used to receive the square wave signal; The second end of the third resistor is electrically connected to the first end of the third capacitor, the first input end of the first generating module and the first input end of the second generating module respectively; The second end of the third capacitor is grounded; The second input terminal of the first generating module is electrically connected to the square wave signal receiving terminal; The second input end of the second generating module is electrically connected to the square wave signal receiving end.

9. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The first generating module includes an AND gate device; The input end of the inverting delay module is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the first output end of the inverting delay module is electrically connected to the first input end of the AND gate device; the square wave signal receiving end is used to receive the square wave signal; The second input terminal of the AND gate device is electrically connected to the square wave signal receiving terminal, and the output terminal of the AND gate device is electrically connected to the first input terminal of the output module.

10. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The second generation module includes a NOR gate device; The input end of the inverting delay module is electrically connected to the square wave signal receiving end of the driving circuit of the insulated gate bipolar transistor, and the second output end of the inverting delay module is electrically connected to the first input end of the NOR gate device; the square wave signal receiving end is used to receive the square wave signal; The second input end of the NOR gate device is electrically connected to the square wave signal receiving end, and the output end of the NOR gate device is electrically connected to the second input end of the output module.

11. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The output module includes a voltage conversion submodule and an output submodule; The voltage conversion submodule is electrically connected to the first generation module and the second generation module respectively, and the voltage conversion submodule is used to increase the voltage of the first narrow pulse signal to generate the third narrow pulse signal, and increase the voltage of the second narrow pulse signal to generate the fourth narrow pulse signal; The output submodule is electrically connected to the voltage conversion submodule, and the output submodule is used to generate the control signal according to the third narrow pulse signal and the fourth narrow pulse signal.

12. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The driving circuit of the insulated gate bipolar transistor further includes a filtering module; The filtering module is electrically connected to the inversion delay module, the first generation module and the second generation module respectively, and is used for receiving an initial square wave signal and filtering the initial square wave signal to generate the square wave signal.

13. The driving circuit of the insulated gate bipolar transistor according to claim 1, characterized in that: The duty cycle of the control signal is the same as the duty cycle of the square wave signal, and the voltage of the control signal is greater than the voltage of the square wave signal.

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