Array substrate, preparation method of array substrate and display panel

Abstract

The invention provides an array substrate, a preparation method of the array substrate and a display panel. A substrate layer is provided with a plurality of inner grooves; the light-emitting unit comprises an anode layer, a cathode layer and a light-emitting layer, the anode layer is laid on the groove wall of the inner groove, at least part of the cathode layer is laid on the groove wall of the inner groove, the anode layer and the cathode layer are arranged in a spaced mode, one part of the light-emitting layer is arranged on the anode layer, and the other part of the light-emitting layer is arranged on the cathode layer. One side of the anode layer facing the light-emitting layer has an arc-shaped concave surface; and / or one side, facing the light-emitting layer, of the cathode layer is provided with an arc-shaped concave surface, and the arc-shaped concave surface is used for reflecting at least part of light rays emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer to be emitted, so that the light-emitting efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate, a method for preparing the array substrate, and a display panel. Background Art

[0002] Organic Light Emitting Diode (OLED) has gradually become the mainstream technology for display devices due to its advantages such as wide viewing angle, uniform image quality, fast response speed and low energy consumption. In the prior art, it is generally limited by the luminous efficiency of the light-emitting layer, the difference in the refractive index of each film layer and the reflection of the film layer. Most of the light is lost in the high refractive-reflective area (ITO / organic film layer) in the waveguide mode, resulting in low light extraction efficiency of OLED. Therefore, how to improve the light extraction efficiency of the display panel has become a technical problem that needs to be solved. Summary of the invention

[0003] The present application provides an array substrate, a method for preparing the array substrate, and a display panel for improving light extraction efficiency.

[0004] In a first aspect, an array substrate provided by an embodiment of the present application includes:

[0005] substrate;

[0006] A base layer, disposed on the substrate, the base layer having a plurality of inner grooves; and

[0007] A plurality of light-emitting units, wherein the light-emitting units include an anode layer, a cathode layer and a light-emitting layer, wherein the anode layer is laid on the groove wall of the inner groove, and at least a portion of the cathode layer is laid on the groove wall of the inner groove, the anode layer and the cathode layer are spaced apart, a portion of the light-emitting layer is arranged on the anode layer, and another portion of the light-emitting layer is arranged on the cathode layer, and the anode layer has an arc-shaped concave surface on a side facing the light-emitting layer; and / or the cathode layer has an arc-shaped concave surface on a side facing the light-emitting layer, and the arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission.

[0008] The array substrate provided in the embodiment of the present application is designed with a plurality of inner grooves in the base layer; the light-emitting unit includes an anode layer, a cathode layer and a light-emitting layer, the anode layer is laid on the groove wall of the inner groove, at least part of the cathode layer is laid on the groove wall of the inner groove, the anode layer and the cathode layer are arranged at intervals, a part of the light-emitting layer is arranged on the anode layer, and another part of the light-emitting layer is arranged on the cathode layer, and the side of the anode layer facing the light-emitting layer has an arc-shaped concave surface; and / or the side of the cathode layer facing the light-emitting layer has an arc-shaped concave surface, and the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission, on the one hand The light-emitting layer is located on the side of the anode layer and the cathode layer facing away from the substrate, which reduces the number of film layers that the light-emitting layer needs to pass through to emit, thereby reducing the loss of light in the high-refractive-reflective region film layer in a waveguide mode. On the other hand, the anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer, and the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission, so as to further reduce the light emitted toward the side where the substrate is located and the base layer, so that the light of the light-emitting layer is emitted from the light-emitting side, further increasing the light extraction efficiency.

[0009] In an optional embodiment, the groove wall of the inner groove includes a first arc-shaped wall and a second arc-shaped wall, the anode layer is arranged on the first arc-shaped wall, and the cathode layer is arranged on the second arc-shaped wall.

[0010] In an optional embodiment, the light-emitting unit further includes an electron transport layer and a hole transport layer, the electron transport layer is arranged on the cathode layer, the hole transport layer is arranged on the anode layer, the electron transport layer and the hole transport layer are spaced apart, a portion of the light-emitting layer is arranged on the electron transport layer, and another portion of the light-emitting layer is arranged on the hole transport layer.

[0011] In an optional embodiment, the groove wall of the inner groove is a complete surface, and at least part of the light-emitting layer contacts the bottom of the groove wall of the inner groove; or, the groove wall bottom of the inner groove has a gap, and at least part of the light-emitting layer contacts the substrate.

[0012] In an optional embodiment, the base layer also includes a convex strip arranged in the inner groove, the convex strip is arranged between the first arc-shaped wall and the second arc-shaped wall, the convex strip is arranged between the anode layer and the cathode layer, and the convex strip is arranged between the electron transport layer and the hole transport layer.

[0013] In an optional embodiment, the cathode layers of at least two of the light-emitting units are arranged at intervals, and the anode layers of at least two of the light-emitting units are arranged at intervals, and the array substrate also includes a plurality of cathode driving units and a plurality of anode driving units, each of the cathode driving units is electrically connected to the cathode layer of one of the light-emitting units; and each of the anode driving units is electrically connected to the anode layer of one of the light-emitting units.

[0014] In an optional embodiment, the array substrate further includes at least one cathode driving unit and a plurality of anode driving units, the surface of the base layer away from the substrate further includes an electrical connection wire, the electrical connection wire is electrically connected to the cathode layers of at least two of the light-emitting units, and the cathode driving unit is electrically connected to the electrical connection wire;

[0015] The anode layers of at least two of the light-emitting units are arranged at intervals, and each of the anode driving units is electrically connected to the anode layer of one of the light-emitting units.

[0016] In an optional embodiment, the array substrate further includes a plurality of TFT units and a passivation layer, the plurality of TFT units are arranged on the substrate, the passivation layer covers the plurality of TFT units, the base layer is arranged on the passivation layer, the source electrode of the TFT unit is arranged corresponding to the anode layer of the light-emitting unit, the passivation layer includes a conductive via, and the conductive via electrically connects the anode layer of the light-emitting unit and the drain electrode of the TFT unit.

[0017] In a second aspect, an embodiment of the present application provides a method for preparing an array substrate, the method comprising:

[0018] forming a base layer on a substrate;

[0019] forming a plurality of inner grooves on the base layer;

[0020] A cathode layer and an anode layer are formed on the groove wall in the inner groove, the cathode layer and the anode layer are arranged at intervals, and the side of the anode layer facing away from the substrate has an arc-shaped concave surface; and / or the side of the cathode layer facing away from the substrate has an arc-shaped concave surface;

[0021] A light emitting layer is formed in a space surrounded by the cathode layer and the anode layer.

[0022] The method for preparing an array substrate provided in an embodiment of the present application forms a base layer on a substrate by design; forms a plurality of inner grooves on the base layer; forms a cathode layer and an anode layer on the groove wall in the inner groove, wherein the cathode layer and the anode layer are arranged at intervals, and the anode layer has an arc-shaped concave surface on the side away from the base plate; and / or the cathode layer has an arc-shaped concave surface on the side away from the base plate; and forms a light-emitting layer in a space surrounded by the cathode layer and the anode layer, wherein on one hand, the light-emitting layer is located on the side where both the anode layer and the cathode layer are away from the base plate, thereby reducing the number of film layers that the light-emitting layer needs to pass through for emission, thereby reducing the loss of light in the film layer in the high refractive-reflective region in a waveguide mode, and on the other hand, the anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer, wherein the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission, thereby further reducing the light emission toward the side where the base plate is located and the base layer, so that the light of the light-emitting layer is emitted from the light-emitting side, thereby further increasing the light emission efficiency.

[0023] In a third aspect, an embodiment of the present application provides a display panel, comprising the array substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments are briefly introduced below.

[0025] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0026] Figure 2 yes Figure 1 A partial schematic diagram of the array substrate;

[0027] Figure 3 for Figure 2 The schematic diagram of the light emitting principle of the array substrate shown;

[0028] Figure 4 is a partial schematic diagram of a first array substrate provided in an embodiment of the present application;

[0029] Figure 5 is a partial schematic diagram of a second array substrate provided in an embodiment of the present application;

[0030] Figure 6 is a partial top view schematic diagram of a first array substrate provided in an embodiment of the present application;

[0031] Figure 7 is a partial top view schematic diagram of a second array substrate provided in an embodiment of the present application;

[0032] Figure 8is a partial top view schematic diagram of a third array substrate provided in an embodiment of the present application;

[0033] Fig. 9 is a partial top view schematic diagram of a fourth array substrate provided in an embodiment of the present application;

[0034] Fig.10 is a partial top view schematic diagram of a fifth array substrate provided in an embodiment of the present application;

[0035] Fig.11 is a partial cross-sectional view of an array substrate provided in an embodiment of the present application Figure 1 ;

[0036] Fig.12 is a partial cross-sectional view of an array substrate provided in an embodiment of the present application Figure 2 ;

[0037] Fig.13 is a flow chart of a method for preparing an array substrate provided in an embodiment of the present application;

[0038] Fig.14 is a diagram of a preparation process of an array substrate provided in an embodiment of the present application;

[0039] Fig.15 This is another preparation process diagram of the array substrate provided in an embodiment of the present application.

[0040] Description of Figure Numbers:

[0041] Display panel 100; array substrate 11; substrate 12; base layer 13; multiple light-emitting units 14; inner groove 14a; anode layer 15; cathode layer 16; light-emitting layer 17; first arc wall 18; second arc wall 19; electron transport layer 20; hole transport layer 21; gap 22; convex strip 23; anode drive unit 24; cathode drive unit 25; electrical connection line 26; TFT unit 27; passivation layer 28; gate 29; insulating layer 30; active layer 31; source 32; drain 33; conductive via 34. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. In addition, the reference to "embodiment" or "implementation method" in the present application means that the specific features, structures or characteristics described in conjunction with the embodiments or implementation methods may be included in at least one embodiment of the present application. The appearance of the phrase in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in the present application can be combined with other embodiments.

[0043] When describing some embodiments, the expression "electrically connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "electrically connected" may be used to indicate that two or more components are in physical contact or there is an electrical signal path, such as two components are connected through a signal line, or there may be other electrical components or circuits between the two components, but there is a signal path between the two components through other electrical components. However, the term "electrically connected" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0044] See also Figure 1 The present application provides a display panel 100 with improved light extraction efficiency. The display panel 100 includes but is not limited to a panel having a self-luminous unit such as an OLED. The display panel 100 includes an array substrate 11. The array substrate 11 includes but is not limited to a pixel unit array substrate 11. The array substrate 11 is provided with a plurality of pixel units arranged in an array. Each pixel unit includes at least one light-emitting unit and a TFT unit.

[0045] See also Figure 2 The array substrate 11 includes a substrate 12 , a base layer 13 and a plurality of light emitting units 14 .

[0046] The base layer 13 is disposed on the substrate 12. The base layer 13 includes but is not limited to a pixel definition layer.

[0047] See also Figure 2, the base layer 13 has a plurality of inner grooves 14a. Optionally, the number of the inner grooves 14a may be less than the number of pixel units in the display panel 100. In other words, some of the light emitting units 14 of the display panel 100 improve the light extraction rate. Optionally, the number of the inner grooves 14a is equal to the number of pixel units in the display panel 100. In other words, all of the light emitting units 14 of the display panel 100 improve the light extraction rate.

[0048] See also Figure 2 The light-emitting unit 14 includes an anode layer 15 , a cathode layer 16 and a light-emitting layer 17 .

[0049] The anode layer 15 is laid on the groove wall of the inner groove 14a. At least part of the cathode layer 16 is laid on the groove wall of the inner groove 14a. The anode layer 15 and the cathode layer 16 are spaced apart. In other words, the anode layer 15 and the cathode layer 16 are not conductive.

[0050] A portion of the light-emitting layer 17 is disposed on the anode layer 15. Another portion of the light-emitting layer 17 is disposed on the cathode layer 16. The light-emitting layer 17 includes but is not limited to an organic light-emitting material. The anode layer 15 and the cathode layer 16 are used to provide a driving voltage for the light-emitting layer 17 to drive the light-emitting layer 17 to emit light.

[0051] The side of the light emitting layer 17 facing away from the substrate 12 is the light emitting side. The light does not need to pass through the cathode layer 16 during the emission process, which reduces the number of film layers that the light emitting layer 17 needs to pass through, thereby reducing the loss of light in the high refractive-reflective region film layer in the waveguide mode, thereby increasing the light extraction efficiency.

[0052] Further, the side of the anode layer 15 facing the light-emitting layer 17 has an arc-shaped concave surface, and / or; the side of the cathode layer 16 facing the light-emitting layer 17 has an arc-shaped concave surface. Optionally, the side of the anode layer 15 facing the light-emitting layer 17 has an arc-shaped concave surface, and the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission. The light-emitting surface of the light-emitting layer 17 faces the light-emitting surface of the display panel 100. Optionally, the side of the cathode layer 16 facing the light-emitting layer 17 has an arc-shaped concave surface, and the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission. Optionally, the side of the anode layer 15 facing the light-emitting layer 17 has a first arc-shaped concave surface, and the side of the cathode layer 16 facing the light-emitting layer 17 has a second arc-shaped concave surface. The first arc-shaped concave surface and the second arc-shaped concave surface are used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17. In general technology, the light emitted by the light-emitting layer 17 is emitted along all sides, and the design of the arc-shaped concave surface allows the light emitted from the light-emitting layer 17 along all sides to be reflected to the light-emitting surface of the light-emitting layer 17, thereby improving the light extraction rate.

[0053] The array substrate 11 provided in the embodiment of the present application is designed to have a plurality of inner grooves 14a in the base layer 13, and the light-emitting unit 14 includes an anode layer 15, a cathode layer 16 and a light-emitting layer 17. The anode layer 15 is laid on the groove wall of the inner groove 14a, and at least part of the cathode layer 16 is laid on the groove wall of the inner groove 14a. The anode layer 15 and the cathode layer 16 are arranged at intervals, a part of the light-emitting layer 17 is arranged on the anode layer 15, and another part of the light-emitting layer 17 is arranged on the cathode layer 16. The side of the anode layer 15 facing the light-emitting layer 17 has an arc-shaped concave surface, and / or the side of the cathode layer 16 facing the light-emitting layer 17 has an arc-shaped concave surface, and the arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting layer 17. On the one hand, the light-emitting layer 17 is located on the side where both the anode layer 15 and the cathode layer 16 are away from the substrate 12, which reduces the number of film layers that the light-emitting layer 17 needs to pass through for emission, thereby reducing the loss of light in the high refractive-reflective region film layer in a waveguide mode. On the other hand, the anode layer 15 has an arc-shaped concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing the light-emitting layer 17. The arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission, so as to further reduce the light emitted toward the side where the substrate 12 is located and the base layer 13, so that the light of the light-emitting layer 17 is emitted from the light-emitting side, thereby further increasing the light extraction efficiency.

[0054] Optional, see Figure 3The material of the anode layer 15 has a high reflectivity, such as silver, aluminum, etc. The anode layer 15 is disposed on a portion of the circumference of the light-emitting layer 17, and the anode layer 15 has a first arc-shaped concave surface, thereby forming a first arc-shaped reflective concave surface, so that the anode layer 15 can achieve conductivity and reflect the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17.

[0055] Optional, see Figure 3 The cathode layer 16 is made of a material with a high reflectivity, such as silver, aluminum, etc. The cathode layer 16 is disposed on another part of the circumference of the light-emitting layer 17, and has a second arc-shaped concave surface, thereby forming a second arc-shaped reflective concave surface. In this way, the cathode layer 16 can achieve conductivity and reflect the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17.

[0056] Specifically, the cathode layer 16 and the anode layer 15 cover almost the entire wall of the inner groove 14a. To prevent the cathode layer 16 and the anode layer 15 from being electrically connected, the cathode layer 16 and the anode layer 15 can be physically spaced apart from each other, or an isolation convex strip can be provided between the cathode layer 16 and the anode layer 15.

[0057] Optionally, the opening shape of the inner groove 14a includes but is not limited to a circle, a square, an ellipse, etc. Further, the inner groove 14a may be semi-spherical, semi-cylindrical, semi-ellipsoidal, etc.

[0058] Optional, see Figure 2 The groove wall of the inner groove 14a includes a first arc-shaped wall 18 and a second arc-shaped wall 19. The anode layer 15 is disposed on the first arc-shaped wall 18. The cathode layer 16 is disposed on the second arc-shaped wall 19.

[0059] Optionally, the first arcuate wall 18 and the second arcuate wall 19 may be continuous surfaces or spaced surfaces. For example, the first arcuate wall 18 and the second arcuate wall 19 form a gap at the bottom of the groove. For example, the inner groove 14a is semi-cylindrical, and the strip-shaped gap extends along the length direction to achieve the spacing of the anode layer 15 and the cathode layer 16.

[0060] By designing the groove wall of the inner groove 14a to include a first curved wall 18 and a second curved wall 19, the anode layer 15 and the cathode layer 16 are both thin film layers. In other words, the anode layer 15 is in an arc shape and the cathode layer 16 is in an arc shape, which is conducive to realizing that the side of the anode layer 15 facing away from the substrate 12 is a first curved reflective concave surface, and realizing that the side of the cathode layer 16 facing away from the substrate 12 is a first curved reflective concave surface.

[0061] For another example, the inner groove 14a is semicircular, the first arc-shaped wall 18 is approximately 1 / 4 spherical, and the second arc-shaped wall 19 is approximately 1 / 4 spherical. In this way, the shape of the cathode layer 16 is close to the 1 / 4 spherical, and the shape of the anode layer 15 is close to the 1 / 4 spherical. The cathode layer 16 forms a first arc-shaped reflective concave surface that is approximately 1 / 4 spherical, and the anode layer 15 forms a second arc-shaped reflective concave surface that is approximately 1 / 4 spherical. The light-emitting layer 17 is arranged in the space surrounded by the cathode layer 16 and the anode layer 15. The light emitted by the light-emitting layer 17 will be emitted toward the light-emitting surface, the anode layer 15 and the side where the cathode layer 16 is located, and the anode layer 15 reflects the light to be emitted toward the light-emitting surface, and the cathode layer 16 reflects the light to be emitted toward the light-emitting surface, so the light emitted by the light-emitting layer 17 is basically emitted toward the light-emitting surface, thereby improving the light emission rate of the light-emitting layer 17 emitted from the light-emitting surface.

[0062] See also Figure 3 When the light-emitting layer 17 emits light, in addition to emitting light to the opening side, the light-emitting layer 17 also emits light to the surroundings, resulting in low light utilization of the light-emitting layer 17 and increased energy consumption. The cathode layer 16 and the anode layer 15 are both made of highly reflective and highly conductive metal Ag, which is coated on the inner side of the pixel definition layer forming a concave transparent shape. When the light-emitting layer 17 emits light to the surroundings, the cathode layer 16 and the anode layer 15 (metal Ag) in the shape of a concave lens reflect the light to the opening side, that is, the cathode layer 16 and the anode layer 15 can well reflect the light emitted by the light-emitting layer 17 to the side, so that the light emitted to the side is emitted toward the light-emitting surface (top surface) of the light-emitting layer 17, thereby improving the light utilization rate and the light-emitting efficiency of the display device; on the other hand, there is no need to set a transparent electrode (such as the cathode layer 16, the electron transport layer) on the opening side of the light-emitting layer 17, thereby reducing the light loss caused by the different refractive indices between the film layers and the reflection of the film layers.

[0063] Optional, see Figure 4 The light-emitting unit 14 further includes an electron transport layer 20 and a hole transport layer 21 .

[0064] The electron transport layer 20 is disposed on the cathode layer 16. In other words, the electron transport layer 20 is sandwiched between the light-emitting layer 17 and the cathode layer 16. The hole transport layer 21 is disposed on the anode layer 15. In other words, the hole transport layer 21 is sandwiched between the light-emitting layer 17 and the anode layer 15. The electron transport layer 20 and the hole transport layer 21 are spaced apart. A portion of the light-emitting layer 17 is disposed on the electron transport layer 20. Another portion of the light-emitting layer 17 is disposed on the hole transport layer 21. The anode layer 15, the hole transport layer 21, the light-emitting layer 17, the electron transport layer 20, and the cathode layer 16 form the basic structure of the light-emitting unit 14.

[0065] Specifically, the electron transport layer 20 and the hole transport layer 21 are both thin layers. The surface of the electron transport layer 20 facing away from the cathode layer 16 is an arc-shaped concave surface. The surface of the hole transport layer 21 facing away from the anode layer 15 is an arc-shaped concave surface. In this way, the electron transport layer 20 and the hole transport layer 21 are surrounded to form a receiving space. For example, the shape of the electron transport layer 20 is close to a 1 / 4 spherical shape. The shape of the hole transport layer 21 is close to a 1 / 4 spherical shape. The electron transport layer 20 and the hole transport layer 21 surround a space close to a 1 / 2 hemisphere, and the light-emitting unit 14 forms a shape close to a 1 / 2 hemisphere.

[0066] It is defined that one end of each layer close to the opening of the inner groove 14a is the opening end, and one end close to the groove wall of the inner groove 14a is the bottom end.

[0067] In an alternative embodiment, see Figure 2 and Figure 4 , the bottom of the groove wall of the inner groove 14a has a gap 22. The bottom end of the cathode layer 16 and the bottom end of the anode layer 15 are both arranged in the gap 22 at the bottom of the groove wall and are spaced apart, that is, they are arranged on the substrate 12. The bottom end of the electron transport layer 20 and the bottom end of the hole transport layer 21 are both arranged in the gap 22 between the bottom end of the cathode layer 16 and the bottom end of the anode layer 15 and are spaced apart, that is, they are arranged on the substrate 12. At least a portion (bottom end) of the light-emitting layer 17 contacts the substrate 12, so that the electron transport layer 20 and the hole transport layer 21 are spaced apart, and the cathode layer 16 and the anode layer 15 are spaced apart through the light-emitting unit 14.

[0068] If there is a passivation layer under the base layer 13, then the bottom of the cathode layer 16 and the bottom of the anode layer 15 are both arranged on the passivation layer, the bottom of the electron transport layer 20 and the bottom of the hole transport layer 21 are arranged on the passivation layer, and the bottom of the light-emitting layer 17 contacts the passivation layer.

[0069] In another optional embodiment, the groove wall of the inner groove 14a is a complete surface. The bottom end of the cathode layer 16 and the bottom end of the anode layer 15 are both arranged on the groove wall of the inner groove 14a and are spaced apart. The bottom end of the electron transport layer 20 and the bottom end of the hole transport layer 21 are both arranged in the gap between the bottom end of the cathode layer 16 and the bottom end of the anode layer 15 and are spaced apart. At least part (bottom end) of the light-emitting layer 17 contacts the bottom of the groove wall of the inner groove 14a. In this way, the electron transport layer 20 and the hole transport layer 21 are spaced apart, and the cathode layer 16 and the anode layer 15 are spaced apart.

[0070] In yet another alternative embodiment, see Figure 4 The opening end of the cathode layer 16 and the opening end of the anode layer 15 are both disposed at the opening of the inner groove 14 a , so that the effective areas of the cathode layer 16 and the anode layer 15 are larger.

[0071] In other optional embodiments, see Figure 5 The opening end of the cathode layer 16 and the opening end of the anode layer 15 are both located on the groove wall of the inner groove 14a close to the opening, the opening end of the electron transport layer 20 and the opening end of the hole transport layer 21 are both located on the groove wall of the inner groove 14a close to the opening, and the opening side of the light-emitting layer 17 is the same size as the opening size of the inner groove 14a, so that the opening side of the light-emitting layer 17 is larger.

[0072] Optional, see Figures 6 to 8 , the base layer 13 further includes a convex strip 23 disposed in the inner groove 14a. The convex strip 23 is disposed between the first arc-shaped wall 18 and the second arc-shaped wall 19. The convex strip 23 is disposed along the length direction of the inner groove 14a. The convex strip 23 is disposed between the anode layer 15 and the cathode layer 16 at intervals. The convex strip 23 is disposed between the electron transport layer 20 and the hole transport layer 21 at intervals. The convex strip 23 is disposed to prevent the anode layer 15 from directly contacting the cathode layer 16, and to prevent the electron transport layer 20 from directly contacting the hole transport layer 21.

[0073] For example, see Figure 6 Taking the inner groove 14a as a semi-ellipsoidal shape as an example, the convex strip 23 extends from one end of the opening of the inner groove 14a, along the length direction of the inner groove 14a and along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.

[0074] For example, see Figure 7 Taking the inner groove 14a as a semi-spherical shape as an example, the convex strip 23 extends from one end of the opening of the inner groove 14a along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.

[0075] For example, see Figure 8 Taking the inner groove 14a as a semi-cylindrical shape as an example, the convex strip 23 extends from one end of the opening of the inner groove 14a, along the length direction of the inner groove 14a and along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.

[0076] Optional, see Fig. 9 The array substrate 11 further includes a plurality of anode drive units 24. The anode layers 15 of at least two of the light-emitting units 14 are arranged at intervals. Each of the anode drive units 24 is electrically connected to the anode layer 15 of one of the light-emitting units 14. The anode drive unit 24 is used to provide an anode voltage to the anode layer 15 of each light-emitting unit 14.

[0077] Optional, see Fig. 9, the array substrate 11 further includes a plurality of cathode drive units 25. The cathode layers 16 of at least two of the light-emitting units 14 are arranged at intervals, i.e., not directly connected. For independently arranged cathode layers 16, each of the cathode drive units 25 is electrically connected to the cathode layer 16 of one of the light-emitting units 14. This method is a cathode-only drive design. In this method, the cathode layer 16 and the anode layer 15 in each light-emitting unit 14 are driven by independent drive devices.

[0078] For optional reference, see Fig.10 and Fig.11 , the array substrate 11 also includes at least one cathode driving unit 25. The surface of the base layer 13 away from the substrate 12 also includes an electrical connection line 26. The electrical connection line 26 is arranged outside the opening area of ​​the pixel unit to reduce the influence of the electrical connection line 26 on the opening rate of the pixel unit. The electrical connection line 26 electrically connects the cathode layer 16 of at least two of the light-emitting units 14. The cathode driving unit 25 is electrically connected to the electrical connection line 26. One cathode driving unit 25 drives the cathode layers 16 of multiple light-emitting units 14 through the electrical connection line 26, reducing the number of cathode driving units 25. Optionally, the cathode layers 16 of all the light-emitting units 14 are connected through the electrical connection line 26, and the cathode layers 16 of all the light-emitting units 14 are driven by one cathode driving unit 25. This method is a common cathode driving method. Furthermore, the cathode layer 16 can also extend above the pixel definition layer, and the electrical connection line 26 connects the cathode layers 16 in each pixel unit to achieve a common cathode effect.

[0079] In this implementation, please refer to Fig.10 , the anode layers 15 of at least two of the light emitting units 14 are arranged at intervals. Each of the anode drive units 24 is electrically connected to the anode layer 15 of one of the light emitting units 14. The anode drive unit 24 is used to provide an anode voltage to the anode layer 15 of each light emitting unit 14.

[0080] In the implementation of the cathode-only drive design, the cathode layer 16 and the anode layer 15 of each light-emitting unit 14 have their own driving devices, which can supply current to the cathode layer 16 and the anode layer 15 of each light-emitting unit 14 separately.

[0081] In the implementation of the common cathode drive design, the anode layer 15 is a separate drive device. The cathode layer 16 is a common drive situation. In the common cathode method, the anode is inside the pixel opening, and the cathode is partly inside the pixel opening and partly above the pixel definition layer, and avoids the opening area, so as to achieve the opening area to reduce the number of film layers.

[0082] Optional, see Fig.12, the array substrate 11 further includes a plurality of TFT units 27 and a passivation layer 28. The plurality of TFT units 27 are disposed on the substrate 12. Optionally, the TFT unit 27 is the above-mentioned anode drive unit 24. Specifically, the substrate 12 is provided with a gate 29, an insulating layer 30 covering the gate 29, an active layer 31 disposed on the insulating layer 30, a source 32 connected to the active layer 31, and a drain 33 connected to the active layer 31, wherein the active layer 31 corresponds to the gate 29. The passivation layer 28 covers the source 32, the drain 33 and the active layer 31 of the plurality of TFT units 27. The base layer 13 is disposed on the passivation layer 28. The drain 33 of the TFT unit 27 is disposed corresponding to the anode layer 15 of the light-emitting unit 14. The passivation layer 28 includes a conductive via 34. The conductive via 34 electrically connects the anode layer 15 of the light-emitting unit 14 with the drain 33 of the TFT unit 27.

[0083] See also Fig.13 , combined with reference Fig.14 This embodiment further provides a method S100 for preparing an array substrate 11. The method S100 includes but is not limited to the following steps.

[0084] Step S110: Reference Fig.14 Middle a and Fig.14 In step b, a base layer 13 is formed on the substrate 12.

[0085] Optionally, a pixel definition layer (base layer 13 ) is firstly formed by coating on the substrate 12 .

[0086] Step S120: Reference Fig.14 In b, a plurality of inner grooves 14 a are formed on the base layer 13 .

[0087] Optionally, after exposure and development, a concave inner groove 14a is formed on the pixel definition layer (base layer 13) near the light-emitting side. In other words, the pixel definition layer (base layer 13) forms an inner groove 14a with a certain arc structure after exposure.

[0088] Step S130: Reference Fig.14 In c, a cathode layer 16 and an anode layer 15 are formed on the groove wall in the inner groove 14a. The cathode layer 16 and the anode layer 15 are arranged at intervals. The side of the anode layer 15 facing away from the substrate 12 has an arc-shaped concave surface, and / or; the side of the cathode layer 16 facing away from the substrate 12 has an arc-shaped concave surface.

[0089] Optionally, a cathode layer 16 and an anode layer 15 are deposited in the inner groove 14a of the pixel definition layer. The cathode layer 16 and the anode layer 15 are arranged at intervals. The side of the anode layer 15 away from the substrate 12 has an arc-shaped concave surface, and the side of the cathode layer 16 away from the substrate 12 has an arc-shaped concave surface. Because the cathode layer 16 and the anode layer 15 are on the same side of the light-emitting layer 17, the number of film layers on the light-emitting side is reduced, and the light loss caused by refraction and reflection can be reduced. On the other hand, because the cathode layer 16 and the anode layer 15 have a certain curvature, they have a certain focusing effect on light, thereby improving the light utilization rate.

[0090] Optionally, the anode layer 15 and the cathode layer 16 are both made of a conductive material with high reflectivity, such as silver, aluminum, etc.

[0091] Optional, reference Fig.14 Medium D and Fig.14 In figure e, the electron transport layer 20 is coated in the inner groove 14a of the pixel definition layer, and after exposure and development, the electron transport layer 20 with a cross section close to 1 / 4 circle is formed near the cathode layer 16.

[0092] Optional, reference Fig.14 Medium f and Fig.14 In g, a hole transport layer 21 is coated in the inner groove 14a of the pixel definition layer, and after exposure and development, a hole transport layer 21 with a cross section close to 1 / 4 of a circle is formed near the anode layer 15. The hole transport layer 21 is spaced apart from the electron transport layer 20.

[0093] Step S140 : forming a light-emitting layer 17 in the space surrounded by the cathode layer 16 and the anode layer 15 .

[0094] Optional, reference Fig.14 In the figure, the light emitting layer 17 is coated in the space surrounded by the hole transport layer 21 and the electron transport layer 20. The surface of the light emitting layer 17 is flush with the surface of the pixel definition layer.

[0095] In the embodiment in which the inner groove 14a is provided with the convex strip 23, Fig.15 , the preparation method comprises:

[0096] Combined with reference Fig.15 In a, a base layer 13 is formed on a substrate 12.

[0097] Combined with reference Fig.15 In step b, step S120 further includes forming a convex strip 23 in the middle of the inner groove 14a. At the same time, a conductive via 34 is formed in the passivation layer 28 to connect the anode layer 15 and the drain electrode 33 of the TFT unit 27.

[0098] Combined with reference Fig.15In Figure c, a cathode layer 16 and an anode layer 15 are formed on both sides of the convex strip 23. The convex strip 23 makes the cathode layer 16 and the anode layer 15 non-conductive.

[0099] Combined with reference Fig.15 In the figure d, the light emitting layer 17 is formed in the space surrounded by the cathode layer 16 and the anode layer 15.

[0100] The preparation method of the array substrate 11 provided in the embodiment of the present application is designed to form a base layer 13 on a substrate 12, form a plurality of inner grooves 14a on the base layer 13, form a cathode layer 16 and an anode layer 15 on the groove wall in the inner groove 14a, the cathode layer 16 and the anode layer 15 are arranged at intervals, the anode layer 15 has an arc-shaped concave surface on the side away from the substrate 12, and / or the cathode layer 16 has an arc-shaped concave surface on the side away from the substrate 12, and a light-emitting layer 17 is formed in the space surrounded by the cathode layer 16 and the anode layer 15, on the one hand, the light-emitting layer 17 is located at a position where both the anode layer 15 and the cathode layer 16 are away from the substrate 12 On one side, that is, the cathode layer 16 and the anode layer 15 are on the same side of the light-emitting layer 17, which reduces the number of film layers that the light-emitting layer 17 needs to pass through to emit, thereby reducing the loss of light in the high refractive index and reflection area film layer in the waveguide mode. On the other hand, the anode layer 15 has an arc-shaped concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing the light-emitting layer 17. The arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission, so as to further reduce the light emitted toward the side where the substrate 12 is located and the base layer 13, so that the light of the light-emitting layer 17 is emitted from the light-emitting side, thereby further increasing the light extraction efficiency.

[0101] Generally, in order to improve the light extraction efficiency of OLED panels, the thickness of the anode layer 15 (Indium Tin Oxide, ITO for short) is usually thinned to increase the anode reflectivity and thus increase the light brightness. However, thinning the ITO layer may cause the hole injection efficiency to be impaired. Some methods form light-transmitting holes on the transparent electrode so that light is emitted through the light-transmitting holes, thereby reducing the waveguide mode between the transparent electrode and the light-emitting layer 17, thereby improving the light extraction efficiency.

[0102] The array substrate 11 and the display panel 100 provided in the embodiment of the present application, by placing the cathode layer 16 and the anode layer 15 on the same side of the light-emitting layer 17, reduce the number of film layers that the light-emitting layer 17 needs to pass through to emit, thereby reducing the loss of light in the high refractive-reflective region film layer in a waveguide mode, thereby improving the light extraction efficiency of the OLED display panel 100, and by designing the cathode layer 16 and the anode layer 15 as a concave arc-shaped reflective structure, the light around the light-emitting layer 17 is reflected to improve the light utilization rate, thereby reducing the light loss caused by different refractive indices and film layer reflections.

[0103] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present application, and these improvements and modifications are also regarded as the scope of protection of the present application.

Claims

1. An array substrate, characterized in that: include: substrate; A base layer, disposed on the substrate, the base layer having a plurality of inner grooves; and A plurality of light-emitting units, wherein the light-emitting units include an anode layer, a cathode layer and a light-emitting layer, wherein the anode layer is laid on the groove wall of the inner groove, and at least a portion of the cathode layer is laid on the groove wall of the inner groove, the anode layer and the cathode layer are spaced apart, a portion of the light-emitting layer is arranged on the anode layer, and another portion of the light-emitting layer is arranged on the cathode layer, and the anode layer has an arc-shaped concave surface on a side facing the light-emitting layer; and / or the cathode layer has an arc-shaped concave surface on a side facing the light-emitting layer, and the arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission.

2. The array substrate according to claim 1, characterized in that: The groove wall of the inner groove includes a first arc-shaped wall and a second arc-shaped wall. The anode layer is arranged on the first arc-shaped wall, and the cathode layer is arranged on the second arc-shaped wall.

3. The array substrate according to claim 2, characterized in that: The light-emitting unit also includes an electron transport layer and a hole transport layer, the electron transport layer is arranged on the cathode layer, the hole transport layer is arranged on the anode layer, the electron transport layer and the hole transport layer are arranged at intervals, a part of the light-emitting layer is arranged on the electron transport layer, and another part of the light-emitting layer is arranged on the hole transport layer.

4. The array substrate according to claim 3, characterized in that: The groove wall of the inner groove is a complete surface, and at least part of the light-emitting layer contacts the bottom of the groove wall of the inner groove; or, the groove wall bottom of the inner groove has a gap, and at least part of the light-emitting layer contacts the substrate.

5. The array substrate according to claim 3, characterized in that: The base layer also includes a convex strip arranged in the inner groove, the convex strip is arranged between the first arc-shaped wall and the second arc-shaped wall, the convex strip is arranged between the anode layer and the cathode layer, and the convex strip is arranged between the electron transport layer and the hole transport layer.

6. The array substrate according to claim 1, characterized in that: The cathode layers of at least two of the light-emitting units are arranged at intervals, and the anode layers of at least two of the light-emitting units are arranged at intervals. The array substrate also includes multiple cathode driving units and multiple anode driving units, each of the cathode driving units is electrically connected to the cathode layer of one of the light-emitting units; each of the anode driving units is electrically connected to the anode layer of one of the light-emitting units.

7. The array substrate according to claim 1, characterized in that: The array substrate further comprises at least one cathode driving unit and a plurality of anode driving units, the surface of the base layer away from the substrate further comprises an electrical connection wire, the electrical connection wire is electrically connected to the cathode layers of at least two of the light-emitting units, and the cathode driving unit is electrically connected to the electrical connection wire; The anode layers of at least two of the light-emitting units are arranged at intervals, and each of the anode driving units is electrically connected to the anode layer of one of the light-emitting units.

8. The array substrate according to any one of claims 1 to 7, characterized in that: The array substrate also includes a plurality of TFT units and a passivation layer, wherein the plurality of TFT units are arranged on the substrate, the passivation layer covers the plurality of TFT units, the base layer is arranged on the passivation layer, the source electrode of the TFT unit is arranged corresponding to the anode layer of the light-emitting unit, the passivation layer includes a conductive via, and the conductive via electrically connects the anode layer of the light-emitting unit and the drain electrode of the TFT unit.

9. A method for preparing an array substrate, characterized in that: The method comprises: forming a base layer on a substrate; forming a plurality of inner grooves on the base layer; A cathode layer and an anode layer are formed on the groove wall in the inner groove, the cathode layer and the anode layer are arranged at intervals, and the side of the anode layer facing away from the substrate has an arc-shaped concave surface; and / or the side of the cathode layer facing away from the substrate has an arc-shaped concave surface; A light emitting layer is formed in a space surrounded by the cathode layer and the anode layer.

10. A display panel, characterized in that: It comprises the array substrate as claimed in any one of claims 1 to 8.

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