Method for optimizing post-deposition baking state of photoresist material

Abstract

Embodiments disclosed herein include methods of optimizing post-deposition baking of a photoresist layer. In one embodiment, the method includes depositing a photoresist layer on a substrate, baking the photoresist layer, and measuring characteristics of the photoresist layer with an optical tool.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority benefit of U.S. patent application No. 18 / 204,805 filed on June 1, 2023, which claims the benefit of U.S. Provisional Application No. 63 / 388,205 filed on July 11, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present disclosure relate to the field of semiconductor processing, and in particular to methods of depositing photoresist materials and optimizing post apply bake (PAB) conditions to improve photoresist performance. Background Art

[0004] Photolithography has been used in the semiconductor industry for decades to produce 2D and 3D patterns in microelectronic devices. The photolithography process involves spin-coating deposition of a film (photoresist), irradiating the film with a selected pattern by an energy source (exposure), and removing (etching) the exposed (positive) or non-exposed (negative) areas of the film by dissolving in a solvent. Baking may be performed to drive off residual solvent.

[0005] The photoresist should be a radiation-sensitive material, and under radiation, a chemical transformation occurs in the exposed part of the film, which causes a solubility change between the exposed and non-exposed areas. Taking advantage of this solubility change, the exposed or non-exposed areas of the photoresist are removed (etched). The photoresist is then developed, and the pattern can be transferred to the underlying film or substrate by etching. After the pattern is transferred, the remaining photoresist is removed, and repeating the process multiple times can result in 2D and 3D structures for microelectronic devices.

[0006] There are some important characteristics in the photolithography process. These important characteristics include sensitivity, resolution, lower line-edge roughness (LER), etch resistance, and the ability to form thinner layers. When the sensitivity is higher, the energy required to change the solubility of the deposited film is lower. This allows for higher efficiency in the photolithography process. Resolution and LER determine how narrow features can be achieved in the photolithography process. Pattern transfer requires higher etch resistance materials to form deep structures. Higher etch resistance materials also allow thinner films. Thinner films increase the efficiency of the photolithography process. Summary of the invention

[0007] Embodiments disclosed herein include methods for optimizing post-deposition baking of a photoresist layer. In one embodiment, the method includes depositing a photoresist layer on a substrate, baking the photoresist layer, and measuring a property of the photoresist layer with an optical tool.

[0008] Embodiments may also include a method of optimizing a post-application bake (PAB) of a photoresist layer. In one embodiment, the method includes depositing a first photoresist layer on a first substrate, baking the first photoresist layer with a first PAB, measuring material properties of the first photoresist layer with an optical tool during or after the first PAB, depositing a second photoresist layer on a second substrate, baking the second photoresist layer with a second PAB, measuring material properties of the second photoresist layer with an optical tool during or after the second PAB, and selecting a photoresist layer having material properties that provide the most desired line width roughness, line edge roughness, and / or sensitivity to radiation exposure.

[0009] Embodiments may also include a semiconductor processing tool comprising a deposition module, wherein the deposition module is configured to deposit a photoresist layer on a substrate using a dry deposition process; a post-application bake (PAB) module, wherein the PAB module is configured to bake the photoresist layer; and an optical tool for measuring one or more characteristics of the photoresist layer during or after baking. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a cross-sectional illustration representing views of various operations in a patterning process using a negative photoresist material formed by the processes described herein in accordance with one embodiment of the present disclosure.

[0011] Figure 2 is a process flow diagram of a process for optimizing a post-apply bake (PAB) of a photoresist layer to improve post-exposure and post-development characteristics of the photoresist layer according to one embodiment of the present disclosure.

[0012] Figure 3 is an illustration of various microstructures of a resist associated with increasing bake temperature according to one embodiment of the present disclosure.

[0013] Figure 4A is a graph of reflectivity of a photoresist layer with and without a bake operation according to one embodiment of the present disclosure.

[0014] Figure 4B is a graph of extinction coefficients at different wavelengths at different PAB baking temperatures according to one embodiment of the present disclosure.

[0015] Figure 4C is a graph showing the thickness variation of a photoresist layer after different PAB baking temperatures according to one embodiment of the present disclosure.

[0016] Figure 5A is a flow chart describing a process of developing a photoresist layer using different tools to generate a contrast curve to optimize the performance of the photoresist layer according to one embodiment of the present disclosure.

[0017] Figure 5B is a flow chart describing a process for analyzing optical properties of a photoresist layer within a single tool according to one embodiment of the present disclosure.

[0018] Figure 6 is a cross-sectional illustration of a processing tool configured to deposit a photoresist layer and measure optical properties after PAB according to one embodiment of the present disclosure.

[0019] Figure 7 is an illustration of a block diagram of an exemplary computer system according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] Methods for optimizing the post-bake (PAB) performance of a photoresist layer using in-situ or ex-situ optical measurement tools are described herein. In the following description, many specific details are set forth in order to provide a thorough understanding of the embodiments. It is apparent to those skilled in the art that the embodiments can be practiced without these specific details. In other cases, well-known aspects are not described in detail in order not to unnecessarily obscure the embodiments. In addition, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0021] To provide context, photoresist systems used for extreme ultraviolet (EUV) lithography are inefficient. That is, existing photoresist material systems used for EUV lithography require high doses in order to provide the required solubility switch that allows the photoresist material to be developed. Traditionally, carbon-based films called organic chemically amplified photoresist (CAR) have been used as photoresists. However, recently organic-inorganic hybrid materials (metal-oxygen) have been used as photoresists with extreme ultraviolet (EUV) radiation. Such materials typically include metals (e.g., Sn, Hf, Zr), oxygen, and carbon. In the lithography industry, the transition from deep UV (DUV) to EUV has promoted narrow features with high aspect ratios. Metal-oxygen-based organic-inorganic hybrid materials have shown lower line edge roughness (LER) and higher resolution, which are required to form narrow features. In addition, such films have higher sensitivity and etch resistance characteristics, and can be implemented to produce relatively thinner films.

[0022] At present, metal-oxygen photoresists are deposited by spin coating methods including wet chemistry. Post-baking treatment is required to drive any residual solvent from the film and stabilize the film. In addition, the wet method can produce a large amount of wet waste, which is desirable to remove in the industry. Photoresist films deposited by spin coating methods often lead to non-uniformity problems. According to embodiments of the present disclosure, for one or more of the above-mentioned problems, a process for vacuum deposited metal-oxygen positive photoresists is described herein.

[0023] More specifically, embodiments disclosed herein include methods for optimizing the properties of photoresist films. This optimization relies on optical inspection of the film during and / or after post-bake (PAB). Material properties (such as, but not limited to, refractive index, dielectric constant, thickness, reflectivity, and / or extinction coefficient) can be used as a guide to select optimal PAB conditions. Optical tools, such as reflectometers, ellipsometers, and other optical techniques, can be used to predict and optimize the optimal temperature and duration that allow the photoresist film to rearrange and optimize its sensitivity to patterned radiation exposure. In addition, the correlation between optical properties and line width roughness and line edge roughness can also be used to further optimize the photoresist film. In a specific embodiment, the photoresist film may include a metal-oxygen photoresist system, such as those described above. In other embodiments, the photoresist film may be any type of CAR material system.

[0024] In some embodiments, the optical inspection is performed by an in-situ optical tool. The in-situ optical tool is integrated with the tool that performs the PAB process. In one embodiment, the PAB process is performed in the same tool used to deposit the photoresist. For example, a resistive heater in a holder can be used to bake the photoresist. The optical tool can be set on the opposite side of the holder to measure one or more optical properties and / or thickness of the photoresist. Such embodiments are particularly beneficial because the substrate (e.g., wafer, etc.) does not need to be transferred between tools.

[0025] In addition, the embodiments disclosed herein allow for optimization of the photoresist layer without the need to expose and develop the photoresist layer. The exposure and development process is a particularly time-consuming and expensive process. In order to form a typical contrast curve for photoresist analysis, many substrates with photoresist layers need to be formed, exposed, and developed. This process is expensive. In the embodiments disclosed herein, the optical properties and / or thickness of the photoresist layer can be used to identify trends pointing to a better PAB process. Therefore, the cost and duration of photoresist layer optimization are significantly reduced.

[0026] Figure 1 Cross-sectional views representing various operations in a patterning process using a negative photoresist material formed by the processes described herein are illustrated in accordance with one embodiment of the present disclosure.

[0027] refer to Figure 1 1, a starting structure 100 includes a negative photoresist layer 104 over a substrate or underlying layer 102. In one embodiment, the negative photoresist layer 104 is deposited using a dry deposition process. After the deposition process, PAB can be performed on the photoresist layer 104. PAB can change the material properties of the photoresist layer 104 to improve the performance of the photoresist layer 104 that is subsequently developed.

[0028] Reference Figure 1 In part (b), the starting structure 100 is irradiated 106 at selected locations to form an irradiated photoresist layer 104A having irradiated areas 105B and non-irradiated areas 105A. Figure 1 In part (c), the removal or etching process 108 is used to provide the developed photoresist layer of the un-irradiated area 105A. Figure 1 In part (d), an etching process 110 using the non-irradiated area 105A as a mask is used to pattern the substrate or underlying layer 102 to form a patterned substrate or patterned underlying layer 102A including etched features 112 .

[0029] Reference again Figure 1 , the negative photoresist 104 is a radiation sensitive material, and upon irradiation, a chemical transformation occurs in the exposed portion of the film, which causes a change in solubility between the exposed and non-exposed areas. Using the solubility change, the exposed areas of the negative photoresist are removed (etched). The negative photoresist is then developed, and the pattern can be transferred to an underlying film or substrate by etching. After the pattern is transferred, the remaining negative photoresist is removed. This process can be repeated multiple times to fabricate 2D and 3D structures, such as for microelectronic devices.

[0030] Reference now Figure 2, a process flow chart of a process 280 for optimizing a photoresist film according to one embodiment is shown. In one embodiment, the process 280 may start with operation 281, which includes depositing a photoresist layer on a substrate. In one embodiment, the photoresist layer is deposited using a dry deposition process, such as an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, a plasma enhanced ALD (PE-ALD) process, or a plasma enhanced CVD (PE-CVD) process, etc. Although embodiments with dry deposition processes are described herein, it should be understood that embodiments disclosed herein may also include the use of wet deposition processes. In a particular case, the photoresist layer may be a metal-oxygen photoresist layer. In other embodiments, the photoresist layer may include any CAR material system. In an embodiment, the substrate may be a wafer, such as a semiconductor wafer. For example, the substrate may be a silicon wafer having any suitable form factor (e.g., 300 mm, 450 mm, etc.).

[0031] In one embodiment, process 280 may continue with operation 282, which includes performing PAB on the photoresist layer. The PAB process may include exposing the photoresist layer to an elevated temperature. For example, the temperature may be between 15° C. and 300° C. In a specific embodiment, the temperature may be between 50° C. and 250° C. In one embodiment, the duration of the PAB may be between 30 seconds and 5 minutes. The elevated temperature may be provided by any heating architecture. In some embodiments, a holder supporting the substrate may include a resistive heating element, etc. In other embodiments, one or more lamps may be used to heat the photoresist layer.

[0032] In one embodiment, processing 280 can continue by operation 283, and operation 283 comprises measuring the characteristic of photoresist layer with optical tool.In one embodiment, optical tool can comprise single lamp reflectometer, double lamp reflectometer, ellipsometer or ultraviolet-visible spectrophotometer.In one embodiment, characteristic can comprise one or more in refractive index, dielectric constant, thickness, reflectivity and / or extinction coefficient.Different material properties can be relevant to the characteristic of photoresist layer, for example, sensitivity to exposure radiation, line edge roughness and line width roughness.That is to say, the material property of measurement may not have one-to-one correspondence with sensitivity, line edge roughness and line width roughness, but can be used to determine the trend of photoresist layer.

[0033] In one embodiment, operation 283 is performed simultaneously with PAB. That is, changes in the photoresist layer can be determined in real time. This embodiment helps determine the optimal duration of the PAB process. In one embodiment, operation 283 can be performed after PAB. Operation 283 can be performed with an optical tool that is in the same location as the tool performing the PAB. In other embodiments, operation 283 can be performed with an optical tool that is not in the same location as the tool performing the PAB.

[0034] In the specific embodiment described with process 280, a single substrate and photoresist layer are measured. However, it should be understood that embodiments may include measuring material properties of multiple photoresist layers on different substrates. For example, a first photoresist layer may be provided on a first substrate, and the first photoresist layer may be baked with a first PAB. Thereafter, a second photoresist layer may be provided on a second substrate, and the second photoresist layer may be baked with a second PAB. The second PAB may be different from the first PAB. The difference may include different baking temperatures and / or baking durations. Therefore, data may be obtained from multiple different PAB conditions in order to find the best PAB conditions.

[0035] Reference now Figure 3 , a schematic diagram of the microstructure of a photoresist layer as the temperature increases according to one embodiment is shown. As shown, at relatively low temperatures, the microstructure 371 of the photoresist layer can be substantially crystalline. At moderate temperatures, the microstructure 372 can be polycrystalline, and at high temperatures, the microstructure 373 can be amorphous. Different microstructures can impart different properties to the photoresist layer. For example, different crystal structures can result in different radiation sensitivities, line edge roughness, and / or line width roughness. The microstructure of the photoresist layer can be determined in part by the optical properties of the photoresist film.

[0036] Reference now Figure 4A , shows a graph of the reflectivity of a pair of photoresist layers according to one embodiment. The first line shows the reflectivity of the photoresist layer that has not been baked. In one embodiment, the second line shows the reflectivity of the photoresist layer that has been baked. For example, the baking temperature can be about 160° C. As shown, the reflectivity of the second photoresist layer is greater than the reflectivity of the first photoresist layer. In particular, the peak of the second line is greater than the peak of the first line.

[0037] Reference now Figure 4B, shows a graph of extinction coefficient versus wavelength for a plurality of different baking temperatures according to one embodiment. Of particular interest is the peak provided near 240 nm. As shown, the peak generally increases from a PAB temperature of 18°C ​​to 160°C, and drops sharply at a PAB temperature of 220°C. Therefore, it can be determined that the optimal PAB temperature is between 160°C and 220°C. The drop in extinction coefficient for the 220°C line may be caused by changes in the microstructure at relatively high temperatures.

[0038] Now refer to Figure 4C , shows a graph of thickness variation at different baking temperatures according to one embodiment. As shown, as the baking temperature increases to 160° C., the thickness of the photoresist layer decreases slightly. Thereafter, for a baking temperature of 220° C., the thickness decreases significantly.

[0039] As mentioned above, existing methods for optimizing the PAB of photoresist materials are complex and expensive. An example of such a process is Figure 5A As shown. As shown, a photolithography system 550 is shown. In one embodiment, a wafer 501 is inserted into a coating track tool 551. In tool 551, a photoresist layer is deposited on the wafer 501. The photoresist layer can then be baked with a resist PAB tool. In some embodiments, the deposition of the photoresist layer and the baking of the photoresist layer can be implemented in the same processing tool.

[0040] Thereafter, the wafer 501 is removed from the coating track tool 551 and inserted into an exposure tool 552. The exposure tool may be a DUV or EUV exposure tool. The exposure tool 552 may use a mask to selectively expose areas of the photoresist layer.

[0041] In one embodiment, the exposed wafer 501 is then moved to a development tool 553 where the photoresist layer is developed. The process of exposing and developing the photoresist layer is very time consuming and expensive. In particular, the exposure tool 552 is an expensive tool and generally has a low throughput.

[0042] After developing the photoresist layer, the wafer can be provided to a metrology tool 554 to analyze the developed photoresist layer. In some embodiments, a comparative curve is used to determine the optimal PAB conditions for the photoresist layer. The comparative curve requires exposing and developing multiple wafers. Therefore, the cost and time required to develop the comparative curve are high.

[0043] Thus, embodiments disclosed herein include in-situ metrology tools so that wafer dies do not need to be transferred between various tools. In addition, in some embodiments, exposure and patterning of photoresist layers are not required. Thus, the cost and yield of photoresist layer optimization are improved.

[0044] like Figure 5B As shown, wafer 501 is inserted into tool 555. In one embodiment, tool 555 may include functionality for depositing a photoresist layer onto the wafer. For example, the photoresist layer may be deposited using a dry deposition process or a wet deposition process (e.g., spin coating). In one embodiment, the photoresist layer may then be baked using a PAB process. The baking process may use a resistive heater on the holder or one or more lamps opposite to the holder. In some embodiments, tool 555 may further include an exposure device. Figure 5A In contrast to the illustrated embodiment, the exposure process may be a maskless exposure process, such as electron beam lithography.

[0045] In one embodiment, tool 555 may further include an in-situ metrology tool. The metrology tool may include an optical metrology tool, such as a single lamp reflectometer, a dual lamp reflectometer, an ellipsometer, or a UV-visible spectrophotometer. The metrology tool may provide a thickness measurement and / or optical properties of the photoresist layer. For example, an in-situ metrology tool may be used to generate a measurement similar to Figure 4A to Figure 4C The graph shown.

[0046] In particular, it should be noted that the photoresist layer does not need to be developed in order to perform metrology. In some embodiments, the photoresist layer may not be exposed. This increases throughput and allows for more PAB conditions to be analyzed. Thus, optimal photoresist PAB conditions can be obtained at a lower cost and in a shorter time. Additionally, because tool 555 is self-contained, there is no need for a separate tool such as Figure 5A The wafer 501 is transferred between different tools as is the case in the illustrated embodiment.

[0047] Reference now Figure 6 , a cross-sectional view of a processing tool 600 according to one embodiment is shown. In one embodiment, the processing tool 600 may include a chamber 605. The chamber 605 may be any suitable chamber capable of supporting a pressure below atmospheric pressure (e.g., a vacuum pressure). In one embodiment, an exhaust device (not shown) including a vacuum pump may be coupled to the chamber 605 to provide a pressure below atmospheric pressure. In one embodiment, a lid may seal the chamber 605. For example, the lid may include a showerhead assembly 640, etc. The showerhead assembly 640 may include a fluid path to enable a process gas and / or an inert gas to flow into the chamber 605. In some embodiments where the processing tool 600 is suitable for plasma enhanced operation, the showerhead assembly 640 may be electrically coupled to an RF source and a matching circuit system 650. In yet another embodiment, the tool 600 may be configured as an RF bottom feed architecture. That is, the base 630 is connected to the RF source and the showerhead assembly 640 is grounded. In such embodiments, the filter circuit system may still be connected to the base. In one embodiment, the precursor gas is stored in an ampoule 699.

[0048] In one embodiment, an optical metrology tool 670 is provided through the lid 640. The optical metrology tool 670 may include one or more of a single lamp reflectometer tool, a dual lamp reflectometer tool, an ellipsometer tool, or a UV-Vis spectrophotometer tool. Although shown as being through the lid 640, it should be understood that the optical metrology tool 670 may be provided by any component of the processing tool 600 that allows for measurement of a photoresist layer on the wafer 601. For example, light 671 may be directed to the wafer 601 and reflected back to the optical metrology tool 670. In particular, it should be understood that the optical metrology tool 670 is provided as an in-situ tool. Therefore, in order to perform the metrology required to optimize the PAB conditions, the wafer 601 does not need to be transferred to another chamber.

[0049] In one embodiment, a displaceable post for supporting wafer 601 is disposed in chamber 605. In one embodiment, wafer 601 can be any substrate on which photoresist material is deposited. For example, wafer 601 can be a 300 mm wafer or a 450 mm wafer, but other wafer diameters can also be used. In addition, in some embodiments, wafer 601 can be replaced with a substrate having a non-circular shape. The displaceable post can include a post 614 extending out of chamber 605. Post 614 can have ports to provide electrical and fluid paths from outside of chamber 605 to various components of the post.

[0050] In one embodiment, the column may include a base plate 610. The base plate 610 may be grounded. The base plate 610 may include a fluid channel to allow an inert gas to flow, thereby providing an edge purge flow. In one embodiment, an insulating layer 615 is disposed on the base plate 610. The insulating layer 615 may be any suitable dielectric material. For example, the insulating layer 615 may be a ceramic plate, etc. In one embodiment, a pedestal 630 is disposed on the insulating layer 615. The pedestal 630 may include a single material, or the pedestal 630 may be formed of different materials. In one embodiment, the pedestal 630 may utilize any suitable adsorption system to hold the wafer 601. For example, the pedestal 630 may be a vacuum clamp or a monopolar clamp. In an embodiment where no plasma is generated in the chamber 605, the pedestal 630 may utilize a bipolar adsorption architecture.

[0051] The pedestal 630 may include a plurality of cooling channels 631. The cooling channels 631 may be connected to a fluid input and a fluid output (not shown) passing through the pillars 614. In one embodiment, the cooling channels 631 allow the temperature of the wafer 601 to be controlled during operation of the processing tool 600. For example, the cooling channels 631 may allow the temperature of the wafer 601 to be controlled between about -40°C and about 200°C. In one embodiment, the pedestal 630 may also include a resistive heating element (not shown). The resistive heating element may be used to set the PAB baking temperature of the wafer 601. In a specific embodiment, the PAB baking temperature may be provided between about 15°C and 250°C. The resistive heating element allows the wafer 601 and the photoresist layer to be heated to a specific temperature for a desired duration. The optical metrology tool 670 may measure optical and / or thickness characteristics of the photoresist layer on the wafer 601. Optical metrology may be implemented during or after the PAB process. In one embodiment, the pedestal 630 is grounded via the filter circuit system 645, which enables the pedestal to be DC and / or RF biased relative to ground.

[0052] In one embodiment, edge ring 620 surrounds the periphery of insulating layer 615 and base 630. Edge ring 620 can be a dielectric material, such as ceramic. In one embodiment, edge ring 620 is supported by base plate 610. Edge ring 620 can support shadow ring 635. The inner diameter of shadow ring 635 is smaller than the diameter of wafer 601. Therefore, shadow ring 635 prevents photoresist from being deposited on a portion of the outer edge of wafer 601. A gap is provided between shadow ring 635 and wafer 601. The gap prevents shadow ring 635 from contacting wafer 601 and provides an outlet for edge purge flow. In one embodiment, a dual channel shower head can be used for positive photoresist manufacturing process.

[0053] Although the shadow ring 635 provides some protection of the top surface and edge of the wafer 601, the process gas can flow / diffuse downward along the path between the edge ring 620 and the wafer 601. Therefore, embodiments disclosed herein may include a fluid path between the edge ring 620 and the pedestal 630 to achieve edge clean flow. Providing an inert gas in the fluid path increases the local pressure in the fluid path and prevents the process gas from reaching the edge of the wafer 601. Thus, photoresist deposition along the edge of the wafer 601 is prevented.

[0054] Figure 7A diagrammatic representation of a machine in an exemplary form of a computer system 700 is shown, in which a set of instructions for causing the machine to perform any one or more of the methods described herein can be executed. In alternative embodiments, the machine can be connected (e.g., networked) to other machines in a local area network (LAN), an internal network, an external network, or an Internet network. The machine can operate as a server or client machine in a client-server network environment, or as a peer node machine in a peer-to-peer (or distributed) network environment. The machine can be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a network device, a server, a network router, a switch or a bridge, or any machine capable of executing a set of instructions (sequentially or otherwise) specifying the actions to be taken by the machine. In addition, although only a single machine is shown, the term "machine" should also be deemed to include any collection of machines (e.g., computers) that execute a set (or multiple sets) of instructions to perform any one or more methods described herein, either individually or jointly.

[0055] The exemplary computer system 700 includes a processor 702, a main memory 704 (e.g., a read-only memory (ROM), a flash memory, a dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), a static memory 706 (e.g., a flash memory, a static random access memory (SRAM), an MRAM, etc.), and an auxiliary memory 718 (e.g., a data storage device), which communicate with each other via a bus 730.

[0056] The processor 702 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, etc. More specifically, the processor 702 can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor that implements other instruction sets, or a processor that implements a combination of instruction sets. The processor 702 can also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. The processor 702 is configured to execute processing logic 726 for performing the operations described herein.

[0057] The computer system 700 may further include a network interface device 708. The computer system 700 may further include a video display unit 710 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 712 (e.g., a keyboard), a cursor control device 714 (e.g., a mouse), and a signal generating device 716 (e.g., a speaker).

[0058] The secondary memory 718 may include a machine-accessible storage medium (or more specifically, a computer-readable storage medium) 732 on which is stored one or more sets of instructions (e.g., software 722) that embody any one or more of the methods or functions described herein. The software 722 may also reside completely or at least partially in the main memory 704 and / or in the processor 702 during the execution of the software 722 by the computer system 700, the main memory 704 and the processor 702 also constituting machine-readable storage media. The software 722 may also be sent or received over the network 720 via the network interface device 708.

[0059] Although the machine-accessible storage medium 732 is shown as a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of instructions. The term "machine-readable storage medium" should also be understood to include any medium that can store or encode a set of instructions for execution by a machine and cause the machine to perform any one or more methods of the present disclosure. Therefore, the term "machine-readable storage medium" should include, but is not limited to, solid-state memories and optical and magnetic media.

[0060] According to an embodiment of the present disclosure, a machine-accessible storage medium has instructions stored thereon that cause a data processing system to perform a method of forming a positive photoresist layer on a substrate in a vacuum chamber. The method includes providing a metal precursor vapor into the vacuum chamber. The method also includes providing an oxidant vapor into the vacuum chamber. A reaction between the metal precursor vapor and the oxidant vapor results in the formation of a positive photoresist layer on a surface of the substrate.

[0061] Thus, a method of forming a positive photoresist using a dry process is disclosed.

Claims

1. A method for optimizing post-deposition baking of a photoresist layer, comprising the following steps: depositing the photoresist layer on a substrate; baking the photoresist layer; as well as The properties of the photoresist layer are measured using optical tools.

2. The method of claim 1, wherein the optical tool comprises a single-lamp reflectometer, a dual-lamp reflectometer, an ellipsometer, or a UV-visible spectrophotometer.

3. The method of claim 1, wherein the optical tool uses electromagnetic radiation between 200 nm and 800 nm. 4 . The method of claim 1 , wherein the properties of the photoresist layer include refractive index, dielectric constant, thickness, reflectivity and / or extinction coefficient. The method of claim 4 , wherein the property is related to a microstructure of the photoresist layer.

6. The method of claim 1, wherein the step of measuring a property of the photoresist layer is performed after the baking.

7. The method of claim 6, wherein the optical tool is a different tool than a tool used to bake the photoresist layer.

8. The method of claim 1, wherein the step of measuring a property of the photoresist layer is performed during the baking.

9. The method of claim 8, wherein the optical tool is co-located with a tool for the baking.

10. The method of claim 1, wherein the characteristic is related to one or more of line width roughness, line edge roughness, and sensitivity to radiation exposure. The method according to claim 1 , wherein the photoresist layer is a metal oxide photoresist material.

12. The method of claim 1, wherein the photoresist layer is a chemically amplified resist (CAR).

13. A method for optimizing a post-application bake (PAB) of a photoresist layer, comprising the following steps: depositing a first photoresist layer on the first substrate; baking the first photoresist layer with a first PAB; During or after the first PAB, measuring material properties of the first photoresist layer with an optical tool; depositing a second photoresist layer on the second substrate; baking the second photoresist layer with a second PAB; measuring the material property of the second photoresist layer with the optical tool during or after the second PAB; as well as The photoresist layer is selected to have material properties that provide the most desirable line width roughness, line edge roughness, and / or sensitivity to radiation exposure.

14. The method of claim 13, wherein the first PAB and the second PAB are at different temperatures.

15. The method of claim 13, wherein the first PAB and the second PAB have different durations.

16. The method of claim 13, wherein the optical tool is integrated with the tool for performing the PAB.

17. The method of claim 13, wherein the PAB is optimized without exposing and developing the first photoresist layer or the second photoresist layer.

18. A semiconductor processing tool comprising: a deposition module, wherein the deposition module is configured to deposit a photoresist layer on a substrate using a dry deposition process; a post-resist bake (PAB) module, wherein the PAB module is configured to bake the photoresist layer; as well as An optical tool for measuring one or more characteristics of the photoresist layer during or after the bake.

19. The semiconductor processing tool of claim 18, wherein the optical tool comprises a single lamp reflectometer, a dual lamp reflectometer, an ellipsometer, or a UV-Vis spectrophotometer.

20. The semiconductor processing tool of claim 18, wherein the dry deposition process comprises atomic layer deposition (ALD), plasma enhanced ALD (PE-ALD), chemical vapor deposition (CVD), or plasma enhanced CVD (PE-CVD).

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