Pressure sensor and preparation method thereof

Abstract

The invention provides a pressure sensor and a preparation method thereof, the pressure sensor comprises a substrate, a semiconductor layer, a dielectric layer, a lead structure and a packaging shell, the substrate comprises a plurality of first cavities, a plurality of second cavities and a plurality of vent holes communicated with the second cavities, and the first cavities and the second cavities are distributed in an array; the semiconductor layer is stacked on the upper surface of the substrate, the edge area of the upper surface layer of the semiconductor layer above the openings of the first cavity and the second cavity is provided with four voltage dependent resistors which are uniformly distributed and comprise at least one resistance area, and the upper surface layer of the semiconductor layer above the first cavity and the second cavity is internally provided with a lead-out area; the dielectric layer covers the upper surface of the semiconductor layer, and a contact hole is formed in the dielectric layer; the lead structure is located on the upper surface of the dielectric layer and fills the contact hole; the packaging shell packages the sensor unit, and the top wall and the bottom wall of the packaging shell are respectively provided with a first pressure hole and a second pressure hole. According to the invention, the absolute pressure sensor and the gauge pressure sensor which are arranged in an array are integrated in the same sensor, so that the influence of temperature on the output characteristics of the sensor is eliminated.

Description

Technical Field

[0001] The invention belongs to the field of sensor technology manufacturing and relates to a pressure sensor and a preparation method thereof. Background Art

[0002] MEMS (micro-electromechanical system) pressure sensors can be divided into piezoresistive, capacitive, and piezoelectric types according to their principles. Piezoresistive pressure sensors are widely used due to their high sensitivity and high linearity. Piezoresistive pressure sensors can be divided into three types of pressure sensors: gauge pressure, absolute pressure, and differential pressure according to their functions and application scenarios. These three types of sensors generally have different process technologies, so the process of the single-crystal silicon film used to sense the pressure is also different. Therefore, it is currently impossible to prepare two or more sensors at the same time and integrate them on the same chip. When CMOS-MEMS is compatible, different processes need to be developed for different usage scenarios. For example, gauge pressure sensors generally use alkaline solutions to perform anisotropic etching from the back of the silicon wafer, forming a cavity on the back of the silicon wafer, forming a pressure-sensitive film on the front, and then bonding a layer of glass on the back under standard atmospheric pressure conditions; the difference between differential pressure and gauge pressure sensors lies in the last step. The differential pressure sensor needs to punch a hole in the bonded glass; the absolute pressure sensor first uses an alkaline solution to perform anisotropic etching from the front of the first silicon wafer, and then uses another silicon wafer to bond to the top of the first silicon wafer in a vacuum environment, and then uses chemical mechanical planarization (CMP) to thin the surface to the required thickness to form a pressure-sensitive film.

[0003] Usually, piezoresistive pressure sensors are made using the principle of Wheatstone bridge. The different stresses at different positions on the membrane surface are used. When the sensitive membrane is subjected to pressure, the piezoresistance changes in different sizes, making the bridge no longer balanced and outputting a voltage signal. However, the piezoresistance is also affected by temperature. As the temperature rises or falls, its resistance will also change, making the linearity and sensitivity of the pressure sensor affected by temperature to a certain extent. Generally, a temperature sensor is sealed in a pressure sensor, and then calibrated to a more linear result through algorithm fitting of the back-end processing circuit. As a result, various types of piezoresistive pressure sensors have complex structures, the measurement results are greatly affected by temperature, and the accuracy of the measurement results after fitting is poor.

[0004] In addition, with the complexity of application scenarios, single-function pressure sensors can no longer meet the usage requirements of some occasions, such as industrial automation control, medical field, automotive electronics, etc., which require the use of gauge pressure and absolute pressure sensors at the same time. At this time, the use of multiple sensors will cause the manufacturing and packaging costs of the sensors to increase exponentially.

[0005] Therefore, there is an urgent need to find a pressure sensor that eliminates the influence of temperature on the output of the piezoresistive pressure sensor and improves the application range of the sensor. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a pressure sensor and a preparation method thereof, so as to solve the problem that the pressure sensor in the prior art has a single application scenario and its output is greatly affected by temperature.

[0007] To achieve the above object and other related objects, the present invention provides a method for preparing a pressure sensor, comprising the following steps:

[0008] Providing a substrate, defining at least one sensor unit area on the upper surface of the substrate, forming a plurality of first cavities and a plurality of second cavities on the upper surface of the sensor unit area, wherein the first cavities and the second cavities are distributed in an array and open from the upper surface of the sensor unit area;

[0009] Providing a semiconductor layer, placing the semiconductor layer on the upper surface of the substrate and bonding the semiconductor layer, and thinning the semiconductor layer from the upper surface of the semiconductor layer;

[0010] Four varistors evenly distributed and including at least one resistance region are formed at the edge regions of the upper surface of the semiconductor layer above the openings of the first cavity and the second cavity, respectively, and lead-out regions connected to the ends of the varistors are formed at the edge or peripheral regions of the upper surface of the semiconductor layer above the first cavity and the second cavity;

[0011] Forming a dielectric layer covering the upper surface of the semiconductor layer, forming a contact hole above the lead-out region that penetrates the dielectric layer and exposes the lead-out region, and forming a lead structure located on the upper surface of the dielectric layer and filling the contact hole in the sensor unit region;

[0012] A vent hole is formed and opened from the bottom surface of the substrate, wherein the vent hole is located below the bottom surface of the second cavity and communicates with the second cavity;

[0013] The structure after the vent hole is formed by cutting along the edge of the sensor unit area is used to obtain a single sensor unit, and a packaging shell that encapsulates the sensor unit is formed. The top wall of the packaging shell is provided with a first pressure hole, and the bottom wall of the packaging shell is provided with a second pressure hole that at least exposes the vent hole.

[0014] Optionally, the doping type of the lead-out region is the same as the doping type of the resistance region, and the doping concentration of the lead-out region is higher than the doping concentration of the resistance region.

[0015] Optionally, the resistance areas in the varistor above the adjacent openings of the first cavity and the second cavity are symmetrically distributed.

[0016] Optionally, the resistance areas in the varistors relatively arranged above the first cavity opening are centrally symmetrically distributed about the central axis of the first cavity; and the resistance areas in the varistors relatively arranged above the second cavity opening are centrally symmetrically distributed about the central axis of the second cavity.

[0017] Optionally, the lead structure includes a lead portion, a filling portion and a pad, the filling portion fills the contact hole, and the lead portion is electrically connected to the pad and the filling portion, respectively.

[0018] Optionally, the pad includes a ground pad and a positive pad, the positive pad is electrically connected to the positive electrode of the excitation power supply, and the ground pad is electrically connected to the negative electrode of the excitation power supply.

[0019] Optionally, the pad further includes a first output pad, a second output pad, a third output pad and a fourth output pad, and two first series branches formed by any two adjacent varistors connected in series through the lead portions are formed above each first cavity opening, and the lead portions of the varistors in series in the two first series branches are electrically connected to the first output pad and the second output pad, respectively, and the two ends of each first series branch are electrically connected to the ground pad and the positive electrode pad, respectively, through the lead portions; two second series branches formed by any two adjacent varistors in series are formed above each second cavity opening, and the lead portions of the varistors in series in the two second series branches are electrically connected to the third output pad and the fourth output pad, respectively, and the two ends of each second series branch are electrically connected to the ground pad and the positive electrode pad, respectively, through the lead portions.

[0020] Optionally, in the two first series branches above the opening of the first cavity, the two relatively arranged varistors are electrically connected to the ground pad and the positive electrode pad respectively through the lead portion; in the two second series branches above the opening of the second cavity, the two relatively arranged varistors are electrically connected to the ground pad and the positive electrode pad respectively through the lead portion.

[0021] Optionally, the first series branch and the second series branch are symmetrically distributed.

[0022] Optionally, the first series branch and the second series branch are electrically connected to only one of the ground pads through the lead portion, the two first series branches above each first cavity opening are electrically connected to the same positive electrode pad, the two second series branches above each second cavity opening are electrically connected to the same positive electrode pad, and the series branches above different first cavities and second cavities are electrically connected to different positive electrode pads, respectively.

[0023] Optionally, the sensor unit is spaced apart from a side wall of the packaging shell by a preset distance, and the top wall of the sensor unit is spaced apart from a bottom wall of the packaging shell by a preset distance.

[0024] The present invention also provides a pressure sensor, comprising:

[0025] A substrate, comprising a plurality of first cavities, a plurality of second cavities, and vent holes opening from the bottom surface of the substrate and communicating with the second cavities, wherein the first cavities and the second cavities open from the top surface of the substrate and are distributed in an array;

[0026] A semiconductor layer is stacked on the upper surface of the substrate to block the openings of the first cavity and the second cavity, four uniformly distributed varistors including at least one resistance area are provided in the edge area of ​​the upper surface of the semiconductor layer above the openings of the first cavity and the second cavity, and a lead-out area connected to the end points of the varistors is provided in the edge or peripheral area of ​​the upper surface of the semiconductor layer above the first cavity and the second cavity;

[0027] A dielectric layer covering the upper surface of the semiconductor layer, wherein the dielectric layer is provided with a contact hole penetrating the dielectric layer and exposing the lead-out region at the bottom thereof;

[0028] A lead structure, located on the upper surface of the dielectric layer and filling the contact hole, wherein the substrate, the semiconductor layer, the dielectric layer and the lead structure constitute a sensor unit;

[0029] The packaging shell encapsulates the sensor unit, and the top wall of the packaging shell is provided with a first pressure hole, and the bottom wall of the packaging shell is provided with a second pressure hole that at least exposes the vent hole.

[0030] As described above, the pressure sensor and the preparation method thereof of the present invention respectively form a plurality of the first cavities and the second cavities arranged in an array in the sensor unit area, form an absolute pressure sensor composed of the first cavity, the semiconductor layer and the piezoresistor in the semiconductor layer above the opening of the first cavity, form a gauge pressure sensor composed of the second cavity, the vent hole, the semiconductor layer and the piezoresistor in the semiconductor layer above the opening of the second cavity, and cut to form the structures of the absolute pressure sensor and the gauge pressure sensor to obtain the sensor unit, and then select a packaging shell with different structures according to actual needs for further processing. By packaging, the pressure sensor unit can be applied to different application scenarios, and the process for manufacturing the sensor unit is compatible with the CMOS-MEMS process. There is no need to redesign the plate making according to the purpose, and there is no need to package the temperature sensor in the pressure sensor, which simplifies the production steps, improves the production efficiency, and reduces the production cost. By combining the gauge pressure sensor and the absolute pressure sensor, the temperature compensation in the pressure measurement process is realized by hardware compensation, which eliminates the influence of temperature on the pressure measured by the pressure sensor, saves the step of algorithm fitting of the measurement data, improves the accuracy of the sensor measurement value, and has high industrial utilization value. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Shown is a process flow chart of a method for preparing a pressure sensor of the present invention.

[0032] Figure 2 The cross-sectional structure schematic diagram shows a substrate in the method for preparing a pressure sensor of the present invention.

[0033] Figure 3 It is a schematic diagram showing the cross-sectional structure after forming the first cavity and the second cavity in the method for preparing the pressure sensor of the present invention.

[0034] Figure 4 It is a schematic diagram showing the cross-sectional structure after the substrate and the semiconductor layer are bonded in the method for preparing the pressure sensor of the present invention.

[0035] Figure 5 It is a schematic diagram showing the cross-sectional structure after thinning the semiconductor layer in the method for preparing the pressure sensor of the present invention.

[0036] Figure 6 It is a schematic diagram showing the cross-sectional structure after forming the lead-out region and the varistor in the method for preparing the pressure sensor of the present invention.

[0037] Figure 7 It is a schematic diagram showing the cross-sectional structure after forming the lead structure in the method for preparing the pressure sensor of the present invention.

[0038] Figure 8 It is a schematic diagram of the top surface structure after forming the lead structure in the method for preparing the pressure sensor of the present invention.

[0039] Fig. 9 It is a schematic diagram showing the cross-sectional structure after forming the vent hole in the method for preparing the pressure sensor of the present invention.

[0040] Fig.10 It is a schematic diagram of the bottom structure after forming the vent hole in the preparation method of the pressure sensor of the present invention.

[0041] Fig.11 Display as Fig. 9 Schematic diagram of the structure of the AA surface in the middle.

[0042] Fig.12 Display as Fig.10 Schematic diagram of the BB surface structure when the dielectric layer is under pressure.

[0043] Fig.13 Display as Fig.10 Schematic diagram of the CC surface structure when the dielectric layer is under pressure.

[0044] Fig.14 It shows a schematic diagram of a packaging structure after forming a packaging shell in the method for preparing the pressure sensor of the present invention.

[0045] Fig.15 It is a schematic diagram showing another packaging structure after forming a packaging shell in the method for preparing the pressure sensor of the present invention.

[0046] Fig.16 It is a schematic diagram showing a third packaging structure after forming a packaging shell in the method for preparing the pressure sensor of the present invention.

[0047] Fig.17 An equivalent circuit diagram of a Wheatstone bridge circuit above the openings of the first cavity and the second cavity of the pressure sensor of the present invention is shown.

[0048] Description of Figure Numbers

[0049] 1 Substrate

[0050] 11 First cavity

[0051] 12 Second cavity

[0052] 13 Ventilation holes

[0053] 2 Semiconductor layer

[0054] 21, 211, 212, 213, 214 Varistor

[0055] 22 Lead-out area

[0056] 3 Dielectric layer

[0057] 31 Contact hole

[0058] 4 Lead structure

[0059] 41 Lead wire

[0060] 42 Filling

[0061] 43 pads

[0062] 431 Ground pad

[0063] 432 positive electrode pad

[0064] 433 First output pad

[0065] 434 Second output pad

[0066] 435 Third output pad

[0067] 436 Fourth output pad

[0068] 5. Package Shell

[0069] 51 First pressure hole

[0070] 52 Second pressure hole DETAILED DESCRIPTION

[0071] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0072] See also Figures 1 to 17 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0073] Embodiment 1

[0074] This embodiment provides a method for preparing a pressure sensor, such as Figure 1 FIG. 1 is a process flow chart of a method for preparing the pressure sensor, comprising the following steps:

[0075] S1: providing a substrate, defining at least one sensor unit region on an upper surface layer of the substrate, forming a plurality of first cavities and a plurality of second cavities on an upper surface layer of the sensor unit region, wherein the first cavities and the second cavities are distributed in an array and open from an upper surface of the sensor unit region;

[0076] S2: providing a semiconductor layer, placing the semiconductor layer on the upper surface of the substrate and bonding the semiconductor layer, and thinning the semiconductor layer from the upper surface of the semiconductor layer;

[0077] S3: forming four uniformly distributed varistors including at least one resistance region at the edge regions of the upper surface of the semiconductor layer above the openings of the first cavity and the second cavity, respectively, and forming lead-out regions connected to the end points of the varistors at the edge or peripheral regions of the upper surface of the semiconductor layer above the first cavity and the second cavity;

[0078] S4: forming a dielectric layer covering the upper surface of the semiconductor layer, and forming a contact hole above the lead-out region that penetrates the dielectric layer and exposes the lead-out region, and forming a lead structure located on the upper surface of the dielectric layer and filling the contact hole in the sensor unit region;

[0079] S5: forming a vent hole opening from the bottom surface of the substrate, wherein the vent hole is located below the bottom surface of the second cavity and communicates with the second cavity;

[0080] S6: Cutting the substrate, the semiconductor layer and the dielectric layer along the sensor unit area to obtain a single sensor unit, forming a packaging shell that encapsulates the sensor unit, wherein the top wall of the packaging shell is provided with a first pressure hole, and the bottom wall of the packaging shell is provided with a second pressure hole that at least exposes the vent hole.

[0081] See also Figures 2 to 5 , perform step S1 and step S2: provide a substrate 1, and define at least one sensor unit area on the upper surface of the substrate 1, form a plurality of first cavities 11 and a plurality of second cavities 12 on the upper surface of the sensor unit area, the first cavities 11 and the second cavities 12 are distributed in an array and open from the upper surface of the sensor unit area; provide a semiconductor layer 2, place the semiconductor layer 2 on the upper surface of the substrate 1 and bond it, and thin the semiconductor layer 2 from the upper surface of the semiconductor layer 2.

[0082] Specifically, Figure 2 , which is a schematic diagram of the cross-sectional structure of the substrate 1. The material of the substrate 1 includes silicon, silicon germanium, silicon carbide or other suitable semiconductor materials; the conductivity type of the substrate 1 can be N-type or P-type. In this embodiment, an N-type silicon wafer is used as the substrate 1.

[0083] Specifically, under the condition of ensuring the performance of the device, the size and shape of the sensor unit area can be selected according to actual conditions and are not limited here.

[0084] Specifically, Figure 3 As shown, it is a schematic diagram of the cross-sectional structure after the first cavity 11 and the second cavity 12 are formed, the first cavity 11 and the second cavity 12 are formed synchronously, and the formation of the first cavity 11 and the second cavity 12 in the sensor unit area includes the following steps: forming a patterned first shielding layer on the upper surface of the substrate; etching the substrate 1 based on the patterned first shielding layer to obtain the first cavity 11 and the second cavity 12 of a preset depth.

[0085] Specifically, the method of forming the first shielding layer and the patterned first shielding layer is a commonly used photoresist coating, exposure, and development method, which will not be described in detail here.

[0086] Specifically, the method for etching the substrate 1 includes dry etching, wet etching or other suitable methods. In this embodiment, the substrate 1 is etched using an alkaline etchant (KOH), that is, the substrate 1 is etched using a wet etching method to obtain the first cavity 11 and the second cavity 12 of a preset depth.

[0087] Specifically, under the condition of ensuring the performance of the sensor, the first cavity 11 and the second cavity 12 may also be formed in steps.

[0088] Specifically, under the condition of ensuring the performance of the sensor, the arrangement of the first cavity 11 and the second cavity 12 in each of the sensor unit areas can be selected according to actual conditions, and is not limited here. In this embodiment, two first cavities 11 and two second cavities 12 are provided in each of the sensor unit areas, and the two first cavities 11 and the two second cavities 12 are arranged diagonally opposite to each other.

[0089] Specifically, the conductivity type of the semiconductor layer 2 is the same as the conductivity type of the substrate 1 .

[0090] Specifically, Figure 4 As shown, it is a schematic diagram of the cross-sectional structure after the semiconductor layer 2 is bonded to the substrate 1. The method for bonding the semiconductor layer 2 to the substrate 1 is a commonly used semiconductor bonding process, which will not be repeated here.

[0091] Specifically, Figure 5, which is a schematic diagram of the cross-sectional structure after the semiconductor layer 2 is thinned, and the method for thinning the semiconductor layer 2 includes chemical mechanical polishing or other suitable methods. In this embodiment, the semiconductor layer 2 is thinned by chemical mechanical polishing, and the thinned semiconductor layer 2 is used as a sensitive film of the sensor. Since the thickness of the sensitive film affects the sensitivity of the sensor, and the uniformity of the sensitive film affects the linearity of the resistance change of the sensor, the thickness of the thinned semiconductor layer 2 and the uniformity of the material of the semiconductor layer 2 are determined according to the actual working environment and measurement accuracy of the sensor.

[0092] Specifically, the thickness of the semiconductor layer 2 after thinning can be selected according to actual conditions and is not limited here.

[0093] Please see again Figures 6 to 8 , executing step S3 and step S4: forming four uniformly distributed varistors 21 including at least one resistance area (not shown) at the edge area of ​​the upper surface of the semiconductor layer 2 above the openings of the first cavity 11 and the second cavity 12, respectively, and forming a lead-out area 22 connected to the end points of the varistor 21 at the edge or peripheral area of ​​the upper surface of the semiconductor layer 2 above the first cavity 11 and the second cavity 12; forming a dielectric layer 3 covering the upper surface of the semiconductor layer 2, and forming a contact hole 31 above the lead-out area 22 that penetrates the dielectric layer 3 and exposes the lead-out area 22, and forming a lead structure 4 located on the upper surface of the dielectric layer 3 and filling the contact hole 31 in the sensor unit area.

[0094] Specifically, Figure 6 As shown, it is a schematic diagram of the cross-sectional structure after the lead-out area 22 and the varistor 21 are formed. The method for forming the varistor 21 includes ion implantation or other suitable methods; the method for forming the lead-out area 22 includes ion implantation or other suitable methods. In this embodiment, a patterned varistor mask layer is formed on the upper surface of the semiconductor layer 2, and ion implantation is performed based on the patterned varistor mask layer, and then the varistor mask layer is removed, and then a patterned lead-out area mask layer is formed on the upper surface of the semiconductor layer 2, and ion implantation is performed based on the patterned lead-out area mask layer, and finally annealing is performed to obtain the varistor 21 located on the upper surface layer of the semiconductor layer 2, and at the same time, the lead-out area 22 located on the upper surface layer of the semiconductor layer 2 and used to lead out the varistor 21 is obtained, and the lead-out area mask layer needs to be removed before the next process.

[0095] As an example, the doping type of the lead-out region 22 is the same as the doping type of the resistor region, and the doping concentration of the lead-out region 22 is higher than the doping concentration of the resistor region.

[0096] Specifically, the conductivity type of the resistor region is opposite to the conductivity type of the semiconductor layer 2, that is, when the doping type of the semiconductor layer 2 is N-type, the doping type of the resistor region is P-type, and when the doping type of the semiconductor layer 2 is P-type, the doping type of the resistor region is N-type. In this embodiment, the doping type of the resistor region is P-type.

[0097] Specifically, the doping concentration of the resistance zone is lower than the doping concentration of the lead-out zone 22, so that when the semiconductor layer 2 in the area above the openings of the first cavity 11 and the second cavity 12 is deformed, the resistance value of the varistor 21 caused by the deformation of the resistance zone changes greatly, and the resistance value of the lead-out zone 22 caused by the deformation changes less and has no effect on the required measurement accuracy.

[0098] Specifically, the four varistors 21 are evenly distributed along the upper surface of the semiconductor layer 2 just above the opening of the first cavity 11, and while ensuring the sensor performance, the vertical projection of the edge of the varistor 21 can coincide with the opening edge of the first cavity 11 and the second cavity 12, or can be spaced a preset distance from the opening edge of the first cavity 11 and the second cavity 12.

[0099] Specifically, the varistor 21 includes a plurality of resistance areas, and the plurality of resistance areas can be connected in series or in parallel with a connecting portion (not shown) to form a resistance structure, or a plurality of resistance areas can be connected in series or in parallel to form a resistance structure.

[0100] As an example, the resistance areas in the varistor 21 above the openings of the adjacent first cavity 11 and the second cavity 12 are symmetrically distributed, that is, the resistance areas above the openings of the first cavity 11 and the second cavity 12 in each sensor unit area are symmetrically distributed.

[0101] Specifically, in each of the sensor unit regions, the lead regions 22 around or in edge regions of the semiconductor layer 2 above the openings of the first cavity 11 and the second cavity 12 are symmetrically distributed.

[0102] As an example, the resistance area in the varistor 21 relatively arranged above the opening of the first cavity 11 is centrally symmetrically distributed about the central axis of the first cavity 11; the resistance area in the varistor 21 relatively arranged above the opening of the second cavity 12 is centrally symmetrically distributed about the central axis of the second cavity 12. That is, after the varistor 21 relatively arranged above the opening of the first cavity 11 is rotated 180° along the central axis of the first cavity 11, the distribution of the resistance area in the varistor 21 above the opening of the first cavity 11 does not change; after the varistor 21 relatively arranged above the opening of the second cavity 12 is rotated 180° along the central axis of the second cavity 12, the distribution of the resistance area in the varistor 21 above the opening of the second cavity 12 does not change.

[0103] Specifically, the lead-out areas 22 around the semiconductor layer 2 or in the edge area above each opening of the first cavity 11 are distributed centrally and symmetrically, and the lead-out areas 22 around the semiconductor layer 2 or in the edge area above each opening of the second cavity 12 are distributed centrally and symmetrically, that is, the lead-out areas 22 around the semiconductor layer 2 or in the edge area above the opening of the first cavity 11 are rotated 180° around the central axis of the first cavity 11, and the distribution of the lead-out areas 22 around the semiconductor layer 2 or in the edge area above the opening of the first cavity 11 remains unchanged, and the lead-out areas 22 around the semiconductor layer 2 or in the edge area above the opening of the second cavity 12 are rotated 180° around the central axis of the second cavity 12, and the distribution of the lead-out areas 22 around the semiconductor layer 2 or in the edge area above the opening of the second cavity 12 remains unchanged.

[0104] Specifically, under the condition of ensuring the performance of the sensor, the varistor 21 and the lead-out area 22 above the first cavity 11 and the second cavity 12 may also be arranged in other suitable manners, which are not limited here.

[0105] Specifically, the method for forming the dielectric layer 3 includes chemical vapor deposition, physical vapor deposition or other suitable methods. In this embodiment, the dielectric layer 3 is formed by low pressure chemical vapor deposition (LPCVD).

[0106] Specifically, under the condition of ensuring the performance of the sensor, the thickness of the dielectric layer 3 can be selected according to actual conditions and is not limited here.

[0107] Specifically, the method for forming the contact hole 31 includes dry etching, wet etching or other suitable methods. In this embodiment, a patterned contact hole mask layer is formed on the upper surface of the dielectric layer 3, and then the dielectric layer 3 is etched based on the patterned contact hole mask layer using a dry etching process to obtain the contact hole 31 that penetrates the dielectric layer 3 and exposes the lead-out region 22.

[0108] As an example, Figure 7 and Figure 8 As shown, they are respectively a schematic diagram of the cross-sectional structure after the lead structure 4 is formed and a schematic diagram of the top surface structure after the lead structure 4 is formed. The lead structure 4 includes a lead portion 41, a filling portion 42 and a pad 43. The filling portion 42 fills the contact hole 31, and the lead portion 41 is electrically connected to the pad 43 and the filling portion 42, respectively.

[0109] Specifically, forming the lead structure 4 includes the following steps: forming a lead material layer (not shown) covering the exposed upper surface of the dielectric layer 3 and filling the contact hole 31, and forming a patterned second shielding layer (not shown) on the exposed upper surface of the lead material layer; etching the lead material layer based on the patterned second shielding layer to obtain the lead structure 4, wherein the portion of the lead structure 4 that fills the contact hole 31 serves as the filling portion 42, the portion located on the upper surface of the dielectric layer 3 and electrically connected to the filling portion 42 serves as the lead portion 41, and the end portion of the lead structure 4 away from the filling portion 42 serves as the soldering pad 43, and the width of the soldering pad 42 is not less than the width of the lead portion 41.

[0110] Specifically, while ensuring the performance of the sensor, the lead portion 41 and the pad 43 can be formed after the filling portion 42 is formed separately, or the pad 43 electrically connected to the end point of the lead portion 41 away from the filling portion 42 can be formed separately after the filling portion 42 and the lead portion 41 are formed simultaneously.

[0111] Specifically, under the condition of ensuring the performance of the sensor, the shape and size of the pad 43 can be selected according to the actual situation, and no limitation is imposed here. In this embodiment, the shape of the pad 43 is square.

[0112] Specifically, the method of forming the lead material layer includes magnetron sputtering, physical vapor deposition, chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, atomic layer deposition or other suitable methods.

[0113] Specifically, the material of the lead portion 41 includes titanium, titanium nitride, silver, gold, copper, tungsten, nickel, platinum, aluminum or other suitable conductive materials; the material of the filling portion 42 includes titanium, titanium nitride, silver, gold, copper, tungsten, nickel, platinum, aluminum or other suitable conductive materials; the material of the pad 43 includes titanium, titanium nitride, silver, gold, copper, tungsten, nickel, platinum, aluminum or other suitable conductive materials.

[0114] Specifically, the contact type between the filling portion 42 and the lead-out region 22 is ohmic contact.

[0115] As an example, the pad 43 includes a ground pad 431 and a positive pad 432 , the positive pad 432 is electrically connected to the positive electrode of the excitation power source, and the ground pad 431 is electrically connected to the negative electrode of the excitation power source.

[0116] As an example, the pad 43 further includes a first output pad 433, a second output pad 434, a third output pad 435 and a fourth output pad 436. Two first series branches are formed above the opening of each first cavity 11, which are formed by connecting any two adjacent varistors 21 in series through the lead portion 41. The lead portions 41 of the two first series branches that connect the varistors 21 in series are electrically connected to the first output pad 433 and the second output pad 434, respectively. The two ends of each first series branch are respectively connected through The lead portion 41 is electrically connected to the ground pad 431 and the positive electrode pad 432, and two second series branches consisting of any two adjacent varistors 21 connected in series are formed above the opening of each second cavity 12. The lead portions 41 of the two second series branches that connect the varistors 21 in series are electrically connected to the third output pad 435 and the fourth output pad 436, respectively, and the two ends of each second series branch are electrically connected to the ground pad 431 and the positive electrode pad 432 through the lead portion 41. That is, the varistor 21 above the opening of the first cavity 11 in each of the sensor unit areas forms two first series branches through the lead area 22 and the lead structure 4, and the two first series branches above each of the first cavities 11 form an independent Wheatstone bridge circuit, and the varistor 21 above the opening of the second cavity 12 in each of the sensor unit areas forms two second series branches through the lead area 22 and the lead structure 4, and the two second series branches above each of the second cavities 12 openings form an independent Wheatstone bridge circuit.

[0117] Specifically, the first output pad 433 and the second output pad 434 are respectively used to lead out two different first series branches above the first cavity 11, and the first output pad 433 and the second output pad 434 are respectively electrically connected to the lead portion 41 of the two varistors 21 in series in the first series branch through the lead portion 41, and the third output pad 435 and the fourth output pad 436 are respectively used to lead out two different second series branches above the second cavity 12, and the third output pad 435 and the fourth output pad 436 are respectively electrically connected to the lead portion 41 of the two varistors 21 in series in the second series branch through the lead portion 41.

[0118] As an example, in the two first series branches above the opening of the first cavity 11, the two varistors 21 arranged opposite to each other are electrically connected to the ground pad 431 and the positive electrode pad 432 respectively through the lead portion 41; in the two second series branches above the opening of the second cavity 12, the two varistors 21 arranged opposite to each other are electrically connected to the ground pad 431 and the positive electrode pad 432 respectively through the lead portion 41. That is, of the two varistors 21 arranged opposite to each other above the opening of the first cavity 11, one is electrically connected to the ground pad 431, and the other is electrically connected to the positive electrode pad 432; of the two varistors 21 arranged opposite to each other above the opening of the second cavity 12, one is electrically connected to the ground pad 431, and the other is electrically connected to the positive electrode pad 432.

[0119] Specifically, when the sensor is powered on and the semiconductor layer 2 is deformed, since the equivalent resistance change and change trend of the relatively arranged varistors 21 are the same, the relatively arranged varistors 21 in the two series branches of the same Wheatstone bridge circuit are electrically connected to the ground pad 431 and the positive pad 432 respectively, thereby causing the potentials of the first output pad 433, the second output pad 434, the third output pad 435 and the fourth output pad 436 to change, thereby realizing the collection of electrical signals, thereby facilitating the measurement of the pressure value causing the deformation of the semiconductor layer 2.

[0120] As an example, the first series branch and the second series branch are symmetrically distributed, that is, the first series branch and the second series branch in each sensor unit area are symmetrically distributed, so as to facilitate the wiring of the sensor.

[0121] Specifically, under the condition of ensuring the performance of the sensor, the first series branch and the second series branch may also be distributed asymmetrically.

[0122] As an example, the first series branch and the second series branch are electrically connected to only one ground pad 431 through the lead portion 41, the two first series branches above each opening of the first cavity 11 are electrically connected to the same positive pad 432, the two second series branches above each opening of the second cavity 12 are electrically connected to the same positive pad 432, and the series branches above different first cavities 11 and second cavities 11 are respectively electrically connected to different positive pads 432. That is, the first series branch and the second series branch in each Wheatstone bridge circuit in the sensor unit area are electrically connected to the same ground pad 431 through the lead portion 41, the first series branch in each Wheatstone bridge circuit shares one positive pad 432, the second series branch in each Wheatstone bridge circuit shares one positive pad 432, and the positive pads 432 in each Wheatstone bridge circuit are different.

[0123] Specifically, under the condition of ensuring the performance of the sensor, the distribution of the pads 43 and the lead parts 41 in each of the sensor unit areas can also be selected according to actual conditions, and are no longer restricted here; the number and distribution of the ground pads 431 and the positive electrode pads 432 in each of the sensor unit areas can also be selected according to actual conditions, and are no longer restricted here.

[0124] Specifically, the first output pad 431 and the second output pad 432 are used to measure the change of the electrical signal (voltage or current) in the Wheatstone bridge circuit above the opening of the first cavity 11, and the third output pad 435 and the fourth output pad 436 are used to measure the change of the electrical signal (voltage or current) in the Wheatstone bridge circuit above the opening of the second cavity 12.

[0125] See also Figures 9 to 16 , perform the step S5 and the step S6: form a vent hole 13 opening from the bottom surface of the substrate 1, the vent hole 13 is located below the bottom surface of the second cavity 12 and communicates with the second cavity 12; cut the structure after the vent hole 13 is formed along the edge of the sensor unit area to obtain a single sensor unit, and form a packaging shell 5 that encapsulates the sensor unit, the top wall of the packaging shell 5 is provided with a first pressure hole 51, and the bottom wall of the packaging shell 5 is provided with a second pressure hole 52 that at least exposes the vent hole 13.

[0126] Specifically, Fig. 9 and Fig.10, which are respectively a schematic diagram of a cross-sectional structure after forming the vent hole 13 and a bottom view after forming the vent hole 13. The method of forming the vent hole 13 includes dry etching, wet etching or other suitable methods. In this embodiment, dry etching is used to etch the substrate 1. Since dry etching has good anisotropy, the vent hole 13 with a better hole shape can be obtained.

[0127] Specifically, Fig.11 , Fig.12 and Fig.13 As shown, they are Fig. 9 Schematic diagram of the structure of the AA surface, Fig.10 Schematic diagram of the cross-sectional structure of the BB surface and Fig.10 The cross-sectional structural diagram of the middle CC plane shows that the opening size and shape of the vent hole 13 can be selected according to actual conditions while ensuring the sensor performance and the communication between the vent hole 13 and the second cavity 12, and is not limited here.

[0128] Specifically, due to the formation of the vent 13, the first cavity 11, the semiconductor layer 2 and the varistor 21 in the semiconductor layer 2 located above the opening of the first cavity 11 constitute an absolute pressure sensor, and the second cavity 12, the semiconductor layer 2 and the varistor 21 in the semiconductor layer 2 located above the opening of the second cavity 12 constitute a gauge pressure sensor.

[0129] Specifically, the method of cutting the structure after the vent hole 13 is formed includes laser cutting, mechanical cutting or other suitable methods.

[0130] Specifically, before forming the packaging shell 5, the step of electrically connecting the pad 43 in the lead-out structure 4 to an external circuit is also included, wherein the external circuit includes a circuit electrically connected to a power supply and a back-end signal processing circuit.

[0131] Specifically, the method for forming the packaging shell 5 is a commonly used method for manufacturing a packaging shell of a pressure sensor, which will not be described in detail here.

[0132] Specifically, while ensuring the performance of the sensor, the size and shape of the packaging shell 5 can be selected according to actual conditions and are no longer restricted here; the thickness of the top wall, side wall and bottom wall of the packaging shell 5 can be selected according to actual conditions and are no longer restricted here.

[0133] As an example, the sensor unit is spaced apart from a side wall of the packaging shell 5 by a preset distance, and the top wall of the sensor unit is spaced apart from a bottom wall of the packaging shell 5 by a preset distance.

[0134] Specifically, while ensuring the performance of the sensor, the distance between the sensor unit and the side wall of the packaging shell 5 can be selected according to actual conditions and is no longer restricted here; the distance between the sensor unit and the top wall of the packaging shell 5 can be selected according to actual conditions and is no longer restricted here.

[0135] Specifically, while ensuring the performance of the sensor, the opening shape and opening size of the first pressure hole 51 can be selected according to actual conditions and are no longer restricted here; the opening shape and opening size of the second pressure hole 52 can be selected according to actual conditions and are no longer restricted here.

[0136] Specifically, Fig.14 As shown, it is a schematic diagram of a packaging structure after the packaging shell 5 is formed, the first pressure hole 51 is used to pass the air pressure to be measured, and the second pressure hole 52 is used to pass the standard atmospheric pressure. The gauge pressure sensor and the absolute pressure sensor in the pressure sensor work simultaneously. This packaging method can be used to measure the pressure value of the air pressure to be measured.

[0137] Specifically, Fig.15 As shown, it is a schematic diagram of another packaging structure after the packaging shell 5 is formed, the first pressure hole 51 is used to allow the standard atmospheric pressure to pass, the second pressure hole 52 is used to allow the air pressure to be measured, the gauge pressure sensor in the pressure sensor works, and the absolute pressure sensor is used as a reference bridge. This packaging method can be used to test the temperature coefficient of the piezoresistance of the pressure sensor.

[0138] Specifically, Fig.16 As shown, it is a schematic diagram of the third packaging structure after the packaging shell 5 is formed, the first pressure hole 51 is used to pass the first air pressure to be measured, and the second pressure hole 52 is used to pass the second air pressure to be measured. The gauge pressure sensor and the absolute pressure sensor in the pressure sensor work simultaneously, and the absolute pressure sensor can measure the pressure value generated by the first air pressure to be measured. Since the pressures of the two air pressures to be measured are different, the gauge pressure sensor can be used as a differential pressure sensor, and then the pressure values ​​of different air pressures to be measured can be measured.

[0139] Specifically, by forming multiple absolute pressure sensors and multiple gauge pressure sensors in the same sensor unit area, and then combining the absolute pressure sensor and the gauge pressure sensor in the sensor unit, the scalability of the sensor unit is enhanced, and different packaging methods are selected according to actual needs. Based on the cooperation between the sensor unit and the back-end signal processing circuit, multi-scenario and multi-functional applications are realized.

[0140] Specifically, since the process for manufacturing the pressure sensor is compatible with the CMOS-MEMS process, there is no need to redesign the plate making according to the purpose, and there is no need to package the temperature sensor in the pressure sensor, which simplifies the manufacturing steps, improves the manufacturing efficiency, and reduces the manufacturing cost.

[0141] The preparation method of the pressure sensor of the present embodiment is as follows: a plurality of the first cavities 11 and the second cavities 12 are respectively formed in the sensor unit area, the first cavities 11 and the second cavities 12 are arranged in an array, and a plurality of absolute pressure sensors and a plurality of gauge pressure sensors are formed in one sensor unit area and cut to obtain the sensor unit, wherein the absolute pressure sensor is composed of the first cavity 11, the semiconductor layer 2 and the piezoresistor 21 in the semiconductor layer 2 located above the opening of the first cavity 11, and the gauge pressure sensor is composed of the second cavity 12, the vent 13, the semiconductor layer 2 and the piezoresistor 21 in the semiconductor layer 2 located above the opening of the second cavity 12. Different packaging methods are selected according to actual needs, so that the sensor unit can be flexibly applied to different application scenarios, and the process of manufacturing the sensor unit is compatible with the CMOS-MEMS process, and there is no need to redesign the plate making according to the purpose, and there is no need to package the temperature sensor in the pressure sensor, which simplifies the manufacturing steps, improves the manufacturing efficiency, and reduces the manufacturing cost.

[0142] Embodiment 2

[0143] This embodiment provides a pressure sensor, such as Fig.14 , Fig.15 and Fig.16As shown, they are respectively a schematic diagram of a cross-sectional structure of the pressure sensor, another schematic diagram of a cross-sectional structure of the pressure sensor, and a schematic diagram of a third cross-sectional structure of the pressure sensor, comprising a substrate 1, a semiconductor layer 2, a dielectric layer 3, a lead structure 4, and a packaging shell 5, wherein the substrate 1 comprises a plurality of first cavities 11, a plurality of second cavities 12, and vents 13 opening from the bottom surface of the substrate 1 and communicating with the second cavities 12, the first cavities 11 and the second cavities 12 opening from the upper surface of the substrate 1 and being distributed in an array; the semiconductor layer 2 is stacked on the upper surface of the substrate 1 to block the openings of the first cavities 11 and the second cavities 12, and the upper surface of the semiconductor layer 2 above the openings of the first cavities 11 and the second cavities 12 The edge area of ​​the layer is provided with four evenly distributed varistors 21 including at least one resistance area, and the edge or peripheral area of ​​the upper surface of the semiconductor layer 2 above the first cavity 11 and the second cavity 12 is provided with a lead-out area 22 connected to the end point of the varistor 21; the dielectric layer 3 covers the upper surface of the semiconductor layer 2, and the dielectric layer 3 is provided with a contact hole 31 penetrating the dielectric layer 3 and exposing the lead-out area 22 on the bottom surface; the lead structure 4 is located on the upper surface of the dielectric layer 3 in each of the sensor units and fills the contact hole 31; the packaging shell 5 accommodates the sensor unit, and the top wall of the packaging shell 5 is provided with a first pressure hole 51, and the bottom wall of the packaging shell 5 is provided with a second pressure hole 52 exposing the vent 13.

[0144] Specifically, under the condition of ensuring the performance of the sensor, the doping concentration, thickness and size of the substrate 1 can be selected according to actual conditions and are not limited here.

[0145] Specifically, while ensuring the performance of the sensor, the depth, opening size and opening shape of the first cavity 11 can be selected according to actual conditions, and are not limited here; the depth, opening size and opening shape of the second cavity 12 can be selected according to actual conditions, and are not limited here. The depth here refers to the distance between the bottom surface of each cavity and the opening of the cavity. In this embodiment, both the first cavity 11 and the second cavity 12 have square openings.

[0146] Specifically, while ensuring the performance of the sensor, the size and thickness of the semiconductor layer 2 can be selected according to actual conditions and are not limited here.

[0147] Specifically, under the condition that the sensor performance is ensured and the doping concentration of the resistance area is lower than the doping concentration of the lead-out area 22, the doping concentration, size, thickness and shape of the resistance area can be selected according to the actual situation, and are not limited here; the doping concentration, size, thickness and shape of the lead-out area 22 can be selected according to the actual situation, and are not limited here. In this embodiment, only one resistance area is provided in the varistor 21, and the shape of the resistance area is U-shaped, and the shape of each lead-out area 22 is square or strip.

[0148] Specifically, the material of the dielectric layer 3 includes silicon oxide, silicon nitride or other suitable dielectric materials.

[0149] Specifically, under the condition that the sensor performance is guaranteed and the bottom surface of the contact hole 31 exposes the lead-out area 22 , the size, shape and position of the contact hole 31 can be selected according to actual conditions and are not limited here.

[0150] Specifically, the lead structure 4 includes a lead portion 41, a filling portion 42 and a pad 43, the filling portion 42 fills the contact hole 31, and the lead portion 41 is electrically connected to the pad 43 and the filling portion 42, respectively, wherein the pad 43 includes a ground pad 431, a positive electrode pad 432, a first output pad 433, a second output pad 434, a third output pad 435 and a fourth output pad 436, the positive electrode pad 432 is electrically connected to the positive electrode of the excitation power supply, and the ground pad 431 is electrically connected to the negative electrode of the excitation power supply.

[0151] Specifically, the packaging shell 5 is used to package the sensor unit to protect the sensor unit. The material of the packaging shell 5 includes ceramic, metal or other suitable materials.

[0152] Specifically, the first pressure hole 51 and the second pressure hole 52 are both used to allow the air pressure to be measured to pass through.

[0153] Specifically, due to the effect of the pressure generated by the air pressure, the semiconductor layer 2 that blocks the first cavity 11 and the second cavity 12 is deformed, and then the resistance value of the varistor 21 changes.

[0154] Specifically, the Wheatstone bridge circuit composed of the varistor 21 above the opening of the first cavity 11, the lead-out area 22 and the lead structure 4, and the Wheatstone bridge circuit composed of the varistor 21 above the opening of the second cavity 12, the lead-out area 22 and the lead structure 4, and the equivalent circuits of the Wheatstone bridges above the openings of the first cavity 11 and the second cavity 12 are the same. In this embodiment, the resistance values ​​of the varistors 21 above the openings of the first cavity 11 and the second cavity 12 are also the same.

[0155] Specifically, Fig.17 As shown, it is an equivalent circuit diagram of the Wheatstone bridge circuit above the openings of the first cavity 11 and the second cavity 12. When the semiconductor layer 2 is not subjected to external force, the voltage difference between the first output pad 433 and the second output pad 434 and the third output pad 435 and the fourth output pad 436 is zero. The varistor 211 and the varistor 214 and the varistor 212 and the varistor 213 are two pairs of varistors arranged opposite to each other. When the semiconductor layer 2 is deformed by force, the resistance values ​​of the varistor 211 and the varistor 214 in the figure become smaller, and the resistance values ​​of the varistor 212 and the varistor 213 become larger, so that the voltage difference between the first output pad 433 and the second output pad 434 and the third output pad 435 and the fourth output pad 436 is no longer zero, and changes linearly with the increase of external force, so that the measurement of the change of the electrical signal can be realized, and the pressure value is obtained based on the change of the electrical signal.

[0156] Specifically, since the absolute pressure sensor and the gauge pressure sensor are integrated into one sensor unit, the hardware temperature compensation is realized by processing the external circuit end and utilizing the hardware cooperation, and the temperature (thermal zero drift T CO , resistance temperature coefficient T CR , Thermal sensitivity drift T CS For example, the pressure P generated by the measured air pressure is introduced into the first pressure hole 51, the pressure P0 generated by the standard atmospheric pressure is introduced into the second pressure hole 52, and the measured ambient temperature is T. For the gauge pressure sensor, the total pressure on the semiconductor layer 2 above the opening of the second cavity 12 is P-P0, and its output voltage is V1, and the piezoresistance coefficient is φ(T), which is related to temperature. Then, the voltage difference V1 between the third output pad 435 and the fourth output pad 436 is (P-P0)·φ(T).

[0157] For the absolute pressure sensor, the pressure applied to the semiconductor layer 2 above the opening of the first cavity 11 is P0, its output voltage is V2, and the piezoresistance coefficient is φ(T), which is related to temperature. Then, the voltage difference V2 between the first output pad 433 and the second output pad 434 is V2=P0·φ(T).

[0158] As the temperature changes to T1, the output voltage will also change, that is, the output voltage difference V1′ and V′2 after the change is:

[0159] V1′=(P-P0)·φ(T1)

[0160] V′2=P0·φ(T1)

[0161] It can be obtained that the pressure generated by the actual air pressure to be measured At this point, the temperature coefficient of the pressure value generated by the actual measured air pressure has been offset, and as a result, the resistance temperature coefficient, thermal zero drift and thermal sensitivity drift caused by temperature changes are also eliminated at the same time. Thus, temperature compensation is achieved through hardware matching, thereby improving the accuracy of sensor measurement.

[0162] Specifically, by combining a gauge pressure sensor and an absolute pressure sensor arranged in an array in the pressure sensor, temperature compensation in the pressure measurement process is achieved by means of hardware compensation. There is no need to set a temperature sensor in the sensor, thereby avoiding the step of calibrating the pressure data by performing algorithm simulation using the temperature value measured by the temperature sensor and the measured value of the pressure sensor, eliminating the influence of temperature on the pressure measured by the pressure sensor, improving the accuracy of the pressure measured by the sensor, and facilitating measurement.

[0163] The pressure sensor of this embodiment realizes temperature compensation in the pressure measurement process by means of hardware compensation by setting a combination of a gauge pressure sensor and an absolute pressure sensor arranged in an array in the sensor unit. There is no need to set a temperature sensor in the sensor, thus avoiding the step of calibrating the pressure data by performing algorithm simulation based on the temperature value measured by the temperature sensor and the measured value of the pressure sensor, eliminating the influence of temperature on the pressure measured by the pressure sensor, and improving the accuracy of the pressure measured by the sensor.

[0164] In summary, the pressure sensor and its preparation method of the present invention respectively form a plurality of first cavities and a second cavity in the sensor unit area, the first cavity and the second cavity are arranged in an array, and a plurality of absolute pressure sensors and a plurality of gauge pressure sensors are formed and cut in a sensor unit area to obtain a sensor unit, and then select a packaging shell with different structures according to actual needs to perform different packaging methods, so that the sensor unit can be flexibly applied to different application scenarios, and the process of making the sensor unit is compatible with the CMOS-MEMS process, and there is no need to redesign the plate making according to the purpose, and there is no need to encapsulate the temperature sensor in the pressure sensor, which simplifies the production steps, improves the production efficiency, and reduces the production cost; through the combination of the gauge pressure sensor and the absolute pressure sensor arranged in an array in the sensor unit, the temperature compensation in the pressure measurement process is realized by hardware compensation, and there is no need to perform algorithm fitting correction on the measurement data after the measurement, which eliminates the influence of temperature on the pressure measured by the pressure sensor and improves the accuracy of the pressure measured by the sensor. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0165] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a pressure sensor, characterized in that: The following steps are involved: Providing a substrate, defining at least one sensor unit area on the upper surface of the substrate, forming a plurality of first cavities and a plurality of second cavities on the upper surface of the sensor unit area, wherein the first cavities and the second cavities are distributed in an array and open from the upper surface of the sensor unit area; Providing a semiconductor layer, placing the semiconductor layer on the upper surface of the substrate and bonding the semiconductor layer, and thinning the semiconductor layer from the upper surface of the semiconductor layer; Four varistors evenly distributed and including at least one resistance region are formed at the edge regions of the upper surface of the semiconductor layer above the openings of the first cavity and the second cavity, respectively, and lead-out regions connected to the ends of the varistors are formed at the edge or peripheral regions of the upper surface of the semiconductor layer above the first cavity and the second cavity; Forming a dielectric layer covering the upper surface of the semiconductor layer, forming a contact hole above the lead-out region that penetrates the dielectric layer and exposes the lead-out region, and forming a lead structure located on the upper surface of the dielectric layer and filling the contact hole in the sensor unit region; A vent hole is formed and opened from the bottom surface of the substrate, wherein the vent hole is located below the bottom surface of the second cavity and communicates with the second cavity; The structure after the vent hole is formed by cutting along the edge of the sensor unit area is used to obtain a single sensor unit, and a packaging shell that encapsulates the sensor unit is formed. The top wall of the packaging shell is provided with a first pressure hole, and the bottom wall of the packaging shell is provided with a second pressure hole that at least exposes the vent hole.

2. The method for preparing a pressure sensor according to claim 1, characterized in that: The doping type of the lead-out region is the same as the doping type of the resistance region, and the doping concentration of the lead-out region is higher than the doping concentration of the resistance region.

3. The method for preparing a pressure sensor according to claim 1, characterized in that: The resistance areas in the varistor above the adjacent openings of the first cavity and the second cavity are symmetrically distributed.

4. The method for preparing a pressure sensor according to claim 1, characterized in that: The resistance areas in the varistors relatively arranged above the first cavity opening are centrally symmetrically distributed about the central axis of the first cavity; the resistance areas in the varistors relatively arranged above the second cavity opening are centrally symmetrically distributed about the central axis of the second cavity.

5. The method for preparing a pressure sensor according to claim 1, characterized in that: The lead structure includes a lead portion, a filling portion and a pad, the filling portion fills the contact hole, and the lead portion is electrically connected to the pad and the filling portion, respectively.

6. The method for preparing a pressure sensor according to claim 5, characterized in that: The pad includes a ground pad and a positive pad, the positive pad is electrically connected to the positive electrode of the excitation power supply, and the ground pad is electrically connected to the negative electrode of the excitation power supply.

7. The method for preparing a pressure sensor according to claim 6, characterized in that: The pads also include a first output pad, a second output pad, a third output pad and a fourth output pad. Two first series branches formed by any two adjacent varistors connected in series through the lead portions are formed above each first cavity opening. The lead portions of the varistors in the two first series branches are electrically connected to the first output pad and the second output pad, respectively. The two ends of each first series branch are electrically connected to the ground pad and the positive electrode pad, respectively, through the lead portions. Two second series branches formed by any two adjacent varistors in series are formed above each second cavity opening. The lead portions of the varistors in the two second series branches are electrically connected to the third output pad and the fourth output pad, respectively. The two ends of each second series branch are electrically connected to the ground pad and the positive electrode pad, respectively, through the lead portions.

8. The method for preparing a pressure sensor according to claim 7, characterized in that: In the two first series branches above the opening of the first cavity, the two oppositely arranged varistors are electrically connected to the ground pad and the positive electrode pad respectively through the lead portion; in the two second series branches above the opening of the second cavity, the two oppositely arranged varistors are electrically connected to the ground pad and the positive electrode pad respectively through the lead portion.

9. The method for preparing a pressure sensor according to claim 7, characterized in that: The first series branch and the second series branch are symmetrically distributed.

10. The method for preparing a pressure sensor according to claim 7, characterized in that: The first series branch and the second series branch are electrically connected to only one of the ground pads through the lead portion, the two first series branches above each first cavity opening are electrically connected to the same positive electrode pad, the two second series branches above each second cavity opening are electrically connected to the same positive electrode pad, and the series branches above different first cavities and second cavities are electrically connected to different positive electrode pads, respectively.

11. The method for preparing a pressure sensor according to claim 1, characterized in that: The sensor unit is spaced apart from a side wall of the packaging shell by a preset distance, and the top wall of the sensor unit is spaced apart from a bottom wall of the packaging shell by a preset distance.

12. A pressure sensor, characterized in that: include: A substrate, comprising a plurality of first cavities, a plurality of second cavities, and vent holes opening from the bottom surface of the substrate and communicating with the second cavities, wherein the first cavities and the second cavities open from the top surface of the substrate and are distributed in an array; A semiconductor layer is stacked on the upper surface of the substrate to block the openings of the first cavity and the second cavity, four uniformly distributed varistors including at least one resistance area are provided in the edge area of ​​the upper surface of the semiconductor layer above the openings of the first cavity and the second cavity, and a lead-out area connected to the end points of the varistors is provided in the edge or peripheral area of ​​the upper surface of the semiconductor layer above the first cavity and the second cavity; A dielectric layer covering the upper surface of the semiconductor layer, wherein the dielectric layer is provided with a contact hole penetrating the dielectric layer and exposing the lead-out region at the bottom thereof; A lead structure, located on the upper surface of the dielectric layer and filling the contact hole, wherein the substrate, the semiconductor layer, the dielectric layer and the lead structure constitute a sensor unit; The packaging shell encapsulates the sensor unit, and the top wall of the packaging shell is provided with a first pressure hole, and the bottom wall of the packaging shell is provided with a second pressure hole that at least exposes the vent hole.

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