Test device

By designing a test device including a housing, a first circuit board and a probe connector, the problem that high-frequency and low-frequency chip performance testing cannot be performed simultaneously is solved, and efficient synchronization testing is achieved, reducing costs.

CN119471275AActive Publication Date: 2025-02-18KUNSHAN DLOORPLF ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411545664.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-31
Publication Date
2025-02-18
Estimated Expiration
2044-10-31

AI Technical Summary

Technical Problem

When existing test equipment conducts high-frequency and low-frequency chip performance tests, it cannot be performed synchronously due to spatial interference, which affects the test effect.

Method used

A test device is designed including a housing, a first circuit board and a probe connector. The probe connector ensures that the first probe is electrically connected to the first circuit board, the second circuit board, the second probe and the chip to be tested through the base, the second circuit board, the second probe, and the low-frequency performance test. .

Benefits of technology

This device enables low-frequency performance testing and high-frequency performance testing to be performed simultaneously, improving testing efficiency and reducing costs.

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Abstract

The invention discloses test equipment which is used for testing the electrical performance of a chip to be tested. The test equipment comprises a shell, a first circuit board and a probe connector. The first circuit board is arranged in the shell, and the plane where the first circuit board is located is perpendicular to the plane where the chip to be tested is located. The probe connector comprises a base, a second circuit board, a plurality of first probes and a plurality of second probes, the second circuit board is arranged on the base, the base comprises a first base part and a second base part vertically arranged on the first base part, the first base part is connected with the shell, the second base part extends from the first base part to the outside of the shell, and the first base part is connected with the second base part. The first probe is arranged on the first base portion in a penetrating mode in the first direction, the two opposite ends of the first probe are electrically connected with the second circuit board and the first circuit board respectively, the second probe is arranged on the second base portion in a penetrating mode in the second direction, and the two opposite ends of the second probe are electrically connected with the second circuit board and the chip to be tested respectively. By means of the arrangement, synchronous testing of high performance and low performance of the chip is achieved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor testing devices, and in particular to a testing device. Background Art

[0002] With the development of the communications industry, the requirements for chips and chip testing are becoming higher and higher. At present, when the high-frequency and low-frequency performance of chips are tested synchronously, due to the space problem of the test equipment, the high-frequency test equipment and the low-frequency test equipment often interfere with each other and cannot be tested synchronously, affecting the test effect.

[0003] Therefore, it is necessary to provide a testing device to solve the above problems. Summary of the invention

[0004] The object of the present invention is to provide a testing device, which can make low-frequency performance testing and high-frequency performance testing be performed synchronously, thereby improving testing efficiency.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] A test device for performing electrical performance test on a chip to be tested, comprising:

[0007] case;

[0008] A first circuit board is arranged in the housing, wherein a plane where the first circuit board is located is perpendicular to a plane where the chip to be tested is located;

[0009] A probe connector, the probe connector comprising a base, a second circuit board, a plurality of first probes and a plurality of second probes, the second circuit board being arranged on the base, the base comprising a first base and a second base being arranged perpendicularly to the first base, the first base and the first circuit board being parallel to each other, the second base and the chip to be tested being parallel to each other, the first base being connected to the shell, the second base extending from the first base to the outside of the shell, the first probe being passed through the first base along a first direction, and the opposite ends of the first probe being electrically connected to the second circuit board and the first circuit board respectively, the second probe being passed through the second base along a second direction, and the opposite ends of the second probe being electrically connected to the second circuit board and the chip to be tested respectively, and the first direction is perpendicular to the second direction.

[0010] Furthermore, the second circuit board includes a first sub-circuit board and a second sub-circuit board, the first sub-circuit board is arranged on the first base, the second sub-circuit board is arranged on the second base, and the first sub-circuit board is electrically connected to the second sub-circuit board.

[0011] Furthermore, the probe connector also includes a connecting wire, and two ends of the connecting wire are electrically connected to the first sub-circuit board and the second sub-circuit board respectively.

[0012] Furthermore, the probe connector also includes a first pressure plate and a second pressure plate, the first pressure plate is arranged between the first sub-circuit board and the first base, and one end of the first probe passes through the first pressure plate to be electrically connected to the first sub-circuit board; the second pressure plate is arranged between the second sub-circuit board and the second base, and one end of the second probe passes through the second pressure plate to be electrically connected to the second sub-circuit board.

[0013] Furthermore, the first base has a first groove, the first groove has a plurality of first through holes, at least part of the first probes are inserted into the first through holes, the first pressure plate is arranged in the first groove, and at least another part of the first probes pass through the first pressure plate to be electrically connected to the first sub-circuit board.

[0014] Further, the first through hole includes a first hole portion and a second hole portion, the first hole portion is connected to the second hole portion, the diameter of the first hole portion is larger than that of the second hole portion, the first hole portion is closer to the first pressure plate relative to the second hole portion, and the first probe includes a first main body portion and two first contact portions elastically arranged at opposite ends of the first main body portion, the first main body portion is arranged in the first hole portion, one of the first contact portions passes through the second hole portion to be electrically connected to the first circuit board, and the other first contact portion passes through the first pressure plate to be electrically connected to the first sub-circuit board.

[0015] Furthermore, the second base has a second groove, the second groove has a plurality of second through holes, at least part of the second probes are inserted into the second through holes, the second pressure plate is arranged in the second groove, and at least another part of the second probes pass through the second pressure plate to be electrically connected to the second sub-circuit board.

[0016] Further, the second through hole includes a third hole portion and a fourth hole portion, the third hole portion is connected to the fourth hole portion, and the diameter of the third hole portion is larger than that of the fourth hole portion, and the third hole portion is close to the second pressure plate relative to the fourth hole portion, and the second probe includes a second main body portion and two second contact portions elastically arranged at opposite ends of the second main body portion, the second main body portion is arranged in the third hole portion, one of the second contact portions passes through the fourth hole portion to be electrically connected to the chip to be tested, and the other second contact portion passes through the second pressure plate to be electrically connected to the second sub-circuit board.

[0017] Furthermore, a first positioning column is provided in the first groove, the first pressure plate has a first positioning hole, the first sub-circuit board has a second positioning hole, and the first positioning column passes through the first positioning hole and the second positioning hole; a second positioning column is provided in the second groove, the second pressure plate has a third positioning hole, the second sub-circuit board has a fourth positioning hole, and the second positioning column passes through the third positioning hole and the fourth positioning hole.

[0018] Furthermore, the probe connector further includes a first fastener and a second fastener, wherein the first fastener passes through the first sub-circuit board, the first pressure plate and is connected to the first base, and the second fastener passes through the second sub-circuit board, the second pressure plate and is connected to the second base.

[0019] Compared with the prior art, the beneficial effects of the present invention are:

[0020] The present invention discloses a test device for performing an electrical performance test on a chip to be tested. The test device includes a housing, a first circuit board and a probe connector. The first circuit board is arranged in the housing, and the plane where the first circuit board is located is perpendicular to the plane where the chip to be tested is located. The probe connector includes a base, a second circuit board, a plurality of first probes and a plurality of second probes. The second circuit board is arranged on the base, and the base includes a first base and a second base vertically arranged on the first base, the first base is connected to the housing, and the second base extends from the first base to the outside of the housing. By passing the first probe through the first base along the first direction, the second probe through the second base along the second direction, and the opposite ends of the second probe are electrically connected to the second circuit board and the chip to be tested respectively, the low-frequency performance of the chip to be tested is tested. In this way, when the test device performs a low-frequency performance test on the chip to be tested, it will not interfere with other equipment that performs a high-frequency performance test, thereby improving the test efficiency and reducing the cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a three-dimensional schematic diagram of the test equipment and the chip to be tested in the present invention;

[0022] Figure 2 It is a three-dimensional exploded schematic diagram of the testing device in the present invention;

[0023] Figure 3 is a three-dimensional schematic diagram of the probe connector of the present invention;

[0024] Figure 4 yes Figure 3 A three-dimensional schematic diagram from another angle;

[0025] Figure 5 yes Figure 3 A top view of

[0026] Figure 6 yes Figure 5 Schematic diagram of the cross section along AA;

[0027] Figure 7 yes Figure 3 Schematic diagram of the three-dimensional decomposition of

[0028] Figure 8 yes Figure 7 A partial enlarged schematic diagram of part B;

[0029] Fig. 9 yes Figure 7 A partial enlarged schematic diagram of part C in the middle;

[0030] Fig.10 It is a three-dimensional schematic diagram of the base, the first probe, the first pressing plate, the second probe, and the second pressing plate in the present invention;

[0031] Fig.11 yes Fig.10 Schematic diagram of the three-dimensional decomposition of

[0032] Fig.12 It is a three-dimensional schematic diagram of the base in the present invention;

[0033] Fig.13 The base, the first pressing block and the second pressing block of the present invention are in an assembled state;

[0034] Fig.14 yes Fig.13 A partial enlarged schematic diagram of part D in the middle;

[0035] Fig.15 yes Fig.13 A partial enlarged schematic diagram of part E in the middle. DETAILED DESCRIPTION

[0036] The exemplary embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. If there are several embodiments, the features of these embodiments can be combined with each other without conflict. When the description refers to the drawings, unless otherwise specified, the same numbers in different drawings represent the same or similar elements. The contents described in the following exemplary embodiments do not represent all embodiments consistent with the present invention; on the contrary, they are only examples of devices, products and / or methods consistent with some aspects of the present invention as recorded in the claims of the present invention.

[0037] The terms used in the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the scope of protection of the present invention. The singular forms "a", "said" or "the" used in the specification and claims of the present invention are also intended to include plural forms, unless the context clearly indicates other meanings.

[0038] Please refer to Figures 1 to 15 The present invention discloses a test device 100 for performing an electrical performance test on a chip to be tested 200. The test device 100 includes a housing 1, a first circuit board 2, and a probe connector 3. The first circuit board 2 is disposed in the housing 1, and the plane where the first circuit board 2 is located is perpendicular to the plane where the chip to be tested 200 is located. The housing 1 has a receiving cavity 101, the first circuit board 2 is disposed in the receiving cavity 101, the outer wall of the housing 1 has a mounting hole 102, and at least part of the test device 100 extends out of the mounting hole 102. The probe connector 3 includes a base 31, a second circuit board 32, a plurality of first probes 33, and a plurality of second probes 34. The second circuit board 32 is disposed on the base 31, and the base 31 includes a first base 311 and a second base 312 vertically disposed on the first base 311, the first base 311 and the first circuit board 2 are parallel to each other, and the second base 312 and the chip to be tested 200 are parallel to each other. The first base 311 is connected to the housing 1, and the second base 312 extends from the first base 311 to the outside of the housing 1. The first probe 33 is arranged in the first base 311 along the first direction D1-D1, and the opposite ends of the first probe 33 are electrically connected to the second circuit board 32 and the first circuit board 2 respectively. The second probe 34 is arranged in the second base 312 along the second direction D2-D2, and the opposite ends of the second probe 34 are electrically connected to the second circuit board 32 and the chip under test 200 respectively. In this way, when the test device 100 performs a low-frequency performance test on the chip under test 200, it will not interfere with other equipment performing a high-frequency performance test, thereby improving the test efficiency and reducing the cost.

[0039] For ease of explanation, the attached Figure 2 The figure shows that the front-to-back direction of the detection mechanism is defined as the first direction D1-D1, the up-down direction of the probe mechanism is the second direction D2-D2, and the left-right direction of the probe mechanism is the third direction D3-D3. The first direction D1-D1, the second direction D2-D2, and the third direction D3-D3 are perpendicular to each other.

[0040] Please refer to Figure 2 In this embodiment, the first circuit board 2 is fixed to the inner wall of the housing 1, and the wall of the housing 1 is provided with a boss 11, which is arranged near the mounting hole 102, at least part of the first base 311 is located in the receiving cavity 101, and at least part of the first base 311 is connected to the boss 11 through a fastener. At least another part of the first base 311 extends from the mounting hole 102 to the outside of the housing 1 along the second direction D2-D2, and the second base 312 is perpendicularly arranged at the free end of the first base 311 along the first direction D1-D1.

[0041] Please refer to Figures 3 to 6, the second circuit board 32 includes a first sub-circuit board 321 and a second sub-circuit board 322, the first sub-circuit board 321 is arranged on the first base 311, the second sub-circuit board 322 is arranged on the second base 312, and the first sub-circuit board 321 is electrically connected to the second sub-circuit board 322. In this embodiment, the first base 311 and the second base 312 are in an "L" shape, and the first sub-circuit board 321 and the second sub-circuit board 322 are located on the same side of the "L"-shaped base 31, so that the first sub-circuit board 321 and the second sub-circuit board 322 can be electrically connected. In this embodiment, the probe connector 3 also includes a connecting wire, and the two ends of the connecting wire are electrically connected to the first sub-circuit board 321 and the second sub-circuit board 322 respectively, so that the first sub-circuit board 321, the second sub-circuit board 322 and the first circuit board 2 are electrically connected, so that the low-frequency performance of the chip 200 to be tested can be tested. In other embodiments, the second circuit board 32 is an integral flexible circuit board, which is electrically connected to the first probe 33 and the second probe 34 respectively, and can also test the low-frequency performance of the chip 200 to be tested, which is not limited here.

[0042] Please refer to Figures 3 to 7 The probe connector 3 further includes a first pressing plate 35 and a second pressing plate 36. The first pressing plate 35 is disposed between the first sub-circuit board 321 and the first base 311. One end of the first probe 33 passes through the first pressing plate 35 and is electrically connected to the first sub-circuit board 321. The second pressing plate 36 is disposed between the second sub-circuit board 322 and the second base 312. One end of the second probe 34 passes through the second pressing plate 36 and is electrically connected to the second sub-circuit board 322. Such an arrangement enables a plurality of first probes 33 to be fixed to the first base 311, and a plurality of second probes 34 to be fixed to the second base 312, thereby improving the test stability of the first probes 33 and the second probes 34.

[0043] Please refer to Figure 7 , the first base 311 has a first groove 3111, the first groove 3111 has a plurality of first through holes 301, at least part of the first probe 33 is inserted into the first through hole 301, the first pressure plate 35 is arranged in the first groove 3111, and at least another part of the first probe 33 passes through the first pressure plate 35 and is electrically connected to the first sub-circuit board 321. In this embodiment, the first groove 3111 is arranged on the other side of the first base 311 relative to the second base 312. The plurality of first through holes 301 are extended along the third direction D3-D3. The number of the plurality of first through holes 301 is set according to the needs of the test to cooperate with the installation of the first probe 33. The shape of the first groove 3111 is consistent with the shape of the first pressure plate 35, so that the first pressure plate 35 can be embedded in the first groove 3111, thereby making the overall structure of the probe connector 3 more compact.

[0044] Please refer to Figures 3 to 15 The first through hole 301 includes a first hole portion 3001 and a second hole portion 3002, the first hole portion 3001 is connected to the second hole portion 3002, the diameter of the first hole portion 3001 is larger than that of the second hole portion 3002, the first hole portion 3001 is closer to the first pressure plate 35 relative to the second hole portion 3002, the first probe 33 includes a first body portion 331 and two first contact portions 332 elastically arranged at opposite ends of the first body portion 331, the first body portion 331 is arranged in the first hole portion 3001, one of the first contact portions 332 passes through the second hole portion 3002 to be electrically connected to the first circuit board 2, and the other first contact portion 332 passes through the first pressure plate 35 to be electrically connected to the first sub-circuit board 321. In this embodiment, a plurality of first limiting holes 303 are provided on the first pressing plate 35, and the arrangement direction of the plurality of first limiting holes 303 is consistent with the arrangement direction of the first through holes 301, and each first limiting hole 303 is arranged correspondingly to each first through hole 301 up and down, so as to facilitate the assembly of the first probe 33. Specifically, the first limiting hole 303 includes a fifth hole portion 3005 and a sixth hole portion 3006, the fifth hole portion 3005 is connected to the sixth hole portion 3006, and the diameter of the fifth hole portion 3005 is larger than that of the sixth hole portion 3006. At least part of the first body portion 331 of the first probe 33 is arranged in the fifth hole portion 3005, and one of the first contact portions 332 passes through the sixth hole portion 3006 and is electrically connected to the first sub-circuit board 321. In this way, when the first pressing plate 35 is embedded in the first groove 3111 , the first probe 33 can be fixed between the first base 311 and the first pressing plate 35 , so as to prevent the change of the position of the first probe 33 from causing a circuit break and affecting the test.

[0045] Please refer to Figures 3 to 15 , the second base 312 has a second groove 3121, the second groove 3121 has a plurality of second through holes 302, at least part of the second probe 34 is inserted into the second through hole 302, the second pressure plate 36 is arranged in the second groove 3121, and at least another part of the second probe 34 passes through the second pressure plate 36 to be electrically connected to the second sub-circuit board 322. In this embodiment, the second groove 3121 is arranged on the other side of the second base 312 relative to the first base 311. The plurality of second through holes 302 are extended along the third direction D3-D3. The number of the plurality of second through holes 302 is set according to the needs of the test to cooperate with the installation of the second probe 34. The shape of the second groove 3121 is consistent with the shape of the second pressure plate 36, so that the second pressure plate 36 can be embedded in the second groove 3121, thereby making the overall structure of the probe connector 3 more compact.

[0046] The second through hole 302 includes a third hole portion 3003 and a fourth hole portion 3004, the third hole portion 3003 is connected to the fourth hole portion 3004, and the diameter of the third hole portion 3003 is larger than that of the fourth hole portion 3004, the third hole portion 3003 is closer to the second pressure plate 36 relative to the fourth hole portion 3004, the second probe 34 includes a second body portion 341 and two second contact portions 342 elastically arranged at opposite ends of the second body portion 341, the second body portion 341 is arranged in the third hole portion 3003, one of the second contact portions 342 passes through the fourth hole portion 3004 to be electrically connected to the chip to be tested 200, and the other second contact portion 342 passes through the second pressure plate 36 to be electrically connected to the second sub-circuit board 322. In this embodiment, a plurality of second limiting holes 304 are provided on the second pressing plate 36, and the arrangement direction of the plurality of second limiting holes 304 is consistent with the arrangement direction of the second through holes 302, and each second limiting hole 304 is arranged correspondingly to each second through hole 302 up and down, so as to facilitate the assembly of the second probe 34. Specifically, the second limiting hole 304 includes a seventh hole portion 3007 and an eighth hole portion 3008, the seventh hole portion 3007 is connected to the eighth hole portion 3008, and the diameter of the seventh hole portion 3007 is larger than that of the eighth hole portion 3008. At least part of the second body portion 341 of the second probe 34 is arranged in the seventh hole portion 3007, and one of the second contact portions 342 passes through the eighth hole portion 3008 and is electrically connected to the second sub-circuit board 322. Thus, when the second pressing plate 36 is embedded in the second groove 3121 , the second probe 34 can be fixed between the second base 312 and the second pressing plate 36 , so as to prevent the change of the position of the second probe 34 from causing a circuit break and affecting the test.

[0047] Please refer to Figure 7 as well as Figures 10 to 12, a first positioning column 3112 is provided in the first groove 3111, the first pressing plate 35 has a first positioning hole 305, and the first sub-circuit board 321 has a second positioning hole 306. Specifically, the first positioning column 3112 includes two, and the two first positioning columns 3112 are arranged at intervals along the third direction D3-D3 at the top of the first groove 3111. The first positioning hole 305 includes two, and the two first positioning holes 305 are arranged at intervals along the third direction D3-D3 on the first pressing plate 35, and the second positioning hole 306 includes two, and the two second positioning holes 306 are arranged at intervals along the third direction D3-D3 on the first sub-circuit board 321. The first positioning column 3112, the first positioning hole 305 and the second positioning hole 306 are arranged correspondingly up and down. When the first pressing plate 35 is embedded in the first groove 3111 and the first sub-circuit board 321 is arranged on the top of the first pressing plate 35, the first positioning column 3112 passes through the first positioning hole 305 and the second positioning hole 306, so that the first base 311, the first pressing plate 35 and the first sub-circuit board 321 are firmly fixed, thereby improving the test accuracy. The second base 312 is provided with a second positioning column 3122, the second pressing plate 36 has a third positioning hole 307, and the second sub-circuit board 322 has a fourth positioning hole 308. Specifically, the second positioning column 3122 includes two, and the two second positioning columns 3122 are arranged at the top of the second groove 3121 along the third direction D3-D3. The third positioning holes 307 include two, and the two third positioning holes 307 are spaced apart along the third direction D3-D3 on the second pressing plate 36. The fourth positioning holes 308 include two, and the two fourth positioning holes 308 are spaced apart along the third direction D3-D3 on the second sub-circuit board 322. The second positioning column 3122, the third positioning hole 307 and the fourth positioning hole 308 are correspondingly arranged up and down. When the second pressing plate 36 is embedded in the second groove 3121 and the second sub-circuit board 322 is arranged on the top of the second pressing plate 36, the second positioning column 3122 passes through the third positioning hole 307 and the fourth positioning hole 308, so that the second base 312, the second pressing plate 36 and the second sub-circuit board 322 are firmly fixed, thereby improving the test accuracy.

[0048] Please refer to Figure 10 to Figure 11 The first pressing plate 35 also has a first connecting hole 309, which is located between the two first positioning holes 305. The fastener passes through the first connecting hole 309 and is threadedly connected to the first base 311, so that the first pressing plate 35 is connected and fixed to the first base 311, thereby fixing the first probe 33 to the first base 311. The second pressing plate 36 also has two second connecting holes 310, which are located outside the two second limiting holes 304. The fastener passes through the second connecting hole 310 and is threadedly connected to the second base 312, so that the second pressing plate 36 is connected and fixed to the second base 312, thereby fixing the second probe 34 to the second base 312.

[0049] Please refer to Figure 7 The probe connector 3 further includes a first fastener 37 and a second fastener 38. The first fastener 37 passes through the first sub-circuit board 321, the first pressure plate 35, and the first base 311 to connect with the housing 1. The second fastener 38 passes through the second sub-circuit board 322, the second pressure plate 36, and connects with the second base 312. In this embodiment, the first fastener is fixedly connected to the boss 11, thereby fixing the probe connector 3 to the boss 11.

[0050] In summary, the present invention discloses a test device 100 for performing an electrical performance test on a chip to be tested 200. The test device 100 includes a housing 1, a first circuit board 2, and a probe connector 3. The first circuit board 2 is disposed in the housing 1, and the plane where the first circuit board 2 is located is perpendicular to the plane where the chip to be tested 200 is located. The probe connector 3 includes a base 31, a second circuit board 32, a plurality of first probes 33, and a plurality of second probes 34. The second circuit board 32 is disposed on the base 31, and the base 31 includes a first base 311 and a second base 312 vertically disposed on the first base 311, connecting the first base 311 to the housing 1, and the second base 312 extends from the first base 311 to the outside of the housing 1. The first probe 33 is inserted into the first base 311 along the first direction D1-D1, and the second probe 34 is inserted into the second base 312 along the second direction D2-D2, and the two opposite ends of the second probe 34 are electrically connected to the second circuit board 32 and the chip to be tested 200, respectively, to test the low-frequency performance of the chip to be tested 200. In this way, when the test device 100 performs a low-frequency performance test on the chip to be tested 200, it will not interfere with other equipment that performs a high-frequency performance test, thereby improving test efficiency and reducing costs.

[0051] It should be understood that the words used in the specification and claims of the present invention, such as "first", "second" and similar words, do not indicate any order, quantity or importance, but are only used to distinguish the names of features. Similarly, words such as "one" or "an" do not indicate a quantitative limitation, but indicate the existence of at least one. Unless otherwise specified, words such as "front", "rear", "upper", "lower" and similar words appearing in the present invention are only for the convenience of explanation and are not limited to a specific position or a spatial orientation. Words such as "include" or "comprise" are an open-ended expression, meaning that the elements appearing before "include" or "comprise" include the elements appearing after "include" or "comprise" and their equivalents, which does not exclude that the elements appearing before "include" or "comprise" may also include other elements. If "several" appears in the present invention, it means two or more.

[0052] The above embodiments are only used to illustrate the present invention but not to limit the technical solutions described in the present invention. The understanding of this specification should be based on the technical personnel in the relevant technical field. For example, the description of directions such as "front", "back", "left", "right", "up", and "down". Although this specification has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that technicians in the relevant technical field can still modify or replace the present invention with equivalents, and all technical solutions and improvements that do not depart from the spirit and scope of the present invention should be covered within the scope of the claims of the present invention.

Claims

1. A testing device for performing electrical performance testing on a chip to be tested (200), characterized in that: include: Housing (1); A first circuit board (2) is arranged in the housing (1), wherein the plane where the first circuit board (2) is located is perpendicular to the plane where the chip to be tested (200) is located; A probe connector (3), the probe connector (3) comprising a base (31), a second circuit board (32), a plurality of first probes (33) and a plurality of second probes (34), the second circuit board (32) being arranged on the base (31), the base (31) comprising a first base (311) and a second base (312) arranged perpendicularly to the first base (311), the first base and the first circuit board (2) being parallel to each other, the second base (312) and the chip to be tested (200) being parallel to each other, the first base (311) being connected to the housing (1), The second base (312) extends from the first base (311) to the outside of the shell (1); the first probe (33) is arranged in the first base (311) along a first direction, and the opposite ends of the first probe (33) are respectively electrically connected to the second circuit board (32) and the first circuit board (2); the second probe (34) is arranged in the second base (312) along a second direction, and the opposite ends of the second probe (34) are respectively electrically connected to the second circuit board (32) and the chip to be tested (200); the first direction is perpendicular to the second direction.

2. The test device according to claim 1, characterized in that: The second circuit board (32) comprises a first sub-circuit board (321) and a second sub-circuit board (322); the first sub-circuit board (321) is arranged on the first base (311); the second sub-circuit board (322) is arranged on the second base (312); the first sub-circuit board (321) is electrically connected to the second sub-circuit board (322).

3. The test device according to claim 2, characterized in that: The probe connector (3) further comprises a connecting wire, two ends of which are electrically connected to the first sub-circuit board (321) and the second sub-circuit board (322) respectively.

4. The testing device according to claim 2, characterized in that: The probe connector (3) further comprises a first pressure plate (35) and a second pressure plate (36), wherein the first pressure plate (35) is arranged between the first sub-circuit board (321) and the first base (311), and one end of the first probe (33) passes through the first pressure plate (35) to be electrically connected to the first sub-circuit board (321); the second pressure plate (36) is arranged between the second sub-circuit board (322) and the second base (312), and one end of the second probe (34) passes through the second pressure plate (36) to be electrically connected to the second sub-circuit board (322).

5. The testing device according to claim 4, characterized in that: The first base (311) has a first groove (3111), the first groove (3111) has a plurality of first through holes (301), at least part of the first probes (33) are inserted into the first through holes (301), the first pressing plate (35) is arranged in the first groove (3111), and at least another part of the first probes (33) passes through the first pressing plate (35) to be electrically connected to the first sub-circuit board (321).

6. The testing device according to claim 5, characterized in that: The first through hole (301) comprises a first hole portion (3001) and a second hole portion (3002), the first hole portion (3001) and the second hole portion (3002) are connected, the diameter of the first hole portion (3001) is larger than that of the second hole portion (3002), the first hole portion (3001) is closer to the first pressure plate (35) relative to the second hole portion (3002), the first probe (33) comprises a first body portion (331) and two first contact portions (332) elastically arranged at opposite ends of the first body portion (331), the first body portion (331) is arranged in the first hole portion (3001), one of the first contact portions (332) passes through the second hole portion (3002) to be electrically connected to the first circuit board (2), and the other first contact portion (332) passes through the first pressure plate (35) to be electrically connected to the first sub-circuit board (321).

7. The testing device according to claim 5, characterized in that: The second base (312) has a second groove (3121), the second groove (3121) has a plurality of second through holes (302), at least part of the second probes (34) are inserted into the second through holes (302), the second pressing plate (36) is arranged in the second groove (3121), and at least another part of the second probes (34) pass through the second pressing plate (36) to be electrically connected to the second sub-circuit board (322).

8. The testing device according to claim 7, characterized in that: The second through hole (302) comprises a third hole portion (3003) and a fourth hole portion (3004), the third hole portion (3003) being connected to the fourth hole portion (3004), and the diameter of the third hole portion (3003) is larger than that of the fourth hole portion (3004), and the third hole portion (3003) is closer to the second pressure plate (36) relative to the fourth hole portion (3004), and the second probe (34) comprises a second body portion (341) and two second contact portions (342) elastically arranged at opposite ends of the second body portion (341), the second body portion (341) being arranged in the third hole portion (3003), one of the second contact portions (342) passing through the fourth hole portion (3004) to be electrically connected to the chip to be tested (200), and the other second contact portion (342) passing through the second pressure plate (36) to be electrically connected to the second sub-circuit board (322).

9. The testing device according to claim 8, characterized in that: A first positioning column (3112) is provided in the first groove (3111), the first pressure plate (35) has a first positioning hole (305), the first sub-circuit board (321) has a second positioning hole (306), and the first positioning column (3112) passes through the first positioning hole (305) and the second positioning hole (306); a second positioning column (3122) is provided in the second groove (3121), the second pressure plate (36) has a third positioning hole (307), the second sub-circuit board (322) has a fourth positioning hole (308), and the second positioning column (3122) passes through the third positioning hole (307) and the fourth positioning hole (308).

10. The testing device according to claim 4, characterized in that: The probe connector (3) further comprises a first fastener (37) and a second fastener (38), wherein the first fastener (37) passes through the first sub-circuit board (321), the first pressure plate (35) and is connected to the first base (311), and the second fastener (38) passes through the second sub-circuit board (322), the second pressure plate (36) and is connected to the second base (312).

Citation Information

Patent Citations

  • Probe head with linear probe

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  • Carrier plate type bare chip power amplifier module testing device

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  • Probe head for high frequency signal test and medium or low frequency signal test at the same time

    CN112394205A

  • High-frequency detection assembly

    CN113848351A

  • Probe assembly

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